WO2020103364A1 - 异方性导电胶带及其制作方法 - Google Patents

异方性导电胶带及其制作方法

Info

Publication number
WO2020103364A1
WO2020103364A1 PCT/CN2019/079430 CN2019079430W WO2020103364A1 WO 2020103364 A1 WO2020103364 A1 WO 2020103364A1 CN 2019079430 W CN2019079430 W CN 2019079430W WO 2020103364 A1 WO2020103364 A1 WO 2020103364A1
Authority
WO
WIPO (PCT)
Prior art keywords
electrically insulating
conductive
fiber
insulating fiber
fibers
Prior art date
Application number
PCT/CN2019/079430
Other languages
English (en)
French (fr)
Inventor
杨汉宁
Original Assignee
武汉华星光电半导体显示技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US16/619,091 priority Critical patent/US11041098B2/en
Publication of WO2020103364A1 publication Critical patent/WO2020103364A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01B—CABLES; CONDUCTORS; INSULATORS; SELECTION OF MATERIALS FOR THEIR CONDUCTIVE, INSULATING OR DIELECTRIC PROPERTIES
    • H01B3/00—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties
    • H01B3/18—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of organic substances
    • H01B3/48—Insulators or insulating bodies characterised by the insulating materials; Selection of materials for their insulating or dielectric properties mainly consisting of organic substances fibrous materials
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J9/00—Adhesives characterised by their physical nature or the effects produced, e.g. glue sticks
    • C09J9/02—Electrically-conducting adhesives
    • C—CHEMISTRY; METALLURGY
    • C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
    • C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
    • C09J7/00—Adhesives in the form of films or foils
    • C09J7/20—Adhesives in the form of films or foils characterised by their carriers
    • C09J7/22—Plastics; Metallised plastics
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    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
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    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10—Bump connectors ; Manufacturing methods related thereto
    • H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/12—Passive devices, e.g. 2 terminal devices
    • H01L2924/1204—Optical Diode
    • H01L2924/12044—OLED
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007—Types of components
    • H05K2201/10128—Display

Definitions

  • the invention relates to the field of display technology, in particular to an anisotropic conductive adhesive tape and a manufacturing method thereof.
  • the existing flat display devices on the market include liquid crystal display devices (Liquid Crystal Display, LCD) and active matrix organic light emitting diodes (Active-matrix organic light emitting diode (AMOLED) display device.
  • LCD Liquid Crystal Display
  • AMOLED Active matrix organic light emitting diode
  • AMOLED has the characteristics of self-luminescence, high brightness, wide viewing angle, high contrast, flexibility, low energy consumption, etc., so it has received extensive attention.
  • As a new generation of display it has gradually replaced traditional LCD displays and is widely used in Mobile phone screen, computer monitor, full-color TV, etc.
  • Existing flat panel displays generally include a display panel (Panel) and an external circuit.
  • an external circuit such as a flexible circuit board (Free Pascal Compiler (FPC), or Chip On Film (COF)
  • FPC Free Pascal Compiler
  • COF Chip On Film
  • OLB outer lead bonding
  • the bonding process is mainly to connect the external circuit to the display panel through pre-compression and local pressure on the pressing device, and connect the external circuit
  • the external electrodes on the display and the electrode wires on the display panel are pressed together, and the middle is connected through anisotropic conductive adhesive (Anisotropic Conductive Film, ACF).
  • the more common anisotropic conductive tape products mainly include thermosetting resin, conductive particles, curing agent, plasticizer and other components.
  • the above components must be dissolved in a volatile solvent to prepare anisotropy Conductive adhesive, then apply anisotropic conductive adhesive on the plastic film, and remove the solvent through hot air drying to form anisotropic conductive tape.
  • the ACF 500 mainly includes a colloidal layer 510 and conductive particles 520 mixed in the colloidal layer 510, wherein the conductive particles 520 impart electrical conductivity to the ACF500, and the colloidal layer 510 imparts adhesive and insulating properties to the ACF500.
  • the display substrate and the external circuit respectively have several corresponding tiny bumps as electrodes, and the ACF is placed between the display substrate and the external circuit, and then pressed together
  • the device hot-presses the ACF to cause the ACF to react.
  • the viscosity of the ACF is changed by heating, and the conductive particles in the ACF are pressed between the substrate and the external circuit by pressing, being pressed
  • the conductive particles form an electrical connection between the display substrate and the external circuit.
  • each bump captures more than a certain number of conductive particles to achieve conduction.
  • Low-density conductive particles limit the number of conductive particles distributed in each bump, and as shown in Figure 1, the existing conductive particles in the ACF are randomly distributed, so each bump captures a certain number of conductive particles. The area must be increased accordingly, thereby affecting the realization of more drive circuit designs.
  • An object of the present invention is to provide an anisotropic conductive tape that can achieve a good binding effect on electrode protrusions with a small area, so that more drive circuit designs can be implemented on the display panel.
  • the object of the present invention is also to provide a method for manufacturing an anisotropic conductive tape.
  • the obtained anisotropic conductive tape can achieve a good binding effect on electrode protrusions with a small area, so that more can be realized on the display panel Design of driving circuit.
  • the present invention provides an anisotropic conductive tape including a resin base tape and a plurality of composite fibers arranged horizontally in the resin base tape periodically arranged along the extension direction of the resin base tape;
  • Each of the composite fibers includes an electrically insulating fiber and a plurality of conductive rings that are periodically arranged along the axial direction of the electrically insulating fiber and sleeved on the electrically insulating fiber;
  • the conductive ring includes a plurality of conductive particles that surround the electrically insulating fiber by adsorption.
  • the anisotropic conductive tape further includes separation layers provided on the upper and lower surfaces of the resin base tape;
  • the thickness of the separation layer is 2-3 ⁇ m.
  • the shape of the conductive particles is spherical, cubic or conical;
  • the equivalent particle size of the conductive particles is 5-100 nm.
  • the length of the electrically insulating fiber is 10-5000 ⁇ m.
  • the width of the conductive ring is 50-1000 nm, and the width of the interval between two adjacent conductive rings on each composite fiber is 500-5000 nm.
  • the width of the interval between two adjacent composite fibers in the resin base tape is 1-10 ⁇ m.
  • the invention also provides a method for manufacturing anisotropic conductive tape, which includes the following steps:
  • Step S1 making multiple composite fibers, and periodically arranging the multiple composite fibers
  • Each of the composite fibers includes an electrically insulating fiber and a plurality of conductive rings that are periodically arranged along the axial direction of the electrically insulating fiber and are sleeved on the electrically insulating fiber; the electrically conductive ring includes surrounding the electrically insulating fiber by adsorption Multiple conductive particles on
  • step S2 an adhesive is provided, and the plurality of composite fibers are wrapped with the adhesive to obtain a resin base tape.
  • the plurality of composite fibers are laterally arranged in the resin base tape and periodically arranged along the extension direction of the resin base tape.
  • the process of making the composite fiber in step S1 specifically includes the following steps:
  • Step S11 providing electrically insulating fibers and conductive particles, performing surface modification treatment on the electrically insulating fibers, so that the conductive particles are adsorbed on the surface of the electrically insulating fibers by electrostatic action, and forming a conductive layer coated with the electrically insulating fibers;
  • Step S12 forming a shielding pattern layer on the surface of the conductive layer, removing the conductive layer on the surface of the electrically insulating fiber not covered by the shielding pattern layer, and forming a plurality of periodically arranged along the axial direction of the electrically insulating fiber A conductive ring looped on the electrically insulating fiber;
  • Step S13 The masking pattern layer is removed to obtain composite fibers.
  • the process of making the composite fiber in step S1 specifically includes the following steps:
  • Step S11 providing electrically insulating fibers, and performing surface modification treatment on the electrically insulating fibers; forming a shielding pattern layer on the surface of the electrically insulating fibers;
  • Step S12 providing conductive particles, so that the conductive particles are adsorbed on the surface of the electrically insulating fiber not covered by the shielding pattern layer by electrostatic action, and a plurality of rings arranged periodically along the axial direction of the electrically insulating fiber are formed on the electrically insulating fiber On the conductive ring;
  • Step S13 The masking pattern layer is removed to obtain composite fibers.
  • step S3 forming separation layers on the upper and lower surfaces of the resin base tape.
  • the anisotropic conductive tape of the present invention includes a resin base tape and a plurality of composite fibers disposed laterally in the resin base tape, each of the composite fibers includes an electrically insulating fiber and a plurality of loops sleeved on the electrically insulating A conductive ring on the fiber, the conductive ring includes a plurality of conductive particles that surround the electrically insulating fiber by adsorption, wherein the plurality of composite fibers are periodically arranged in the resin base tape along the extension direction of the resin base tape, and each The multiple conductive rings on the composite fiber are periodically arranged along the axial direction of the electrical insulating fiber.
  • the conductive ring is fixed on the surface of the electrical insulating fiber, the conductive ring and the electrical insulating fiber are not easily squeezed out of the electrode when they are bound In the area, even when the area of the electrode protrusion is reduced, the electrode protrusion can still make good contact with the conductive ring, so that more driving circuit designs can be realized on the display panel, and thus the resolution of the display panel can be effectively improved.
  • the prepared anisotropic conductive tape of the present invention can also achieve a good binding effect on electrode protrusions with a small area, thereby enabling more driving circuits on the display panel design.
  • FIG. 1 is a schematic structural diagram of an existing anisotropic conductive tape
  • FIG. 2 is a perspective schematic view and a side schematic view of the composite fiber in the anisotropic conductive tape of the present invention
  • FIG. 3 is a schematic structural view of the anisotropic conductive tape of the present invention.
  • FIG. 4 is a schematic diagram of the anisotropic conductive adhesive provided between the display substrate and the external circuit before binding;
  • FIG. 5 is a schematic diagram of electrical connection between the display substrate and the external circuit after binding the anisotropic conductive adhesive of the present invention
  • FIG. 6 is a schematic top view of the anisotropic conductive adhesive of the present invention for binding electrode bumps arranged laterally;
  • FIG. 7 is a schematic top view of the anisotropic conductive adhesive of the present invention for binding longitudinally arranged electrode protrusions;
  • FIG. 8 is a schematic flow chart of the method for manufacturing the anisotropic conductive tape of the present invention.
  • step S1 of the first embodiment of the method for manufacturing an anisotropic conductive tape of the present invention is a schematic diagram of step S1 of the first embodiment of the method for manufacturing an anisotropic conductive tape of the present invention.
  • step S1 of the second embodiment of the method for manufacturing an anisotropic conductive tape of the present invention is a schematic diagram of step S1 of the second embodiment of the method for manufacturing an anisotropic conductive tape of the present invention.
  • the present invention provides an anisotropic conductive tape, including a resin base tape 10 And along the resin base tape 10 Multiple resin base bands arranged periodically in the extension direction 10 Composite fiber set inside and horizontally 20 .
  • each of the composite fibers 20 Including electrically insulating fiber twenty one And along the electrically insulating fiber twenty one
  • a plurality of rings arranged periodically in the axial direction is sleeved on the electrically insulating fiber twenty one Conductive ring twenty two .
  • the conductive ring twenty two Including multiple conductive particles that surround the electrically insulating fiber by adsorption 25 .
  • the anisotropic conductive tape of the present invention is used to bind a display substrate 1 With external circuit 2 ,
  • the electrodes on the upper and lower sides of the anisotropic conductive adhesive are raised 5 All with conductive ring twenty two Contact to realize the electrode bumps on the upper and lower sides 5 Continuity.
  • the extension direction is in the resin base band 10 Long enough in the width direction of the composite fiber during the binding process 20 Not as traditional ACF
  • the conductive particles in the mobile move like that, thereby ensuring the electrode protrusion 5 Composite fiber below 20 Not easy to be discharged, and due to the resin base tape 10 Inner composite fiber 20 Separated from each other so that they do not occur due to composite fibers 20 Protrusion of adjacent electrodes caused by mutual contact 5 A short circuit has occurred.
  • Each electrode is raised 5 All with composite fiber 30 Multiple conductive rings on twenty two Contact with each other, so the electrode bumps on the upper and lower sides 5 was well turned on.
  • Electrode protrusion in extension direction 5 Does not happen due to simultaneous with the conductive ring twenty two Short circuit caused by contact.
  • the illustrated anisotropic conductive adhesive of the present invention is a schematic top view after binding electrode bumps of different arrangements, electrode bumps arranged horizontally or vertically 5 Can be realized with multiple conductive rings twenty two Contact each other. Since the conductive ring twenty two Periodically and densely arranged, when the electrodes are raised 5 When the size is reduced, each electrode is raised 5 Can still work with conductive ring twenty two Contact, which can realize the design of more driving circuits on the display panel, which can effectively improve the resolution of the display panel.
  • the anisotropic conductive tape of the present invention further includes the resin base tape 10 Separation layer on the upper and lower surfaces 30 ;
  • the separation layer 30 Can better prevent different electrode protrusions during binding 5 Through composite fibers 20 Contact with each other to cause a short circuit, but the separation layer 30
  • the thickness of the separation layer is thin enough 30 The thickness is 2-3 ⁇ m So that the composite fiber 20 Conductive particles 25 Ability to pierce the separation layer when binding 30 Instead, make electrical connections.
  • the conductive particles 25 The shape can be spherical, cubic or conical and other shapes.
  • the conductive particles 25 Belong to nano-scale particles, the equivalent particle size is 5-100nm .
  • the electrically insulating fiber twenty one Is of length 10-5000 ⁇ m .
  • the conductive ring twenty two The width is 50-1000nm
  • Each of the composite fibers 20 Two adjacent conductive rings twenty two
  • the width of the interval is 500-5000nm .
  • the resin base tape 10 Two adjacent composite fibers 20 The width of the interval is 1-10 ⁇ m .
  • the electrically insulating fiber twenty one The surface of the surface is modified, for example, to make its surface positively charged, so that the conductive particles 25 Adsorbed to electrically insulating fibers by static electricity twenty one on.
  • the anisotropic conductive tape of the present invention includes a resin base tape 10 And multiple basebands in resin 10 Composite fiber set inside and horizontally 20 , Each of the composite fibers 20 Including electrically insulating fiber twenty one And a plurality of rings encased in the electrically insulating fiber twenty one Conductive ring twenty two , The conductive ring twenty two Including multiple conductive particles that surround the electrically insulating fiber by adsorption 25 , Where multiple composite fibers 20 In resin baseband 10 Inner resin base band 10 Periodically arranged in the extension direction, and each composite fiber 20 Multiple conductive rings on twenty two Along its electrical insulation twenty one The fibers are arranged periodically in the axial direction twenty two The distribution is effectively controlled and due to the conductive ring twenty two Be fixed in electrical insulation fiber twenty one Surface, while electrically insulating fiber twenty one Long enough, conductive ring twenty two Fiber with electrical insulation twenty one It is not easy to be pushed out of the electrode protrusion area when binding, even when the area of the electrode protrusion is reduced, the electrode pro
  • the present invention also provides a method for manufacturing anisotropic conductive tape.
  • the first embodiment of the method for manufacturing anisotropic conductive tape of the present invention specifically includes the following steps:
  • step S1 Making multiple composite fibers 20 , The multiple composite fibers 20 Arrange periodically.
  • each of the composite fibers 20 Including electrically insulating fiber twenty one And along the electrically insulating fiber twenty one
  • a plurality of rings arranged periodically in the axial direction is sleeved on the electrically insulating fiber twenty one Conductive ring twenty two ;
  • the conductive ring twenty two Including multiple conductive particles that surround the electrically insulating fiber by adsorption 25 .
  • the conductive particles 25 The shape can be spherical, cubic or conical and other shapes.
  • the conductive particles 25 Belong to nano-scale particles, the equivalent particle size is 5-100nm .
  • the electrically insulating fiber twenty one Is of length 10-5000 ⁇ m .
  • the conductive ring twenty two The width is 50-1000nm
  • Each of the composite fibers 20 Two adjacent conductive rings twenty two
  • the width of the interval is 500-5000nm .
  • the steps in this embodiment S1 The composite fiber 20
  • the process includes the following steps:
  • step S11 ⁇ Provide electrical insulation fiber twenty one And conductive particles 25 ,
  • Surface modification treatment such as making the electrically insulating fiber twenty one The surface is positively charged, and then the conductive particles 25 Attracted to the electrically insulating fiber by static electricity twenty one Of the surface, forming a coating of electrically insulating fibers twenty one Conductive layer twenty two ’.
  • step S12 In the conductive layer twenty two ’A masking pattern layer is formed on the surface 26 , Removing electrically insulating fibers by etching twenty one The surface is not covered by the shading pattern layer 26 Covered conductive layer twenty two ', By the remaining conductive layer twenty two 'Form along the electrically insulating fiber twenty one A plurality of rings arranged periodically in the axial direction is sleeved on the electrically insulating fiber twenty one Conductive ring twenty two .
  • the masking pattern layer 26 It is a photoresist material, which can be formed by the yellow light process.
  • the conductive ring twenty two Insulated fiber twenty one Depends on the cross-sectional shape, such as a circular ring shape.
  • step S13 Removing the masking pattern layer 26 To get composite fiber 20 .
  • step S2 ⁇ Provide adhesive, wrap the multiple composite fibers with adhesive 20 To get the resin base tape 10 , The multiple composite fibers 20 All in resin baseband 10 Set laterally inside and along the resin base tape 10 Arranged periodically in the extension direction.
  • the resin base tape 10 Two adjacent composite fibers 20 The width of the interval is 1-10 ⁇ m .
  • step S3 In the resin base band 10 Separation layer formed on the upper and lower surfaces 30 .
  • the separation layer 30 Can better prevent different electrode protrusions during binding 5 Through composite fibers 20 Contact with each other to cause a short circuit, but the separation layer 30
  • the thickness of the separation layer is thin enough 30 The thickness is 2-3 ⁇ m So that the composite fiber 20 Conductive particles 25 Ability to pierce the separation layer when binding 30 Instead, make electrical connections.
  • the second embodiment of the manufacturing method of the anisotropic conductive tape of the present invention is different from the first embodiment described above in that the steps of the first embodiment S1 Conductive particles 25 Form a conductive layer twenty two ’, Then the conductive layer twenty two ’Patterning to obtain a conductive ring twenty two ; And the steps of this embodiment S1 In the electrical insulation fiber twenty one A masking pattern layer is first formed on the surface 26 And then directly in the electrically insulating fiber twenty one Unoccluded pattern layer 26 The covered surface forms a conductive ring twenty two .
  • the steps S1 The composite fiber 20
  • the process includes the following steps:
  • step S11 ⁇ Provide electrical insulation fiber twenty one , For the electrically insulating fiber twenty one Surface modification treatment; in the electrical insulation fiber twenty one Shading pattern layer formed on the surface 26 .
  • step S12 ⁇ Provide conductive particles 25 To make conductive particles 25 Attracted to the electrically insulating fiber by static electricity twenty one Unoccluded pattern layer 26 Covering the surface, forming fibers along the electrical insulation twenty one A plurality of rings arranged periodically in the axial direction is sleeved on the electrically insulating fiber twenty one Conductive ring twenty two .
  • step S13 Removing the masking pattern layer 26 To get composite fiber 20 .
  • the prepared anisotropic conductive tape can also achieve a good binding effect to the electrode protrusions with a small area, so that more driving circuits can be realized on the display panel Design, which can effectively improve the resolution of the display panel.
  • the anisotropic conductive tape of the present invention includes a resin base tape and a plurality of composite fibers disposed laterally in the resin base tape, and each of the composite fibers includes an electrical insulating fiber and a plurality of loops sleeved on the electrical insulating fiber
  • a conductive ring on the upper surface, the conductive ring includes a plurality of conductive particles that surround the electrically insulating fiber by adsorption, wherein the plurality of composite fibers are periodically arranged in the resin base band along the extension direction of the resin base band, and each compound The plurality of conductive rings on the fiber are periodically arranged along the axial direction of the electrical insulating fiber.
  • the conductive ring is fixed on the surface of the electrical insulating fiber, the conductive ring and the electrical insulating fiber are not easily pushed out of the electrode protrusion area when binding Even when the area of the electrode protrusions is reduced, the electrode protrusions can still make good contact with the conductive ring, so that more driving circuit designs can be realized on the display panel, which can effectively improve the resolution of the display panel.
  • the prepared anisotropic conductive tape of the present invention can also achieve a good binding effect on electrode protrusions with a small area, thereby enabling more driving circuits on the display panel design.

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Abstract

本发明提供一种异方性导电胶带及其制作方法。本发明的异方性导电胶带包括树脂基带及多条在树脂基带内横向设置的复合纤维，每条所述复合纤维包括电绝缘纤维及多个环套在该电绝缘纤维上的导电环，所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子，其中，所述多条复合纤维在树脂基带内沿树脂基带延长方向周期排列，且每条复合纤维上所述多个导电环沿其电绝缘纤维轴向方向周期排列，由于导电环被固定在电绝缘纤维表面，导电环与电绝缘纤维在进行绑定时均不易被挤出电极凸起区域，即使在电极凸起的面积减小时，电极凸起仍可与导电环进行良好的接触，从而可在显示面板上实现更多驱动线路的设计，进而可有效提高显示面板的分辨率。

Description

异方性导电胶带及其制作方法 技术领域
本发明涉及显示技术领域，尤其涉及一种异方性导电胶带及其制作方法。
 背景技术
现有市场上的平面显示装置包括液晶显示装置（Liquid Crystal Display，LCD）和有源矩阵有机发光二极体（Active-matrix organic light emitting diode， AMOLED）显示装置。其中AMOLED具备自发光、高亮度、宽视角、高对比度、可挠曲、低能耗等特性，因此受到广泛的关注，并作为新一代的显示方式，已开始逐渐取代传统液晶显示器，被广泛应用在手机屏幕、电脑显示器、全彩电视等。
现有的平板显示器一般包括显示面板（Panel）和外接电路，显示面板在正常显示时，需要使用外接电路，如柔性电路板（Free Pascal Compiler，FPC）、或者覆晶薄膜（Chip On Film，COF），通过引线连接到面板的外引脚贴合（Outer Lead Bonding，OLB）区域，实现对显示面板中的各信号线传递驱动信号。而外接电路与显示面板的OLB区域的电连接是通过绑定（Bonding）工艺完成的，Bonding工艺主要是在压合设备上将外接电路经过预压、本压连接到显示面板上，将外接电路上的外接电极和显示面板上的电极线压合到一起，中间通过异方性导电胶（Anisotropic Conductive Film， ACF）实现导通。
目前较常见的异方性导电胶带产品主要包括热固性树脂、导电粒子、固化剂、增塑剂等成分，制造异方性导电胶带时先要将上述成分溶解于挥发性溶剂中配制成异方性导电胶，再将异方性导电胶涂布于塑料薄膜上，经过热风干燥去掉溶剂而形成异方性导电胶带。如图1所示，ACF500主要包括胶体层510及混合于胶体层510中的导电粒子520，其中，导电粒子520赋予ACF500以导电性能，胶体层510赋予ACF500以粘接性能和绝缘性能。
在显示面板的绑定（bonding）制程中，显示基板与外接电路分别具有数个相互对应的作为电极的微小凸起（bump），在显示基板与外接电路之间置入ACF，然后通过压合设备对ACF进行热压，使得所述ACF发生反应，具体地，通过加热改变ACF的粘滞度，并通过加压使ACF中的导电粒子在基板与外接电路之间被挤压，被挤压的导电粒子在显示基板与外接电路之间构成电连接。
随着人们对显示技术要求的提高，具有更高分辨率的显示器件成为显示领域的热门。为实现更高分辨率的显示，要求显示器件具有更多的显示单元，进而驱动电路的线路数量也相应增多。在绑定制程中，每个bump俘获一定数量以上的导电粒子才能实现导通。低密度的导电粒子限制了每个bump内分布的导电粒子数量，且如图1所示，现有ACF内的导电粒子为随机分布，故为每个bump均俘获一定数量的导电粒子，bump的面积就必须相应增大，从而影响更多驱动线路设计的实现。
 技术问题
本发明的目的在于提供一种异方性导电胶带，能够对面积较小的电极凸起实现良好的绑定效果，从而可在显示面板上实现更多驱动线路的设计。
本发明的目的还在于提供一种异方性导电胶带的制作方法，所得的异方性导电胶带能够对面积较小的电极凸起实现良好的绑定效果，从而可在显示面板上实现更多驱动线路的设计。
 技术解决方案
为实现上述目的，本发明提供一种异方性导电胶带，包括树脂基带及沿所述树脂基带延长方向周期排列的多条在树脂基带内横向设置的复合纤维；
每条所述复合纤维包括电绝缘纤维及沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；
所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子。
所述异方性导电胶带还包括设置在所述树脂基带上下表面的分离层；
所述分离层的厚度为2-3μm。
所述导电粒子的形状为球形、立方形或锥形；
所述导电粒子的等效粒径为5-100nm。
所述电绝缘纤维的长度为10-5000 μm。
所述导电环的宽度为50-1000nm，每条所述复合纤维上相邻两导电环之间间隔的宽度为500-5000nm。
所述树脂基带内相邻两复合纤维之间间隔的宽度为1-10 μm。
本发明还提供一种异方性导电胶带的制作方法，包括如下步骤：
步骤S1、制作多条复合纤维，将该多条复合纤维进行周期性排列；
每条所述复合纤维包括电绝缘纤维及沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子；
步骤S2、提供胶黏剂，用胶黏剂包裹所述多条复合纤维，得到树脂基带，所述多条复合纤维均在树脂基带内横向设置并沿所述树脂基带延长方向周期排列。
可选地，所述步骤S1中制作所述复合纤维的过程具体包括如下步骤：
步骤S11、提供电绝缘纤维及导电粒子，对所述电绝缘纤维进行表面修饰处理，使导电粒子通过静电作用吸附在所述电绝缘纤维的表面，形成包覆电绝缘纤维的导电层；
步骤S12、在所述导电层表面形成遮蔽图案层，去除电绝缘纤维表面未被所述遮蔽图案层覆盖的导电层，由剩余的导电层形成沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；
步骤S13、去除遮蔽图案层，得到复合纤维。
可选地，所述步骤S1中制作所述复合纤维的过程具体包括如下步骤：
步骤S11、提供电绝缘纤维，对所述电绝缘纤维进行表面修饰处理；在所述电绝缘纤维表面形成遮蔽图案层；
步骤S12、提供导电粒子，使导电粒子通过静电作用吸附在所述电绝缘纤维未被遮蔽图案层覆盖的表面，形成沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；
步骤S13、去除遮蔽图案层，得到复合纤维。
还包括步骤S3、在所述树脂基带上下表面形成分离层。
 有益效果
本发明的有益效果：本发明的异方性导电胶带，包括树脂基带及多条在树脂基带内横向设置的复合纤维，每条所述复合纤维包括电绝缘纤维及多个环套在该电绝缘纤维上的导电环，所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子，其中，所述多条复合纤维在树脂基带内沿树脂基带延长方向周期排列，且每条复合纤维上所述多个导电环沿其电绝缘纤维轴向方向周期排列，由于导电环被固定在电绝缘纤维表面，导电环与电绝缘纤维在进行绑定时均不易被挤出电极凸起区域，即使在电极凸起的面积减小时，电极凸起仍可与导电环进行良好的接触，从而可在显示面板上实现更多驱动线路的设计，进而可有效提高显示面板的分辨率。本发明的异方性导电胶带的制作方法，所制得的异方性导电胶带能够对面积较小的电极凸起同样实现良好的绑定效果，从而可在显示面板上实现更多驱动线路的设计。
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
 附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为现有一种异方性导电胶带的结构示意图；
图2为本发明异方性导电胶带中复合纤维的立体示意图及侧视示意图；
图3为本发明异方性导电胶带的结构示意图；
图4为本发明异方性导电胶在进行绑定前设置于显示基板与外接电路之间的示意图；
图5为本发明异方性导电胶在进行绑定后在显示基板与外接电路之间实现电连接的示意图；
图6为本发明异方性导电胶用于对横向排布的电极凸起进行绑定的俯视示意图；
图7为本发明异方性导电胶用于对纵向排布的电极凸起进行绑定的俯视示意图；
图8为本发明的异方性导电胶带的制作方法的流程示意图；
图9为本发明的异方性导电胶带的制作方法的第一实施例的步骤S1的示意图；
图10为本发明的异方性导电胶带的制作方法的第二实施例的步骤S1的示意图。
 本发明的实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
请参阅图 3 ，本发明提供一种异方性导电胶带，包括树脂基带 10 及沿所述树脂基带 10 延长方向周期排列的多条在树脂基带 10 内横向设置的复合纤维 20 。
如图 2 所示，每条所述复合纤维 20 包括电绝缘纤维 21 及沿该电绝缘纤维 21 轴向方向周期排列的多个环套在该电绝缘纤维 21 上的导电环 22 。
所述导电环 22 包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子 25 。
需要说明的是，如图 4-5 所示，本发明的异方性导电胶带用于绑定显示基板 1 与外接电路 2 时，异方性导电胶上下两侧的电极凸起 5 均与导电环 22 接触，进而实现上下两侧的电极凸起 5 的导通。且由于复合纤维 20 在垂直于树脂基带 10 延长方向即在树脂基带 10 的宽度方向上足够长，在绑定过程中复合纤维 20 不易像传统 ACF 中的导电粒子那样移动，进而保证电极凸起 5 下方的复合纤维 20 不易被排出，并由于树脂基带 10 内复合纤维 20 之间相互分离，从而不会产生由于复合纤维 20 相互接触而导致的相邻电极凸起 5 发生短路。每个电极凸起 5 均与复合纤维 30 上的多个导电环 22 相互接触，故上下两侧的电极凸起 5 被很好地导通。并由于导电环 22 间相互分离，垂直于树脂基带 10 延长方向的电极凸起 5 不会发生因同时与导电环 22 接触而导致的短路。如图 6-7 所示的本发明异方性导电胶用于对不同排列方式的电极凸起进行绑定后的俯视示意图，横向或纵向排布的电极凸起 5 均可实现与多个导电环 22 相互接触。由于导电环 22 周期且致密地排布，当电极凸起 5 的尺寸减小时，每个电极凸起 5 仍可与导电环 22 接触，从而可在显示面板上实现更多驱动线路的设计，进而可有效提高显示面板的分辨率。
具体地，本发明的异方性导电胶带还包括设置在所述树脂基带 10 上下表面的分离层 30 ；该分离层 30 可更好的防止绑定时不同的电极凸起 5 通过复合纤维 20 相互接触而发生短路，但该分离层 30 的厚度足够薄，该分离层 30 的厚度为 2-3 μ m ，从而使复合纤维 20 上的导电粒子 25 在绑定时能够刺破分离层 30 而进行电连接。
具体地，所述导电粒子 25 的形状可以为球形、立方形或锥形等其他形状。
具体地，所述导电粒子 25 属于纳米级粒子，其等效粒径为 5-100nm 。
具体地，所述电绝缘纤维 21 的长度为 10-5000 μ m 。
具体地，所述导电环 22 的宽度为 50-1000nm ，每条所述复合纤维 20 上相邻两导电环 22 之间间隔的宽度为 500-5000nm 。
具体地，所述树脂基带 10 内相邻两复合纤维 20 之间间隔的宽度为 1-10 μ m 。
具体地，所述电绝缘纤维 21 的表面经过修饰处理，例如使其表面带正电荷，从而能够使所述导电粒子 25 通过静电作用而吸附在电绝缘纤维 21 上。
本发明的异方性导电胶带，包括树脂基带 10 及多条在树脂基带 10 内横向设置的复合纤维 20 ，每条所述复合纤维 20 包括电绝缘纤维 21 及多个环套在该电绝缘纤维 21 上的导电环 22 ，所述导电环 22 包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子 25 ，其中，多条复合纤维 20 在树脂基带 10 内沿树脂基带 10 延长方向周期排列，且每条复合纤维 20 上的多个导电环 22 沿其电绝缘 21 纤维轴向方向周期排列，从而对导电环 22 的分布进行有效控制，并由于导电环 22 被固定在电绝缘纤维 21 表面，而电绝缘纤维 21 长度足够长，导电环 22 与电绝缘纤维 21 在进行绑定时均不易被挤出电极凸起区域，即使在电极凸起的面积减小时，电极凸起仍可与导电环 22 进行良好的接触，从而可在显示面板上实现更多驱动线路的设计，进而可有效提高显示面板的分辨率。
如图 8 所示，基于上述的异方性导电胶带，本发明还提供一种异方性导电胶带的制作方法，本发明的异方性导电胶带的制作方法的第一实施例具体包括如下步骤：
步骤 S1 、制作多条复合纤维 20 ，将该多条复合纤维 20 进行周期性排列。
其中，每条所述复合纤维 20 包括电绝缘纤维 21 及沿该电绝缘纤维 21 轴向方向周期排列的多个环套在该电绝缘纤维 21 上的导电环 22 ；所述导电环 22 包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子 25 。
具体地，所述导电粒子 25 的形状可以为球形、立方形或锥形等其他形状。
具体地，所述导电粒子 25 属于纳米级粒子，其等效粒径为 5-100nm 。
具体地，所述电绝缘纤维 21 的长度为 10-5000 μ m 。
具体地，所述导电环 22 的宽度为 50-1000nm ，每条所述复合纤维 20 上相邻两导电环 22 之间间隔的宽度为 500-5000nm 。
如图 9 所示，本实施例的所述步骤 S1 中制作所述复合纤维 20 的过程具体包括如下步骤：
步骤 S11 、提供电绝缘纤维 21 及导电粒子 25 ，对所述电绝缘纤维 21 进行表面修饰处理，例如使所述电绝缘纤维 21 的表面带正电荷，然后使导电粒子 25 通过静电作用吸附在所述电绝缘纤维 21 的表面，形成包覆电绝缘纤维 21 的导电层 22 ’。
步骤 S12 、在所述导电层 22 ’表面形成遮蔽图案层 26 ，通过蚀刻方式去除电绝缘纤维 21 表面未被所述遮蔽图案层 26 覆盖的导电层 22 ’，由剩余的导电层 22 ’形成沿该电绝缘纤维 21 轴向方向周期排列的多个环套在该电绝缘纤维 21 上的导电环 22 。
具体地，所述遮蔽图案层 26 为光阻材料，可通过黄光制程制作形成。
具体地，所述导电环 22 随电绝缘纤维 21 的横截面形状而定，例如为圆环形。
步骤 S13 、去除遮蔽图案层 26 ，得到复合纤维 20 。
步骤 S2 、提供胶黏剂，用胶黏剂包裹所述多条复合纤维 20 ，得到树脂基带 10 ，所述多条复合纤维 20 均在树脂基带 10 内横向设置并沿所述树脂基带 10 延长方向周期排列。
具体地，所述树脂基带 10 内相邻两复合纤维 20 之间间隔的宽度为 1-10 μ m 。
步骤 S3 、在所述树脂基带 10 上下表面形成分离层 30 。该分离层 30 可更好的防止绑定时不同的电极凸起 5 通过复合纤维 20 相互接触而发生短路，但该分离层 30 的厚度足够薄，该分离层 30 的厚度为 2-3 μ m ，从而使复合纤维 20 上的导电粒子 25 在绑定时能够刺破分离层 30 而进行电连接。
本发明的异方性导电胶带的制作方法的第二实施例，与上述第一实施例相比，其区别在于，第一实施例的步骤 S1 中先由导电粒子 25 形成导电层 22 ’，然后对导电层 22 ’进行图案化处理得到导电环 22 ；而本实施例的步骤 S1 中在电绝缘纤维 21 表面先形成遮蔽图案层 26 ，然后直接在电绝缘纤维 21 未被遮蔽图案层 26 覆盖的表面形成导电环 22 。
如图 10 所示，本实施例中，所述步骤 S1 中制作所述复合纤维 20 的过程具体包括如下步骤：
步骤 S11 、提供电绝缘纤维 21 ，对所述电绝缘纤维 21 进行表面修饰处理；在所述电绝缘纤维 21 表面形成遮蔽图案层 26 。
步骤 S12 、提供导电粒子 25 ，使导电粒子 25 通过静电作用吸附在所述电绝缘纤维 21 未被遮蔽图案层 26 覆盖的表面，形成沿该电绝缘纤维 21 轴向方向周期排列的多个环套在该电绝缘纤维 21 上的导电环 22 。
步骤 S13 、去除遮蔽图案层 26 ，得到复合纤维 20 。
本实施例的其他技术特征均与上述第一实施例相同，在此不再赘述。
本发明的异方性导电胶带的制作方法，所制得的异方性导电胶带能够对面积较小的电极凸起同样实现良好的绑定效果，从而可在显示面板上实现更多驱动线路的设计，进而可有效提高显示面板的分辨率。
综上所述，本发明的异方性导电胶带，包括树脂基带及多条在树脂基带内横向设置的复合纤维，每条所述复合纤维包括电绝缘纤维及多个环套在该电绝缘纤维上的导电环，所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子，其中，所述多条复合纤维在树脂基带内沿树脂基带延长方向周期排列，且每条复合纤维上所述多个导电环沿其电绝缘纤维轴向方向周期排列，由于导电环被固定在电绝缘纤维表面，导电环与电绝缘纤维在进行绑定时均不易被挤出电极凸起区域，即使在电极凸起的面积减小时，电极凸起仍可与导电环进行良好的接触，从而可在显示面板上实现更多驱动线路的设计，进而可有效提高显示面板的分辨率。本发明的异方性导电胶带的制作方法，所制得的异方性导电胶带能够对面积较小的电极凸起同样实现良好的绑定效果，从而可在显示面板上实现更多驱动线路的设计。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (10)

  1. 一种异方性导电胶带，包括树脂基带及沿所述树脂基带延长方向周期排列的多条在树脂基带内横向设置的复合纤维；
    每条所述复合纤维包括电绝缘纤维及沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；
    所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子。
  2. 如权利要求1所述的异方性导电胶带，还包括设置在所述树脂基带上下表面的分离层；
    所述分离层的厚度为2-3μm。
  3. 如权利要求1所述的异方性导电胶带，其中，所述导电粒子的形状为球形、立方形或锥形；
    所述导电粒子的等效粒径为5-100nm。
  4. 如权利要求1所述的异方性导电胶带，其中，所述电绝缘纤维的长度为10-5000 μm。
  5. 如权利要求1所述的异方性导电胶带，其中，所述导电环的宽度为50-1000nm，每条所述复合纤维上相邻两导电环之间间隔的宽度为500-5000nm。
  6. 如权利要求1所述的异方性导电胶带，其中，所述树脂基带内相邻两复合纤维之间间隔的宽度为1-10 μm。
  7. 一种异方性导电胶带的制作方法，包括如下步骤：
    步骤S1、制作多条复合纤维，将该多条复合纤维进行周期性排列；
    每条所述复合纤维包括电绝缘纤维及沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；所述导电环包括通过吸附而共同环绕在电绝缘纤维上的多个导电粒子；
    步骤S2、提供胶黏剂，用胶黏剂包裹所述多条复合纤维，得到树脂基带，所述多条复合纤维均在树脂基带内横向设置并沿所述树脂基带延长方向周期排列。
  8. 如权利要求7所述的异方性导电胶带的制作方法，其中，所述步骤S1中制作所述复合纤维的过程具体包括如下步骤：
    步骤S11、提供电绝缘纤维及导电粒子，对所述电绝缘纤维进行表面修饰处理，使导电粒子通过静电作用吸附在所述电绝缘纤维的表面，形成包覆电绝缘纤维的导电层；
    步骤S12、在所述导电层表面形成遮蔽图案层，去除电绝缘纤维表面未被所述遮蔽图案层覆盖的导电层，由剩余的导电层形成沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；
    步骤S13、去除遮蔽图案层，得到复合纤维。
  9. 如权利要求7所述的异方性导电胶带的制作方法，其中，所述步骤S1中制作所述复合纤维的过程具体包括如下步骤：
    步骤S11、提供电绝缘纤维，对所述电绝缘纤维进行表面修饰处理；在所述电绝缘纤维表面形成遮蔽图案层；
    步骤S12、提供导电粒子，使导电粒子通过静电作用吸附在所述电绝缘纤维未被遮蔽图案层覆盖的表面，形成沿该电绝缘纤维轴向方向周期排列的多个环套在该电绝缘纤维上的导电环；
    步骤S13、去除遮蔽图案层，得到复合纤维。
  10. 如权利要求7所述的异方性导电胶带的制作方法，还包括步骤S3、在所述树脂基带上下表面形成分离层。
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Families Citing this family (2)

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Publication number Priority date Publication date Assignee Title
CN110619817A (zh) * 2019-08-27 2019-12-27 武汉华星光电半导体显示技术有限公司 异方性导电胶、显示面板及基板的绑定方法
CN111303795A (zh) * 2020-02-14 2020-06-19 维沃移动通信有限公司 一种异方性导电胶膜及其制备方法和显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002212518A (ja) * 2001-01-18 2002-07-31 Cosmo Tec:Kk 異方性導電粘着シート及びそれを用いた電気及び／又は電子素子
CN202081054U (zh) * 2011-06-16 2011-12-21 北京京东方光电科技有限公司 一种胶条以及面板
CN104312469A (zh) * 2014-10-22 2015-01-28 苏州百诚精密科技有限公司 各向异性导电胶带
CN105006461A (zh) * 2015-07-13 2015-10-28 深圳市道纪科技有限公司 一种可精确控制导电单元的异方性导电胶膜
CN204904854U (zh) * 2015-07-27 2015-12-23 玮锋科技股份有限公司 单层内嵌式异方性导电胶膜结构
CN105969237A (zh) * 2016-06-29 2016-09-28 深圳市华星光电技术有限公司 异方性导电胶膜的制备方法
CN105974695A (zh) * 2016-07-01 2016-09-28 深圳市华星光电技术有限公司 异方性导电胶膜及其贴附方法

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2011040752A2 (en) * 2009-09-29 2011-04-07 Korea Advanced Institute Of Science And Technology Conductive polymer adhesive using nanofiber and method for preparing the same
KR101345694B1 (ko) * 2011-03-11 2013-12-30 옵토팩 주식회사 파이버, 파이버 집합체 및 이를 포함하는 접착제
TWI559826B (zh) * 2015-12-14 2016-11-21 財團法人工業技術研究院 接合結構及可撓式裝置
CN105567112B (zh) * 2016-01-18 2018-06-19 杨宜丰 一种各向异性导电胶及其制备方法
KR101746334B1 (ko) * 2016-03-25 2017-06-13 한국과학기술원 전자 직물의 전기접속용 접착필름 및 그 접속 방법
KR102593532B1 (ko) * 2016-06-03 2023-10-26 삼성디스플레이 주식회사 이방성 도전 필름 및 이를 이용한 디스플레이 장치
CN105862398B (zh) * 2016-06-23 2018-05-15 四川大学 聚合物纤维基导电复合材料及其制备方法
US11417866B2 (en) * 2016-11-30 2022-08-16 Lg Display Co., Ltd. Anisotropic conductive film and display device including the same

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002212518A (ja) * 2001-01-18 2002-07-31 Cosmo Tec:Kk 異方性導電粘着シート及びそれを用いた電気及び／又は電子素子
CN202081054U (zh) * 2011-06-16 2011-12-21 北京京东方光电科技有限公司 一种胶条以及面板
CN104312469A (zh) * 2014-10-22 2015-01-28 苏州百诚精密科技有限公司 各向异性导电胶带
CN105006461A (zh) * 2015-07-13 2015-10-28 深圳市道纪科技有限公司 一种可精确控制导电单元的异方性导电胶膜
CN204904854U (zh) * 2015-07-27 2015-12-23 玮锋科技股份有限公司 单层内嵌式异方性导电胶膜结构
CN105969237A (zh) * 2016-06-29 2016-09-28 深圳市华星光电技术有限公司 异方性导电胶膜的制备方法
CN105974695A (zh) * 2016-07-01 2016-09-28 深圳市华星光电技术有限公司 异方性导电胶膜及其贴附方法

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