WO2020087727A1 - 液晶显示面板、彩膜基板及薄膜晶体管基板 - Google Patents

液晶显示面板、彩膜基板及薄膜晶体管基板 Download PDF

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Publication number
WO2020087727A1
WO2020087727A1 PCT/CN2018/123813 CN2018123813W WO2020087727A1 WO 2020087727 A1 WO2020087727 A1 WO 2020087727A1 CN 2018123813 W CN2018123813 W CN 2018123813W WO 2020087727 A1 WO2020087727 A1 WO 2020087727A1
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WO
WIPO (PCT)
Prior art keywords
layer
substrate
spacer
film transistor
thin film
Prior art date
Application number
PCT/CN2018/123813
Other languages
English (en)
French (fr)
Inventor
张启沛
余赟
Original Assignee
武汉华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
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Application filed by 武汉华星光电技术有限公司 filed Critical 武汉华星光电技术有限公司
Priority to US16/613,916 priority Critical patent/US11287708B2/en
Publication of WO2020087727A1 publication Critical patent/WO2020087727A1/zh

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Classifications

    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136222Colour filters incorporated in the active matrix substrate
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • G02F1/13394Gaskets; Spacers; Sealing of cells spacers regularly patterned on the cell subtrate, e.g. walls, pillars
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133514Colour filters
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1339Gaskets; Spacers; Sealing of cells
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/136209Light shielding layers, e.g. black matrix, incorporated in the active matrix substrate, e.g. structurally associated with the switching element
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362Active matrix addressed cells
    • G02F1/1368Active matrix addressed cells in which the switching element is a three-electrode device
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/133357Planarisation layers
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1335Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509Filters, e.g. light shielding masks
    • G02F1/133514Colour filters
    • G02F1/133519Overcoatings

Definitions

  • the present invention relates to the field of display technology, in particular to a liquid crystal display panel, a color film substrate and a thin film transistor substrate.
  • a liquid crystal display panel including:
  • the spacer is provided on the color filter substrate or / and the thin film transistor substrate, the color filter substrate or / and the thin film transistor substrate is provided with a concave hole, which is provided on the color filter substrate At least a part of the spacer on one of the thin film transistor substrates is nested with the concave hole provided on the other of the color filter substrate and the thin film transistor substrate.
  • the spacer is provided on the thin film transistor substrate, and the concave hole for inserting the spacer is provided on the protective layer of the color filter substrate.
  • the thin film transistor substrate includes:
  • a semiconductor layer provided on the second substrate
  • a gate insulating layer provided on the semiconductor layer
  • An interlayer insulating layer provided on the gate insulating layer
  • a second metal layer provided on the interlayer insulating layer
  • a flat layer disposed on the interlayer insulating layer and covering the second metal layer;
  • a pixel electrode provided on the flat layer
  • the flat layer is provided with at least two via holes arranged at intervals, and the spacer is located between two adjacent via holes.
  • a first passivation layer is provided on the pixel electrode, and the spacer is provided on the first passivation layer.
  • the top of the first passivation layer is provided with a first convex portion
  • the bottom of the spacer is provided with a first concave portion into which the first convex portion is inserted.
  • the first passivation layer is provided with a first groove into which the spacer is inserted.
  • a touch layer is provided on the pixel electrode, and the spacer is located above the touch layer.
  • a second passivation layer is provided on the top of the touch control layer, and the spacer is provided on the second passivation layer.
  • the top of the second passivation layer is provided with a second convex portion
  • the bottom of the spacer is provided with a second concave portion into which the second convex portion is inserted.
  • a second groove for inserting the spacer is provided on the second passivation layer.
  • the invention also provides a color film substrate, including:
  • a black matrix provided on the first substrate
  • a pixel layer provided on the black matrix
  • a protective layer provided on the pixel layer
  • the protective layer is provided with spacers and / or recessed holes; the spacers on the color filter substrate are used for recessed holes on the thin film transistor substrate to be integrated with the color filter substrate Nesting, the recessed holes on the color filter substrate are used to nest with the gaps on the thin film transistor substrate to be integrated with the color filter substrate.
  • the invention also provides a thin film transistor substrate, including:
  • a semiconductor layer provided on the second substrate
  • a gate insulating layer provided on the semiconductor layer
  • An interlayer insulating layer provided on the gate insulating layer
  • a second metal layer provided on the interlayer insulating layer
  • a flat layer disposed on the interlayer insulating layer and covering the second metal layer;
  • a pixel electrode provided on the flat layer
  • the flat layer is provided with at least two via holes arranged at intervals, and the flat layer between adjacent two of the via holes is provided with a spacer or / and a concave hole; the thin film transistor substrate
  • the spacer is used for nesting with a concave hole on a color film substrate to be integrated with the thin film transistor substrate, and the concave hole on the thin film transistor substrate is used for interfacing with the thin film transistor
  • the substrates are superimposed and combined into an integrated color film substrate, and the spacers are nested.
  • Embodiment 1 is a schematic structural diagram of a liquid crystal display panel in Embodiment 1 of the present invention.
  • Embodiment 8 is a schematic structural diagram of a liquid crystal display panel in Embodiment 2 of the present invention.
  • Embodiment 9 is a schematic structural diagram of a liquid crystal display panel in Embodiment 3 of the present invention.
  • FIG. 10 is a schematic structural diagram of a liquid crystal display panel in Embodiment 4 of the present invention.
  • FIG. 11 is a schematic structural diagram of a liquid crystal display panel in Embodiment 5 of the present invention.
  • FIG. 12 is a schematic structural diagram of a liquid crystal display panel in Embodiment 6 of the present invention.
  • FIG. 13 is a schematic structural diagram of a liquid crystal display panel in Embodiment 7 of the present invention.
  • FIG. 14 is a schematic structural diagram of a liquid crystal display panel in Embodiment 8 of the present invention.
  • the present invention is directed to the existing liquid crystal display panel.
  • the spacer When the spacer is pressed, dropped, or other external forces, the position will move. After the movement, the alignment liquid alignment and liquid crystal disorder will be destroyed, and bright spots and other display defects will be formed. problem.
  • the liquid crystal display panel includes a color filter substrate 10, a thin film transistor substrate 20, and a spacer 30 between the color filter substrate 10 and the thin film transistor substrate 20.
  • the liquid crystal display panel is a non-in-cell touch liquid crystal panel.
  • the spacer 30 is disposed on the thin film transistor substrate 20, and the color filter substrate 10 is provided with a recessed hole 60 nested with the spacer 30.
  • the recess 60 restricts the spacer 30, thereby reducing the movable range of the spacer 30, thereby improving the position stability of the spacer 30, and preventing the display defect caused by the movement of the spacer 30 .
  • the color filter substrate 10 includes a first substrate 11, a black matrix 12, a pixel layer 13, and a protective layer 14 stacked in this order; the spacer 30 is disposed on the thin film transistor substrate 20, and the recess 60 It is arranged on the protective layer 14.
  • the spacer 30 is provided on the thin film transistor substrate 20, and the concave hole 60 for limiting the spacer 30 is provided on the protective layer 14 of the color filter substrate 10.
  • the thin film transistor substrate 20 and the color filter substrate 10 When the superimposed combination is integrated, the spacer 30 is inserted into the concave hole 60 at the same time, which is convenient and fast, and has higher stability to the group.
  • the concave hole 60 is formed by exposure etching on the protective layer 14 through a half-tone mask process.
  • the thin film transistor substrate 20 includes a second substrate 21 and a buffer layer 22 and a semiconductor layer 23 stacked on the second substrate 21 in sequence; a gate covering the semiconductor layer 23 is provided on the buffer layer 22 Electrode insulating layer 24, an interlayer insulating layer 25 is provided on the gate insulating layer 24, a second metal layer 26 and a flat layer 27 covering the second metal layer 26 are provided on the interlayer insulating layer 25, A pixel electrode 28 is provided on the flat layer 27.
  • the flat layer 27 is provided with at least two via holes 271 arranged at intervals, and the spacer 30 is located between two adjacent via holes 271.
  • the spacer 30 is disposed between two adjacent vias 271 on the flat layer 27 to reduce the size of the black matrix 12 required to block the spacer 30 while increasing the pixel aperture ratio.
  • a first passivation layer 40 is provided on the pixel electrode 28, and the spacer 30 is provided on the first passivation layer 40.
  • the first passivation layer 40 improves the connection strength of the spacer 30 and the thin film transistor substrate 20, thereby improving the position stability of the spacer 30 and preventing the spacer 30 from moving significantly.
  • the present invention also provides a color filter substrate 10, which includes a first substrate 11, a black matrix 12 disposed on the first substrate 11, a pixel layer 13 disposed on the black matrix 12, and The protective layer 14 disposed on the pixel layer 13.
  • the protective layer 14 is provided with a concave hole 60, and the concave hole 60 on the color filter substrate 10 is used for a gap on the thin film transistor substrate 20 to be integrated with the color filter substrate 10 Things 30 are nested.
  • the present invention also provides a thin film transistor substrate 20, including a second substrate 21, a buffer layer 22 disposed on the second substrate 21, a semiconductor layer 23 disposed on the buffer layer 22, The gate insulating layer 24 provided on the semiconductor layer 23, the interlayer insulating layer 25 provided on the gate insulating layer 24, the second metal layer 26 provided on the interlayer insulating layer 25, provided The flat layer 27 on the interlayer insulating layer 25 and covering the second metal layer 26 and the pixel electrode 28 provided on the flat layer 27.
  • At least two via holes 271 arranged at intervals are provided on the flat layer 27, and a first passivation layer 40 is provided on the flat layer 27 between two adjacent via holes 271.
  • a spacer 30 is provided on the passivation layer 40; the spacer 30 on the thin film transistor substrate 20 is used to phase with the concave hole 60 on the color filter substrate 10 to be integrated with the thin film transistor substrate 20 Nested.
  • a buffer layer 22 is formed on the second substrate 21, and a patterned semiconductor layer 23 is formed on the buffer layer 22.
  • a gate insulating layer 24 and an interlayer insulating layer 25 covering the semiconductor layer 23 are formed on the buffer layer 22, and a through-interlayer insulation is formed on the interlayer insulating layer 25 The first overlapping hole of the layer 25 and the gate insulating layer 24.
  • a second metal layer 26 is formed on the interlayer insulating layer 25, and the second metal layer 26 is etched to form source-drain metal traces and data metal traces.
  • a flat layer 27 covering the second metal layer 26 is formed, and at least two via holes 271 arranged at intervals are formed on both sides of the flat layer 27.
  • a patterned pixel electrode 28 is formed on the flat layer 27.
  • a first passivation layer 40 is formed, the first passivation layer 40 is located between two adjacent vias 271, and a spacer is provided on the first passivation layer 40 30.
  • a liquid crystal display panel as shown in FIG. 8, is different from the first embodiment only in that the spacer 30 and the first passivation layer 40 are connected by a connection structure.
  • connection structure includes a first convex portion provided at the top of the first passivation layer 40 and a first concave portion 31 provided at the bottom of the spacer 30 and into which the first convex portion is inserted.
  • a liquid crystal display panel, as shown in FIG. 9, is different from Embodiment 2 only in that the connection structure of the spacer 30 and the first passivation layer 40 is different.
  • connection structure includes a first groove 41 disposed on the first passivation layer 40 and into which the spacer 30 is inserted.
  • the liquid crystal display panel includes a color filter substrate 10, a thin film transistor substrate 20, and a spacer 30 between the color filter substrate 10 and the thin film transistor substrate 20.
  • the liquid crystal display panel is an in-cell touch liquid crystal panel.
  • the spacer 30 is disposed on the thin film transistor substrate 20, and the color filter substrate 10 is provided with a recessed hole 60 nested with the spacer 30.
  • the recess 60 restricts the spacer 30, thereby reducing the movable range of the spacer 30, thereby improving the position stability of the spacer 30, and preventing the display defect caused by the movement of the spacer 30 .
  • the color filter substrate 10 includes a first substrate 11, a black matrix 12, a pixel layer 13, and a protective layer 14 stacked in this order; the spacer 30 is disposed on the thin film transistor substrate 20, and the concave hole 60 It is arranged on the protective layer 14.
  • the spacer 30 is provided on the thin film transistor substrate 20, and the concave hole 60 for limiting the spacer 30 is provided on the protective layer 14 of the color filter substrate 10.
  • the thin film transistor substrate 20 and the color filter substrate 10 When the superimposed combination is integrated, the spacer 30 is inserted into the concave hole 60 at the same time, which is convenient and fast, and has higher stability to the group.
  • the concave hole 60 is formed by exposure etching on the protective layer 14 through a half-tone mask process.
  • the thin film transistor substrate 20 includes a second substrate 21 and a buffer layer 22 and a semiconductor layer 23 stacked on the second substrate 21 in sequence; a gate covering the semiconductor layer 23 is provided on the buffer layer 22 Electrode insulating layer 24, an interlayer insulating layer 25 is provided on the gate insulating layer 24, a second metal layer 26 and a flat layer 27 covering the second metal layer 26 are provided on the interlayer insulating layer 25, A pixel electrode 28 is provided on the flat layer 27.
  • the flat layer 27 is provided with at least two via holes 271 arranged at intervals, and the spacer 30 is located between two adjacent via holes 271.
  • the spacer 30 is disposed between two adjacent vias 271 on the flat layer 27 to reduce the size of the black matrix 12 required to block the spacer 30 while increasing the pixel aperture ratio.
  • a touch layer 70 is provided on the pixel electrode 28, and the spacer 30 is located above the touch layer 70.
  • a second passivation layer 50 is provided on the top of the touch control layer 70, and the spacer 30 is provided on the second passivation layer 50.
  • the second passivation layer 50 improves the connection strength of the spacer 30 and the thin film transistor substrate 20, thereby improving the position stability of the spacer 30 and preventing the spacer 30 from moving significantly.
  • a second convex portion is provided at the top of the second passivation layer 50, and a second concave portion 32 for inserting the second convex portion is provided at the bottom of the spacer 30.
  • the present invention also provides a color filter substrate 10, which includes a first substrate 11, a black matrix 12 disposed on the first substrate 11, a pixel layer 13 disposed on the black matrix 12, and The protective layer 14 disposed on the pixel layer 13.
  • the protective layer 14 is provided with a concave hole 60, and the concave hole 60 on the color filter substrate 10 is used for a gap on the thin film transistor substrate 20 to be integrated with the color filter substrate 10 Things 30 are nested.
  • the present invention also provides a thin film transistor substrate 20, including a second substrate 21, a buffer layer 22 disposed on the second substrate 21, a semiconductor layer 23 disposed on the buffer layer 22, The gate insulating layer 24 provided on the semiconductor layer 23, the interlayer insulating layer 25 provided on the gate insulating layer 24, the second metal layer 26 provided on the interlayer insulating layer 25, provided The flat layer 27 on the interlayer insulating layer 25 and covering the second metal layer 26 and the pixel electrode 28 provided on the flat layer 27.
  • the flat layer 27 is provided with at least two via holes 271 arranged at intervals, and the flat layer 27 between two adjacent via holes 271 is provided with a spacer 30; the thin film transistor substrate 20
  • the spacer 30 is used to nest with the concave hole 60 on the color filter substrate 10 to be integrated with the thin film transistor substrate 20.
  • a touch layer 70 is provided on the pixel electrode 28, and the spacer 30 is located above the touch layer 70.
  • a second passivation layer 50 is provided on the top of the touch control layer 70, and the spacer 30 is provided on the second passivation layer 50.
  • connection structure includes a second convex portion disposed on the top of the second passivation layer 50 and the spacer A second concave portion 32 at the bottom and into which the second convex portion is inserted.
  • a liquid crystal display panel differs from Embodiment 4 only in that the connection structure of the spacer 30 and the second passivation layer 50 is different.
  • connection structure includes a second groove 51 disposed on the second passivation layer 50 and into which the spacer 30 is inserted.
  • a liquid crystal display panel differs from the first embodiment only in that the positions of the spacers 30 and the recessed holes 60 are different.
  • the spacer 30 is provided on the protective layer 14, and the concave hole 60 is provided on the first passivation layer 40 of the thin film transistor substrate 20.
  • a liquid crystal display panel differs from Embodiment 4 only in that the second convex portion and the second concave portion 32 are removed, and in this embodiment, the spacer 30 and the concave The position where the hole 60 is provided is different from the position where the spacer 30 and the recessed hole 60 are provided in the fourth embodiment.
  • the spacer 30 is provided on the color filter substrate 10, and the recessed hole 60 is provided on the second passivation layer 50.
  • a liquid crystal display panel, as shown in FIG. 14, is different from the first embodiment only in that the positions of the spacers 30 and the recessed holes 60 are different.
  • both the color filter substrate 10 and the thin film transistor substrate 20 are provided with a spacer 30 and a concave hole 60, and the concave hole 60 on the color filter substrate 10 is nested with the spacer 30 on the thin film transistor substrate 20, The concave hole 60 on the thin film transistor substrate 20 and the spacer 30 on the color filter substrate 10 are nested.
  • the beneficial effects of the present invention are: limiting the spacer 30 through the concave holes 60 and grooves, thereby reducing the movable range of the spacer 30, preventing the spacer 30 from generating a large displacement when subjected to an external force, and thereby improving the gap
  • the position stability of the object 30 prevents the display defect caused by the movement of the spacer 30.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)

Abstract

一种液晶显示面板,包括彩膜基板(10)、薄膜晶体管基板(20)以及间隙物(30);其中,间隙物(30)设置于彩膜基板(10)或/和薄膜晶体管基板(20)上,彩膜基板(10)或/和薄膜晶体管基板(20)上设置有凹孔(60),设置于彩膜基板(10)、薄膜晶体管基板(20)中的一者上的间隙物(30)的至少一部分与设置于彩膜基板(10)、薄膜晶体管基板(20)中的另一者上的凹孔(60)相嵌套。

Description

液晶显示面板、彩膜基板及薄膜晶体管基板 技术领域
本发明涉及显示技术领域,尤其涉及一种液晶显示面板、彩膜基板及薄膜晶体管基板。
背景技术
随着液晶面板市场需求,高开口率和高像素密度,成了面板设计的重要目标。显示密度越高,像素尺寸越来越小,位于彩膜基板和薄膜晶体管基本之间的间隙物(Photo Space,PS)在受到挤压,落摔等外力时,间隙物会发生位置移动,移动后会破坏配向液配向和液晶紊乱,形成亮点等显示不良。
技术问题
现有的液晶显示面板中,间隙物在受到挤压,落摔等外力时,会发生位置移动,移动后会破坏配向液配向和液晶紊乱,形成亮点等显示不良。
技术解决方案
一种液晶显示面板,包括:
彩膜基板;
薄膜晶体管基板;以及
位于所述彩膜基板和所述薄膜晶体管基板之间的间隙物;
其中,所述间隙物设置于所述彩膜基板或/和所述薄膜晶体管基板上,所述彩膜基板或/和所述薄膜晶体管基板上设置有凹孔,设置于所述彩膜基板、所述薄膜晶体管基板中的一者上的所述间隙物的至少一部分与设置于所述彩膜基板、所述薄膜晶体管基板中的另一者上的所述凹孔相嵌套。
优选的,所述间隙物设置于所述薄膜晶体管基板上,用于供所述间隙物插入的凹孔设置于所述彩膜基板的保护层上。
优选的,所述薄膜晶体管基板包括:
第二基板;
设置于所述第二基板上的半导体层;
设置于所述半导体层上的栅极绝缘层;
设置于所述栅极绝缘层上的层间绝缘层;
设置于所述层间绝缘层上的第二金属层;
设置于所述层间绝缘层上且覆盖所述第二金属层的平坦层;以及
设置于所述平坦层上的像素电极;
其中,所述平坦层上设置有至少两个间隔排布的过孔,所述间隙物位于相邻两个所述过孔之间。
优选的,所述像素电极上设置有第一钝化层,所述间隙物设置在所述第一钝化层上。
优选的,所述第一钝化层顶端设置有第一凸部,所述间隙物底部设置有供第一凸部插入的第一凹部。
优选的,所述第一钝化层上设置有供所述间隙物插入的第一凹槽。
优选的,所述像素电极上设置有触控层,所述间隙物位于所述触控层上方。
优选的,所述触控层顶部设置有第二钝化层,所述间隙物设置于所述第二钝化层上。
优选的,所述第二钝化层顶端设置有第二凸部,所述间隙物底部设置有供所述第二凸部插入的第二凹部。
优选的,所述第二钝化层上设置有供所述间隙物插入的第二凹槽。
本发明还提供一种彩膜基板,包括:
第一基板;
设置于所述第一基板上的黑矩阵;
设置于所述黑矩阵上的像素层;
设置于所述像素层上的保护层;
其中,所述保护层上设置有间隙物或/和凹孔;所述彩膜基板上的所述间隙物用于与待与所述彩膜基板叠加组合为一体的薄膜晶体管基板上的凹孔相嵌套,所述彩膜基板上的所述凹孔用于与待与所述彩膜基板叠加组合为一体的薄膜晶体管基板上的间隙物相嵌套。
本发明还提供一种薄膜晶体管基板,包括:
第二基板;
设置于所述第二基板上的半导体层;
设置于所述半导体层上的栅极绝缘层;
设置于所述栅极绝缘层上的层间绝缘层;
设置于所述层间绝缘层上的第二金属层;
设置于所述层间绝缘层上且覆盖所述第二金属层的平坦层;以及
设置于所述平坦层上的像素电极;
其中,所述平坦层上设置有至少两个间隔排布的过孔,相邻两个所述过孔之间的平坦层上设置有间隙物或/和凹孔;所述薄膜晶体管基板上的所述间隙物用于与待与所述薄膜晶体管基板叠加组合为一体的彩膜基板上的凹孔相嵌套,所述薄膜晶体管基板上的所述凹孔用于与待与所述薄膜晶体管基板叠加组合为一体的彩膜基板上的间隙物相嵌套。
有益效果
通过凹孔和凹槽等对间隙物进行限位,从而减小间隙物的活动范围,防止间隙物在受到外力作用时产生较大位移,进而提高间隙物的站位稳定性,防止间隙物移动造成的显示不良。
附图说明
为了更清楚地说明实施例或现有技术中的技术方案,下面将对实施例或现有技术描述中所需要使用的附图作简单介绍,显而易见地,下面描述中的附图仅仅是发明的一些实施例,对于本领域普通技术人员来讲,在不付出创造性劳动的前提下,还可以根据这些附图获得其他的附图。
图1为本发明实施例一中液晶显示面板的结构示意图;
图2至图7为本发明具体实施方式中薄膜晶体管基板的制图流程示意图;
图8为本发明实施例二中液晶显示面板的结构示意图;
图9为本发明实施例三中液晶显示面板的结构示意图;
图10为本发明实施例四中液晶显示面板的结构示意图;
图11为本发明实施例五中液晶显示面板的结构示意图;
图12为本发明实施例六中液晶显示面板的结构示意图;
图13为本发明实施例七中液晶显示面板的结构示意图;
图14为本发明实施例八中液晶显示面板的结构示意图。
附图标记:
10、彩膜基板;11、第一基板;12、黑矩阵;13、像素层;14、保护层;20、薄膜晶体管基板;21、第二基板;22、缓冲层;23、半导体层;24、栅极绝缘层;25、层间绝缘层;26、第二金属层;27、平坦层;271、过孔;28、像素电极;30、间隙物;31、第一凹部;32、第二凹部;40、第一钝化层;41、第一凹槽;50、第二钝化层;51、第二凹槽;60、凹孔;70、触控层。
本发明的实施方式
以下各实施例的说明是参考附加的图示,用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语,例如[上]、[下]、[前]、[后]、[左]、[右]、[内]、[外]、[侧面]等,仅是参考附加图式的方向。因此,使用的方向用语是用以说明及理解本发明,而非用以限制本发明。在图中,结构相似的单元是用以相同标号表示。
本发明针对现有的液晶显示面板,间隙物在受到挤压,落摔等外力时,会发生位置移动,移动后会破坏配向液配向和液晶紊乱,形成亮点等显示不良,本发明可以解决该问题。
实施例一:
一种液晶显示面板,如图1所示,所述液晶显示面板包括彩膜基板10、薄膜晶体管基板20以及位于所述彩膜基板10和所述薄膜晶体管基板20之间的间隙物30。
需要说明的是,在本实施例中,所述液晶显示面板为非内嵌式触摸液晶面板。
其中,所述间隙物30设置于所述薄膜晶体管基板20上,所述彩膜基板10上设置有与所述间隙物30相嵌套的凹孔60。
间隙物30在受到外力作用时,由于凹孔60对间隙物30的约束,从而减小间隙物30的活动范围,进而提高间隙物30的站位稳定性,防止间隙物30移动造成的显示不良。
其中,所述彩膜基板10包括依次层叠设置的第一基板11、黑矩阵12、像素层13以及保护层14;所述间隙物30设置于所述薄膜晶体管基板20上,所述凹孔60设置于所述保护层14上。
通过将间隙物30设置在薄膜晶体管基板20上,同时将对间隙物30进行限位约束的凹孔60设置在彩膜基板10的保护层14上,在将薄膜晶体管基板20与彩膜基板10叠加组合为一体时,同时间隙物30插入凹孔60中,方便快捷,对组稳定性更高。
具体的,所述凹孔60通过半色调掩模工艺在保护层14上进行曝光蚀刻形成。
其中,所述薄膜晶体管基板20包括第二基板21以及依次层叠设置于所述第二基板21上的缓冲层22和半导体层23;所述缓冲层22上设置有覆盖所述半导体层23的栅极绝缘层24,所述栅极绝缘层24上设置有层间绝缘层25,所述层间绝缘层25上设置有第二金属层26以及覆盖所述第二金属层26的平坦层27,所述平坦层27上设置有像素电极28。
进一步的,所述平坦层27上设置有至少两个间隔排布的过孔271,所述间隙物30位于相邻两个所述过孔271之间。
将间隙物30设置在平坦层27上的相邻的两个过孔271之间,减小遮挡间隙物30所需的黑矩阵12的尺寸,同时增加像素开口率。
具体的,所述像素电极28上设置有第一钝化层40,所述间隙物30设置在所述第一钝化层40上。
通过第一钝化层40提高间隙物30与所述薄膜晶体管基板20的连接强度,从而提高间隙物30的站位稳定性,防止间隙物30产生较大移动。
基于上述液晶显示面板,本发明还提供一种彩膜基板10,包括第一基板11、设置于所述第一基板11上的黑矩阵12、设置于所述黑矩阵12上的像素层13以及设置于所述像素层13上的保护层14。
其中,所述保护层14上设置有凹孔60,所述彩膜基板10上的所述凹孔60用于与待与所述彩膜基板10叠加组合为一体的薄膜晶体管基板20上的间隙物30相嵌套。
基于上述液晶显示面板,本发明还提供一种薄膜晶体管基板20,包括第二基板21、设置于所述第二基板21上的缓冲层22、设置于所述缓冲层22上的半导体层23、设置于所述半导体层23上的栅极绝缘层24、设置于所述栅极绝缘层24上的层间绝缘层25、设置于所述层间绝缘层25上的第二金属层26、设置于所述层间绝缘层25上且覆盖所述第二金属层26的平坦层27以及设置于所述平坦层27上的像素电极28。
其中,所述平坦层27上设置有至少两个间隔排布的过孔271,相邻两个所述过孔271之间的平坦层27上设置有第一钝化层40,所述第一钝化层40上设置有间隙物30;所述薄膜晶体管基板20上的所述间隙物30用于与待与所述薄膜晶体管基板20叠加组合为一体的彩膜基板10上的凹孔60相嵌套。
所述薄膜晶体管基板的制备流程示意图如图2至图7所示。
如图2所示,在第二基板21上形成缓冲层22,并在所述缓冲层22上形成图案化的半导体层23。
如图3所示,在所述缓冲层22上形成覆盖所述半导体层23的栅极绝缘层24和层间绝缘层25,并在所述层间绝缘层25上形成贯穿所述层间绝缘层25和所述栅极绝缘层24的第一搭接孔。
如图4所示,在所述层间绝缘层25上形成第二金属层26,并对所述第二金属层26进行蚀刻处理,形成源漏金属走线和数据金属走线。
如图5所示,形成覆盖所述第二金属层26的平坦层27,并在所述平坦层27的两侧上形成至少两个间隔排布的过孔271。
如图6所示,在所述平坦层27上形成图案化的像素电极28。
如图7所示,形成第一钝化层40,所述第一钝化层40位于相邻的两个所述过孔271之间,并在所述第一钝化层40上设置间隙物30。
实施例二:
一种液晶显示面板,如图8所示,其与实施例一的不同之处仅在于间隙物30与第一钝化层40通过连接结构连接。
具体的,所述连接结构包括设置在所述第一钝化层40顶端的第一凸部以及设置于所述间隙物30底部且供所述第一凸部插入的第一凹部31。
实施例三:
一种液晶显示面板,如图9所示,其与实施例二的不同之处仅在于间隙物30与第一钝化层40的连接结构不同。
具体的,所述连接结构包括设置于所述第一钝化层40上且供所述间隙物30插入的第一凹槽41。
实施例四:
一种液晶显示面板,如图10所示,所述液晶显示面板包括彩膜基板10、薄膜晶体管基板20以及位于所述彩膜基板10和所述薄膜晶体管基板20之间的间隙物30。
需要说明的是,在本优先实施例中,所述液晶显示面板为内嵌式触摸液晶面板。
其中,所述间隙物30设置于所述薄膜晶体管基板20上,所述彩膜基板10上设置有与所述间隙物30相嵌套的凹孔60。
间隙物30在受到外力作用时,由于凹孔60对间隙物30的约束,从而减小间隙物30的活动范围,进而提高间隙物30的站位稳定性,防止间隙物30移动造成的显示不良。
其中,所述彩膜基板10包括依次层叠设置的第一基板11、黑矩阵12、像素层13以及保护层14;所述间隙物30设置于所述薄膜晶体管基板20上,所述凹孔60设置于所述保护层14上。
通过将间隙物30设置在薄膜晶体管基板20上,同时将对间隙物30进行限位约束的凹孔60设置在彩膜基板10的保护层14上,在将薄膜晶体管基板20与彩膜基板10叠加组合为一体时,同时间隙物30插入凹孔60中,方便快捷,对组稳定性更高。
具体的,所述凹孔60通过半色调掩模工艺在保护层14上进行曝光蚀刻形成。
其中,所述薄膜晶体管基板20包括第二基板21以及依次层叠设置于所述第二基板21上的缓冲层22和半导体层23;所述缓冲层22上设置有覆盖所述半导体层23的栅极绝缘层24,所述栅极绝缘层24上设置有层间绝缘层25,所述层间绝缘层25上设置有第二金属层26以及覆盖所述第二金属层26的平坦层27,所述平坦层27上设置有像素电极28。
进一步的,所述平坦层27上设置有至少两个间隔排布的过孔271,所述间隙物30位于相邻两个所述过孔271之间。
将间隙物30设置在平坦层27上的相邻的两个过孔271之间,减小遮挡间隙物30所需的黑矩阵12的尺寸,同时增加像素开口率。
具体的,所述像素电极28上设置有触控层70,所述间隙物30位于所述触控层70上方。
进一步的,所述触控层70顶部设置有第二钝化层50,所述间隙物30设置于所述第二钝化层50上。
通过第二钝化层50提高间隙物30与所述薄膜晶体管基板20的连接强度,从而提高间隙物30的站位稳定性,防止间隙物30产生较大移动。
其中,所述第二钝化层50顶端设置有第二凸部,所述间隙物30底部设置有供所述第二凸部插入的第二凹部32。
基于上述液晶显示面板,本发明还提供一种彩膜基板10,包括第一基板11、设置于所述第一基板11上的黑矩阵12、设置于所述黑矩阵12上的像素层13以及设置于所述像素层13上的保护层14。
其中,所述保护层14上设置有凹孔60,所述彩膜基板10上的所述凹孔60用于与待与所述彩膜基板10叠加组合为一体的薄膜晶体管基板20上的间隙物30相嵌套。
基于上述液晶显示面板,本发明还提供一种薄膜晶体管基板20,包括第二基板21、设置于所述第二基板21上的缓冲层22、设置于所述缓冲层22上的半导体层23、设置于所述半导体层23上的栅极绝缘层24、设置于所述栅极绝缘层24上的层间绝缘层25、设置于所述层间绝缘层25上的第二金属层26、设置于所述层间绝缘层25上且覆盖所述第二金属层26的平坦层27以及设置于所述平坦层27上的像素电极28。
其中,所述平坦层27上设置有至少两个间隔排布的过孔271,相邻两个所述过孔271之间的平坦层27上设置有间隙物30;所述薄膜晶体管基板20上的所述间隙物30用于与待与所述薄膜晶体管基板20叠加组合为一体的彩膜基板10上的凹孔60相嵌套。
具体的,所述像素电极28上设置有触控层70,所述间隙物30位于所述触控层70上方。
进一步的,所述触控层70顶部设置有第二钝化层50,所述间隙物30设置于所述第二钝化层50上。
进一步的,所述间隙物30与所述第二钝化层50通过连接结构连接,所述连接结构包括设置于所述第二钝化层50顶端的第二凸部以及设置于所述间隙物30底部且供所述第二凸部插入的第二凹部32。
实施例五:
一种液晶显示面板,如图11所示,其与实施例四的不同之处仅在于间隙物30与第二钝化层50的连接结构不同。
具体的,所述连接结构包括设置于所述第二钝化层50上且供所述间隙物30插入的第二凹槽51。
实施例六:
一种液晶显示面板,如图12所示,其与实施例一的不同之处仅在于间隙物30和凹孔60设置的位置不同。
具体的,所述间隙物30设置在保护层14上,所述凹孔60设置在薄膜晶体管基板20的第一钝化层40上。
实施例七:
一种液晶显示面板,如图13所示,其与实施例四的不同之处仅在于去除第二凸部和第二凹部32,且在本实施例中,所述间隙物30和所述凹孔60设置的位置与在实施例四中所述间隙物30和所述凹孔60设置的位置不同。
具体的,所述间隙物30设置在彩膜基板10上,所述凹孔60设置在第二钝化层50上。
实施例八:
一种液晶显示面板,如图14所示,其与实施例一的不同之处仅在于间隙物30和凹孔60设置的位置不同。
具体的,彩膜基板10和薄膜晶体管基板20上均设置有间隙物30和凹孔60,所述彩膜基板10上的凹孔60与所述薄膜晶体管基板20上的间隙物30嵌套,所述薄膜晶体管基板20上的凹孔60与所述彩膜基板10上的间隙物30嵌套。
本发明的有益效果为:通过凹孔60和凹槽等对间隙物30进行限位,从而减小间隙物30的活动范围,防止间隙物30在受到外力作用时产生较大位移,进而提高间隙物30的站位稳定性,防止间隙物30移动造成的显示不良。
综上所述,虽然本发明已以优选实施例揭露如上,但上述优选实施例并非用以限制本发明,本领域的普通技术人员,在不脱离本发明的精神和范围内,均可作各种更动与润饰,因此本发明的保护范围以权利要求界定的范围为准。

Claims (12)

  1. 一种液晶显示面板,其中,所述液晶显示面板包括:
    彩膜基板;
    薄膜晶体管基板;以及
    位于所述彩膜基板和所述薄膜晶体管基板之间的间隙物;
    其中,所述间隙物设置于所述彩膜基板或/和所述薄膜晶体管基板上,所述彩膜基板或/和所述薄膜晶体管基板上设置有凹孔,设置于所述彩膜基板、所述薄膜晶体管基板中的一者上的所述间隙物的至少一部分与设置于所述彩膜基板、所述薄膜晶体管基板中的另一者上的所述凹孔相嵌套。
  2. 根据权利要求1所述的液晶显示面板,其中,所述间隙物设置于所述薄膜晶体管基板上,用于供所述间隙物插入的凹孔设置于所述彩膜基板的保护层上。
  3. 根据权利要求2所述的液晶显示面板,其中,所述薄膜晶体管基板包括:
    第二基板;
    设置于所述第二基板上的半导体层;
    设置于所述半导体层上的栅极绝缘层;
    设置于所述栅极绝缘层上的层间绝缘层;
    设置于所述层间绝缘层上的第二金属层;
    设置于所述层间绝缘层上且覆盖所述第二金属层的平坦层;以及
    设置于所述平坦层上的像素电极;
    其中,所述平坦层上设置有至少两个间隔排布的过孔,所述间隙物位于相邻两个所述过孔之间。
  4. 根据权利要求3所述的液晶显示面板,其中,所述像素电极上设置有第一钝化层,所述间隙物设置在所述第一钝化层上。
  5. 根据权利要求4所述的液晶显示面板,其中,所述第一钝化层顶端设置有第一凸部,所述间隙物底部设置有供第一凸部插入的第一凹部。
  6. 根据权利要求4所述的液晶显示面板,其中,所述第一钝化层上设置有供所述间隙物插入的第一凹槽。
  7. 根据权利要求3所述的液晶显示面板,其中,所述像素电极上设置有触控层,所述间隙物位于所述触控层上方。
  8. 根据权利要求7所述的液晶显示面板,其中,所述触控层顶部设置有第二钝化层,所述间隙物设置于所述第二钝化层上。
  9. 根据权利要求8所述的液晶显示面板,其中,所述第二钝化层顶端设置有第二凸部,所述间隙物底部设置有供所述第二凸部插入的第二凹部。
  10. 根据权利要求8所述的液晶显示面板,其中,所述第二钝化层上设置有供所述间隙物插入的第二凹槽。
  11. 一种彩膜基板,其中,所述彩膜基板包括:
    第一基板;
    设置于所述第一基板上的黑矩阵;
    设置于所述黑矩阵上的像素层;
    设置于所述像素层上的保护层;
    其中,所述保护层上设置有间隙物或/和凹孔;所述彩膜基板上的所述间隙物用于与待与所述彩膜基板叠加组合为一体的薄膜晶体管基板上的凹孔相嵌套,所述彩膜基板上的所述凹孔用于与待与所述彩膜基板叠加组合为一体的薄膜晶体管基板上的间隙物相嵌套。
  12. 一种薄膜晶体管基板,其中,所述薄膜晶体管基板包括:
    第二基板;
    设置于所述第二基板上的半导体层;
    设置于所述半导体层上的栅极绝缘层;
    设置于所述栅极绝缘层上的层间绝缘层;
    设置于所述层间绝缘层上的第二金属层;
    设置于所述层间绝缘层上且覆盖所述第二金属层的平坦层;以及
    设置于所述平坦层上的像素电极;
    其中,所述平坦层上设置有至少两个间隔排布的过孔,相邻两个所述过孔之间的平坦层上设置有间隙物或/和凹孔;所述薄膜晶体管基板上的所述间隙物用于与待与所述薄膜晶体管基板叠加组合为一体的彩膜基板上的凹孔相嵌套,所述薄膜晶体管基板上的所述凹孔用于与待与所述薄膜晶体管基板叠加组合为一体的彩膜基板上的间隙物相嵌套。
PCT/CN2018/123813 2018-10-31 2018-12-26 液晶显示面板、彩膜基板及薄膜晶体管基板 WO2020087727A1 (zh)

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