WO2020073458A1 - 导电层绝缘方法、导电层绝缘结构及显示装置 - Google Patents

导电层绝缘方法、导电层绝缘结构及显示装置 Download PDF

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WO2020073458A1
WO2020073458A1 PCT/CN2018/118294 CN2018118294W WO2020073458A1 WO 2020073458 A1 WO2020073458 A1 WO 2020073458A1 CN 2018118294 W CN2018118294 W CN 2018118294W WO 2020073458 A1 WO2020073458 A1 WO 2020073458A1
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layer
insulating layer
conductive layer
substrate
conductive
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French (fr)
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黄北洲
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HKC Co Ltd
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HKC Co Ltd
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136277—Active matrix addressed cells formed on a semiconductor substrate, e.g. of silicon
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/451—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by the compositions or shapes of the interlayer dielectrics
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices

Definitions

  • the present application relates to the technical field of liquid crystal display, in particular to a conductive layer insulation method, a conductive layer insulation structure, and a display device.
  • Thin film transistor liquid crystal display has the advantages of high picture quality, light and thin, low power consumption, no radiation, etc., and has gradually become the mainstream of display devices.
  • TFT-LCD Thin film transistor liquid crystal display
  • the quality requirements of wire manufacturing technology are becoming higher and higher during the production of thin-film transistor liquid crystal displays.
  • copper metal with lower resistance is generally used as the wire material instead of aluminum alloy or pure aluminum metal wires.
  • copper ions will diffuse.
  • COA type color filter attached to the array substrate, CF Array
  • the present application provides a method for insulating a conductive layer that prevents diffusion of ions, an insulating structure for a conductive layer, and a display device.
  • an embodiment of the present application provides a conductive layer insulation method, which is applied to a display panel.
  • the display panel includes at least a substrate, a plurality of switching elements, a plurality of data lines, and a plurality of scan lines.
  • a color resist layer is provided, the switching element includes at least a source electrode, and the method includes:
  • the conductive layer including the data line and the source of the switching element
  • the density of the first insulating layer is greater than the density of the second insulating layer.
  • an embodiment of the present application provides a conductive layer insulation structure, which is applied to a display panel.
  • the display panel at least includes a substrate, a plurality of switching elements, a plurality of data lines, and a plurality of scan lines.
  • the substrate A color resist layer is provided thereon, the switching element includes at least a source electrode, and the insulating structure of the conductive layer includes:
  • the density of the first insulating layer is greater than the density of the second insulating layer.
  • an embodiment of the present application provides a display device.
  • the display device includes a housing and a display panel.
  • the display panel includes:
  • a color resist layer is provided on the substrate; the pixel unit and the switching element are disposed in an area surrounded by the intersection of the plurality of data lines and the plurality of scan lines,
  • the conductive layer insulating structure includes: a first insulating layer covering the conductive layer;
  • the density of the first insulating layer is greater than the density of the second insulating layer.
  • the embodiments of the present application provide a conductive layer insulation method, a conductive layer insulation structure, and a display device.
  • the method includes forming a conductive layer on the substrate, the conductive layer including the data line and the source of the switching element; forming a first insulating layer to cover the conductive layer; forming a second insulating layer To cover the first insulating layer, a side of the second insulating layer far away from the first insulating layer is connected to the color resist layer; wherein, the density of the first insulating layer is greater than the first The density of the second insulating layer.
  • the implementation of the embodiments of the present application can effectively prevent the diffusion of metal ions in the conductive layer.
  • FIG. 1 is a schematic flowchart of a method for insulating a conductive layer in an embodiment of the present application
  • FIG. 2 is a schematic structural diagram of an insulating structure of a conductive layer in an embodiment of the present application
  • FIG. 3 is a schematic structural diagram of an insulating structure of a conductive layer in an embodiment of the present application.
  • FIG. 4 is a schematic structural diagram of a display device in an embodiment of the present application.
  • FIG. 1 is a schematic flowchart of a conductive layer insulation method in an embodiment of the present application.
  • the display panel includes a substrate, a plurality of switching elements, a plurality of data lines, and a plurality of scanning lines.
  • the switching element includes at least a source electrode.
  • a color resist layer is provided on the substrate.
  • the method includes steps S101-S103.
  • the display panel includes an array substrate including the substrate, a plurality of switching elements, a plurality of data lines, and a plurality of scanning lines.
  • the substrate may be formed by a substrate such as a glass substrate or a plastic substrate.
  • the array substrate can be applied to display panels of various display devices.
  • the display panel may be a liquid crystal display panel in a thin film transistor liquid crystal display (TFT-LCD).
  • the array substrate may be a thin film transistor array substrate.
  • the switching element may be a thin film transistor.
  • the switching element includes a source electrode, a gate electrode, a drain electrode, an active layer, and the like.
  • the data line is electrically connected to the source of the switching element, is formed above the substrate, and collectively serves as the conductive layer.
  • the conductive layer may be a copper metal conductive layer or a copper alloy conductive layer.
  • the formation of the conductive layer can be achieved by using a pure copper target and depositing a metal copper thin film on the substrate by sputtering. And through exposure, development and etching processes, the copper film is patterned into a conductive layer.
  • the conductive layer includes a data line disposed on the substrate and a source of a switching element disposed on the substrate.
  • the data line is electrically connected to the source of the switching element.
  • a scan line for connecting to the gate may be formed between the conductive layer and the substrate.
  • a gate insulating layer may be formed between the conductive layer and the scan line. The gate insulating layer completely covers the scan line. The gate insulating layer is used to insulate and separate the conductive layer from the scan line.
  • the method for forming the first insulating layer includes, but is not limited to: a DC vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method, and a reactive sputtering method.
  • the first insulating layer may be silicon nitride or silicon oxide.
  • the thickness of the first insulating layer may be 100 angstroms to 300 angstroms, for example, the thickness of the first insulating layer may be 100 angstroms, 200 angstroms or 300 angstroms.
  • a second insulating layer is formed to cover the first insulating layer, and a side surface of the second insulating layer remote from the first insulating layer is connected to the color resist layer.
  • the method for forming the second insulating layer includes, but is not limited to, a DC vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method, and a reactive sputtering method.
  • the forming speed of the first insulating layer is lower than the forming speed of the second insulating layer.
  • the density of the first insulating layer is greater than the density of the second insulating layer.
  • the second insulating layer may be silicon nitride or silicon oxide.
  • a surface of the second insulating layer remote from the first insulating layer is connected to the color resist layer.
  • the surface connected to the color resist layer may be above or to the side of the second insulating layer.
  • the color resist layer includes a plurality of color resist blocks arranged in the same layer, and the color resist blocks include red color resist, green color resist, and blue color resist.
  • the color resist blocks in the color resist layer may be arranged in an array. For example, the color resist blocks in each row are alternately arranged in the order of red color resist blocks, green color resist blocks, and blue color resist blocks.
  • the density of the first insulating layer is greater than the density of the second insulating layer.
  • the forming speed of the first insulating layer is lower than the forming speed of the second insulating layer.
  • the material of the first insulating layer may be silicon oxide.
  • the ratio of the thickness of the first insulating layer to the thickness of the second insulating layer is 1:10.
  • the first insulating layer may be 150 Angstroms; correspondingly, the second insulating layer may be 1500 Angstroms. Or the first insulating layer may be 200 Angstroms; correspondingly, the second insulating layer may be 2000 Angstroms. Or the first insulating layer may be 250 Angstroms; correspondingly, the second insulating layer may be 2500 Angstroms.
  • the above layers can also be formed in other ways, such as chemical vapor deposition or physical deposition, etc., which will not be repeated here.
  • a first insulating layer with a density greater than the second insulating layer is provided between the second insulating layer and the conductive layer, which can effectively prevent the metal ions in the conductive layer from diffusing to the color resistive layer connected to the second insulating layer , Effectively avoid the leakage phenomenon.
  • the method further includes: forming an adhesion layer between the substrate and the conductive layer, the adhesion layer being a molybdenum alloy.
  • the molybdenum alloy includes, but is not limited to, any one or a mixture of two or more of MoNb, MoW, MoTi, and MoZr.
  • the adhesion layer may be formed on the substrate first, and then the conductive layer may be formed on the adhesion layer. For example, first provide a substrate, and clean the substrate with deionized water.
  • the adhesion layer is formed on the substrate by a sputtering process; then a copper thin film is formed on the adhesion layer by sputtering, and through exposure, development, and etching processes , Pattern the copper thin film into a conductive layer.
  • the adhesion between the conductive layer and the substrate can be enhanced by the adhesion layer, which is beneficial to enhance the stability of the overall structure.
  • the adhesion layer can also prevent the metal ions in the conductive layer from diffusing into the substrate, improving the reliability of the product.
  • FIG. 2 is a schematic structural diagram of a conductive layer insulation structure 100 in an embodiment of the present application.
  • the conductive layer insulation structure 100 is applied to a display panel.
  • the display panel includes a substrate 110, a plurality of switching elements, a plurality of data lines, and a plurality of scanning lines.
  • the switching element includes at least a source, and the substrate is provided with The color resist layer 150, the data line and the source of the switching element are formed above the substrate 110, and together serve as a conductive layer 120.
  • the conductive layer insulation structure 100 includes a first insulation layer 130 and a second insulation layer 140.
  • the display panel includes an array substrate
  • the array substrate includes the substrate 110, a plurality of switching elements, a plurality of data lines, and a plurality of scanning lines
  • the substrate 110 may be a substrate such as a glass substrate or a plastic substrate form.
  • the array substrate can be applied to display panels of various display devices.
  • the display panel may be a liquid crystal display panel in a thin film transistor liquid crystal display (TFT-LCD).
  • the array substrate may be a thin film transistor array substrate.
  • the switching element may be a thin film transistor.
  • the switching element may include a source electrode, a gate electrode, a drain electrode, an active layer, and the like.
  • the conductive layer 120 may be a copper metal conductive layer or a copper alloy conductive layer. Assuming that the conductive layer 120 is a copper metal conductive layer 120, the formation of the conductive layer 120 can be achieved by using a pure copper target and depositing a copper metal film on the substrate 110 by sputtering. And through exposure, development, etching and other processes, the copper thin film is patterned into the conductive layer 120.
  • the data line is electrically connected to the source of the switching element, formed above the substrate 110, and collectively serves as the conductive layer 120, please refer to FIG. 3 for details
  • a scan line 170 for connecting to the gate may be formed between the conductive layer 120 and the substrate 110.
  • a gate insulating layer 180 may be formed between the conductive layer 120 and the scan line 170. The gate insulating layer 180 completely covers the scan line 170. The gate insulating layer 180 is used to connect the conductive layer 120 with The scan line 170 is insulated and separated.
  • the first insulating layer 130 covers the conductive layer 120.
  • the method for forming the first insulating layer 130 includes, but is not limited to, a DC vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method, and a reactive sputtering method.
  • the first insulating layer 130 may be silicon nitride or silicon oxide.
  • the thickness of the first insulating layer 130 is 100 angstroms to 300 angstroms, for example, the thickness of the first insulating layer may be 100 angstroms, 200 angstroms, 300 angstroms, or the like.
  • the second insulating layer 140 covers the first insulating layer 130. A surface of the second insulating layer 140 away from the first insulating layer 130 is connected to the color resist layer 150.
  • the forming method of the second insulating layer 140 includes, but is not limited to: a DC vacuum magnetron sputtering method, a radio frequency vacuum magnetron sputtering method, and a reactive sputtering method.
  • the forming speed of the first insulating layer 130 is lower than the forming speed of the second insulating layer 140.
  • the density of the first insulating layer 130 is greater than the density of the second insulating layer 140.
  • the second insulating layer 140 may be silicon nitride or silicon oxide.
  • the color resist layer 150 includes a plurality of color resist blocks arranged in the same layer, and the color resist blocks include red color resist, green color resist, and blue color resist.
  • the color resist blocks in the color resist layer 150 may be arranged in an array. For example, the color resist blocks in each row are alternately arranged in the order of red color resist blocks, green color resist blocks, and blue color resist blocks.
  • the density of the first insulating layer 130 is greater than the density of the second insulating layer 140.
  • the forming speed of the first insulating layer 130 is lower than the forming speed of the second insulating layer 140.
  • the first insulating layer 130 may be silicon oxide.
  • the ratio of the thickness of the first insulating layer 130 to the thickness of the second insulating layer 140 may be 1:10.
  • the first insulating layer 130 may be 150 Angstroms; correspondingly, the second insulating layer 140 may be 1500 Angstroms.
  • the first insulating layer 130 may be 200 Angstroms; correspondingly, the second insulating layer 140 may be 2000 Angstroms.
  • the first insulating layer 130 may be 250 Angstroms; correspondingly, the second insulating layer 140 may be 2500 Angstroms.
  • the above layers can also be formed in other ways, such as chemical vapor deposition or physical deposition, etc., which will not be repeated here.
  • a first insulating layer 130 with a density greater than that of the second insulating layer 140 is disposed between the second insulating layer 140 and the conductive layer 120, which can effectively prevent the metal ions in the conductive layer 120 from diffusing to the second insulating layer
  • the color resist layer 150 connected to 140 effectively avoids the leakage phenomenon.
  • the method further includes: forming an adhesion layer 160 between the substrate 110 and the conductive layer 120, the adhesion layer 160 being a molybdenum alloy.
  • the molybdenum alloy includes, but is not limited to, any one or a mixture of two or more of MoNb, MoW, MoTi, and MoZr.
  • the adhesion layer 160 may be formed on the substrate 110 first, and then the conductive layer 120 may be formed on the adhesion layer 160. For example, a substrate 110 is provided first, and the substrate 110 is washed with deionized water.
  • the adhesion layer 160 is formed on the substrate 110 by a sputtering process; then, a copper thin film is formed on the adhesion layer 160 by sputtering, and exposed, developed, and engraved Processes such as etching pattern the copper thin film into the conductive layer 120.
  • the adhesion layer 160 may be used to enhance the adhesion between the conductive layer 120 and the substrate 110, which is beneficial to enhance the stability of the overall structure. At the same time, the adhesion layer 160 can also prevent the metal ions in the conductive layer 120 from diffusing into the substrate 110, improving the reliability of the product.
  • FIG. 4 is a schematic structural diagram of a display device according to an embodiment of the present application.
  • the display device 200 includes a housing 210 and a display panel 220.
  • the display panel 220 includes a substrate, a plurality of pixel units, a plurality of switching elements, a conductive layer insulation structure, a plurality of data lines and a plurality of scanning lines, the switching element includes at least a source electrode, the data line and the source A pole is formed above the substrate and together serves as a conductive layer; a color resist layer is provided on the substrate; the plurality of pixel units and the plurality of switching elements are disposed on the plurality of data lines and the plurality of scan lines Within the area surrounded by positive intersections.
  • the conductive layer insulation structure is the conductive layer insulation structure 100 in the foregoing embodiment.
  • the conductive layer insulation structure 100 please refer to the foregoing embodiments, and no more details are provided here.
  • the plurality of conductive insulating structures cover the plurality of data lines and the plurality of source electrodes of the plurality of switching elements in a one-to-one correspondence.
  • the display panel 220 includes, but is not limited to, a liquid crystal display panel (Liquid Crystal Display, LCD), an organic light-emitting diode display panel (Organic Light-Emitting Diode, OLED), a field emission display panel (Field emission display (FED), a plasma display panel PDP (Plasma Display Panel), curved panel.
  • LCD Liquid Crystal Display
  • OLED Organic Light-Emitting Diode
  • FED Field emission display
  • PDP Plasma display panel
  • the liquid crystal panel includes a thin film transistor liquid crystal display panel (Thin Film Transistor-Liquid Crystal) (TFT-LCD), TN panel (Twisted Nematic + Film), VA panel (Vertical) Alignment, IPS panel (InPlane Switching), COA (Color Filter on Array) panel, etc.
  • TFT-LCD Thi Film Transistor-Liquid Crystal
  • TN panel Transmission Nematic + Film
  • VA panel Very Light Alignment
  • IPS panel InPlane Switching
  • COA Color Filter on Array

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  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Devices For Indicating Variable Information By Combining Individual Elements (AREA)
  • Liquid Crystal (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

本申请实施例提供了一种导电层绝缘方法、导电层绝缘结构及显示装置，所述方法包括通过形成导电层于所述基板上方，所述导电层包括所述数据线和所述开关元件的源极；形成第一绝缘层以覆盖于所述导电层上方；形成第二绝缘层以覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一侧面与所述色阻层连接；其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。

Description

导电层绝缘方法、导电层绝缘结构及显示装置
相关申请
本申请要求2018年10月8日申请的，申请号为2018111686855，名称为“导电层绝缘方法、导电层绝缘结构及显示装置”的中国专利申请的优先权，在此将其全文引入作为参考。
技术领域
本申请涉及液晶显示技术领域，具体涉及一种导电层绝缘方法、导电层绝缘结构及显示装置。
背景技术
薄膜晶体管液晶显示器(thin film transistor-liquid crystal display,TFT-LCD)具有高画质、轻薄、低消耗功率、无辐射等优势，已经逐渐成为显示设备的主流。随着薄膜晶体管液晶显示器往超大尺寸、高驱动频率、高分辨率等方面发展，薄膜晶体管液晶显示器在制作时，对导线制程技术的质量要求也越来越高。
为了满足未来高频率与高分辨率的液晶显示器规格的发展需求，通常以电阻较低的铜金属取代铝合金或纯铝金属导线作为导线材料。而由于铜离子的活性较高且易被氧化，因此会有铜离子扩散的问题发生。例如，在COA型(彩色滤光片贴附于阵列基板，CF on Array)液晶面板上使用铜金属作为导线材料，容易造成扩散的铜离子污染彩色滤光膜中的色阻，产生漏电及直流(DC)残留现象，进而产生残影现象。
发明内容
有鉴于此，本申请提供了一种防止离子扩散的导电层绝缘方法、导电层绝缘结构及显示装置。
一方面，本申请实施例提供了一种导电层绝缘方法，应用于显示面板上，所述显示面板至少包括一基板、多个开关元件、多条数据线和多条扫描线，所述基板上设有色阻层，所述开关元件至少包括源极，所述方法包括：
形成导电层于所述基板上方，所述导电层包括所述数据线和所述开关元件的所述源极；
形成第一绝缘层以覆盖于所述导电层上方；以及
形成第二绝缘层以覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一侧面与所述色阻层连接；
其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。
另一方面，本申请实施例提供了一种导电层绝缘结构，应用于显示面板上，所述显示面板至少包括一基板、多个开关元件、多条数据线和多条扫描线，所述基板上设有色阻层，所述开关元件至少包括源极，所述导电层绝缘结构包括：
导电层，形成于所述基板上方，所述导电层包括所述数据线和所述开关元件的所述源极；
第一绝缘层，覆盖于所述导电层上方；
第二绝缘层，覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一侧面与所述色阻层连接；
其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。
再一方面，本申请实施例提供了一种显示装置，所述显示装置包括壳体以及显示面板，所述显示面板包括：
基板；
像素单元；
开关元件；
导电层绝缘结构；以及
多条数据线和多条扫描线，
所述基板上设有色阻层；所述像素单元和所述开关元件设置在所述多条数据线与所述多条扫描线正相交所包围的区域内，
所述导电层绝缘结构包括：第一绝缘层，覆盖于所述导电层上方；
第二绝缘层，覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一表面与所述色阻层连接；
其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。
本申请实施例提供了一种导电层绝缘方法、导电层绝缘结构及显示装置。该方法包括通过形成导电层于所述基板上方，所述导电层包括所述数据线和所述开关元件的源极；形成第一绝缘层以覆盖于所述导电层上方；形成第二绝缘层以覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一侧面与所述色阻层连接；其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。实施本申请实施例，可有效防止导电层中的金属离 子向外扩散。
附图说明
为了更清楚地说明本申请实施例技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图是本申请的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1为本申请一实施例中一种导电层绝缘方法的流程示意图；
图2为本申请一实施例中一种导电层绝缘结构的结构示意图；
图3为本申请一实施例中一种导电层绝缘结构的结构示意图；
图4为本申请一实施例中一种显示装置的结构示意图。
具体实施方式
为了使本申请的目的、技术方案及优点更加清楚明白，以下通过实施例，并结合附图，对本申请进行进一步详细说明。应当理解，此处所描述的具体实施例仅用以解释本申请，并不用于限定本申请。
应当理解，当在本说明书和所附权利要求书中使用时，术语“包括”和“包含”指示所描述特征、整体、步骤、操作、元素和/或组件的存在，但并不排除一个或多个其它特征、整体、步骤、操作、元素、组件和/或其集合的存在或添加。
请参照图1，其为本申请实施例中一种导电层绝缘方法的流程示意图。所述显示面板包括一基板、多个开关元件、多条数据线和多条扫描线，所述开关元件至少包括源极，所述基板上设有色阻层，所述方法包括步骤S101-S103。
S101，形成导电层于所述基板上方，所述导电层包括所述数据线和所述开关元件的所述源极。
具体实施中，所述显示面板包括阵列基板，所述阵列基板包括所述基板、多个开关元件、多条数据线和多条扫描线，所述基板可以由玻璃基板或者塑胶基板等基板形成。所述阵列基板可应用于各类显示装置的显示面板中。例如，所述显示面板可以为薄膜晶体管液晶显示器(thin film transistor-liquid crystal display,TFT-LCD)中的液晶显示面板。具体地，所述阵列基板可以为薄膜晶体管阵列基板。所述开关元件可以是薄膜晶体管。所述开关元件包括源极、栅极、漏极、有源层等。
其中，所述数据线与所述开关元件的所述源极电性连接，形成于所述基板上方，共同作为所述导电层。
具体实施中，所述导电层可以为铜金属导电层或者铜合金导电层。假设所述导电层为铜金属导电层，则所述导电层的形成可通过如下方式实现：采用纯铜靶材，以溅镀法沉积金属铜薄膜于所述基板上方。并通过曝光、显影及刻蚀等工艺，将铜薄膜图案化成导电层。
若所述阵列基板为薄膜晶体管阵列基板，所述导电层所述导电层包括设置于所述基板上的数据线，以及设置于所述基板中的开关元件的源极。所述数据线与所述开关元件的源极电性连接。特别地，所述导电层与基板之间还可形成有用于与栅极连接的扫描线。该导电层与该扫描线之间可形成有栅极绝缘层，该栅极绝缘层完全覆盖于所述扫描线，该栅极绝缘层用于将所述导电层与所述扫描线绝缘分离。
S102，形成第一绝缘层以覆盖于所述导电层上方。
具体实施中，所述第一绝缘层的形成方法包括但不限于：直流式真空磁控溅镀法、射频式真空磁控溅镀法及反应性溅镀法。
其中，所述第一绝缘层可以为氮化矽或者氧化矽。所述第一绝缘层的厚度可为100埃米至300埃米，例如该第一绝缘层的厚度可以为100埃米、200埃米或者300埃米等等。
S103，形成第二绝缘层以覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一侧面与所述色阻层连接。
具体实施中，所述第二绝缘层的形成方法包括但不限于：直流式真空磁控溅镀法、射频式真空磁控溅镀法及反应性溅镀法。其中，所述第一绝缘层的形成速度小于所述第二绝缘层的形成速度。所述第一绝缘层的密度大于所述第二绝缘层的密度。所述第二绝缘层可以为氮化矽或者氧化矽。
所述第二绝缘层中远离所述第一绝缘层的一表面与所述色阻层连接，所述与色阻层连接的表面可以是所述第二绝缘层的上方或者侧方。所述色阻层包括同层设置的多个色阻块，色阻块包括红色色阻、绿色色阻和蓝色色阻。所述色阻层中的色阻块可呈阵列排布，例如，每一行的色阻块按照红色色阻块、绿色色阻块和蓝色色阻块的顺序交替排列。
具体地，所述第一绝缘层的密度大于所述第二绝缘层的密度。所述第一绝缘层的形成速度小于所述第二绝缘层的形成速度。所述第一绝缘层的材料可以为氧化矽。
具体地，所述第一绝缘层的厚度与所述第二绝缘层的厚度的比值为1:10。例如，所述第一绝缘层可以为150埃米；对应地，所述第二绝缘层可以为1500埃米。或者所述第一绝缘层可以为200埃米；对应地，所述第二绝缘层可以为2000埃米。又或者第一绝缘层可以为250埃米；对应地，所述第二绝缘层可以为2500埃米。
以上各层也可以采用其他方式形成，如化学蒸镀方式或物理沉积方式等，此处不再赘述。
实施本申请实施例，在第二绝缘层与导电层之间设置密度大于第二绝缘层的第一绝缘层，可有效防止导电层中的金属离子扩散至与第二绝缘层连接的色阻层，有效避免产生漏电现象。
进一步地，所述方法还包括：在所述基板与所述导电层之间形成附着层，所述附着层为钼合金。所述钼合金包括但不限于是MoNb、MoW、MoTi和MoZr中的任意一种或两种以上的混合物。具体实施中，可先在所述基板上形成所述附着层，再在所述附着层上形成所述导电层。例如，先提供一基板，并通过去离子水对基板进行清洗。接着将钼合金作为溅射源通过溅射工艺，在所述基板上形成所述附着层；然后在所述附着层上以溅镀的方式形成铜薄膜，并通过曝光、显影及刻蚀等工艺，将铜薄膜图案化成导电层。
实施本申请实施例，可通过附着层增强所述导电层与所述基板之间的粘附性，有利于增强整体结构的稳定性。同时，所述附着层还可以防止导电层中的金属离子扩散到所述基板中，提高了产品的可靠性。
请参照图2，其为本申请实施例中一种导电层绝缘结构100的结构示意图。该导电层绝缘结构100应用于显示面板上，所述显示面板包括一基板110、多个开关元件、多条数据线和多条扫描线，所述开关元件至少包括源极，所述基板上设有色阻层150，所述数据线和所述开关元件的所述源极形成于所述基板110上方，共同作为导电层120。其中，所述导电层绝缘结构100包括第一绝缘层130以及第二绝缘层140。
具体实施中，所述显示面板包括阵列基板，所述阵列基板包括所述基板110、多个开关元件、多条数据线和多条扫描线，所述基板110可以由玻璃基板或者塑胶基板等基板形成。所述阵列基板可应用于各类显示装置的显示面板中。例如，所述显示面板可以为薄膜晶体管液晶显示器(thin film transistor-liquid crystal display,TFT-LCD)中的液晶显示面板。具体地，所述阵列基板可以为薄膜晶体管阵列基板。所述开关元件可以是薄膜晶体管。所述开关元件可包括源极、栅极、漏极、有源层等。
具体实施例中，所述导电层120可以为铜金属导电层或者铜合金导电层。假设所述导电层120为铜金属导电层120，则所述导电层120的形成可通过如下方式实现：采用纯铜靶材，以溅镀法沉积金属铜薄膜于所述基板110上方。并通过曝光、显影及刻蚀等工艺，将铜薄膜图案化成导电层120。
若所述阵列基板为薄膜晶体管阵列基板，所述数据线与所述开关元件的所述源极电性连接，形成于所述基板110上方，共同作为导电层120，具体请参照图3，所述导电层120与基板110之间还可形成有用于与栅极连接的扫描线170。该导电层120与该扫描线170之间可形成有栅极绝缘层180，该栅极绝缘层180完全覆盖于所述扫描线170，该栅极绝 缘层180用于将所述导电层120与所述扫描线170绝缘分离。
所述第一绝缘层130覆盖于所述导电层120上方。
具体实施例中，所述第一绝缘层130的形成方法包括但不限于：直流式真空磁控溅镀法、射频式真空磁控溅镀法及反应性溅镀法。
其中，所述第一绝缘层130可以为氮化矽或者氧化矽。所述第一绝缘层130的厚度为100埃米至300埃米，例如该第一绝缘层的厚度可以为100埃米、200埃米或者300埃米等等。
所述第二绝缘层140覆盖于所述第一绝缘层130上方，所述第二绝缘层140中远离所述第一绝缘层130的一表面与所述色阻层150连接。
具体实施中，所述第二绝缘层140的形成方法包括但不限于：直流式真空磁控溅镀法、射频式真空磁控溅镀法及反应性溅镀法。其中，所述第一绝缘层130的形成速度小于所述第二绝缘层140的形成速度。所述第一绝缘层130的密度大于所述第二绝缘层140的密度。所述第二绝缘层140可以为氮化矽或者氧化矽。
所述第二绝缘层140中远离所述第一绝缘层130的一表面与所述色阻层150连接，所述与色阻层150连接的表面可以是所述第二绝缘层140的上方或者侧方。所述色阻层150包括同层设置的多个色阻块，色阻块包括红色色阻、绿色色阻和蓝色色阻。所述色阻层150中的色阻块可呈阵列排布，例如，每一行的色阻块按照红色色阻块、绿色色阻块和蓝色色阻块的顺序交替排列。
具体地，所述第一绝缘层130的密度大于所述第二绝缘层140的密度。所述第一绝缘层130的形成速度小于所述第二绝缘层140的形成速度。所述第一绝缘层130可以为氧化矽。
具体地，所述第一绝缘层130的厚度与所述第二绝缘层140的厚度的比值可以为1:10。例如，所述第一绝缘层130可以为150埃米；对应地，所述第二绝缘层140可以为1500埃米。或者所述第一绝缘层130可以为200埃米；对应地，所述第二绝缘层140可以为2000埃米。又或者第一绝缘层130可以为250埃米；对应地，所述第二绝缘层140可以为2500埃米。
以上各层也可以采用其他方式形成，如化学蒸镀方式或物理沉积方式等，此处不再赘述。
实施本申请实施例，在第二绝缘层140与导电层120之间设置密度大于第二绝缘层140的第一绝缘层130，可有效防止导电层120中的金属离子扩散至与第二绝缘层140连接的色阻层150，有效避免产生漏电现象。
进一步地，所述方法还包括：在所述基板110与所述导电层120之间形成附着层160，所述附着层160为钼合金。所述钼合金包括但不限于是MoNb、MoW、MoTi和MoZr中的任意一种或两种以上的混合物。具体实施中，可先在所述基板110上形成所述附着层160，再在所述附着层160上形成所述导电层120。例如，先提供一基板110，并通过去离子水对基板110进行清洗。接着将钼合金作为溅射源通过溅射工艺，在所述基板110上形成所述附着层160；然后在所述附着层160上以溅镀的方式形成铜薄膜，并通过曝光、显影及刻蚀等工艺，将铜薄膜图案化成导电层120。
实施本申请实施例，可通过附着层160增强所述导电层120与所述基板110之间的粘附性，有利于增强整体结构的稳定性。同时，所述附着层160还可以防止导电层120中的金属离子扩散到所述基板110中，提高了产品的可靠性。
请参照图4，其为本申请一实施例中一种显示装置的结构示意图。所述显示装置200包括壳体210以及显示面板220。所述显示面板220包括基板、多个像素单元、多个开关元件、导电层绝缘结构、多条数据线和多条扫描线，所述开关元件至少包括源极，所述数据线和所述源极形成于所述基板上方，共同作为导电层；所述基板上设有色阻层；所述多个像素单元和所述多个开关元件设置在所述多条数据线与所述多条扫描线正相交所包围的区域内。由所述数据线与所述扫描线正相交所包围形成的每个区域可设置一个像素单元和一个开关元件。所述导电层绝缘结构为前述实施例中的导电层绝缘结构100。该导电层绝缘结构100的具体描述请参见前述实施例，此处不再赘述。
在一实施例中，所述导电绝缘结构为多个，多个所述导电绝缘结构一一对应的覆盖多个所述数据线和多个所述开关元件的多个所述源极。
在另一实施例中，所述导电绝缘结构为一个，所述导电绝缘结构整体的覆盖多个所述数据线和多个所述开关元件的多个所述源极。其中，显示面板220包括但不仅限于液晶显示面板(Liquid Crystal Display，LCD)、有机发光二极管显示面板(Organic Light-Emitting Diode，OLED)、场发射显示面板(Field emission display，FED)、等离子显示面板PDP(Plasma Display Panel)、曲面型面板。所述液晶面板包括薄膜晶体管液晶显示面板(Thin Film Transistor-Liquid Crystal display，TFT-LCD)、TN面板(Twisted Nematic+Film)、VA类面板(Vertical Alignment)、IPS面板(In Plane Switching)、COA(Color Filter on Array)面板等。
以上所述实施例的各技术特征可以进行任意的组合，为使描述简洁，未对上述实施例中的各个技术特征所有可能的组合都进行描述，然而，只要这些技术特征的组合不存在矛盾，都应当认为是本说明书记载的范围。
以上所述实施例仅表达了本申请的几种实施方式，其描述较为具体和详细，但并不能 因此而理解为对本申请专利范围的限制。应当指出的是，对于本领域的普通技术人员来说，在不脱离本申请构思的前提下，还可以做出若干变形和改进，这些都属于本申请的保护范围。因此，本申请专利的保护范围应以所附权利要求为准。

Claims (20)

  1. 一种导电层绝缘方法，应用于显示面板上，其特征在于，所述显示面板至少包括一基板、多个开关元件、多条数据线和多条扫描线，所述基板上设有色阻层，所述开关元件至少包括源极，所述方法包括：
    形成导电层于所述基板上方，所述导电层包括所述数据线和所述开关元件的所述源极；
    形成第一绝缘层以覆盖于所述导电层上方；以及
    形成第二绝缘层以覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一表面与所述色阻层连接；
    其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。
  2. 如权利要求1所述的方法，其特征在于，所述第一绝缘层的厚度为100埃米至300埃米。
  3. 如权利要求1所述的方法，其特征在于，所述第一绝缘层的形成速度小于所述第二绝缘层的形成速度。
  4. 如权利要求1所述的方法，其特征在于，所述第一绝缘层的厚度与所述第二绝缘层的厚度的比值为1:10。
  5. 如权利要求1所述的方法，其特征在于，所述第一绝缘层和/或所述第二绝缘层的材料包括氮化矽和氧化矽中的至少一种。
  6. 如权利要求1所述的方法，其特征在于，所述有源层的材料包括金属氧化物半导体。
  7. 如权利要求1所述的方法，其特征在于，所述方法还包括：
    在所述基板与所述导电层之间形成附着层，所述附着层为钼合金。
  8. 一种导电层绝缘结构，应用于显示面板上，其特征在于，所述显示面板至少包括一基板、多个开关元件、多条数据线和多条扫描线，所述基板上设有色阻层，所述开关元件至少包括源极，所述数据线和所述开关元件的所述源极形成于所述基板上方，共同作为导电层，所述导电层绝缘结构包括：
    第一绝缘层，覆盖于所述导电层上方；以及
    第二绝缘层，覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一表面与所述色阻层连接；
    其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。
  9. 如权利要求8所述的导电层绝缘结构，其特征在于，所述第一绝缘层的厚度为100埃米至300埃米。
  10. 如权利要求8所述的导电层绝缘结构，其特征在于，所述第一绝缘层的厚度与所述第二绝缘层的厚度的比值为1:10。
  11. 如权利要求8所述的导电层绝缘结构，其特征在于，所述第一绝缘层或所述第二绝缘层的材料包括氮化矽和氧化矽中的至少一种。
  12. 如权利要求8所述的导电层绝缘结构，其特征在于，所述色阻层包括同层设置的多个色阻块，所述多个色阻块包括红色色阻、绿色色阻和蓝色色阻。
  13. 如权利要求8所述的导电层绝缘结构，其特征在于，所述基板与所述导电层之间还形成有所述扫描线，所述导电层与所述扫描线之间形成有栅极绝缘层，所述栅极绝缘层完全覆盖于所述扫描线。
  14. 如权利要求8所述的导电层绝缘结构，其特征在于，所述导电层绝缘结构还包括附着层，所述附着层设置于所述导电层与所述基板之间，所述附着层为钼合金。
  15. 一种显示装置，所述显示装置包括壳体以及显示面板，其特征在于，所述显示面板包括：
    基板；
    像素单元；
    开关元件；
    导电层绝缘结构；以及
    多条数据线和多条扫描线，
    所述基板上设有色阻层；所述开关元件至少包括源极，所述数据线与所述源极形成与所述基板上方，共同作为导电层；所述像素单元和所述开关元件设置在所述多条数据线与所述多条扫描线正相交所包围的区域内
    所述导电层绝缘结构包括：
    第一绝缘层，覆盖于所述导电层上方；
    第二绝缘层，覆盖于所述第一绝缘层上方，所述第二绝缘层中远离所述第一绝缘层的一表面与所述色阻层连接；
    其中，所述第一绝缘层的密度大于所述第二绝缘层的密度。
  16. 如权利要求15所述的显示装置，其特征在于，所述第一绝缘层的厚度为100埃米至300埃米。
  17. 如权利要求15所述的显示装置，其特征在于，所述第一绝缘层的厚度与所述第 二绝缘层的厚度的比值为1：10。
  18. 如权利要求15所述的显示装置，其特征在于，所述像素单元和所述开关元件均为多个。
  19. 如权利要求18所述的显示装置，其特征在于，所述导电绝缘结构为多个，多个所述导电绝缘结构一一对应的覆盖所述多个数据线和所述多个开关元件的所述多个源极。
  20. 如权利要求18所述的显示装置，其特征在于，所述导电绝缘结构为一个，所述导电绝缘结构整体的覆盖所述多个数据线和所述多个开关元件的所述多个源极。
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