WO2020022101A1 - 画像処理装置および画像処理方法 - Google Patents

画像処理装置および画像処理方法 Download PDF

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Publication number
WO2020022101A1
WO2020022101A1 PCT/JP2019/027642 JP2019027642W WO2020022101A1 WO 2020022101 A1 WO2020022101 A1 WO 2020022101A1 JP 2019027642 W JP2019027642 W JP 2019027642W WO 2020022101 A1 WO2020022101 A1 WO 2020022101A1
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video data
lines
image processing
data
processing unit
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PCT/JP2019/027642
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English (en)
French (fr)
Japanese (ja)
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平田　稔
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ソニーセミコンダクタソリューションズ株式会社
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Priority to CN201980048405.3A priority Critical patent/CN112470473A/zh
Priority to JP2020532297A priority patent/JP7350744B2/ja
Publication of WO2020022101A1 publication Critical patent/WO2020022101A1/ja

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    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/10—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding
    • H04N19/169—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding
    • H04N19/17—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object
    • H04N19/174—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using adaptive coding characterised by the coding unit, i.e. the structural portion or semantic portion of the video signal being the object or the subject of the adaptive coding the unit being an image region, e.g. an object the region being a slice, e.g. a line of blocks or a group of blocks
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/42—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation
    • H04N19/436—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals characterised by implementation details or hardware specially adapted for video compression or decompression, e.g. dedicated software implementation using parallelised computational arrangements
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N19/00—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals
    • H04N19/85—Methods or arrangements for coding, decoding, compressing or decompressing digital video signals using pre-processing or post-processing specially adapted for video compression

Definitions

  • the present disclosure relates to an image processing apparatus and an image processing method, and more particularly, to an image processing apparatus and an image processing method that can realize a codec system with reduced cost.
  • a codec system for an 8K4K image using a 4K2K (3840 ⁇ 2160 pixel) image or an 8K1K (7680 ⁇ 1080 pixel) image having the same processing amount as the codec processing at 60p or 120p, for example, in four parallels.
  • Patent Literature 1 discloses a display system in which a plurality of display control devices connected in cascade divide a video and perform display control.
  • a downstream display control device controls display of an image in its own display area based on control information included in an image from an upstream display control device.
  • the number of lines of video data input to each LSI is: It will be 1080 lines conforming to the standard.
  • the number of lines of codec processing performed by each LSI needs to be an integral multiple of 16 or 64, for example, 1088 lines or 1056 lines.
  • codec processing video data of the number of lines conforming to the standard the number of connection systems increases, so that the apparatus scale and power consumption increase and the cost increases.
  • the present disclosure has been made in view of such a situation, and is intended to realize a codec system with reduced cost.
  • An image processing device includes a plurality of image processing units that perform codec processing in parallel on video data having a standard number of lines obtained by dividing an image having a predetermined resolution, and one image processing unit includes: Output of the video data of a predetermined number of lines of the standard number of lines to another image processing unit, input from another image processing unit, and either of the output and the input
  • An image processing apparatus having a data generation unit for generating the video data of the number of lines capable of performing the codec processing.
  • An image processing method is directed to an image processing apparatus including a plurality of image processing units that codec processes video data of a standard number of lines obtained by dividing an image having a predetermined resolution in parallel.
  • a processing unit configured to output the video data of a predetermined number of lines of the standard number of lines to another image processing unit, an input from another image processing unit, and the output and the input.
  • An image processing method including a data generation unit that generates the video data of the number of lines that can be subjected to the codec processing by either of them.
  • video data of a predetermined number of lines of the standard number of lines is output to another image processing unit, further input from another image processing unit, and the output and the Either of the inputs generates video data for the number of lines that can be codec processed.
  • An image processing apparatus includes a plurality of image processing units that perform codec processing in parallel on video data having a standard number of lines obtained by dividing an image having a predetermined resolution, and one image processing unit includes: The video data of a predetermined number of lines out of the number of lines that can be subjected to the codec processing, output to another image processing unit, input from another image processing unit, and both the output and the input And an image processing apparatus having a data generation unit that generates the video data having the standard number of lines.
  • An image processing method is directed to an image processing apparatus including a plurality of image processing units that codec processes video data of a standard number of lines obtained by dividing an image having a predetermined resolution in parallel.
  • a processing unit the video data of a predetermined number of lines of the number of lines capable of the codec processing, output to the other image processing unit, further input from the other image processing unit, and the output and An image processing method for generating the video data of the standard number of lines by either of the inputs.
  • video data of a predetermined number of lines of the number of lines that can be subjected to codec processing output to another image processing unit, input from another image processing unit, and Either the output or the input generates video data of a standard number of lines.
  • An image processing apparatus includes a plurality of image processing units that perform codec processing in parallel on video data having a standard number of lines obtained by dividing an image having a predetermined resolution, and one image processing unit includes: Output of the video data of a predetermined number of lines of the standard number of lines to another image processing unit, input from another image processing unit, and either of the output and the input
  • a first data generation unit for generating the video data of the number of lines capable of performing the codec processing, and another image processing of the video data of a predetermined number of lines of the number of lines capable of performing the codec processing Output from the image processing unit, and the video data of the standard number of lines by either of the output and the input.
  • An image processing method is directed to an image processing apparatus including a plurality of image processing units that codec processes video data of a standard number of lines obtained by dividing an image of a predetermined resolution in parallel.
  • a processing unit configured to output the video data of a predetermined number of lines of the standard number of lines to another image processing unit, an input from another image processing unit, and the output and the input.
  • the video data of the number of lines capable of performing the codec processing is generated, and the video data of a predetermined number of lines of the number of lines capable of performing the codec processing is transmitted to another image processing unit.
  • the video data of the standard number of lines by an output, an input from another image processing unit, and either the output or the input.
  • video data of a predetermined number of lines of the standard number of lines is output to another image processing unit, further input from another image processing unit, and the output and the
  • video data of the number of lines that can be subjected to codec processing is generated, and the video data of a predetermined number of lines of the number of lines that can be processed by the codec is transmitted to another image processing unit.
  • the output, the input from the other image processing unit, and either the output or the input generate the video data of the standard number of lines.
  • FIG. 3 is a diagram for explaining connection between a video recorder and an image processing unit.
  • FIG. 4 is a diagram illustrating connection lines required for inputting video data.
  • FIG. 3 is a diagram illustrating input of video data.
  • FIG. 3 is a diagram illustrating input of video data.
  • FIG. 2 is a block diagram illustrating a configuration example of an image processing apparatus that processes an 8K4K image.
  • FIG. 2 is a block diagram illustrating a configuration example of an image processing apparatus that processes an 8K4K image.
  • 1 is a block diagram illustrating a configuration example of an encoding device to which the technology of the present disclosure has been applied. It is a flowchart explaining a video data generation process.
  • FIG. 4 is a diagram illustrating connection lines required for inputting video data.
  • FIG. 3 is a diagram illustrating input of video data.
  • FIG. 2 is a block diagram illustrating a configuration example of an image processing apparatus that processes an 8K4K image.
  • FIG. 1 is
  • FIG. 35 is a block diagram illustrating a configuration example of a decoding device to which the technology of the present disclosure has been applied. It is a flowchart explaining a video data generation process.
  • FIG. 3 is a diagram illustrating a flow of video data.
  • FIG. 3 is a diagram for describing details of a data flow in the encoding device. It is a figure which illustrates about the amount of data transmitted. It is a figure explaining the detail of the flow of data in a decoding device.
  • FIG. 35 is a block diagram illustrating another configuration example of the encoding device.
  • FIG. 35 is a block diagram illustrating another configuration example of the encoding device.
  • FIG. 39 is a block diagram illustrating another configuration example of the decoding device.
  • FIG. 4 is a diagram illustrating a data flow.
  • FIG. 35 is a block diagram illustrating another configuration example of the encoding device.
  • FIG. 3 is a block diagram illustrating a first configuration example of a codec device.
  • FIG. 4 is a block diagram illustrating a second configuration example of the codec device.
  • FIG. 3 is a diagram illustrating a flow of video data.
  • FIG. 3 is a diagram illustrating a flow of video data.
  • the number of pixels of the 8K4K image is 7680 ⁇ 4320 pixels for digital broadcasting, but may be 8192 ⁇ 4320 pixels for digital cinema.
  • the number of pixels of a 4K2K image is 3840 ⁇ 2160 pixels in recording media such as digital broadcasting and UHD BD (Ultra HD Blu-ray (registered trademark)), but may be 4096 ⁇ 2160 pixels for digital cinema. Good.
  • the parallel method 1 is a method in which chips capable of codec processing a 4K2K image at 60p or 120p are simply operated in a 4-parallel synchronous manner, and a bit stream generated from each chip is transmitted using a wired or wireless line. is there. On the receiving side, the four synchronized video data are restored and synchronously reproduced. This method can be realized relatively easily using existing equipment having a standard video data input / output IF.
  • the bit stream is divided into four systems instead of one system. Therefore, although this method can be used for demonstrations of limited applications and transmission, the parallel method 1 cannot be used because it does not conform to the 8K4K standard.
  • the parallel method 2 is a method in which chips for performing codec processing of an 8K1K (7680 ⁇ 1080 pixels) image having the same processing amount as a 4K2K image are used in four parallel.
  • parallel system 2 it is intended to generate one system of bit stream, and the video data input / output IF of each of the four chips inputs and outputs 1080 lines of video data, which is the standard number of lines.
  • the parallel system 3 is a system that satisfies the restriction on the number of lines of codec processing of each chip of four parallels and does not perform processing on the bottom eight lines.
  • each of the four parallel chips processes video data of 8K1K size obtained by dividing 8K4K video data into four from the top.
  • the video data of the top three areas processed by the chips # 01, # 02, and # 03 are 7680 ⁇ 1088 pixels, and The video data in the lowermost area processed by # 04 is 7680 ⁇ 1056 pixels.
  • the two parallel chips may process 8K2K video data obtained by dividing the 8K4K video data into two from the top.
  • the video data in the upper region processed by chip # 10 is 7680 ⁇ 2176 pixels
  • the video data in the lower region processed by chip # 11 is 7680. ⁇ 2144 pixels.
  • the parallel method 3 is a method in which 1088, 1054, 2176, and 2144 lines that do not conform to the standard are standardized as a new standard as an input / output IF standard between each chip and an external device, and a device that supports the new standard is used. .
  • each chip performs a decoding process for a specified number of lines, and outputs the data from an input / output IF compatible with the new standard.
  • the parallel method 3 in which it is necessary to add the number of lines that is not in the standard of the existing input / output IF is technically applicable and has no problem in the processing contents.
  • the parallel method 3 cannot be adopted.
  • the parallel method 4 is a method for processing video data of a number of lines that does not conform to the standard, like the parallel method 3.
  • 8K1K 7680 ⁇ 1088, 7680 ⁇ 1054 pixels
  • 8K2K 7680 ⁇ 2176, 7680 ⁇ 2144 pixels
  • a 4K2K (3840 ⁇ 2160 pixel) video recorder inputs video data using four full HD (1920 ⁇ 1080 pixel) video IFs. Each of the video data obtained by dividing the image into four parts in the vertical and horizontal directions becomes video data for four systems.
  • a 4K2K video recorder is used as an 8K1K (7680 ⁇ 1080 pixel) compatible device in which four full HD areas are arranged horizontally.
  • FIG. 1 is a diagram illustrating the connection between the above-described video recorder and an image processing unit (chip) that processes video data from the video recorder.
  • the block on the left side in the figure shows four video recorders, and the block on the right side in the figure shows four image processing units # 00, # 01, # 02, # 03.
  • each of the image processing units # 00, # 01, and # 02 has the 8G of the 3G-SDI cable or the HDMI 1.4a cable. Two connection lines are required. Although not shown, the image processing unit # 03 requires four connection lines. In the following, it is assumed that a 3G-SDI cable is used as a connection line.
  • 8K1K (7680 ⁇ Video data for 1080 pixels) is input as video data for four systems of full HD (1920 ⁇ 1080 pixels) using four 3G-SDI cables.
  • video data for the lower eight lines is not input, video data for eight lines is input as video data for four full HDs using four more 3G-SDI cables.
  • 3G-SDI cables As shown in FIG. 3, when inputting video data of 1080 lines of the standard, four 3G-SDI cables may be used. Therefore, to transmit 8K4K video data, 16 3G-SDI cables are used.
  • FIG. 5 is a block diagram illustrating a configuration example of an image processing apparatus that processes the above-described 8K4K image.
  • the block groups of four systems shown in FIG. 5 correspond to the image processing units # 00, # 01, # 02, and # 03 (FIG. 1) from the top.
  • a broken line arrow input to the video IO unit is a connection line with an external device conforming to the standard, and is, for example, a 3G-SDI cable.
  • the video IO unit performs serial / parallel conversion of the input 2160 lines of video data and outputs the converted data to the subsequent data processing unit.
  • the data processing unit generates 1088 lines of video data by reducing the number of lines of video data of 2160 lines, and outputs the video data to the codec processing unit at the subsequent stage.
  • the video IO section performs serial / parallel conversion on the input video data of 1080 lines and outputs the video data to the subsequent data processing section.
  • the data processing unit generates 1056 lines of video data by reducing the number of lines of video data for 1080 lines, and outputs the video data to the codec processing unit at the subsequent stage.
  • each image processing unit performs codec processing (encoding processing) on the video data from the data processing unit, and outputs the obtained video bit stream data to the stream processing unit.
  • the stream processing unit converts four sets of video bit stream data into one set of video bit stream data and outputs the data.
  • FIG. 6 is a block diagram illustrating a configuration example of an image processing apparatus that processes a 120p 8K4K image.
  • FIG. 6 requires twice the number of connection lines as compared with the configuration of FIG. 5, and the device scale is also doubled. Specifically, 56 3G-SDI cables will be used.
  • the parallel method 4 can be adopted at the stage of the principle trial production and the technical study, but cannot be adopted at the stage of commercializing the device.
  • a codec processing unit may perform a codec process in a raster system.
  • the four video recorders input video data by performing synchronous operation with each other. Since the main use of the images obtained by the video recorder is for screen display, the ability to completely maintain synchronization between the video recorders (devices) is limited. When the synchronization between the devices is temporarily disturbed, frame synchronization may be lost when a plurality of image processing units perform parallel operations.
  • FIG. 7 is a block diagram illustrating a configuration example of an encoding device to which the technology of the present disclosure has been applied.
  • the encoder 10 encodes an 8K4K image input from an external device such as a video recorder (not shown) and outputs video bit stream data.
  • the encoding device 10 includes image processing units 11-1 to 11-4.
  • Each of the image processing units 11-1 to 11-4 is composed of, for example, an independent device or board.
  • the image processing units 11-1 to 11-4 input and process video data of 8K1K size obtained by dividing 8K4K video data into four from the top, that is, video data of 1080 standard lines.
  • To each of the image processing units 11-1 to 11-4 four 3G-SDI cables are connected as connection lines, and video data of 8K1K size is input. That is, each of the image processing units 11-1 to 11-4 has an inter-device input IF corresponding to the standard number of lines.
  • the image processing unit 11-1 includes a data generation unit 20-1, a codec processing unit 30-1, and a stream processing unit 40.
  • the image processing unit 11-2 includes a data generation unit 20-2 and a codec processing unit. It has a section 30-2.
  • the image processing unit 11-3 has a data generation unit 20-3 and a codec processing unit 30-3, and the image processing unit 11-4 has a data generation unit 20-4 and a codec processing unit 30-4. are doing.
  • the data generation units 20-1 to 20-4 have video IO units 21-1 to 21-4 and data acquisition units 22-1 to 22-4, respectively.
  • Each of the data generation units 20-1 to 20-4 may be configured by one chip such as an FPGA (Field-Programmable Gate Array).
  • the image processing units 11-1 to 11-4 when the image processing units 11-1 to 11-4 are not distinguished from each other, they are simply referred to as the image processing unit 11.
  • the data generation units 20-1 to 20-4 when the data generation units 20-1 to 20-4 are not distinguished from each other, they are simply referred to as the data generation units 20, and when the codec processing units 30-1 to 30-4 are not distinguished from each other, they are simply called the codec processing units. It is called 30.
  • the data generation unit 20 outputs a predetermined number of lines of video data of the input 8K1K (1080 lines) video data to another image processing unit 11, further inputs from another image processing unit 11, and ,
  • the video data of the number of lines that can be subjected to the codec processing is generated by either the output or the input.
  • the data generation unit 20-1 receives the input 8K1K (1080 lines) video data and the eight lines of video data input from the image processing unit 11-2 (data generation unit 20-2). , Video data of 7680 ⁇ 1088 pixels (1088 lines) is generated. This video data becomes original format data inside the encoding device 10.
  • the video IO unit 21-1 performs serial / parallel conversion of the input 1080-line video data and outputs the data to the data acquisition unit 22-1.
  • the data acquisition unit 22-1 combines the 1080-line video data from the video IO unit 21-1 with the 8-line video data from the data generation unit 20-2 (video IO unit 21-2). , 1088 lines of video data.
  • a transmission line 51 for transmitting a predetermined number of lines of video data is provided between the data generation unit 20-1 (data acquisition unit 22-1) and the data generation unit 20-2 (video IO unit 21-2). ing.
  • the transmission path 51 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 20-2 includes 1072 lines of video data obtained by removing the 8 lines of video data output to the image processing unit 11-1 from the input 8K1K (1080 lines) video data, and the image processing unit 11-3.
  • Video data of 7680 ⁇ 1088 pixels (1088 lines) is generated based on the 16 lines of video data input from the (data generation unit 20-3). This video data becomes original format data inside the encoding device 10.
  • the video IO unit 21-2 performs serial / parallel conversion of the input 1080-line video data once, separates the video data of the upper eight lines of the image, and then performs parallel / parallel conversion again. After serial conversion, the image data is output to the image processing unit 11-1 (data acquisition unit 22-1). Also, the video IO unit 21-2 separates the video data of the remaining 1072 lines of the lower part of the image from the 1080 lines, and outputs the video data to the data acquisition unit 22-2. The data acquisition unit 22-2 combines the 1072 lines of video data from the video IO unit 21-2 with the 16 lines of video data received from the data generation unit 20-3 (video IO unit 21-3). , 1088 lines of video data.
  • a transmission line 52 for transmitting a predetermined number of lines of video data is provided between the data generation unit 20-2 (data acquisition unit 22-2) and the data generation unit 20-3 (video IO unit 21-3). ing.
  • the transmission path 52 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 20-3 includes 1064 lines of video data obtained by removing the 16 lines of video data output to the image processing unit 11-2 from the input 8K1K (1080 lines) video data, and the image processing unit 11-4.
  • Video data of 7680 ⁇ 1088 pixels (1088 lines) is generated based on the 24 lines of video data input from the (data generation unit 20-4). This video data becomes original format data inside the encoding device 10.
  • the video IO unit 21-3 performs serial / parallel conversion of the input 1080-line video data once, separates the video data of the upper 16 lines of the image, and then performs the parallel / video conversion again. After serial conversion, the data is output to the image processing unit 11-2 (data acquisition unit 22-2). Also, the video IO unit 21-3 separates the video data of the lower 1064 lines of the remaining 1080 lines of the image, and outputs the separated data to the data acquisition unit 22-3.
  • the data acquisition unit 22-3 combines the 1064 lines of video data from the video IO unit 21-3 with the 24 lines of video data received from the data generation unit 20-4 (video IO unit 21-4). , 1088 lines of video data.
  • a transmission line 53 for transmitting a predetermined number of lines of video data is provided between the data generation unit 20-3 (data acquisition unit 22-3) and the data generation unit 20-4 (video IO unit 21-4). ing.
  • the transmission path 53 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 20-4 generates video data of 7680 ⁇ 1056 pixels (1056 lines) by removing the 24 lines of video data output to the image processing unit 11-3 from the input 8K1K (1080 lines) video data. I do. This video data becomes original format data inside the encoding device 10.
  • the video IO unit 21-4 performs serial / parallel conversion of the input 1080-line video data once, separates the video data of the upper 24 lines of the image, and then performs the parallel / After serial conversion, the image data is output to the image processing unit 11-3 (data acquisition unit 22-3). Further, the video IO unit 21-4 separates the video data of the lower 1056 lines of the remaining 1080 lines of the image, and outputs the video data to the data acquisition unit 22-4. The data acquisition unit 22-4 acquires 1056 lines of video data from the data generation unit 20-4.
  • Each codec processing section 30 performs codec processing (encoding processing) on the video data of the number of lines (1088 lines or 1056 lines) that can be subjected to codec processing generated by the data generation section 20, and converts the obtained video bit stream data. , To the stream processing unit 40 of the image processing unit 11-1. Each codec processing unit 30 is configured by one LSI.
  • the stream processing unit 40 of the image processing unit 11-1 converts the four video bit stream data of each image processing unit 11 into one video bit stream data and outputs it.
  • the stream processing unit 40 is configured by one LSI.
  • the codec processing unit 30-1 and the stream processing unit 40 may be configured by one LSI.
  • the transmission lines 51, 52, and 53 are configured by a single connection line such as a 3G-SDI cable.
  • a connection capable of transmitting a video data amount equal to or less than full HD such as an HDMI cable. It may be configured by a transmission path using an IF or a unique IF.
  • FIG. 8 is a flowchart illustrating a video data generation process in the encoding device 10.
  • the processing in FIG. 8 can be executed by hardware or can be executed by software.
  • a program constituting the software may be installed in an FPGA constituting the data generation unit 20.
  • step S11 the data generation unit 20 of each image processing unit 11 receives 8K1K (1080 lines) video data input from an external device.
  • each data generating unit 20 receives video data of a predetermined number of lines of the 8K1K video data from another image processing unit 11, sends it to another image processing unit 11, or Do both.
  • each data generation unit 20 performs encoding based on the video data obtained by receiving from the other image processing unit 11, sending to the other image processing unit 11, or both. Generates 1088 or 1056 lines of video data that can be processed.
  • the number of lines of codec processing can be reduced without inputting video data of a number of lines that do not conform to the standard. Can be satisfied.
  • the number of connection lines of the entire apparatus can be reduced from 28 to 19 in the configuration of FIG. 5, the apparatus scale, the component cost, the power consumption can be suppressed, and the codec system with reduced cost. Can be realized.
  • the amount of video data transmitted between the image processing units is a maximum of 24 lines
  • one transmission path capable of transmitting video data equivalent to full HD is provided between the image processing units. I just need. In this case, only 96 lines, which is four times at most 24 lines, are consumed for transmission.
  • FIG. 9 is a block diagram illustrating a configuration example of a decoding device to which the technology of the present disclosure has been applied.
  • the decoding device 60 performs a decoding process by dividing the video bit stream data output from the above-described encoding device 10 and the like into video bit stream data for each image processing unit and supplying the video bit stream data to each image processing unit. Further, the decoding device 60 reconstructs the video data restored in each image processing unit and outputs an 8K4K image.
  • the decoding device 60 includes image processing units 61-1 to 61-4.
  • Each of the image processing units 61-1 to 61-4 is configured by, for example, an independent device or board.
  • the image processing units 61-1 to 61-4 output 8K1K-size video data obtained by dividing 8K4K video data into four from the top, that is, standard-line 1080-line video data.
  • 8K1K-size video data obtained by dividing 8K4K video data into four from the top, that is, standard-line 1080-line video data.
  • To each of the image processing units 61-1 to 61-4 four 3G-SDI cables or the like are connected as connection lines, and video data of 8K1K size is output. That is, the image processing units 61-1 to 61-4 include the inter-device output IF corresponding to the standard number of lines.
  • the image processing unit 61-1 includes a stream processing unit 70 that processes video bit stream data, a codec processing unit 80-1, and a data generation unit 90-1. It has a unit 80-2 and a data generation unit 90-2.
  • the image processing section 61-3 has a codec processing section 80-3 and a data generation section 90-3, and the image processing section 61-4 has a codec processing section 80-4 and a data generation section 90-4. are doing.
  • the data generation units 90-1 to 90-4 have data acquisition units 91-1 to 91-4 and video IO units 92-1 to 92-4, respectively.
  • Each of the data generation units 90-1 to 90-4 may be configured by one chip such as an FPGA, for example.
  • the image processing units 61-1 to 61-4 when the image processing units 61-1 to 61-4 are not distinguished from each other, they are simply referred to as the image processing units 61.
  • the codec processing units 80-1 to 80-4 are not distinguished from each other, they are simply referred to as a codec processing unit 80.
  • the data generation units 90-1 to 90-4 are not distinguished from each other, they are simply referred to as data generation units. 90.
  • the stream processing unit 70 of the image processing unit 61-1 divides one system of video bit stream data into four systems of video bit stream data of each image processing unit 61 and outputs the divided data.
  • the stream processing unit 70 may be configured by one LSI.
  • Each codec processing section 80 performs codec processing (decoding processing) on the video bit stream data divided by the stream processing section 70, and converts the video data of the number of lines (1088 lines or 1056 lines) that can be subjected to codec processing to the data generation section 90. Output to This video data becomes original format data inside the decoding device 60.
  • Each codec processing unit 80 is configured by one LSI. In the image processing unit 61-1, the stream processing unit 70 and the codec processing unit 80-1 may be configured by one LSI.
  • the data generation unit 90 outputs the video data of the number of lines that can be subjected to codec processing from the codec processing unit 80 to the other image processing unit 61, further inputs from the other image processing unit 61, and outputs the video data. Either of the inputs generates video data of the standard number of lines (1080 lines).
  • the data generation unit 90-1 converts the 888 lines of video data to be output to the image processing unit 61-2 (video IO unit 92-2) from the codec processed (decoded) 1088 lines of video data.
  • 8K1K video data is generated based on the 1080-line video data excluding.
  • the data acquisition unit 91-1 outputs the 1080-line video data of the 1088-line video data from the codec processing unit 80-1 to the video IO unit 92-1.
  • the remaining eight lines of video data at the top of the image are converted from parallel / serial, and output to the data generator 90-2 (video IO unit 92-2).
  • the video IO unit 92-1 performs parallel / serial conversion of the video data of 1080 lines from the data acquisition unit 91-1 and outputs 8K1K video data.
  • a transmission line 101 for transmitting a predetermined number of lines of video data is provided between the data generation unit 90-1 (data acquisition unit 91-1) and the data generation unit 90-2 (video IO unit 92-2). ing.
  • the transmission path 101 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 90-2 converts the eight lines of video data input from the image processing unit 61-1 (data generation unit 90-1) and the 1088 lines of video data subjected to codec processing (decoding processing) into an image processing unit 8K1K video data is generated based on the 1072 lines of video data excluding the 16 lines of video data output to 61-3 (video IO unit 92-3).
  • the data acquisition unit 91-2 receives 1088 lines of video data from the codec processing unit 80-2.
  • the data acquisition unit 91-2 outputs the 1072 lines of video data at the lower part of the image to the video IO unit 92-2, and performs parallel / serial conversion of the remaining 16 lines of video data at the upper part of the image.
  • the data is output to the data generation unit 90-3 (video IO unit 92-3).
  • the video IO unit 92-2 includes 1072 lines of video data at the bottom of the image from the data acquisition unit 91-2 and 8 lines of the top of the image from the image processing unit 61-1 (data generation unit 90-1). By synthesizing the video data, the video data of the standard number of lines (1080 lines) is restored, and further parallel / serial conversion is performed to output 8K1K video data.
  • a transmission line 102 for transmitting a predetermined number of lines of video data is provided between the data generation unit 90-2 (data acquisition unit 91-2) and the data generation unit 90-3 (video IO unit 92-3). ing.
  • the transmission path 102 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 90-3 converts the 16-line video data input from the image processing unit 61-2 (data generation unit 90-1) and the 1088-line video data subjected to codec processing (decoding processing) into an image processing unit 8K1K video data is generated based on 1064 lines of video data excluding the 24 lines of video data output to 61-4 (video IO unit 92-4).
  • the data acquisition unit 91-3 receives 1088 lines of video data from the codec processing unit 80-3.
  • the data acquisition unit 91-3 outputs 1064 lines of video data at the lower part of the image to the video IO unit 92-3, and performs parallel / serial conversion on the remaining 24 lines of video data at the upper part of the image.
  • the data is output to the data generation unit 90-4 (video IO unit 92-4).
  • the video IO unit 92-3 includes 1064 lines of video data at the bottom of the image from the data acquisition unit 91-3 and 16 lines of the top of the image from the image processing unit 61-2 (data generation unit 90-2). By synthesizing the video data, the video data of the standard number of lines (1080 lines) is restored, and further parallel / serial conversion is performed to output 8K1K video data.
  • a transmission line 103 for transmitting a predetermined number of lines of video data is provided between the data generation unit 90-3 (data acquisition unit 91-3) and the data generation unit 90-4 (video IO unit 92-4). ing.
  • the transmission path 104 is composed of a single connection line such as one 3G-SDI cable.
  • the data generation unit 90-4 is configured based on the 24 lines of video data input from the image processing unit 61-3 (data generation unit 90-3) and the 1056 lines of video data subjected to codec processing (decoding processing). Generate 8K1K video data.
  • the data acquisition unit 91-4 receives 1056 lines of video data from the codec processing unit 80-4 and outputs the video data to the video IO unit 92-4 as video data to be the lower part of the image.
  • the video IO unit 92-4 includes 1056 lines of video data at the lower part of the image from the data acquisition unit 91-4 and 24 lines at the upper part of the image from the image processing unit 61-3 (data generation unit 90-3). By synthesizing the video data, the video data of the standard number of lines (1080 lines) is restored, and further parallel / serial conversion is performed to output 8K1K size video data.
  • the transmission paths 101, 102, and 103 are configured by 3G-SDI cables, but may be configured by transmission paths capable of transmitting full HD video data such as HDMI cables.
  • FIG. 10 is a flowchart illustrating the video data generation processing in the decoding device 60.
  • the processing in FIG. 10 can be executed by hardware or can be executed by software.
  • a program constituting the software may be installed in an FPGA constituting the data generation unit 90.
  • step S21 the data generation unit 90 of each image processing unit 61 receives the 1088-line or 1056-line video data decoded by the codec processing unit 80.
  • each data generation unit 90 receives video data of a predetermined number of lines of the decoded video data from another image processing unit 61, or sends the video data to another image processing unit 61, or Do both.
  • each data generating unit 90 receives a signal from another image processing unit 61, sends the data to another image processing unit 61, or performs standard processing based on video data obtained by performing both of them. 8K1K video data of the number of lines conforming to the standard is generated.
  • video data of a predetermined number of lines is transmitted between the image processing units, so that the video data of the number of lines conforming to the standard is satisfied while satisfying the restriction of the number of lines of the codec processing. Can be output.
  • the number of connection lines in the entire apparatus can be reduced, the apparatus scale, component cost, and power consumption can be suppressed, and a codec system with reduced cost can be realized.
  • FIG. 11 is a diagram for explaining the flow of video data between the encoding device 10 and the decoding device 60 described above.
  • the left side of the figure shows 8K1K (7680 ⁇ 1080 pixels) video data of the standard number of lines input from four 4K2K video recorders (Rec # 0 to # 3).
  • the 1080-line video data from Rec # 0 is combined with the 8-line video data from Rec # 1 by the encoding device 10 (image processing unit 11-1), and codec processing is performed based on the 1088-line video data. And output as video bit stream data.
  • the 1072 lines of video data from Rec # 1 excluding the upper eight lines of video data are combined with the 16 lines of video data from Rec # 2 by the encoding device 10 (image processing unit 11-2). , And codec processing is performed based on 1088 lines of video data, and output as video bit stream data.
  • the 1064 lines of video data from Rec # 2 excluding the upper 16 lines of video data are combined with the 24 lines of video data from Rec # 3 by the encoding device 10 (image processing unit 11-3). , And codec processing is performed based on 1088 lines of video data, and output as video bit stream data.
  • the video data of 1056 lines from Rec # 3 excluding the video data of the upper 24 lines is subjected to codec processing by the encoding device 10 (image processing unit 11-4) and output as video bit stream data. .
  • the video data of the number of lines that can be subjected to the codec processing is generated from the video data of the standard number of lines.
  • the video bit stream data of 1088 lines from the image processing unit 11-1 is divided into 1080 lines of video data and lower 8 lines of video data by the decoding device 60 (image processing unit 61-1).
  • 1080 lines of video data are output as restored video data of the standard number of lines (1080 lines) after codec processing.
  • the video bit stream data of 1088 lines from the image processing unit 11-2 is divided into 1072 lines of video data and 16 lower lines of video data by the decoding device 60 (image processing unit 61-2). Of these, 1072 lines of video data are combined with 8 lines of video data from the image processing unit 61-1 and, after codec processing, output as restored video data of the standard number of lines (1080 lines).
  • the video bit stream data of 1088 lines from the image processing unit 11-3 is divided into 1064 lines of video data and lower 24 lines of video data by the decoding device 60 (image processing unit 61-3). Among them, 1064 lines of video data are combined with 16 lines of video data from the image processing unit 61-2, and after codec processing, are output as restored video data of the standard number of lines (1080 lines).
  • the 1056-line video bit stream data from the image processing unit 11-4 is combined with the 24-line video data from the image processing unit 61-3 by the decoding device 60 (image processing unit 61-4), and subjected to codec processing. Thereafter, the video data is output as restored video data of the standard number of lines (1080 lines).
  • the video data having the standard number of lines is regenerated from the video bit stream data having the number of lines that can be subjected to the codec processing.
  • FIG. 12 is a diagram illustrating details of the data flow in the encoding device 10.
  • Sys-0 to Sys-3 indicate the above-described image processing units 11-1 to 11-4, respectively.
  • “Input @ 8K / 1080” in each of Sys-0 to Sys-3 indicates video data written to the memory by each image processing unit 11.
  • “Mem @ read” indicates video data read from the memory by each image processing unit 11, and “Codec @ IN # x” (x is 0 to 3) indicates a codec processing unit where codec processing (encoding processing) is performed. 3 shows video data input to the block 30.
  • the reading of the video data of each frame may be performed first, for example, in Sys-3.
  • Sys-2 when data is transmitted from Sys-3, 16 lines of video data are divided from the read 8K / 1080 lines of video data.
  • the divided 16 lines of video data are transmitted to Sys-1 together with the data indicating the frame number 0, as indicated by an arrow c21.
  • the video data of 8K / 1064 lines obtained by removing 16 lines from the 8K / 1080 lines is synthesized with the video data of 24 lines from Sys-3, input to the encoding processing unit 30-3 at the subsequent stage, and subjected to the encoding processing. Is performed.
  • the read 8K / 1080-line video data is combined with the 8-line video data from Sys-1, and the subsequent encoding process is performed.
  • the data is input to the unit 30-1 and is encoded.
  • data to be transmitted is data indicating 24-line video data and frame numbers, and is read out from Sys-3 having the largest data amount. Is started.
  • FIG. 13 is a diagram illustrating the amount of data transmitted from Sys-3 to Sys-2.
  • a transmission path capable of transmitting video data equivalent to full HD is provided between Sys-3 and Sys-2.
  • the left side of FIG. 13 illustrates the number of horizontal pixels of data transmitted in an HD format such as 29.97p, 30p, 59.94p, or 60p
  • the right side of FIG. 13 illustrates the number of lines (the number of vertical scanning lines).
  • the number of horizontal pixels is 2,200 pixels, which is the number of effective pixels of 1920 plus 280 pixels of the blanking area.
  • the number of lines is 1080, the number of effective lines is the sum of the upper 40 lines and the lower 5 lines of the blanking area. 1125 lines.
  • each image processing unit 11 (Sys-0 to Sys-3), after writing 1080 lines of video data of each frame input by the SQD method, when reading the video data, An address at which raster codec processing is possible is generated. As a result, codec processing without a time difference can be performed without adding a configuration such as providing an SQD / raster conversion function.
  • the frame number of each frame is transmitted together with the video data of a predetermined number of lines between the data generation units 20 of the image processing units 11 (Sys-0 to Sys-3).
  • FIG. 14 is a diagram illustrating details of the data flow in the decoding device 60.
  • “Write #n” and “Read #n” at the top indicate timings of writing / reading the video data of the n-th frame to / from the memory inside the decoding device 60, respectively.
  • Sys-0 to Sys-3 indicate the above-described image processing units 61-1 to 61-4, respectively.
  • Codec OUT in each of Sys-0 to Sys-3 indicates video data that has been codec-processed (decoded).
  • Mem @ read indicates video data read from the memory by each image processing unit 61, and
  • Output-x (x is 0 to 3) indicates video data output from each image processing unit 61. ing.
  • the reading of the video data of each frame is performed sequentially, for example, from Sys-0.
  • Sys-1 when data is transmitted from Sys-0, 16 lines of video data are divided from the read 1088 lines of video data. The divided 16 lines of video data are transmitted to Sys-2 together with the data indicating the frame number 0 as indicated by an arrow d12. Also, 1072 lines of video data excluding 16 lines from 1088 lines are combined with 8 lines of video data from Sys-0 and output as video data of the standard number of lines (1080 lines).
  • Sys-2 when data is transmitted from Sys-1, 24 lines of video data are divided from the read 1088 lines of video data. The divided 24 lines of video data are transmitted to Sys-3 together with the data indicating the frame number 0 as indicated by an arrow d23. Also, 1064 lines of video data excluding 24 lines from 1088 lines are combined with 16 lines of video data from Sys-1 and output as video data (1080 lines) of the standard number of lines.
  • the decoding process of the 0th frame is performed.
  • the decoding process is similarly performed for the first and subsequent frames.
  • the data generation unit 90 of each of the image processing units 61 (Sys-0 to Sys-3) writes video data that has been subjected to codec processing in the raster system, and then reads out the video data by one frame.
  • An address capable of outputting video data of 1080 lines per minute by the SQD method is generated.
  • codec processing without a time difference can be performed without adding a configuration such as providing an SQD / raster conversion function.
  • the frame number of each frame is transmitted together with the video data of a predetermined number of lines between the data generation units 90 of the image processing units 61 (Sys-0 to Sys-3).
  • FIG. 15 is a block diagram illustrating a configuration example of an encoding device that processes a 120p 8K4K image.
  • the encoding device 10 includes image processing units 11′-1 to 11′-4.
  • blocks corresponding to the respective components of the encoding device 10 of FIG. 7 are denoted by the same reference numerals with "" added thereto, and description of the same functions will be omitted. .
  • the image processing units 11'-1 to 11'-4 process 8K1K-size video data obtained by dividing 8K4K video data into four from the top, that is, standard-standard 1080-line video data.
  • each of the image processing units 11′-1 to 11′-4 has eight 3G-SDI cables. Are connected as connection lines, and video data of 8K1K size is input in two parallel.
  • the data generation unit 20 ′ (video IO unit 21 ′ and data acquisition unit 22 ′) of each image processing unit 11 ′ includes two data generation units 20 (video IO unit 21 and data acquisition unit 22) of FIG. Make a working configuration.
  • the transmission lines 51 ', 52', and 53 'connecting the data generation units 20' included in each image processing unit 11 ' correspond to the transmission lines 51, 52, and 53 (for example, 3G-SDI cables) in FIG. It may be configured by connecting two in parallel.
  • Each of the transmission lines 51 ', 52', and 53 ' is composed of a single transmission line, similarly to the transmission lines 51, 52, and 53 in FIG. Is also good.
  • the amount of video data transmitted between the image processing units is at most 24 lines.
  • the configuration of FIG. 15 when transmitting 24 lines of video data in the HD format, 192 lines are consumed, which is twice the 96 lines described in the example of FIG. Further, transmission of data indicating a frame number consumes two lines.
  • the frame number of each frame is transmitted between each of the data generation units 20 ′ of each image processing unit 11 ′, so that each image processing unit 11 ′ performs a parallel operation. Loss of frame synchronization can be prevented.
  • Second Embodiment> a configuration including two parallel image processing units that perform codec processing on 8K2K video data obtained by dividing an 8K4K image in parallel will be described.
  • FIG. 16 is a block diagram illustrating a configuration example of an encoding device including two parallel input IFs.
  • the encoder 110 encodes an 8K4K image input from an external device such as a video recorder (not shown), and outputs video bit stream data.
  • the encoding device 110 includes image processing units 111-1 and 111-2.
  • Each of the image processing units 111-1 and 111-2 is configured by, for example, an independent device or board.
  • the image processing units 111-1 and 111-2 process 8K2K video data obtained by dividing the 8K4K video data into two from the top, that is, 2160 lines of video data that is twice the standard 1080 lines.
  • Eight 3G-SDI cables or the like are connected as connection lines to each of the image processing units 111-1 and 111-2, and video data of 8K2K size is input. That is, the image processing units 111-1 and 111-2 are provided with inter-device input IFs corresponding to the standard number of lines.
  • the image processing unit 111-1 includes a data generation unit 120-1, a codec processing unit 130-1, and a stream processing unit 140.
  • the image processing unit 111-2 includes a data generation unit 120-2 and a codec processing unit. It has a section 130-2.
  • the data generation unit 120-1 has a video IO unit 121-1 and data acquisition units 122-10 and 122-11.
  • the data generation unit 120-2 has a video IO unit 121-2 and a data acquisition unit. It has parts 122-20 and 122-21.
  • Each of the data generation units 120-1 and 120-2 may be configured by one chip such as an FPGA.
  • the image processing units 111-1 and 111-2 are not distinguished from each other, they are simply referred to as the image processing unit 111.
  • the data generation units 120-1 and 120-2 are not distinguished from each other, they are simply referred to as data generation units 120.
  • the codec processing units 130-1 and 130-2 are not distinguished from each other, they are simply called codec processing units. It is called 130.
  • the data generation unit 120 outputs a predetermined number of lines of video data of the input 8K2K (2160 lines) video data to another image processing unit 111 and receives an input from the other image processing unit 111. Either of them generates video data of the number of lines that can be processed by the codec.
  • the data generation unit 120-1 receives the input 8K2K (2160 lines) video data and the 16-line video data input from the image processing unit 111-2 (data generation unit 120-2). , Video data of 7680 ⁇ 2176 pixels (2176 lines) is generated. This video data becomes original format data inside the encoding device 110.
  • the video IO unit 121-1 performs serial / parallel conversion of the input 2160 lines of video data and outputs the data to the data acquisition units 122-10 and 122-11.
  • the data acquisition units 122-10 and 122-11 convert the 2160 lines of video data from the video IO unit 121-1 and the 16 lines of video data from the data generation unit 120-2 (video IO unit 121-2). By synthesizing, 2176 lines of video data are generated.
  • a transmission path 151 for transmitting a predetermined number of lines of video data is provided between the data generation unit 120-1 (data acquisition unit 122-1) and the data generation unit 120-2 (video IO unit 121-2). ing.
  • the transmission line 151 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 120-2 generates 7680 ⁇ 2144 pixels based on 2144 lines of video data obtained by removing 16 lines of video data output to the image processing unit 111-1 from the input 8K2K (2160 lines) video data. (2144 lines) of video data is generated. This video data becomes original format data inside the encoding device 110.
  • the video IO unit 121-2 once converts the input 2160 lines of video data into serial / parallel data, separates the upper 16 lines of the video data, and then converts the data into parallel / serial data again.
  • the data is converted and output to the image processing unit 111-1 (the data acquisition units 122-10 and 122-11). Further, the video IO unit 21-2 separates the video data of the remaining lower 2144 lines of the 1080 lines, performs serial / parallel conversion, and outputs the data to the data acquisition units 122-20 and 122-21.
  • the data acquisition units 122-20 and 122-21 acquire 2144 lines of video data from the video IO unit 121-1.
  • Each codec processing section 130 performs codec processing (encoding processing) on the video data of the number of lines (2176 lines or 2144 lines) for which codec processing can be performed, generated by the data generation section 120, and converts the obtained video bit stream data. , To the stream processing unit 140 of the image processing unit 111-1. Each codec processing unit 130 is configured by one LSI.
  • the stream processing unit 140 of the image processing unit 111-1 converts the two video bit stream data of each image processing unit 111 into one video bit stream data and outputs it.
  • the stream processing unit 140 is configured by one LSI.
  • the codec processing unit 130-1 and the stream processing unit 140 may be configured by one LSI.
  • the data acquisition units 122-10 and 122-11 and the data acquisition units 122-20 and 122-21 perform 60p / 30p conversion for converting 60p 8K2K video data to 30p 8K2K video data, respectively.
  • the processing is performed in two parallel.
  • the data acquisition units 122-10 and 122-11 and the data acquisition units 122-20 and 122-21 may respectively process 30p 8K2K video data as 60p 8K1K video data in two parallel.
  • the amount of video data transmitted between the image processing units is 16 lines at the maximum, so that a transmission path capable of transmitting video data equivalent to full HD corresponds to one system. , Between the image processing units. In this case, only 64 lines, four times 16 lines, are consumed for transmission.
  • FIG. 17 is a block diagram illustrating a configuration example of a decoding device including two parallel image processing units.
  • the decoding device 160 divides the video bit stream data output from the above-described encoding device 110 or the like, performs a decoding process on the video bit stream data, and outputs an 8K4K image.
  • the decoding device 160 includes image processing units 161-1 and 161-2. Each of the image processing units 161-1 and 161-2 is configured by, for example, an independent device or board.
  • the image processing units 161-1 and 161-2 respectively decode 8K2K-size video bitstream data obtained by dividing the 8K4K video bitstream data into two from the top. Further, the image processing units 161-1 and 161-2 restore the 8K2K size video data divided into two, and process 2160 lines of video data which is twice as large as the standard 1080 lines. Eight 3G-SDI cables and the like are connected as connection lines to each of the image processing units 161-1 and 161-2, and video data of 8K2K size is output. That is, the image processing units 161-1 and 161-2 have inter-device output IFs corresponding to the standard number of lines.
  • the image processing unit 161-1 includes a stream processing unit 170, a codec processing unit 180-1, and a data generation unit 190-1.
  • the image processing unit 161-2 includes a codec processing unit 180-2 and a data generation unit. It has a section 190-2.
  • the data generation section 190-1 has data acquisition sections 191-10 and 191-11 and a video IO section 192-1.
  • the data generation section 190-2 has data acquisition sections 191-20 and 191-21. And a video IO unit 192-2.
  • the image processing units 161-1 and 161-2 are not distinguished from each other, they are simply referred to as the image processing units 161.
  • the codec processing units 180-1 and 180-2 are not distinguished from each other, they are simply referred to as a codec processing unit 180.
  • the data generation units 190-1 and 190-2 are not distinguished from each other, they are simply referred to as data generation units. It is called 190.
  • the stream processing unit 170 of the image processing unit 161-1 divides one system of video bit stream data into two systems of video bit stream data of each image processing unit 161, and outputs the divided data.
  • the stream processing unit 170 is configured by one LSI.
  • Each codec processing unit 180 performs codec processing (decoding processing) of the video bit stream data divided by the stream processing unit 170, and restores video data of the number of lines (2176 lines or 2144 lines) that can be codec processed, Output to the data generation unit 190.
  • This video data becomes original format data inside the decoding device 160.
  • Each codec processing unit 180 is constituted by one LSI.
  • the stream processing unit 170 and the codec processing unit 180-1 may be configured by one LSI.
  • the data generation unit 190 outputs the video data of the number of lines that can be subjected to the codec processing from the codec processing unit 180 to the other image processing unit 161 and the input from the other image processing unit 161. Generate video data of the standard number of lines (2160 lines).
  • the data generation unit 190-1 converts the 1676-line video data output from the codec-processed (decoded) 2176-line video data to the image processing unit 161-2 (video IO unit 192-2). 8K2K video data is generated based on the 2160 lines of video data excluding.
  • the data acquisition sections 191-10 and 191-11 transfer the 2160 line video data of the 2176 line video data from the codec processing section 80-1 to the video IO section 192-1.
  • the video data of the remaining 16 lines at the top of the image are converted from parallel / serial, and output to the data generation unit 190-2 (video IO unit 192-2).
  • the video IO unit 192-1 outputs 8K2K video data by performing parallel / serial conversion of 2160 lines of video data from the data acquisition unit 91-1.
  • a transmission line for transmitting video data of a predetermined number of lines is provided between the data generation unit 190-1 (data acquisition units 191-10 and 191-11) and the data generation unit 190-2 (video IO unit 192-2).
  • 201 is provided.
  • the transmission path 201 is configured by a single connection line such as a single 3G-SDI cable.
  • the data generation unit 190-2 includes 16 lines of video data at the top of the image input from the image processing unit 161-1 (data generation unit 190-1), and 2144 at the bottom of the image after codec processing (decoding processing). 8K2K video data is generated based on the video data of the line.
  • the data acquisition units 191-20 and 191-21 output 2144 lines of video data from the codec processing unit 180-2 to the video IO unit 192-2.
  • the video IO unit 192-2 converts the 2144 lines of video data from the data acquisition unit 191-2 into parallel / serial data, and converts the 2144 lines of video data from the image processing unit 161-1 (data generation unit 190-1) into 16 lines of video data. By synthesizing, 8K2K video data is output.
  • the data acquisition units 191-10 and 191-11 and the data acquisition units 191-20 and 191-21 perform 30p / 60p conversion for converting 30p video data to 60p video data.
  • a predetermined number of lines of video data is transmitted between the image processing units, so that the video data of the number of lines conforming to the standard is output while satisfying the restriction of the number of lines of the codec processing. can do.
  • the number of connection lines of the entire device can be reduced, and the device scale, component cost, and power consumption can be suppressed.
  • FIG. 18 is a diagram for explaining the flow of video data between the encoding device 110 and the decoding device 160 described above.
  • the left side of the figure shows 8K1K (7680 ⁇ 1080 pixels) video data of the standard number of lines input from four 4K2K video recorders (Rec # 0 to # 3).
  • the 1080-line video data at the top of the image from Rec # 0 and the 1080-line video data at the bottom of the image from Rec # 1 are transmitted from Rec # 2 by the encoding device 110 (image processing unit 111-1). It is combined with 16 lines of video data at the bottom of the image.
  • the encoded 2176-line video data is encoded by the encoding device 110 (codec processing unit 130-1), so that 2176-line video bit stream data is generated and output.
  • the lower 1064 lines of video data from Rec # 2 excluding the upper 16 lines of video data and the 1080 lines of video data from Rec # 3 are combined by the encoding device 110 (image processing unit 111-2). You.
  • the encoded 2144-line video data is encoded by the encoding device 110 (codec processing unit 130-2), so that 2144-line video bit stream data is generated and output.
  • the video data of the standard number of lines As described above, from the video data of the standard number of lines, the video data of the number of lines that can be subjected to the codec processing is generated, and the codec processing unit generates the video bit stream data.
  • the video bit stream data of 2176 lines from the image processing unit 111-1 is decoded by the decoding device 160 (image processing unit 161-1), and the video data of 2176 lines is restored.
  • the 2176 lines of video data are divided into upper 2160 lines of video data and lower 16 lines of video data. Among them, 2160 lines of video data are output as video data of the standard number of lines (2160 lines or 1080 lines in two stages).
  • the video bit stream data for 2144 lines from the image processing unit 111-2 is decoded by the decoding device 160 (image processing unit 161-2), and 2144 lines of video data are restored.
  • the 2144 lines of video data are combined with the 16 lines of video data from the image processing unit 161-1 and output as video data of the standard number of lines (2160 lines or 1080 lines in two stages).
  • the video data having the standard number of lines is regenerated from the video bit stream data having the number of lines that can be subjected to the codec processing.
  • each of the four external devices inputs, instead of 8K1K video data, 4K2K video data obtained by dividing an 8K4K image vertically and horizontally.
  • the upper left 4K2K video data of the 8K4K image is input from the external device # 0 shown in the uppermost row
  • the upper right 4K2K video data of the 8K4K image is input from the external device # 1 shown in the second row. Is entered. That is, 60p 8K2K video data is input from the external devices # 0 and # 1.
  • video data of the upper 16 lines at the lower left of the 8K4K image is input from the external device # 2 shown in the third row, and the 8K4K image is input from the external device # 3 shown in the fourth row.
  • the video data of the upper 16 lines at the lower right is input.
  • FIG. 19 shows an example of 60p / 30p conversion by the data acquisition units 122-10 and 122-11 of the image processing unit 111-1.
  • data of each frame is divided into even frames and odd frames and processed in parallel. Specifically, the data of each frame is divided into 8K2K data (7680 pixels ⁇ 2176 lines) at the upper part of the image shown in FIG. 19 and 8K2K data (7680 pixels ⁇ 2144 lines) at the lower part of the image (not shown). Is done.
  • the data in the upper part of the image is composed of four data of 4K2K data of two upper parts of 3840 pixels ⁇ 2160 lines and data of two lower parts of 3840 pixels ⁇ 16 lines. It should be noted that the data at the lower part of the image is composed of two 3840 pixels ⁇ 2144 lines of 4K2K data excluding the above-mentioned 16 lines of data.
  • the 8K2K data (Frame-0) of the 0th frame is composed of the upper two 4K2K data L0-0 and L1-0 and the lower 16 lines of data L2-0 and L3-0.
  • the data L0-0 is supplied from the external device # 0, and is located at the upper left of the image.
  • the data L0-0 may be composed of four 2K full HD data of video data Ch0-0, Ch1-0, Ch2-0, Ch3-0.
  • the data L1-0 is supplied from the external device # 1 and is located at the upper right of the upper part of the image.
  • the data L1-0 may be composed of four 2K full HD data of video data Ch0-0, Ch1-0, Ch2-0, Ch3-0.
  • the data L2-0 and L3-0 of the lower 16 lines may be composed of two systems of data from the external devices # 2 and # 3.
  • the data L2-0 is the upper 16 lines of the video data Ch0-0 and Ch1-0 at the lower left of the 0K frame 8K2K data from the external device # 2, and is 2 systems of 2K1K data or 1 system of 4K1K data. There may be.
  • the data L3-0 is the upper 16 lines of the video data Ch0-0 and Ch1-0 at the lower right of the 8K2K data of the 0th frame from the external device # 3, and is composed of two systems of 2K1K data or one system of 4K1K data. It may be.
  • the data L2-0 and L3-0 from the external devices # 2 and # 3 also include data indicating the frame number 0.
  • the 0th frame is generated using even-numbered frames from the four external devices # 0, # 1, # 2, and # 3 as sources as long as they operate at 60p.
  • the 8K2K data (Frame-1) of the first frame is composed of the upper two 4K2K data L0-1 and L1-1 and the lower 16 lines of data L2-1 and L3-1.
  • the data L0-1 is supplied from the external device # 0, and is located at the upper left of the image.
  • the data L0-1 may be composed of four 2K full HD data of video data Ch0-1, Ch1-1, Ch2-1, and Ch3-1.
  • the data L1-1 is supplied from the external device # 1 and is at the upper right of the upper part of the image.
  • the data L1-1 may be composed of four 2K full HD data of video data Ch0-1, Ch1-1, Ch2-1, and Ch3-1.
  • the data L2-1 and L3-1 of the lower 16 lines may be composed of two systems of data from the external devices # 2 and # 3.
  • the data L2-1 is the upper 16 lines of the video data Ch0-1 and Ch1-1 at the lower left of the 8K2K data of the 0th frame from the external device # 2, and is 2 systems of 2K1K data or 1 system of 4K1K data. There may be.
  • the data L3-1 is the upper 16 lines of the lower right video data Ch0-1 and Ch1-1 from the external device # 3, and may be two systems of 2K1K data or one system of 4K1K data.
  • the data L2-1 and L3-1 from the external devices # 2 and # 3 also include data indicating the frame number 1.
  • the first frame is generated using odd-numbered frames from the four external devices # 0, # 1, # 2, and # 3 as long as they operate at 60p.
  • FIG. 19 shows an example of 60p / 30p conversion by the data acquisition units 122-10 and 122-11 of the image processing unit 111-1.
  • the 60p / 30p conversion of the video data from the external devices # 2 and # 3 by the data acquisition units 122-20 and 122-21 of the image processing unit 111-2 is also performed according to the flow of FIG.
  • the frame number of each frame is transmitted between the image processing unit 111-1 and the image processing unit 111-2, it is possible to prevent the occurrence of frame synchronization loss and to start the 60p / 30p conversion. Can be aligned.
  • the 60p / 30p conversion in the encoding device 110 has been described.
  • the 30p / 60p conversion is performed in a flow reverse to the example in FIG.
  • FIG. 20 is a block diagram illustrating a configuration example of an encoding device that processes a 120p 8K4K image.
  • the 'encoding device 110' includes image processing units 111'-1 and 111'-2.
  • blocks corresponding to the respective components of the encoding device 110 of FIG. 16 are denoted by the same reference numerals with “′” added, and descriptions of similar functions are omitted. .
  • the image processing units 111'-1 and 111'-2 process 8K2K video data obtained by dividing the 8K4K video data into two from the top, that is, video data twice as large as the standard 1080 lines. However, since video data is input twice as much per unit time as compared with the encoding device 110 of FIG. 16, each of the image processing units 111′-1 and 111′-2 has 16 3G-SDI cables. Are connected as connection lines, and video data of 8K2K size is input in two parallel.
  • each image processing unit 111' In the data generation unit 120 'of each image processing unit 111', two video IO units 121 'and two data acquisition units 122' are provided. Correspondingly, each image processing section 111 'is also provided with two codec processing sections 130'.
  • the video IO unit 121 ′, the data acquisition unit 122 ′, the codec processing unit 130 ′, and the stream processing unit 140 ′ of the encoding device 110 ′ of FIG. A configuration corresponding to each of the data acquisition unit 22 ', the codec processing unit 30', and the stream processing unit 40 'is adopted.
  • connection lines corresponding to the transmission lines 51 'and 53' in the encoding device 10 'of FIG. 15 are connection lines inside the image processing units 111'-1 and 111'-2, respectively. It is not necessary to use a standard input / output IF for internal connection. A 3G-SDI cable may be used as a connection line, or a unique input / output IF with lower power consumption may be used. Good. In this case, component cost and power consumption can be reduced as compared with the encoding device 10 'of FIG. 15 which processes a 120p 8K4K image in the same manner.
  • a transmission path 151 'that connects between the data generation units 120' included in each image processing unit 111 ' may be configured by connecting the transmission path 151 (for example, a 3G-SDI cable) of FIG. 16 in two parallel. Good.
  • the transmission path 151 ' may be configured with one transmission path, similarly to the transmission path 151 in FIG. 16, and data may be transmitted by time division multiplexing.
  • the amount of video data transmitted between the image processing units is a maximum of 16 lines.
  • 128 lines ie, two lines of 64 lines, four times the amount of 16 lines, are consumed. Even if two lines are consumed for transmitting the data indicating the frame number, the amount of data transmitted between the image processing units can be accommodated by 130 lines of data.
  • FIG. 21 is a block diagram illustrating a first configuration example of a codec device that performs both encoding processing and decoding processing of a 120p 8K4K image.
  • the codec device 300 includes image processing units 310 and 320. Each of the image processing units 310 and 320 is configured by, for example, an independent device or board.
  • 16 3G-SDI cables are connected as connection lines, and video data of 8K2K size is input in parallel.
  • 16 3G-SDI cables or the like are connected as connection lines to the output sides of the image processing sections 310 and 320, respectively, and video data of 8K2K size is output in two parallel.
  • the configuration from each input side to the stream processing unit 311 performs an encoding process
  • the configuration from the stream processing unit 312 to each output side performs a decoding process. I do.
  • the configuration on the encoding side is the same as that of the encoding device 110 'in FIG.
  • the codec device 300 can perform the encoding process and the decoding process simultaneously.
  • the image processing unit 320 is provided with a host CPU / memory system 321.
  • the video bit stream data output from the stream processing unit 311 is stored in the host CPU / memory system 321 and read by the stream processing unit 312.
  • the image processing units 310 and 320 are provided with path switching units 313 and 322, respectively.
  • the path switching units 313 and 322 switch the video data before the encoding process or the video data after the encoding / decoding process as the video data to the data generation unit on the decoding process side.
  • the path switching units 313 and 322 may adjust the timing of the two signals to be switched and may include a signal comparison circuit between the two signals and / or a signal statistic measurement circuit.
  • the stream processing unit 311 and the stream processing unit 312 may be directly connected.
  • FIG. 22 is a block diagram illustrating a second configuration example of a codec device that performs both encoding processing and decoding processing of a 120p 8K4K image.
  • the codec device 400 includes image processing units 410 and 420.
  • Each of the image processing units 410 and 420 is configured by, for example, an independent device or board.
  • the image processing units 410 and 420 in FIG. 22 differ from the image processing units 310 and 320 in FIG. 21 in that each of the codec processing units on the codec processing side and the decoding processing side is one codec processing unit.
  • the codec device 400 cannot perform the encoding process and the decoding process at the same time.
  • the image processing unit 420 is provided with a host CPU / memory system 421.
  • the video bit stream data output from the stream processing unit 411 is stored in the host CPU / memory system 421 and read by the stream processing unit 411.
  • the image processing units 410 and 420 are provided with path switching units 412 and 422, respectively.
  • the path switching units 412 and 422 switch between the video data before the encoding process and the video data after the encoding / decoding process as the video data, to the data generation unit on the decoding process side.
  • the path switching units 412 and 422 may adjust the timing of the two signals to be switched and may include a signal comparison circuit between the two signals and / or a signal statistic measurement circuit.
  • the configuration corresponding to the encoding device 110 ′ in FIG. 20 is adopted as the configuration combining the encoding device and the decoding device, but the configuration corresponding to the other encoding device and the decoding device in the above-described embodiment is adopted. May be done.
  • FIG. 23 is a diagram illustrating the flow of video data between the encoding device and the decoding device that perform the five-parallel processing.
  • the left side of the figure shows 8K1K (7680 ⁇ 1080 pixels) video data of the standard number of lines input from four 4K2K video recorders (Rec # 0 to # 3).
  • Video data of 864 lines excluding the lower 216 lines of video data from Rec # 0 is generated and input to the codec device (encoding device) # 0. Further, the encoding device # 0 generates and outputs 864 lines of video bit stream data.
  • the lower 216 lines of video data from Rec # 0 and the lower 432 lines of video data from Rec # 1 excluding the lower 432 lines of video data are combined to generate 864 lines of video data, and a codec device is generated. (Encoding device) Input to # 1. Further, the encoding device # 1 generates and outputs 864 lines of video bit stream data.
  • the lower 432 lines of video data from Rec # 1 and the upper 432 lines of video data from Rec # 2 are combined to generate 864 lines of video data, which are input to codec device (encoding device) # 2. You. Further, the encoding device # 2 generates 864 lines of video bit stream data and outputs the generated data.
  • the 648 lines of video data from Rec # 2 excluding the upper 432 lines of video data are combined with the upper 216 lines of video data from Rec # 3 to generate 864 lines of video data. (Encoding device) Input to # 3. Further, 864 lines of video bit stream data are generated and output by the encoding device # 3.
  • Video data of 864 lines excluding the video data of the upper 216 lines from Rec # 3 is generated and input to the codec device (encoding device) # 4. Further, 864 lines of video bit stream data are generated and output by the encoding device # 4.
  • 846 lines of video data that can be subjected to codec processing are generated from the video data of the standard number of lines, and video bit stream data is generated and output by the encoding device.
  • the video bit stream data of 864 lines at the first stage in the figure is decoded by the codec device (decoding device) # 0, and the video data of 864 lines is restored.
  • the restored 864 lines of video data are combined with the upper 216 lines of video data divided from the second-stage 864 lines of video data restored by the codec device (decoding device) # 1, and the standard number of lines ( It is output as 1080-line video data.
  • the 864 line video bit stream data in the second stage is decoded by the decoding device # 1, and the 864 line video data is restored.
  • the lower 648-line video data divided from the restored 864-line video data is the upper 432-line video divided from the third-stage 864-line video data restored by the codec device (decoding device) # 2. It is combined with the data and output as video data of the standard number of lines (1080 lines).
  • the 864 line video bit stream data in the third stage is decoded by the decoding device # 2, and the 864 line video data is restored.
  • the lower 432 line video data divided from the restored 864 line video data is the upper 648 line video divided from the fourth stage 864 line video data restored by the codec device (decoding device) # 3. It is combined with the data and output as video data of the standard number of lines (1080 lines).
  • the 864 line video bit stream data in the fourth stage is decoded by the decoding device # 3, and the 864 line video data is restored.
  • the lower 216 lines of video data divided from the restored 864 lines of video data are combined with the fifth stage of 864 lines of video data restored from the video bit stream data by the codec device (decoding device) # 4, It is output as video data of the standard number of lines (1080 lines).
  • the video data of the standard number of lines is regenerated by synthesizing the video data from a plurality of codec apparatuses from the video bit stream data of 846 lines that can be codec-processed.
  • FIG. 24 is a diagram illustrating the flow of video data between the encoding device and the decoding device that perform six parallel processing.
  • the left side of the figure shows 8K1K (7680 ⁇ 1080 pixels) video data of the standard number of lines input from four 4K2K video recorders (Rec # 0 to # 3).
  • the video data of 720 lines excluding the video data of the lower 360 lines from Rec # 0 is generated, and input to the codec device (encoding device) # 0. Further, 720-line video bit stream data is generated and output by the encoding device # 0.
  • the video data of the lower 360 lines from Rec # 0 and the video data of 360 lines from Rec # 1 are combined to generate 720 lines of video data, which are input to the codec device (encoding device) # 1. Furthermore, the encoding device # 1 generates and outputs 720 lines of video bit stream data.
  • Video data of 720 lines excluding the upper 360 lines of video data from Rec # 1 is generated and input to the codec device (encoding device) # 2. Further, 720 lines of video bit stream data are generated and output by the encoding device # 2.
  • the video data of 720 lines excluding the video data of the lower 360 lines from Rec # 2 is generated and input to the codec device (encoding device) # 3. Further, 720 lines of video bit stream data are generated and output by the encoding device # 3.
  • the lower 360 lines of video data from Rec # 2 and the 360 lines of video data from Rec # 3 are combined to generate 720 lines of video data, which are input to codec device (encoding device) # 4. . Further, 720 lines of video bit stream data are generated and output by the encoding device # 4.
  • the video data of 720 lines excluding the video data of the upper 360 lines from Rec # 3 is generated and input to the codec device (encoding device) # 5. Further, 720 lines of video bit stream data are generated and output by the encoding device # 5.
  • 720 lines of video data that can be subjected to codec processing are generated from the video data of the standard number of lines, and video bit stream data is generated and output by the encoding device.
  • the video bit stream data of the first 720 lines in the figure is decoded by the codec device (decoding device) # 0, and the video data of the 720 lines is restored.
  • the restored 720-line video data is combined with the upper 360-line video data divided from the second-stage 720-line video data restored by the codec device (decoding device) # 1, and the standard number of lines ( It is output as 1080-line video data.
  • the video bit stream data of 720 lines in the second stage is decoded by the decoding device # 1, and the video data of 720 lines is restored.
  • the lower 360-line video data divided from the restored 720-line video data is combined with the third-stage 720-line video data restored from the video bitstream data by the codec device (decoding device) # 2, It is output as video data of the standard number of lines (1080 lines).
  • the video bit stream data of 720 lines in the fourth stage is decoded by the codec device (decoding device) # 3, and the video data of 720 lines is restored.
  • the restored 720-line video data is combined with the upper 360-line video data divided from the fifth-stage 720-line video data restored by the codec device (decoding device) # 4, and the standard number of lines ( It is output as 1080-line video data.
  • the fifth-stage 720-line video bit stream data is decoded by the decoding device # 4, and the 720-line video data is restored.
  • the lower 360-line video data divided from the restored 720-line video data is combined with the sixth-stage 720-line video data restored from the video bitstream data by the codec device (decoding device) # 5, It is output as video data of the standard number of lines (1080 lines).
  • video data from a plurality of codec devices is synthesized from 720-bit video bit stream data that can be subjected to codec processing, whereby video data having a standard number of lines is regenerated.
  • audio data, metadata for controlling each image processing unit, and the like are transmitted via a transmission path between the image processing units. You may do so.
  • the above-described transmission path may be connected to another device such as a sound source, a machine, a vehicle, or the like, so that a synchronous operation with these other devices may be performed.
  • the technology according to the present disclosure can have the following configurations.
  • (1) Equipped with a plurality of image processing units for codec processing in parallel video data of a standard number of lines obtained by dividing an image of a predetermined resolution, The image processing unit according to claim 1, wherein the video data of a predetermined number of lines of the standard number of lines is output to another image processing unit, an input from another image processing unit, and the output is
  • An image processing apparatus comprising: a data generation unit configured to generate the video data having a number of lines capable of performing the codec processing according to either one of the input and the input.
  • (2) The image processing device according to (1), wherein the image is an 8K4K image.
  • the image processing apparatus further comprising: one transmission path that transmits the video data of the predetermined number of lines between each of the data generation units included in the plurality of image processing units.
  • the transmission path includes a transmission path capable of transmitting video data equivalent to full HD.
  • the transmission path transmits, together with the video data of the predetermined number of lines, a frame number of each frame constituting the video data.
  • the data generating unit After writing the video data of the standard number of lines for one frame input by the SQD method, the data generating unit generates an address at which the codec processing of the raster method can be performed when reading the video data.
  • the image processing apparatus according to any one of (2) to (5). (7) First to fourth image processing units for performing codec processing in parallel on 8K1K video data obtained by dividing the image into four in the vertical direction,
  • the data generating unit of the first image processing unit generates 1088 lines of video data based on the 8K1K video data and the eight lines of video data input from the second image processing unit
  • the data generation unit of the second image processing unit includes 1072 lines of video data obtained by removing the 8 lines of video data output to the first image processing unit from the 8K1K video data
  • the third image Based on the 16 lines of video data input from the processing unit, 1088 lines of video data are generated
  • the data generation unit of the third image processing unit includes 1064 lines of video data obtained by removing the 16 lines of video data output to the second image processing unit from the 8K1K video data
  • the fourth image Based on the 24 lines of video data input from the processing unit, 1088 lines of video data are generated
  • the data generating unit of the fourth image processing unit generates 1056 lines
  • First and second image processing units for performing codec processing in parallel on 8K2K video data obtained by dividing the image into two in the vertical direction
  • the data generating unit of the first image processing unit generates 2176 lines of video data based on the 8K2K video data and 16 lines of video data input from the second image processing unit
  • the data generation unit of the second image processing unit generates 2144 lines of video data by removing the 16 lines of video data output to the first image processing unit from the 8K2K video data (2) to (2) to
  • the image processing device according to any one of (6) and (6).
  • an image processing apparatus including a plurality of image processing units that perform codec processing in parallel on video data having a standard number of lines obtained by dividing an image having a predetermined resolution, 1, wherein the image processing unit comprises: Output of the video data of a predetermined number of lines of the standard number of lines to another image processing unit, input from another image processing unit, and either of the output and the input
  • An image processing method comprising: a data generation unit configured to generate the video data of the number of lines capable of performing the codec processing.
  • (10) Equipped with a plurality of image processing units for codec processing in parallel video data of a standard number of lines obtained by dividing an image of a predetermined resolution,
  • the image processing unit of 1 the video data of a predetermined number of lines of the number of lines capable of the codec processing, output to another image processing unit, further input from the other image processing unit, and
  • the image processing device according to (10), wherein the image is an 8K4K image.
  • (12) The image processing apparatus according to (10) or (11), further including one transmission path for transmitting the video data of the predetermined number of lines between each of the data generation units included in the plurality of image processing units.
  • the image processing device wherein the transmission path includes a transmission path capable of transmitting video data equivalent to full HD.
  • the transmission path transmits a frame number of each frame constituting the video data together with the video data of the predetermined number of lines.
  • the data generation unit can output the video data of the standard number of lines for one frame by the SQD system when reading the video data.
  • the image processing apparatus according to any one of (11) to (14), which generates an address.
  • First to fourth image processing units for performing codec processing in parallel on 8K1K video data obtained by dividing the image into four in the vertical direction The data generation unit of the first image processing unit is based on 1080 lines of video data obtained by removing the 8 lines of video data output to the second image processing unit from the codec processed 1088 lines of video data. To generate the 8K1K video data, The data generation unit of the second image processing unit performs the third image processing based on the eight lines of video data input from the first image processing unit and the 1088 lines of video data subjected to the codec processing.
  • the 8K1K video data is generated based on the 1072 lines of video data excluding the 16 lines of video data output to the unit,
  • the data generation unit of the third image processing unit performs the fourth image processing based on the 16 lines of video data input from the second image processing unit and the 1088 lines of video data subjected to the codec processing.
  • the 8K1K video data is generated based on 1064 lines of video data excluding the 24 lines of video data output to the unit,
  • the data generation unit of the fourth image processing unit performs the 8K1K based on the 24 lines of video data input from the third image processing unit and the 1056 lines of video data subjected to the codec processing.
  • the image processing device according to any one of (11) to (15), which generates video data.
  • First and second image processing units for performing codec processing in parallel on 8K2K video data obtained by dividing the image into two in the vertical direction The data generation unit of the first image processing unit is based on 2160 lines of video data obtained by removing 16 lines of video data output to the second image processing unit from the 2176 lines of video data subjected to the codec processing.
  • the data generation unit of the second image processing unit performs the 8K2K based on the 16 lines of video data input from the first image processing unit and the 2144 lines of video data subjected to the codec processing.
  • the image processing device according to any one of (11) to (15), which generates video data.
  • an image processing apparatus including a plurality of image processing units that perform codec processing in parallel on video data having a standard number of lines obtained by dividing an image having a predetermined resolution, 1, wherein the image processing unit comprises: The video data of a predetermined number of lines out of the number of lines that can be subjected to the codec processing, output to another image processing unit, input from another image processing unit, and both the output and the input
  • the image processing unit of 1 Output of the video data of a predetermined number of lines of the standard number of lines to another image processing unit, input from another image processing unit, and either of the output and the input
  • a first data generation unit that generates the video data of the number of lines capable of performing the codec processing,
  • a second data generation unit that generates the video data having the standard number of lines according to any one of (a) to (c).
  • the image processing unit inputs one of the video data before the codec processing generated by the first data generation unit and the video data after the codec processing to the second data generation unit.
  • the path switching unit includes a circuit for comparing signals between two signals to be switched and / or measuring signal statistics.
  • an image processing apparatus including a plurality of image processing units that perform codec processing in parallel on video data having a standard number of lines obtained by dividing an image having a predetermined resolution, 1, wherein the image processing unit comprises: Output of the video data of a predetermined number of lines of the standard number of lines to another image processing unit, input from another image processing unit, and either of the output and the input By generating the video data of the number of lines capable of the codec processing, The video data of a predetermined number of lines out of the number of lines that can be subjected to the codec processing, output to another image processing unit, input from another image processing unit, and both the output and the input An image processing method for generating the video data of the standard number of lines according to any one of the above.
  • ⁇ 10-1 encoding device ⁇ 11-1 to 11-4 ⁇ image processing unit, ⁇ 20-1 to 20-4 ⁇ data generation unit, ⁇ 21-1 to 21-4 ⁇ video IO unit, ⁇ 22-1 to 22-4 ⁇ data acquisition unit, ⁇ 30- 1 to 30-4 codec processing unit, ⁇ 40 ⁇ stream processing unit, ⁇ 60 ⁇ decoding device, ⁇ 61-1 to 61-4 ⁇ image processing unit, ⁇ 70 ⁇ stream processing unit, ⁇ 80-1 to 80-4 ⁇ codec processing unit, ⁇ 90-1 to 90 ⁇ -4 ⁇ data generation unit, ⁇ 91-1 to 91-4 ⁇ data acquisition unit, ⁇ 92-1 to 92-4 ⁇ video IO unit

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CN114257838B (zh) * 2021-11-29 2024-04-16 新奥特（北京）视频技术有限公司 一种视频数据处理方法、装置、电子设备和存储介质

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