WO2019227696A1 - 一种阵列基板及触控显示屏 - Google Patents
一种阵列基板及触控显示屏 Download PDFInfo
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- WO2019227696A1 WO2019227696A1 PCT/CN2018/101641 CN2018101641W WO2019227696A1 WO 2019227696 A1 WO2019227696 A1 WO 2019227696A1 CN 2018101641 W CN2018101641 W CN 2018101641W WO 2019227696 A1 WO2019227696 A1 WO 2019227696A1
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- touch
- lines
- array substrate
- control unit
- control
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0412—Digitisers structurally integrated in a display
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F3/00—Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
- G06F3/01—Input arrangements or combined input and output arrangements for interaction between user and computer
- G06F3/03—Arrangements for converting the position or the displacement of a member into a coded form
- G06F3/041—Digitisers, e.g. for touch screens or touch pads, characterised by the transducing means
- G06F3/0416—Control or interface arrangements specially adapted for digitisers
Definitions
- the invention relates to the field of touch display, in particular to an array substrate and a touch display screen.
- the touch technology of the display includes plug-in and in-cell
- the in-cell touch display includes in-cell and on-cell.
- in-cell has the characteristics of lightness, thinness, high transmittance, and simple bonding process. It stands out among the three and is favored by consumers. It has become the mainstream of the market.
- in-cell touch displays such as small-size (below 7 ’’) special resolution displays (18: 9 / 19: 9/20: 9/21: 9, etc.), such as the Notch special-shaped display screen, such as the medium-to-large size (7 '’or more cars, tablets, etc.) in-cell touch display screen, etc.
- the size of the touch unit in the in-cell touch display is restricted by the touch sensitivity and anti-interference ability, and its size range is between 3mm * 3mm ⁇ 5mm * 5mm.
- the number of horizontal and vertical pixel units corresponding to each touch unit is basically determined. Further, the number of touch units in the horizontal and vertical directions can be determined from the known resolution. Among them, when the resolution of the in-cell touch display is a special resolution, the number of touch units in the vertical direction is not proportional to the number of pixel units in the horizontal direction in each touch unit.
- the number of touch lines of the unit is equal to the number of touch units in the vertical direction, so the touch lines cannot be evenly distributed to each touch unit in each column of touch units, which will cause the touch function to be linear and sensitive.
- the problem of uniformity and difference in display effect at the boundary of the touch unit For example, when the resolution of a touch display is 1200RGB * 1920, and the number of pixel units corresponding to each touch unit is 40RGB * 40, then the touch display's touch units are 30 horizontal and vertical 48, that is to say, there are 48 touch lines in each row of touch units, and there are 40 pixel units in the horizontal direction of each touch unit, so that 48 touch lines cannot be evenly distributed to 40 pixel units. That is, it cannot be evenly distributed to each column of touch units.
- the touch lines can be changed from a double arrangement to a single and double arrangement.
- proportional means that the number of vertical touch units is that of horizontal pixel units. 1/2 of the number , 1/3, 1x, 2x, etc., using double arranged touch lines to control the touch unit.
- Double arrangement means that each pixel runs two parallel metal wires, that is, controls one touch unit. The two metal traces connected in parallel are connected to the touch display integrated chip.
- the impedance of the wiring can be reduced, thereby reducing the problem of uneven impedance at the near end and the far end of the touch display integrated chip.
- single arrangement means that each pixel runs two independent metal lines, that is, controls two touch units and two metal lines.
- the traces are respectively connected to the touch display integrated chip. For example, when 48 touch lines are allocated to 40 pixel units, 32 of the 40 pixel units can use two arranged touch lines to control the touch units. , The other 8 pixels use a single touch line to control the touch unit, the total number of touch lines is 32 + 8 * 2, which is 48.
- a single-arranged touch line can only be placed near the touch display integrated chip to ensure that its impedance impact is minimized. But at the same time, the alternating arrangement of single and double bars will cause a load (RC Loading) will affect display and touch effects.
- the array substrate in the conventional in-cell touch display adopts a traditional 14-channel mask design.
- the array substrate 100 ′ includes a substrate 21 ′, a metal block 22 ′, a buffer layer 23 ′, Polysilicon layer 24 ', gate insulating layer 25', gate 26 ', first interlayer insulating layer 27', source / drain 28 ', flat layer 29', second interlayer insulating layer 30 ', touch line 31 ', a third interlayer insulating layer 32', a transparent electrode layer 33 ', a passivation layer 34', and a pixel electrode layer 35 '.
- the first metal layer M1 is used as a gate layer
- the second metal layer M2 is used as a source / drain line
- the third metal layer M3 is used as a touch line layer. Since the touch lines are routed in a single layer, it is necessary to The two masks corresponding to the formation of the touch line 31 'and the third interlayer insulating layer 32' occupy a complicated process and high material cost.
- the technical problem mainly solved by the present invention is to provide an array substrate and a touch display screen, which can solve the problem that the touch lines cannot be uniform because the number of vertical touch units is not proportional to the number of horizontal pixel units in each touch unit. Problems driving each column of touch units.
- a technical solution adopted by the present invention is to provide an array substrate including: a plurality of touch units arranged in a matrix, each touch unit including a plurality of pixel units arranged in a matrix, each The pixel unit includes a plurality of sub-pixels; a plurality of touch lines, each of which is corresponding to a different row of sub-pixels, wherein part of the touch lines is a first touch line, and the remaining part of the touch lines is a second touch Line; the first control unit includes a plurality of first control terminals, each first control terminal is electrically connected to a corresponding first touch line; the second control unit includes a second control terminal, and the second control And the plurality of second touch lines are electrically connected to each other; wherein the first touch line and the second touch line are disposed on the same metal layer; wherein the array substrate further includes a closed metal trace disposed outside the display area Wherein, the metal trace is electrically connected to the second control unit; wherein each second touch line is electrically
- an array substrate including: a plurality of touch units arranged in a matrix, each touch unit including a plurality of pixel units arranged in a matrix, each A pixel unit includes a plurality of sub-pixels; a plurality of touch lines, each of which is corresponding to a different row of sub-pixels, wherein some of the touch lines are first touch lines and the remaining touch lines are second touch lines.
- a touch display screen including an array substrate;
- the array substrate includes a plurality of touch units arranged in a matrix, and each touch unit includes A plurality of pixel units arranged in a matrix, each pixel unit including a plurality of sub-pixels; a plurality of touch lines, each touch line is arranged corresponding to a different row of sub-pixels, wherein a part of the touch lines is a first touch line, The remaining touch line is a second touch line;
- the first control unit includes a plurality of first control ends, and each first control end is electrically connected to each corresponding first touch line; the second control unit,
- the second control terminal is electrically connected to the plurality of second touch lines.
- the array substrate and touch display screen of the present invention include a plurality of touch units arranged in a matrix, each touch unit includes a plurality of pixel units arranged in a matrix, and each pixel unit includes a plurality of sub-units. Pixels; multiple touch lines, each touch line is set corresponding to a different row of sub-pixels, wherein some of the touch lines are the first touch line and the remaining touch lines are the second touch line; the first control The unit includes a plurality of first control terminals, each first control terminal is electrically connected to a corresponding first touch line; the second control unit includes a second control terminal, the second control terminal and a plurality of first control terminals; Two touch lines are electrically connected.
- the invention adds multiple second touch lines, which can solve the problem that the touch lines cannot be uniform because the number of vertical touch units is not proportional to the number of horizontal pixel units in each touch unit. Problems driving the touch unit.
- FIG. 1 is a schematic diagram of a double-arranged touch line in the prior art
- FIG. 2 is a schematic cross-sectional structure diagram of a conventional array substrate
- FIG. 3 is a schematic structural diagram of an array substrate according to an embodiment of the present invention.
- FIG. 4 is a schematic cross-sectional structural diagram of a portion of the array substrate shown in FIG. 3;
- FIG. 5 is a schematic structural diagram of a touch display screen according to an embodiment of the present invention.
- FIG. 3 is a schematic structural diagram of an array substrate according to an embodiment of the present invention.
- the array substrate 100 includes a plurality of touch units 11, a plurality of touch lines 12, a first control unit 13 and a second control unit 14.
- the plurality of touch units 11 are arranged in a matrix.
- Each touch unit 11 includes a plurality of pixel units 15 arranged in a matrix.
- Each pixel unit 15 includes a plurality of sub-pixels 151.
- each pixel unit 15 includes three sub-pixels 151, which are an R sub-pixel, a G sub-pixel, and a B sub-pixel, respectively.
- Each touch line 12 is disposed corresponding to a sub-pixel 151 of a different column, wherein a part of the touch lines 12 is a first touch line 121 and the remaining part of the touch lines 12 is a second touch line 122.
- the first control unit 13 includes a plurality of first control terminals 131, and each first control terminal 131 is electrically connected to a corresponding first touch line 121 for providing a normal Touch signal.
- the second control unit 14 includes a second control terminal 141, and the second control terminal 141 is electrically connected to the plurality of second touch lines 122 for providing virtual touch signals or common touch signals to the plurality of second touch signals 122.
- Level signal is electrically connected to the plurality of second touch lines 122 for providing virtual touch signals or common touch signals to the plurality of second touch signals 122.
- the array substrate 100 further includes a closed metal trace 16 disposed outside the display area, wherein the metal trace 16 is electrically connected to the second control unit 14; wherein each second touch line 122 is electrically connected to the second control unit 14 through the metal wiring 16 after being short-circuited with the metal wiring 16.
- the plurality of first touch lines 121 and the plurality of second touch lines 122 are disposed on the same metal layer, and the metal trace 16 and the plurality of second touch lines 122 are disposed on different metal layers.
- the array substrate 100 includes: a substrate 21, a plurality of metal blocks 22 provided on the substrate 21, a buffer layer 23 provided on the metal blocks 22 and the substrate 21; Polysilicon layer 24; gate insulating layer 25 provided on polysilicon layer 24 and buffer layer 23; gate 26 provided on gate insulating layer 25; and interlayer insulation provided on gate of gate 26 and gate insulating layer 25 Layer 27.
- An active / drain 28 and a touch line 12 are disposed on the interlayer insulating layer 27.
- the source / drain 28 penetrates the entire interlayer insulating layer 27 and is connected to the polysilicon layer 24 through the gate insulating layer 25.
- the interlayer insulation layer 17 is also provided with touch lines 12 insulated from the source / drain 28.
- the source / drain 28 and the touch line 12 use the same mask process, and the materials used for the preparation are the same, such as metal molybdenum, aluminum, or copper, but they have different functions and functions.
- a flat layer 29 is provided on the source / drain 28, the touch line 12 and the interlayer insulating layer 27, and a transparent electrode layer 30 is provided on the flat layer 29.
- the transparent electrode layer 30 is connected to the touch line 12 through the flat layer 29.
- a passivation layer 31 is provided on the transparent electrode layer 30, and a pixel electrode 32 is provided on the passivation layer 31.
- the pixel electrode 32 penetrates the passivation layer 31 and the flat layer 29 is connected to the drain in the source / drain 28.
- the plurality of touch lines 12 include a first touch line 121 and a second touch line 122, that is, the first touch line 121, the second touch line 122, and the The source / drain electrodes 28 are disposed in the same layer, that is, disposed in the second metal layer M2. At the same time, the first touch lines 121 and the second touch lines 122 are spaced from each other and are insulated. Because the metal trace 16 and the second touch line are disposed on different metal layers, the metal trace 16 can be routed on the first metal layer M1 (that is, the metal trace 16 and the gate) in addition to the second metal layer M2.
- the electrodes 26 are disposed on the same layer), a transparent electrode layer, a pixel electrode layer, and the like. Each second touch line 122 is short-circuited to the metal trace 16 through a corresponding via hole.
- the array substrate 100 in this embodiment adopts a 9-mask design.
- the design with the NMOS + Re-etch process and the new touch line wiring process, the third metal layer, the second interlayer insulation layer, and the third interlayer insulation layer in the traditional 14mask design are omitted, simplifying the process Saved material costs.
- each pixel unit 15 in the lateral direction of each touch unit 11 corresponds to three independent touch lines 12, that is, each touch line 12 corresponds to each column of sub-pixels 151.
- the number of the first touch lines 121 is the number of the touch units 11 in the vertical direction of the touch units 11 arranged in a matrix
- the number of the second touch lines 122 is the horizontal direction in each touch unit 11.
- the first touch line 121 is an effective touch line for controlling the touch unit 11
- the second touch line 122 is a virtual touch line for matching the first touch line 121 to make the touch
- the control wires 12 can be evenly distributed to each touch unit 11.
- the 40 pixel units 15 can go through 120 touch lines 12, and That is, each sub-pixel 151 runs one touch line 12, wherein the number of the first touch lines 121 is 48, and the number of the second touch lines 122 is 120-48, that is, 72.
- the first touch lines 121 and the second touch lines 122 may be distributed in such a manner that every two first touch lines 121 are repeatedly arranged with three second touch lines 122, for example, the second touch lines 122 may be arranged.
- first touch line 121, the second touch line 122, the first touch line 121, and the second touch line 122 may also be the first touch line 121, the second touch line 122, the first The arrangement of the touch lines 121, the second touch lines 122, the second touch lines 122, and so on, as long as each pixel unit 15 is correspondingly provided with a first touch line 121.
- the number of the first touch lines 121 is the number of the touch units 11 in the vertical direction of the touch units 11 arranged in a matrix
- the number of the second touch lines 122 is the horizontal direction in each touch unit 11. A difference between twice the number of the upper pixel units 15 and the number of the first touch lines 121.
- the 40 pixel units 15 can take 80 touch lines 12, that is, 15 per pixel unit Take two touch lines 12, that is, the two touch lines 12 correspond to two sub-pixels 151 in each pixel unit 15, wherein the number of the first touch lines 121 is 48, and the number of the second touch lines 122 The number is 32.
- the first touch lines 121 and the second touch lines 122 are distributed in such a manner that each pixel unit 15 corresponds to one first touch line 121 and one second touch line 122 or two first touch lines 121.
- the designer can control the number of the first touch lines 121 and the second touch lines 122 according to the requirements of the actual panel resolution.
- the first touch lines 121 and the second touch lines The distribution of the control lines 122 can be arranged by the designer according to the specific wiring.
- FIG. 3 is only an example, and the present invention is not limited to the arrangement shown in FIG. 3.
- the first control unit 13 and the second control unit 14 are touch display integrated chips, and the plurality of first control terminals 131 and one second control terminal 141 are different touch controls in the touch display integrated chip. end.
- the signals output by different touch terminals are with TP Vcom signal of pulse, TP pulse is a touch pulse and Vcom is a common level.
- the plurality of first control terminals 131 are touch terminals normally used in touch display integrated chips, and are used to provide normal touch signals to the first touch line 121, and the second control terminal 141 is touch
- the spare touch terminal in the display integrated chip is used to provide a virtual touch signal to the second touch line 122, which ensures the consistency of the signals transmitted on the second touch line 122 and the first touch line 121. To avoid the problem of uneven display caused by signal differences.
- the first control unit 13 is a touch display integrated chip, the plurality of first control terminals 131 are different touch terminals in the touch display integrated chip; the second control unit 14 is a power driving circuit, one The second control terminal 141 is a voltage output terminal of the power driving circuit.
- the power driving circuit is a DC-DC circuit, and the voltage output terminal of the power driving circuit is used to output a common level signal, that is, a Vcom signal.
- the common level signal transmitted on the second touch line 122 does not need to be routed in the fan-out routing area, which reduces the routing in the fan-out routing area, thereby reducing process risks and improving product reliability.
- the sector routing area is an area between the first control unit 13 and the touch unit 11 for routing the first touch line 121.
- FIG. 5 is a schematic structural diagram of a touch display screen according to an embodiment of the present invention. As shown in FIG. 5, the touch display screen 1 includes an array substrate 2, and the array substrate 2 is the above-mentioned array substrate 100.
- the array substrate and the touch display screen of the present invention include a plurality of touch units arranged in a matrix, each touch unit includes a plurality of pixel units arranged in a matrix, and each pixel unit includes a plurality of sub-units. Pixels; multiple touch lines, each touch line is set corresponding to a different row of sub-pixels, wherein some of the touch lines are the first touch line and the remaining touch lines are the second touch line; the first control The unit includes a plurality of first control terminals, each first control terminal is electrically connected to a corresponding first touch line; the second control unit includes a second control terminal, the second control terminal and a plurality of first control terminals; Two touch lines are electrically connected.
- the invention adds multiple second touch lines, which can solve the problem that the touch lines cannot be uniform because the number of vertical touch units is not proportional to the number of horizontal pixel units in each touch unit. Problems driving each column of touch units.
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Abstract
本发明公开了一种阵列基板及触控显示屏。该阵列基板包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条触控线与不同列的子像素对应设置,其中,部分触控线为第一触控线,剩余部分触控线为第二触控线;第一控制单元,包括多个第一控制端,每一第一控制端与对应的每条第一触控线电性连接;第二控制单元,包括一第二控制端,第二控制端与多条第二触控线电性连接。通过上述方式,本发明能够解决由于纵向触控单元的的数量与每个触控单元中横向像素单元的数量不成比例从而导致触控线无法均一地驱动每列触控单元的问题。
Description
【技术领域】
本发明涉及触控显示领域,特别是涉及一种阵列基板及触控显示屏。
【背景技术】
随着近年来智能手机的飞速发展以及大众化的普及,各手机方案商之间在激烈竞争的同时,对显示屏性能的要求也越来越高,对于面板厂商而言,不断地对现有显示屏优化及提升就迫在眉睫。就显示屏的触控技术而言,目前市场上常见的触控显示面板有外挂式和内嵌式,而内嵌式触控显示屏包括in-cell和on-cell两种。其中,由于in-cell具有轻薄、透过率高以及贴合工艺简单的特点,在三者中脱颖而出,深受消费者青睐,目前已成为市场主流。随着实际市场多元化的发展,in-cell触控显示屏出现了许多特殊分辨率,例如小尺寸(7’’以下)特殊分辨率显示屏(18:9
/ 19:9 / 20:9/21:9等)、例如Notch 异形设计的显示屏、例如中大尺寸(7’’以上车载、平板等)内嵌式触控显示屏等等。
内嵌式触控显示屏中触控单元的尺寸受到触控灵敏度以及抗干扰能力的制约,其尺寸范围在3mm*3mm~5mm*5mm之间。当触控单元的尺寸已知时,每个触控单元对应的横向和纵向的像素单元的数量也就基本确定了。进一步,由已知的分辨率,即可确定横向和纵向的触控单元的数量。其中,当内嵌式触控显示屏的分辨率为特殊分辨率时,会出现纵向上触控单元的的数量与每个触控单元中横向上像素单元的数量不成比例,由于每列触控单元的触控线的数目等于纵向上触控单元的数目,因此会出现触控线无法均匀分配到每列触控单元中的每个触控单元,从而会造成触控功能线性和灵敏度的不均匀,以及触控单元分界处的显示效果差异的问题。举例来说,当触控显示屏的分辨率为1200RGB*1920,每个触控单元对应的像素单元的数目为40RGB*40时,此时触控显示屏的触控单元为横向30个、纵向48,也就是说,每列触控单元的触控线为48条,而每个触控单元的横向的像素单元为40个,这样48条触控线无法均匀地分配到40个像素单元上,也即无法均匀地分配到每一列触控单元上。
对于小尺寸的内嵌式触控显示屏,当出现上述问题时,可以将触控线由双条排列改为单双条混合排列。具体来说,请参考图1,当纵向触控单元的数量较小且与每个触控单元横向像素单元的数量成比例时,成比例指的就是纵向触控单元的数量为横向像素单元的数量的1/2
,1/3,1倍,2倍等,采用双条排列的触控线来控制触控单元,双条排列是指每个像素走两条并联的金属走线,即控制一个触控单元,并联后的两条金属走线与触控显示集成芯片连接。采用这种走线方式,可以降低走线阻抗,从而减低触控显示集成芯片的近端及远端阻抗不均的问题。当不成比例时,采用单双条交替排列的触控线来控制触控单元,其中,单条排列是指每个像素走两条独立的金属走线,即控制两个触控单元,两条金属走线分别与触控显示集成芯片连接。举例来说,当48条触控线分配到40个像素单元上时,可以40个像素单元中的32个像素单元采用双条排列的触控线来控制触控单元
,另外8个像素采用单条排列的触控线来控制触控单元,则总的触控线的数量为32+8*2,也即48条。采用这种走线方式,根据RC评估,单条排列的触控线仅能置于触控显示集成芯片的近端,才能保证其阻抗影响降至最低。但与此同时,单双条交替排列会造成负载(RC
Loading)不均,会对显示及触控效果产生影响。
若在小尺寸的内嵌式触控显示屏的基础上增加Notch
异形设计,则需要继续增加单条排列的触控线的数量,阻抗不均的问题会进一步增加,同时显示的差异性也会进一步增加。
若将小尺寸的内嵌式触控显示屏更改为大尺寸的内嵌式触控显示屏,其纵向的触控单元的数量会增加更多,此时会出现双条排列的触控线达不到纵向触控单元的数量的问题,此时若将双条排列的触控线改为单条排列,则会出现大量多余的触控线,多余的触控线连入触控显示集成芯片会增加触控显示集成芯片的通道(channel)数,同时会存在扇出走线区线路密集从而提高制程上的风险。
另外,如图2所示,传统的内嵌式触控显示屏中的阵列基板采用传统的14道mask设计,阵列基板100’包括:衬底21’、金属块22’、缓冲层23’、多晶硅层24’、栅极绝缘层25’,栅极26’、第一层间绝缘层27’、源/漏极28’,平坦层29’、第二层间绝缘层30’、触控线31’、第三层间绝缘层32’、透明电极层33’、钝化层34’和像素电极层35’。
其中,第一金属层M1作为栅极层,第二金属层M2作为源/漏极线,第三金属层M3作为触控线层,由于触控线采用单独在一层走线的方式,需要占用对应于形成触控线31’和第三层间绝缘层32’的两道mask,工艺复杂,材料成本高。
【发明内容】
本发明主要解决的技术问题是提供一种阵列基板及触摸显示屏,能够解决由于纵向触控单元的的数量与每个触控单元中横向像素单元的数量不成比例而导致触控线无法均一地驱动每列触控单元的问题。
为解决上述技术问题,本发明采用的一个技术方案是:提供一种阵列基板,包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条触控线与不同列的子像素对应设置,其中,部分触控线为第一触控线,剩余部分触控线为第二触控线;第一控制单元,包括多个第一控制端,每一第一控制端与对应的每条第一触控线电性连接;第二控制单元,包括一第二控制端,第二控制端与多条第二触控线电性连接;其中,第一触控线和第二触控线设置在同一金属层;其中,阵列基板进一步包括设置在显示区域之外的封闭的金属走线,其中,金属走线与第二控制单元电性连接;其中,每条第二触控线与金属走线短接后通过金属走线与第二控制单元电性连接。
为解决上述技术问题,本发明采用的另一个技术方案是:提供一种阵列基板,包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条触控线与不同列的子像素对应设置,其中,部分触控线为第一触控线,剩余部分触控线为第二触控线;第一控制单元,包括多个第一控制端,每一第一控制端与对应的每条第一触控线电性连接;第二控制单元,包括一第二控制端,第二控制端与多条第二触控线电性连接。
为解决上述技术问题,本发明采用的又一个技术方案是:提供一种触控显示屏,包括阵列基板;该阵列基板包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条触控线与不同列的子像素对应设置,其中,部分触控线为第一触控线,剩余部分触控线为第二触控线;第一控制单元,包括多个第一控制端,每一第一控制端与对应的每条第一触控线电性连接;第二控制单元,包括一第二控制端,第二控制端与多条第二触控线电性连接。
本发明的有益效果是:本发明的阵列基板及触控显示屏包括按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条触控线与不同列的子像素对应设置,其中,部分触控线为第一触控线,剩余部分触控线为第二触控线;第一控制单元,包括多个第一控制端,每一第一控制端与对应的每条第一触控线电性连接;第二控制单元,包括一第二控制端,第二控制端与多条第二触控线电性连接。通过上述方式,本发明由于新增多条第二触控线,从而能够解决由于纵向触控单元的的数量与每个触控单元中横向像素单元的数量不成比例从而导致触控线无法均一地驱动触控单元的问题。
【附图说明】
图1是现有技术的双条排列的触控线的示意图;
图2是现有技术的阵列基板的部分剖面结构示意图;
图3是本发明实施例的阵列基板的结构示意图;
图4是图3所示的阵列基板的部分剖面结构示意图;
图5是本发明实施例的触控显示屏的结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图,对本发明实施例中的技术方案进行清楚、完整地描述,显然,所描述的实施例仅是本发明的一部分实施例,而不是全部的实施例。基于本发明中的实施例,本领域普通技术人员在没有作出创造性劳动前提下所获得的所有其他实施例,都属于本发明保护的范围。
图3是本发明实施例的阵列基板的结构示意图。如图3所示,阵列基板100包括多个触控单元11、多条触控线12、第一控制单元13和第二控制单元14。
多个触控单元11按矩阵排列,每个触控单元11包括按矩阵排列的多个像素单元15,每一像素单元15包括多个子像素151。在本实施例中,每一像素单元15包括三个子像素151,分别为R子像素、G子像素和B子像素。
每条触控线12与不同列的子像素151对应设置,其中,部分触控线12为第一触控线121,剩余部分触控线12为第二触控线122。
第一控制单元13包括多个第一控制端131,每一第一控制端131与对应的每条第一触控线121电性连接,用于向每条第一触控线121提供正常的触控信号。
第二控制单元14包括一第二控制端141,第二控制端141与多条第二触控线122电性连接,用于向多条第二触控信号122提供虚拟的触控信号或公共电平信号。
在本实施例中,阵列基板100进一步包括设置在显示区域之外的封闭的金属走线16,其中,金属走线16与第二控制单元14电性连接;其中,每条第二触控线122与金属走线16短接后通过金属走线16与第二控制单元14电性连接。
在本实施例中,多条第一触控线121和多条第二触控线122设置在同一金属层,金属走线16与多条第二触控线122设置在不同金属层。
具体来说,请一并参考图4,图4是图3所示的阵列基板的部分剖面示意图。如图4所示,阵列基板100包括:衬底21,设置在衬底21上的若干个金属块22、设置在金属块22和衬底21上的缓冲层23;设置在缓冲层23上的多晶硅层24;设置在多晶硅层24和缓冲层23上的栅极绝缘层25;设置在栅极绝缘层25上的栅极26以及设置在栅极26和栅极绝缘层25栅的层间绝缘层27。
层间绝缘层27上设置有源/漏极28和触控线12,源/漏极28贯穿整个层间绝缘层27、经过栅极绝缘层25与多晶硅层24连接。同时,层间绝缘层17上还设置有与源/漏极28相互绝缘的触控线12。在实际制备过程中,源/漏极28和触控线12采用同一道mask工艺,其制备的材质是相同的,例如金属钼、铝或铜,只是所承担的作用和功能不同。
在源/漏极28、触控线12和层间绝缘层27上设置平坦层29,在平坦层29上设置透明电极层30。其中,透明电极层30贯穿平坦层29与触控线12连接。
在透明电极层30上设置有钝化层31,在钝化层31上设置像素电极32,像素电极32贯穿钝化层31、平坦层29与源/漏极28中的漏极连接。
在本实施例中,多条触控线12包括第一触控线121和第二触控线122,也就是说,第一触控线121、第二触控线122与阵列基板100中的源/漏极28同层设置,也即设置于第二金属层M2。同时,第一触控线121和第二触控线122相互间隔且绝缘设置。由于金属走线16与第二触控线设置于不同的金属层,则而金属走线16可以布线于除第二金属层M2之外的第一金属层M1(也即金属走线16与栅极26同层设置)、透明电极层、像素电极层等等,每条第二触控线122通过对应的过孔与金属走线16短接。
另外,本实施例中的阵列基板100采用9道mask设计,在9mask
设计中,搭配NMOS+Re-etch工艺以及新型触控线布线工艺,省去了传统14mask设计中的第三金属层、第二层间绝缘层、第三层间绝缘层等,简化了工艺,节约了材料成本。
在本实施例中,每个触控单元11中横向上的每个像素单元15对应三条独立的触控线12,也即每一条触控线12对应于每一列的子像素151。
在本实施例中,第一触控线121的数量为按矩阵排列的触控单元11的纵向上触控单元11的数量,第二触控线122的数量为每个触控单元11中横向上子像素151的数量与第一触控线121的数量之差。可以理解的是,第一触控线121为有效触控线,用于控制触控单元11,而第二触控线122为虚拟触控线,用于配合第一触控线121以使触控线12能均匀地分配到每个触控单元11。
举例来说,当纵向上触控单元11的数量为48个,每个触控单元11的横向上的像素单元15为40个时,40个像素单元15可以走120条触控线12,也即每个子像素151走一条触控线12,其中,第一触控线121的数量为48条,第二触控线122的数量为120-48也即72条。其中,第一触控线121和第二触控线122的分布方式可以为每两条第一触控线121搭配三条第二触控线122重复排列,例如,可以为第二触控线122、第一触控线121、第二触控线122、第一触控线121、第二触控线122的排列;也可以为第一触控线121、第二触控线122、第一触控线121、第二触控线122、第二触控线122的排列等等,只要每个像素单元15对应设置有一条第一触控线121即可。
在其它实施例中,第一触控线121的数量为按矩阵排列的触控单元11的纵向上触控单元11的数量,第二触控线122的数量为每个触控单元11中横向上像素单元15的数量的二倍与第一触控线121的数量之差。
举例来说,当纵向上触控单元11的数量为48个,每个触控单元11的横向上的像素单元15为40个时,40个像素单元15可以走80条触控线12,即每个像素单元15
走两条触控线12,也即两条触控线12对应每个像素单元15中的两个子像素151,其中,第一触控线121的数量为48条,第二触控线122的数量为32条。其中,第一触控线121和第二触控线122的分布方式为每个像素单元15对应一条第一触控线121和一条第二触控线122或者两条第一触控线121。
总的来说,在实际应用中,设计者可根据实际面板分辨率的要求,控制第一触控线121和第二触控线122的数量,同时,第一触控线121和第二触控线122的分布方式,设计者可以根据具体走线自行排布。
本领域的技术人员可以理解,图3所示的排布方式仅为举例,本发明不以图3所示的排布方式为限。
在本实施例中,第一控制单元13和第二控制单元14为触控显示集成芯片,多个第一控制端131和一个第二控制端141为触控显示集成芯片中的不同的触控端。其中,不同的触控端输出的信号为带有TP
pulse 的Vcom 信号,TP
pulse为触控脉冲,Vcom为公共电平。换个角度来说,多个第一控制端131为触控显示集成芯片中正常使用的触控端,用于向第一触控线121提供正常的触控信号,第二控制端141为触控显示集成芯片中备用的触控端,用于向第二触控线122提供虚拟的触控信号,这就保证了第二触控线122和第一触控线121上传输的信号的一致性,以避免信号差异带来的显示不均的问题。
在其它实施例中,第一控制单元13为触控显示集成芯片,多个第一控制端131为触控显示集成芯片中的不同的触控端;第二控制单元14为电源驱动电路,一个第二控制端141为电源驱动电路的电压输出端。其中,电源驱动电路为DC-DC电路,电源驱动电路的电压输出端用于输出公共电平信号也即Vcom信号。采用这种方式,第二触控线122上传输的公共电平信号无需走线在扇出走线区,减少了扇出走线区的走线,从而减小了制程上的风险,提高了产品可靠性。其中,扇区走线区为第一控制单元13与触控单元11之间用来走第一触控线121的区域。
图5是本发明实施例的触控显示屏的结构示意图。如图5所示,触控显示屏1包括了阵列基板2,阵列基板2为上述的阵列基板100。
本发明的有益效果是:本发明的阵列基板及触控显示屏包括按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条触控线与不同列的子像素对应设置,其中,部分触控线为第一触控线,剩余部分触控线为第二触控线;第一控制单元,包括多个第一控制端,每一第一控制端与对应的每条第一触控线电性连接;第二控制单元,包括一第二控制端,第二控制端与多条第二触控线电性连接。通过上述方式,本发明由于新增多条第二触控线,从而能够解决由于纵向触控单元的的数量与每个触控单元中横向像素单元的数量不成比例从而导致触控线无法均一地驱动每列触控单元的问题。
以上所述仅为本发明的实施方式,并非因此限制本发明的专利范围,凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换,或直接或间接运用在其他相关的技术领域,均同理包括在本发明的专利保护范围内。
Claims (20)
- 一种阵列基板,其中,包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条所述触控线与不同列的所述子像素对应设置,其中,部分所述触控线为第一触控线,剩余部分所述触控线为第二触控线;第一控制单元,包括多个第一控制端,每一所述第一控制端与对应的每条所述第一触控线电性连接;第二控制单元,包括一第二控制端,所述第二控制端与多条所述第二触控线电性连接;其中,所述第一触控线和所述第二触控线设置在同一金属层;其中,所述阵列基板进一步包括设置在显示区域之外的封闭的金属走线,其中,所述金属走线与所述第二控制单元电性连接;其中,每条所述第二触控线与所述金属走线短接后通过所述金属走线与所述第二控制单元电性连接。
- 根据权利要求1所述的阵列基板,其中,所述第一触控线、所述第二触控线和所述阵列基板中的源/漏极同层设置。
- 一种阵列基板,其中,包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条所述触控线与不同列的所述子像素对应设置,其中,部分所述触控线为第一触控线,剩余部分所述触控线为第二触控线;第一控制单元,包括多个第一控制端,每一所述第一控制端与对应的每条所述第一触控线电性连接;第二控制单元,包括一第二控制端,所述第二控制端与多条所述第二触控线电性连接。
- 根据权利要求3所述的阵列基板,其中,所述第一触控线和所述第二触控线设置在同一金属层。
- 根据权利要求4所述的阵列基板,其中,所述第一触控线、所述第二触控线和所述阵列基板中的源/漏极同层设置。
- 根据权利要求3所述的阵列基板,其中,所述阵列基板进一步包括设置在显示区域之外的封闭的金属走线,其中,所述金属走线与所述第二控制单元电性连接;其中,每条所述第二触控线与所述金属走线短接后通过所述金属走线与所述第二控制单元电性连接。
- 根据权利要求6所述的阵列基板,其中,多条所述第二触控线与所述金属走线设置在不同金属层,每条所述第二触控线通过对应的过孔与所述金属走线短接。
- 根据权利要求3所述的阵列基板,其中,所述第一控制单元和所述第二控制单元为触控显示集成芯片,多个所述第一控制端和一个所述第二控制端为所述触控显示集成芯片中的不同的触控端。
- 根据权利要求3所述的阵列基板,其中,所述第一控制单元为触控显示集成芯片,多个所述第一控制端为所述触控显示集成芯片中的不同的触控端;所述第二控制单元为电源驱动电路,一个所述第二控制端为所述电源驱动电路的电压输出端。
- 根据权利要求3所述的阵列基板,其中,所述第一触控线的数量为所述按矩阵排列的所述触控单元的纵向上所述触控单元的数量,所述第二触控线的数量为每个触控单元中横向上所述子像素的数量与所述第一触控线的数量之差。
- 根据权利要求3所述的阵列基板,其中,所述第一触控线的数量为所述按矩阵排列的所述触控单元的纵向上所述触控单元的数量,所述第二触控线的数量为每个触控单元中横向上所述像素单元的数量的二倍与所述第一触控线的数量之差。
- 一种触控显示屏,其中,包括阵列基板;所述阵列基板包括:按矩阵排列的多个触控单元,每个触控单元包括按矩阵排列的多个像素单元,每一像素单元包括多个子像素;多条触控线,每条所述触控线与不同列的所述子像素对应设置,其中,部分所述触控线为第一触控线,剩余部分所述触控线为第二触控线;第一控制单元,包括多个第一控制端,每一所述第一控制端与对应的每条所述第一触控线电性连接;第二控制单元,包括一第二控制端,所述第二控制端与多条所述第二触控线电性连接。
- 根据权利要求12所述的触控显示屏,其中,所述第一触控线和所述第二触控线设置在同一金属层。
- 根据权利要求13所述的触控显示屏,其中,所述第一触控线、所述第二触控线和所述阵列基板中的源/漏极同层设置。
- 根据权利要求12所述的触控显示屏,其中,所述阵列基板进一步包括设置在显示区域之外的封闭的金属走线,其中,所述金属走线与所述第二控制单元电性连接;其中,每条所述第二触控线与所述金属走线短接后通过所述金属走线与所述第二控制单元电性连接。
- 根据权利要求15所述的触控显示屏,其中,多条所述第二触控线与所述金属走线设置在不同金属层,每条所述第二触控线通过对应的过孔与所述金属走线短接。
- 根据权利要求12所述的触控显示屏,其中,所述第一控制单元和所述第二控制单元为触控显示集成芯片,多个所述第一控制端和一个所述第二控制端为所述触控显示集成芯片中的不同的触控端。
- 根据权利要求12所述的触控显示屏,其中,所述第一控制单元为触控显示集成芯片,多个所述第一控制端为所述触控显示集成芯片中的不同的触控端;所述第二控制单元为电源驱动电路,一个所述第二控制端为所述电源驱动电路的电压输出端。
- 根据权利要求12所述的触控显示屏,其中,所述第一触控线的数量为所述按矩阵排列的所述触控单元的纵向上所述触控单元的数量,所述第二触控线的数量为每个触控单元中横向上所述子像素的数量与所述第一触控线的数量之差。
- 根据权利要求12所述的触控显示屏,其中,所述第一触控线的数量为所述按矩阵排列的所述触控单元的纵向上所述触控单元的数量,所述第二触控线的数量为每个触控单元中横向上所述像素单元的数量的二倍与所述第一触控线的数量之差。
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