WO2019206027A1 - 感光组件及其制备方法、阵列基板、显示装置 - Google Patents
感光组件及其制备方法、阵列基板、显示装置 Download PDFInfo
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- WO2019206027A1 WO2019206027A1 PCT/CN2019/083360 CN2019083360W WO2019206027A1 WO 2019206027 A1 WO2019206027 A1 WO 2019206027A1 CN 2019083360 W CN2019083360 W CN 2019083360W WO 2019206027 A1 WO2019206027 A1 WO 2019206027A1
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- electrode
- substrate
- photosensitive
- thin film
- film transistor
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- 239000000758 substrate Substances 0.000 title claims abstract description 163
- 238000002360 preparation method Methods 0.000 title abstract description 22
- 239000010409 thin film Substances 0.000 claims abstract description 164
- 238000000034 method Methods 0.000 claims description 50
- 230000008569 process Effects 0.000 claims description 35
- 238000000059 patterning Methods 0.000 claims description 31
- 230000004888 barrier function Effects 0.000 claims description 9
- 229910052739 hydrogen Inorganic materials 0.000 abstract description 19
- 239000001257 hydrogen Substances 0.000 abstract description 19
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 abstract description 17
- 238000009413 insulation Methods 0.000 abstract description 4
- 230000000694 effects Effects 0.000 abstract description 3
- 239000010408 film Substances 0.000 description 24
- 239000000463 material Substances 0.000 description 17
- 229910021417 amorphous silicon Inorganic materials 0.000 description 8
- 239000004020 conductor Substances 0.000 description 8
- 238000010586 diagram Methods 0.000 description 6
- 230000002411 adverse Effects 0.000 description 5
- 238000004519 manufacturing process Methods 0.000 description 5
- 238000002161 passivation Methods 0.000 description 5
- 230000003287 optical effect Effects 0.000 description 4
- XLOMVQKBTHCTTD-UHFFFAOYSA-N Zinc monoxide Chemical compound [Zn]=O XLOMVQKBTHCTTD-UHFFFAOYSA-N 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 229910044991 metal oxide Inorganic materials 0.000 description 2
- 150000004706 metal oxides Chemical class 0.000 description 2
- 239000005416 organic matter Substances 0.000 description 2
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 2
- GYHNNYVSQQEPJS-UHFFFAOYSA-N Gallium Chemical compound [Ga] GYHNNYVSQQEPJS-UHFFFAOYSA-N 0.000 description 1
- 230000015572 biosynthetic process Effects 0.000 description 1
- 238000005530 etching Methods 0.000 description 1
- 229910052733 gallium Inorganic materials 0.000 description 1
- 150000002431 hydrogen Chemical class 0.000 description 1
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- AMGQUBHHOARCQH-UHFFFAOYSA-N indium;oxotin Chemical compound [In].[Sn]=O AMGQUBHHOARCQH-UHFFFAOYSA-N 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
- 239000012780 transparent material Substances 0.000 description 1
- 239000011787 zinc oxide Substances 0.000 description 1
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
-
- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1443—Devices controlled by radiation with at least one potential jump or surface barrier
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1259—Multistep manufacturing methods
- H01L27/1288—Multistep manufacturing methods employing particular masking sequences or specially adapted masks, e.g. half-tone mask
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/1446—Devices controlled by radiation in a repetitive configuration
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14616—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor characterised by the channel of the transistor, e.g. channel having a doping gradient
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
- H01L27/14689—MOS based technologies
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
- H10K59/1213—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements the pixel elements being TFTs
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/13—Active-matrix OLED [AMOLED] displays comprising photosensors that control luminance
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
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- H—ELECTRICITY
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- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/60—OLEDs integrated with inorganic light-sensitive elements, e.g. with inorganic solar cells or inorganic photodiodes
- H10K59/65—OLEDs integrated with inorganic image sensors
Definitions
- the present disclosure relates to the field of display technologies, and in particular, to a photosensitive member, a method for fabricating the same, an array substrate, and a display device.
- OLEDs organic light emitting diodes
- Vth threshold voltage
- TFT Thin Film Transistor
- Embodiments of the present disclosure provide a photosensitive member, a method for fabricating the same, an array substrate, and a display device, which can prevent the hydrogen element in the photosensitive layer from adversely affecting the electrical performance of the thin film transistor.
- a photosensitive assembly in a first aspect, includes a substrate, a thin film transistor and a photosensitive unit on a side of the substrate, and an insulating layer between the active layer of the thin film transistor and the photosensitive unit; wherein the photosensitive unit includes a first electrode, a photosensitive layer, and a second electrode disposed on the substrate in sequence; a drain of the thin film transistor is electrically connected to the first electrode; an active layer of the thin film transistor is located in the insulating layer A side away from the substrate, the photosensitive unit is located on a side of the insulating layer adjacent to the substrate.
- the photosensitive component includes a first electrode layer and a second electrode layer;
- the first electrode layer includes a gate electrode for forming the thin film transistor, and a first electrode for forming the photosensitive cell;
- the second electrode layer includes a conductive lead, and a source and a drain for forming the thin film transistor, the conductive lead is electrically connected to the second electrode;
- the insulating layer is a gate insulating of the thin film transistor Floor.
- the thin film transistor further includes an etch stop layer covering the insulating layer.
- the pattern of the photosensitive layer and the pattern of the second electrode are the same.
- a projection of at least one of the gate and the active layer on the substrate and a projection of the photosensitive cell on the substrate do not overlap each other.
- an array substrate in a second aspect, includes the photosensitive member of the first aspect.
- a display device in a third aspect, includes the array substrate of the second aspect.
- a method of preparing a photosensitive member includes forming a thin film transistor, a photosensitive unit, and an insulating layer between an active layer of the thin film transistor and the photosensitive unit on one side of a substrate; wherein the photosensitive unit includes the photo unit sequentially disposed a first electrode on the substrate, a photosensitive layer, and a second electrode; a drain of the thin film transistor is electrically connected to the first electrode; an active layer of the thin film transistor is located away from the substrate On one side, the photosensitive unit is located on a side of the insulating layer adjacent to the substrate.
- a thin film transistor, a photosensitive unit, and an insulating layer between the active layer of the thin film transistor and the photosensitive unit on one side of the substrate comprising: forming a first electrode layer on the substrate
- the first electrode layer includes a gate of the thin film transistor and a first electrode of the photosensitive unit; a photosensitive layer and a second electrode are formed on a side of the first electrode away from the substrate; a gate insulating layer, the active layer are sequentially formed on the substrate having the second electrode; and a second electrode layer is formed on the substrate on which the active layer is formed, the second electrode
- the layer includes a conductive lead, and a source and a drain of the thin film transistor, the conductive lead being electrically connected to the second electrode.
- the method further includes: forming an etch barrier covering the insulating layer.
- the photosensitive layer and the second electrode are formed by the same patterning process.
- a projection of at least one of the gate and the active layer on the substrate and a projection of the photosensitive cell on the substrate do not overlap each other.
- FIG. 1 is a schematic structural view of an array substrate provided by the related art
- FIG. 2a is a schematic structural view of a photosensitive assembly according to an embodiment of the present disclosure
- FIG. 2b is a schematic structural diagram of a photosensitive assembly according to another embodiment of the present disclosure.
- FIG. 3 is a schematic structural diagram of an array substrate according to an embodiment of the present disclosure.
- FIG. 4 is a schematic flow chart 1 of preparing a photosensitive component according to an embodiment of the present disclosure
- FIG. 5 is a second schematic diagram of a process for preparing a photosensitive component according to an embodiment of the present disclosure
- FIG. 6 is a schematic diagram 1 of a process for preparing a photosensitive component according to an embodiment of the present disclosure
- FIG. 7 is a schematic diagram 2 of a process for preparing a photosensitive component according to an embodiment of the present disclosure
- FIG. 8 is a schematic diagram 3 of a process for preparing a photosensitive component according to an embodiment of the present disclosure.
- a thin film transistor 11 is formed first, and then a lower electrode 121 of an optical sensor, a photosensitive sensing layer 122 and an upper electrode 123, a passivation layer (PVX), and passivation are sequentially formed.
- a conductive via 124 electrically connected to the upper electrode 123 of the optical sensor by a via on the layer.
- the material of the photosensitive sensing layer 122 usually contains a material containing a large amount of hydrogen (H) elements such as a-Si, and the photosensitive sensing layer 122 is formed for a long time, the process of forming the photosensitive sensing layer 122 is performed.
- the hydrogen element easily diffuses into the channel region (the region between the source and the drain in the active layer is a channel region when the thin film transistor operates), thereby adversely affecting the electrical performance of the thin film transistor 11, for example, Since the hydrogen element in the channel region is excessive, the thin film transistor 11 is uncontrolled and is always in an open state.
- the photosensitive member includes a substrate 20, a thin film transistor 21 and a photosensitive unit 22 on one side of the substrate 20, and an active layer 213 and a photosensitive unit 22 of the thin film transistor 21.
- the active layer 213 of the thin film transistor 21 is located on a side of the insulating layer (the gate insulating layer 212 in FIG. 2a, or the insulating layer 217 in FIG. 2b) away from the substrate 20, and the photosensitive unit 22 is located
- the insulating layer is adjacent to one side of the substrate 20.
- a projection of at least one of the gate electrode 211 and the active layer 213 on the substrate 20 and the photosensitive unit 22 on the substrate 20 do not overlap each other.
- the projection of the thin film transistor 21 and the photosensitive cell 22 on the substrate 20 No overlap.
- the materials of the respective structures in the thin film transistor 21 and the photosensitive unit 22 are not limited as long as the respective structures in the thin film transistor 21 and the photosensitive unit 22 can achieve respective functions.
- the gate electrode 211 may include a MoNb film, a Cu film, a MoNb film, or a Mo film, an AlNd film, or a Mo film which are sequentially disposed on the substrate 20, or sequentially.
- the gate insulating layer 212 includes at least one of SiN x and SiO x .
- the active layer 213 may include amorphous silicon, polycrystalline silicon, metal oxide, organic matter, or the like.
- the material of the active layer 213 may be indium gallium zinc oxide (IGZO).
- the active layer 213 may also be annealed to reduce defects of the thin film transistor 21.
- the source 215 and the drain 216 may be a MoNb film, a Cu film, a MoNb film, or a Mo film, an AlNd film, or a Mo film, which are sequentially disposed on the substrate 20.
- the first electrode 221 and/or the second electrode 223 are transparent conductive materials such as Indium Tin Oxide (ITO), so that light is emitted from the first electrode 221 and/or the second electrode 223.
- the photosensitive layer 222 is a photosensitive material containing a-Si, and the photosensitive layer 222 may be annealed during the formation of the photosensitive layer 222.
- the second electrode 223 is a transparent conductive material
- the first The electrode 221 is a transparent conductive material
- the structure of the thin film transistor 21 is not limited, and it may be a bottom gate type thin film transistor as shown in FIG. 2a or a top gate type thin film transistor as shown in FIG. 2b.
- the thin film transistor 21 is of a bottom gate type, and the positional relationship of the thin film transistor 21 and the photosensitive unit 22 may include the following cases.
- the photosensitive unit 22 including the first electrode 221, the photosensitive layer 222, and the second electrode 223 is disposed on the substrate 20; thereafter, the thin film transistor 21 is disposed on the substrate 20.
- the thin film transistor 21 includes a gate electrode 211, a gate insulating layer 212, an active layer 213, a source electrode 215, and a drain electrode 216 which are sequentially disposed on the substrate 20.
- the gate insulating layer 212 is the insulating layer.
- the first electrode 221 of the photosensitive unit 22 and the photosensitive layer 222 are disposed on the substrate 20; thereafter, the gate electrode 211 of the thin film transistor 21 and the photosensitive unit 22 are disposed on the substrate 20 by the same patterning process.
- the second electrode 223; finally, the gate insulating layer 212 of the thin film transistor 21, the active layer 213, and the source and drain electrodes 215 and 216 are sequentially disposed on the side of the gate electrode 211 away from the substrate 20.
- the gate insulating layer 212 is the insulating layer.
- the preparation process of the photosensitive member can be simplified.
- the gate electrode 211 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are disposed on the substrate 20; thereafter, the photosensitive layer 222 of the photosensitive cell 22 is disposed on the side of the first electrode 221 away from the substrate 20. And the second electrode 223; finally, the gate insulating layer 212 of the thin film transistor 21, the active layer 213, and the source 215 and the drain 216 are sequentially disposed on the side of the gate electrode 211 away from the substrate 20.
- the gate insulating layer 212 is the insulating layer.
- the preparation process of the photosensitive member can be simplified.
- the positional relationship between the thin film transistor 21 and the photosensitive unit 22 may be other conditions, which is not limited herein, as long as the active layer 213 of the thin film transistor 21 is located away from the substrate 20 .
- the photosensitive unit 22 may be located on the side of the insulating layer close to the substrate 20.
- the thin film transistor 21 is of a top gate type, and the positional relationship of the thin film transistor 21 and the photosensitive unit 22 may include the following cases.
- the photosensitive unit 22 including the first electrode 221, the photosensitive layer 222, and the second electrode 223 is disposed on the substrate 20; thereafter, the thin film transistor 21 is disposed on the substrate 20.
- the thin film transistor 21 includes a source 215 and a drain 216, an active layer 213, a gate insulating layer 212, and a gate 211 which are sequentially disposed on the substrate 20.
- the first electrode 221 of the photosensitive unit 22 and the photosensitive layer 222 are disposed on the substrate 20; thereafter, the source 215 and the drain 216 of the thin film transistor 21 and the first of the photosensitive unit 22 are disposed on the substrate 20.
- the second electrode 223; finally, the active layer 213, the gate insulating layer 212, and the gate electrode 211 of the thin film transistor 21 are sequentially disposed on the side of the source electrode 215 and the drain electrode 216 away from the substrate 20.
- the source 215 and the drain 216 of the thin film transistor 21, and the second electrode 223 of the photosensitive unit 22 are formed by the same patterning process, which simplifies the preparation process of the photosensitive member.
- the source 215 and the drain 216 of the thin film transistor 21 and the first electrode 221 of the photosensitive unit 22 are disposed on the substrate 20; thereafter, the photosensitive unit 22 is disposed on the side of the first electrode 221 away from the substrate 20.
- the photosensitive layer 222 and the second electrode 223; finally, the active layer 213, the gate insulating layer 212, and the gate electrode 211 of the thin film transistor 21 are disposed in this order from the source 215 and the drain 216 away from the substrate 20.
- the source electrode 215 and the drain electrode 216 of the thin film transistor 21, and the first electrode 221 of the photosensitive cell 22 are formed by the same patterning process, which simplifies the preparation process of the photosensitive member.
- the positional relationship between the thin film transistor 21 and the photosensitive cell 22 may be other conditions, which is not limited herein, as long as the active layer 213 of the thin film transistor 21 is located away from the substrate 20 .
- the photosensitive unit 22 may be located on the side of the insulating layer close to the substrate 20.
- the insulating layer functions to separate the active layer 213 of the thin film transistor 21 and the photosensitive cell 22 in the thickness direction of the substrate 20, thereby causing the active layer of the thin film transistor 21 213 is located on a side of the insulating layer away from the substrate 20, and the photosensitive unit 22 is located on a side of the insulating layer close to the substrate 20.
- a gate insulating layer 212 can be used as the insulating layer to separate the active layer 213 of the thin film transistor 21 and the photosensitive cell 22.
- the insulating layer 217 separates the active layer 213 of the thin film transistor 21 and the photosensitive cell 22.
- Embodiments of the present disclosure provide a photosensitive assembly in which an active layer 213 of a thin film transistor 21 is located on a side of the insulating layer away from the substrate 20, and a photosensitive unit 22 is located on a side of the insulating layer adjacent to the substrate 20.
- the photosensitive unit 22 may be formed on the substrate 20, and then the active layer 213 of the thin film transistor 21 is formed.
- the photosensitive layer 222 of the photosensitive unit 22 contains a material having a large amount of hydrogen-containing elements such as a-Si, hydrogen does not enter the active layer 213. Therefore, the hydrogen element does not enter the channel region of the thin film transistor 21 at the time of operation, thereby preventing the hydrogen element in the photosensitive layer 222 from adversely affecting the electrical performance of the thin film transistor 21.
- the photosensitive component includes a first electrode layer and a second electrode layer; the first electrode layer includes a gate 211 for forming the thin film transistor 21, and a portion for constituting the photosensitive unit 22.
- the gate electrode 211 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are formed by the same patterning process, and the source electrode 215 and the drain electrode 216 of the thin film transistor 21 and the conductive lead 23 are formed by the same patterning process.
- the drain electrode 216 is electrically connected to the first electrode 221 through a via hole on the gate insulating layer 212; the conductive lead 23 is electrically connected to the second electrode 223 through another via hole on the gate insulating layer 212.
- the optical signal is converted into an electrical signal, and the electrical signal is transmitted to the external circuit through the conductive lead 23 electrically connected to the second electrode 223.
- the thin film transistor 21 is a bottom gate type thin film transistor.
- the thin film transistor 21 is a top gate type thin film transistor.
- an insulating layer 217 is located between the active layer of the thin film transistor and the photosensitive unit, such that the active layer 212 of the thin film transistor 21 is located at the insulating layer 217 away from the On one side of the substrate 20, the photosensitive unit 22 is located on a side of the insulating layer 217 close to the substrate 20.
- the gate 211 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are formed by the same patterning process, and the source 215 and the drain 216 of the thin film transistor 21 and the conductive lead 23 are formed by the same patterning process. . Thereby, the preparation process of the photosensitive member can be simplified.
- the thin film transistor 21 further includes an etch barrier layer 214 covering the insulating layer (ie, the gate insulating layer 212).
- the drain electrode 216 is electrically connected to the first electrode 221 through the via barrier 214 and the via hole on the gate insulating layer 212; the conductive lead 23 passes through the etching barrier layer 214 and the other on the gate insulating layer 212.
- the via is electrically connected to the second electrode 223.
- a via hole for connecting the drain electrode 216 and the first electrode 221, a via hole connecting the conductive lead 23 and the second electrode 223, and the via hole are formed by the same patterning process, And a via connecting the source 215 and the drain 216 with the active layer 213.
- via holes connecting the source electrode 215 and the drain electrode 216 and the active layer 213, and via holes connecting the conductive lead 23 and the second electrode 223 are respectively formed by a plurality of patterning processes.
- the embodiment of the present disclosure can simplify the preparation process of the photosensitive member compared to the related art.
- the pattern of the photosensitive layer 222 is the same as the pattern of the second electrode 223.
- the photosensitive layer 222 and the second electrode 223 can be prepared by using the same mask, which is advantageous in cost saving.
- An embodiment of the present disclosure provides an array substrate comprising the photosensitive member of any of the foregoing embodiments.
- the array substrate may further include a flat layer 24 located on a side of the source 215 and the drain 216 away from the substrate 20.
- a flat layer 24 located on a side of the source 215 and the drain 216 away from the substrate 20.
- the material of the passivation layer 24 may be, for example, SiN x or SiO x . Since the hydrogen element is contained in the SiN x and the passivation layer 24 is formed behind the active layer 213, the material of the passivation layer 24 of the embodiment of the present disclosure is optionally SiO x .
- the array substrate may be an array substrate for forming an OLED display panel.
- the array substrate includes a plurality of sub-pixel regions, each of the sub-pixel regions includes a light emitting device (eg, an OLED light emitting device), and light emitted by the light emitting device may be irradiated onto the photosensitive unit 22 of the photosensitive member.
- the photosensitive unit 22 is disposed on the light exiting side of the light emitting device, and the material of the photosensitive unit 22 adjacent to the electrode of the light emitting device is a transparent conductive material.
- the light emitting device emits light toward the side closer to the substrate 20, and the photosensitive unit 22 is disposed on the side of the light emitting device near the substrate 20, and the material of the second electrode 223 of the photosensitive unit 22 is a transparent conductive material.
- the projection of the thin film transistor 21 on the substrate 20 may be located in a region between adjacent sub-pixel regions.
- the position thereof may be the following.
- the first electrode 221, the photosensitive sensing layer 222, and the second electrode 223 are all transparent materials, and the projection of the photosensitive unit 22 on the substrate 20 completely overlaps or partially overlaps the projection of the sub-pixel region on the substrate 20. overlapping.
- the material of the first electrode 221 or the second electrode 223 is a light-shielding material
- the projection of the photosensitive unit 22 on the substrate 20 overlaps with the projection of the sub-pixel region on the substrate 20, and when the array
- the photosensitive unit 22 should be as small as possible under the premise that it can work normally.
- An embodiment of the present disclosure provides an array substrate including the photosensitive member.
- the active layer 213 of the thin film transistor 21 is located on a side of the insulating layer away from the substrate 20, and the photosensitive unit 22 is located adjacent to the substrate 20 of the insulating layer. One side.
- the photosensitive unit 22 may be formed on the substrate 20, and then the active layer 213 of the thin film transistor 21 is formed.
- the photosensitive layer 222 of the photosensitive unit 22 contains a material having a large amount of hydrogen-containing elements such as a-Si, hydrogen does not enter the active layer 213. Therefore, the hydrogen element does not enter the channel region of the thin film transistor 21 at the time of operation, thereby preventing the hydrogen element in the photosensitive layer 222 from adversely affecting the electrical performance of the thin film transistor 21.
- Embodiments of the present disclosure provide a display device including the array substrate described in the foregoing embodiments.
- the display device may be a display panel or a display including a display panel.
- the display device may be an OLED display panel.
- the embodiment of the present disclosure provides a display device having the same technical effects as the foregoing array substrate, and details are not described herein again.
- An embodiment of the present disclosure provides a method of fabricating a photosensitive member, as shown in FIG. 2a and FIG. 2b, comprising: forming a thin film transistor on a substrate side, a photosensitive unit, and an active layer located on the thin film transistor and the photosensitive layer An insulating layer between the cells; wherein the photosensitive cell includes a first electrode, a photosensitive layer, and a second electrode sequentially disposed on the substrate; a drain of the thin film transistor is electrically connected to the first electrode
- the active layer of the thin film transistor is located on a side of the insulating layer away from the substrate, and the photosensitive unit is located on a side of the insulating layer adjacent to the substrate.
- the step of forming a thin film transistor, a photosensitive unit, and an insulating layer between the active layer of the thin film transistor and the photosensitive unit on one side of the substrate may include the following substeps:
- a photosensitive unit 22 and an insulating layer covering the photosensitive unit 22 are formed on the substrate 20.
- step S11 and step S12 other sub-steps may be included.
- the thin film transistors 21 may be of a bottom gate type or a top gate type, and the respective structures in the thin film transistors 21 and the respective structures in the photosensitive cells 22 are also prepared in the same order. .
- the thin film transistor 21 is of a bottom gate type, and the order of preparation of the thin film transistor 21 and the photosensitive unit 22 may include the following cases.
- the first electrode 221, the photosensitive layer 222, and the second electrode 223 are sequentially formed on the substrate 20; thereafter, the thin film transistor 21 is formed on the substrate 20.
- the forming the thin film transistor 21 includes sequentially forming a gate electrode 211, a gate insulating layer 212, an active layer 213, a source electrode 215, and a drain electrode 216 on the substrate 20.
- the first electrode 221 of the photosensitive unit 22 and the photosensitive layer 222 are formed on the substrate 20; thereafter, the gate electrode 211 of the thin film transistor 21 and the photosensitive unit 22 are formed on the substrate 20 by the same patterning process.
- the preparation process of the photosensitive member can be simplified.
- the gate electrode 211 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are formed on the substrate 20 by the same patterning process; thereafter, the first electrode 221 is formed on the side away from the substrate 20 The photosensitive layer 222 and the second electrode 223 of the unit 22; finally, the gate insulating layer 212 of the thin film transistor 21, the active layer 213, and the source and drain electrodes 215 and 216 are sequentially formed on the side of the gate electrode 211 away from the substrate 20.
- the preparation process of the photosensitive member can be simplified.
- the order of preparation of the thin film transistor 21 and the photosensitive unit 22 may be other cases, which is not limited herein, as long as the active layer 213 of the thin film transistor 21 is formed before the photosensitive unit 22. can.
- the thin film transistor 21 is of a top gate type, and the order of preparation of the thin film transistor 21 and the photosensitive unit 22 may include the following cases.
- the first electrode 221, the photosensitive layer 222, and the second electrode 223 are sequentially formed on the substrate 20; thereafter, the thin film transistor 21 is formed on the substrate 20.
- the forming the thin film transistor 21 includes sequentially forming a source 215 and a drain 216, an active layer 213, a gate insulating layer 212, and a gate 211 on the substrate 20.
- the first electrode 221 of the photosensitive unit 22 and the photosensitive layer 222 are formed on the substrate 20; then, the source 215 and the drain 216 of the thin film transistor 21 are formed on the substrate 20 by the same patterning process, And the second electrode 223 of the photosensitive unit 22; finally, the active layer 213, the gate insulating layer 212, and the gate 211 of the thin film transistor 21 are sequentially formed on the side of the source 215 and the drain 216 away from the substrate 20.
- the preparation process of the photosensitive member can be simplified.
- the source electrode 215 and the drain electrode 216 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are disposed on the substrate 20 through the same patterning process; thereafter, the first electrode 221 is away from the substrate 20
- the photosensitive layer 222 and the second electrode 223 of the photosensitive cell 22 are formed on one side; finally, the active layer 213, the gate insulating layer 212, and the gate of the thin film transistor 21 are sequentially formed on the side of the source 215 and the drain 216 away from the substrate 20 Extreme 211.
- the preparation process of the photosensitive member can be simplified.
- the order of preparation of the thin film transistor 21 and the photosensitive unit 22 may be other cases, which is not limited herein, as long as the active layer 213 of the thin film transistor 21 is formed before the photosensitive unit 22. can.
- a projection of at least one of the gate electrode 211 and the active layer 213 on the substrate 20 and the photosensitive unit 22 on the substrate 20 do not overlap each other.
- the projection of the thin film transistor 21 and the photosensitive cell 22 on the substrate 20 No overlap.
- the materials of the respective structures in the thin film transistor 21 and the photosensitive unit 22 are not limited as long as the respective structures in the thin film transistor 21 and the photosensitive unit 22 can achieve respective functions.
- the gate electrode 211 may include a MoNb film, a Cu film, a MoNb film, or a Mo film, an AlNd film, or a Mo film which are sequentially formed on the substrate 20, or sequentially formed on the substrate 20.
- the gate insulating layer 212 includes at least one of SiN x and SiO x .
- the active layer 213 may include amorphous silicon, polycrystalline silicon, metal oxide, organic matter, or the like.
- the material of the active layer 213 may be IGZO.
- the active layer 213 may also be annealed to reduce defects of the thin film transistor 21.
- the source 215 and the drain 216 may include a MoNb film, a Cu film, a MoNb film, or a Mo film, an AlNd film, or a Mo film which are sequentially formed on the substrate 20, which are sequentially formed on the substrate 20.
- the first electrode 221 and/or the second electrode 223 are transparent conductive materials such as ITO, so that light is emitted from the first electrode 221 and/or the second electrode 223 onto the photosensitive layer 222; the photosensitive layer 222 is included
- the photosensitive material of a-Si may be annealed in the process of forming the photosensitive layer 222.
- the second electrode 223 is a transparent conductive material
- the first The electrode 221 is a transparent conductive material
- the embodiment of the present disclosure provides a method for preparing a photosensitive member, which has the same technical effects as the aforementioned photosensitive member, and details are not described herein again.
- a thin film transistor, a photosensitive cell, and an active layer located in the thin film transistor and the The step of insulating the layers between the photosensitive cells may include the following sub-steps.
- the first electrode layer includes a gate electrode 211 of the thin film transistor 21 and a first electrode 221 of the photosensitive cell 22.
- the gate electrode 211 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are formed by the same patterning process.
- a photosensitive layer 222 and a second electrode 223 are formed on a side of the first electrode 221 away from the substrate 20.
- the projection of the photosensitive layer 222 and the second electrode 223 on the substrate 20 has an overlapping area with the projection of the first electrode 221 on the substrate 20, and the photosensitive layer 222 and the second electrode 223 are on the substrate 20.
- the projection does not overlap with the projection of the thin film transistor 21 on the substrate 20.
- a gate insulating layer 212 and an active layer 213 are sequentially formed on the substrate 20 on which the second electrode 223 is formed.
- the gate insulating layer 212 is a continuous layer and completely covers the gate electrode 211 and the photosensitive unit 22.
- a second electrode layer is formed on the substrate 20 on which the active layer 213 is formed.
- the second electrode layer includes a conductive lead 23, and a source 215 and a drain 216 of the thin film transistor 21, and a conductive lead 23 is electrically connected to the second electrode 223.
- the source 215 and the drain 216 of the thin film transistor 21 are formed by the same patterning process as the conductive leads 23.
- a via hole connecting the drain electrode 216 and the first electrode 221 and a via hole connecting the conductive lead 23 and the second electrode 223 are formed on the gate insulating layer 212 by the same patterning process.
- the optical signal is converted into an electrical signal, and the electrical signal is transmitted to the external circuit through the conductive lead 23 electrically connected to the second electrode 223.
- the gate 211 of the thin film transistor 21 and the first electrode 221 of the photosensitive cell 22 are formed by the same patterning process, and the source 215 and the drain 216 of the thin film transistor 21 and the conductive lead 23 are formed by the same patterning process.
- the preparation process of the photosensitive member can be simplified.
- the method further comprises: forming an etch stop layer 214 between the active layer 213 and the second electrode layer.
- vias connecting the source 215 and the drain 216 to the active layer 213 are formed on the gate insulating layer 212 and the etch barrier layer 214 by the same patterning process. a via hole connecting the drain electrode 216 and the first electrode 221, and a via hole connecting the conductive lead 23 and the second electrode 223.
- a via hole for connecting the drain electrode 216 and the first electrode 221, a via hole connecting the conductive lead 23 and the second electrode 223, and a via hole are formed by one patterning process, and The vias of the source 215 and the drain 216 are connected to the active layer 213, and the source 215 and the drain 216 are respectively connected to the active layer 213 by different patterning processes in the related art (as shown in FIG. 1).
- the via hole, and the via connecting the conductive lead 23 and the second electrode 223, the embodiment of the present disclosure can simplify the preparation process of the photosensitive member.
- the photosensitive layer 222 and the second electrode 223 are formed by the same patterning process.
- the photosensitive layer 222 and the second electrode 223 are formed by the same patterning process, which simplifies the preparation process of the photosensitive member.
- An embodiment of the present disclosure provides a photosensitive member, a method for fabricating the same, an array substrate, and a display device.
- the active layer of the thin film transistor is located on a side of the insulating layer away from the substrate, and the photosensitive unit is located near the substrate. One side.
- a photosensitive unit may be formed on the substrate, and then an active layer of the thin film transistor is formed.
- the photosensitive layer of the photosensitive unit contains a material having a large amount of hydrogen-containing elements such as a-Si, hydrogen does not enter the active layer. Therefore, the hydrogen element does not enter the channel region of the thin film transistor at the time of operation, thereby preventing the hydrogen element in the photosensitive layer from adversely affecting the electrical performance of the thin film transistor.
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Abstract
Description
Claims (12)
- 一种感光组件,包括:衬底、位于所述衬底一侧的薄膜晶体管和感光单元、以及位于所述薄膜晶体管的有源层和所述感光单元之间的绝缘层;其中,所述感光单元包括依次设置在所述衬底上的第一电极、光敏层、以及第二电极;所述薄膜晶体管的漏极与所述第一电极电连接;所述薄膜晶体管的有源层位于所述绝缘层远离所述衬底的一侧,所述感光单元位于所述绝缘层靠近所述衬底的一侧。
- 根据权利要求1所述的感光组件,还包括:第一电极层、第二电极层;其中,所述第一电极层包括用于构成所述薄膜晶体管的栅极、及用于构成所述感光单元的第一电极;所述第二电极层包括导电引线、及用于构成所述薄膜晶体管的源极和漏极,所述导电引线与所述第二电极电连接;所述绝缘层为所述薄膜晶体管的栅绝缘层。
- 根据权利要求2所述的感光组件,还包括:覆盖所述绝缘层的刻蚀阻挡层。
- 根据权利要求1-3任一项所述的感光组件,其中,所述光敏层的图案和所述第二电极的图案相同。
- 根据权利要求1-3任一项所述的感光组件,其中,所述栅极和所述有源层中至少一者在所述衬底上的投影和所述感光单元在所述衬底上的投影互不重叠。
- 一种阵列基板,包括权利要求1-5任一项所述的感光组件。
- 一种显示装置,包括权利要求6所述的阵列基板。
- 一种感光组件的制备方法,包括:在衬底一侧形成薄膜晶体管、感光单元、以及位于所述薄膜晶体管的有源层和所述感光单元之间的绝缘层;其中,所述感光单元包括依次设置在所述衬底上的第一电极、光敏层、以及第二电极;所述薄膜晶体管的漏极与所述第一电极电连接;所述薄膜晶体管的有源层位于所述绝缘层远离所述衬底的一侧,所述感光单元位于所述绝缘层靠近所述衬底的一侧。
- 根据权利要求8所述的方法,其中,在衬底一侧形成薄膜晶体管、感光单元、以及位于所述薄膜晶体管的有源层和所述感光单元之间的绝缘层,包括:在所述衬底上形成第一电极层,所述第一电极层包括所述薄膜晶体管的栅极、及所述感光单元的第一电极;在所述第一电极远离所述衬底的一侧形成光敏层和第二电极;在形成有所述第二电极的所述衬底上依次形成栅绝缘层、所述有源层;以及在形成有所述有源层的所述衬底上形成第二电极层,所述第二电极层包括导电引线、及所述薄膜晶体管的源极和漏极,所述导电引线与所述第二电极电连接。
- 根据权利要求9所述的方法,其中,在形成有所述有源层的所述衬底上形成第二电极层之前,所述方法还包括:形成覆盖所述绝缘层的刻蚀阻挡层。
- 根据权利要求8-10任一项所述的方法,其中,所述光敏层和所述第二电极通过同一次构图工艺形成。
- 根据权利要求8-10任一项所述的方法,其中,所述栅极和所述有源层中至少一者在所述衬底上的投影和所述感光单元在所述衬底上的投影互不重叠。
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