WO2019114101A1 - 阵列基板 - Google Patents

阵列基板 Download PDF

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Publication number
WO2019114101A1
WO2019114101A1 PCT/CN2018/073688 CN2018073688W WO2019114101A1 WO 2019114101 A1 WO2019114101 A1 WO 2019114101A1 CN 2018073688 W CN2018073688 W CN 2018073688W WO 2019114101 A1 WO2019114101 A1 WO 2019114101A1
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Prior art keywords
inorganic layer
metal trace
array substrate
boring
area
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PCT/CN2018/073688
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English (en)
French (fr)
Inventor
李雪
李鹏
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武汉华星光电半导体显示技术有限公司
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Application filed by 武汉华星光电半导体显示技术有限公司 filed Critical 武汉华星光电半导体显示技术有限公司
Priority to US15/751,012 priority Critical patent/US10818693B2/en
Publication of WO2019114101A1 publication Critical patent/WO2019114101A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/1218—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition or structure of the substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • G—PHYSICS
    • G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
    • G09F—DISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
    • G09F9/00—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
    • G09F9/30—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements
    • G09F9/301—Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements in which the desired character or characters are formed by combining individual elements flexible foldable or roll-able electronic displays, e.g. thin LCD, OLED
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/4985—Flexible insulating substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49838—Geometry or layout

Definitions

  • the present invention relates to the field of display technologies, and in particular, to an array substrate.
  • OLED Organic Light-Emitting Diode
  • the inventor of the present application found in the long-term research and development that in the current flexible display, the trace of the bending zone generally adopts a straight line of the entire surface of the metal, and the entire inorganic layer and the isolation layer are disposed under the trace, and the stress generated during the bending is generated. Unable to release, it is easy to cause breakage or damage in the bending zone, and the bending performance is low.
  • the invention provides an array substrate to solve the technical problem that the bending of the flexible display in the prior art cannot be released when bending, which is easy to cause breakage or damage and has low bending performance.
  • one technical solution adopted by the present invention is to provide an array substrate including a substrate, an inorganic layer formed on the substrate, a metal trace formed on the inorganic layer, and the inorganic layer formed on the inorganic layer An organic layer on the layer and covering the metal trace;
  • the metal trace and/or the inorganic layer comprises a bending performance reinforcing structure
  • the bending performance reinforcing structure of the metal trace is that at least part of the metal trace is a hollow structure
  • the array substrate includes a display area and a bending area, wherein the inorganic layer, the metal trace and the organic layer are disposed in the bending area, the bending area is located at a bottom end of the array substrate and/or the display On both sides of the area.
  • an array substrate including a substrate, an inorganic layer formed on the substrate, a metal trace formed on the inorganic layer, and formed in the An organic layer on the inorganic layer and covering the metal trace;
  • the metal trace and/or the inorganic layer comprises a bending performance reinforcing structure.
  • the invention strengthens the structure by providing bending performance on the metal trace and/or the inorganic layer, so that when the flexible display is bent, the stress in the bending zone is released, the breakage or damage of the bending zone is avoided, and the bendability is improved.
  • FIG. 1 is a cross-sectional structural view showing an embodiment of an array substrate of the present invention
  • FIG. 2 is a top plan view showing an embodiment of an array substrate of the present invention
  • FIG. 3 is a partially enlarged schematic view showing a metal trace of an embodiment of the array substrate of the present invention.
  • FIG. 4 is a schematic structural view of an embodiment of an array substrate of the present invention.
  • FIG. 5 is a cross-sectional structural view showing another embodiment of the array substrate of the present invention.
  • FIG. 6 is a cross-sectional structural view showing another embodiment of the array substrate of the present invention.
  • FIG. 7 is a top plan view showing another embodiment of the array substrate of the present invention.
  • FIG. 8 is a partially enlarged schematic view showing a metal trace and an organic rod of another embodiment of the array substrate of the present invention.
  • FIG. 9 is a cross-sectional structural view showing still another embodiment of the array substrate of the present invention.
  • FIG. 10 is a cross-sectional structural view showing still another embodiment of the array substrate of the present invention.
  • FIG. 11 is a top plan view showing still another embodiment of the array substrate of the present invention.
  • an embodiment of the array substrate of the present invention comprises a substrate 101, an inorganic layer 102 formed on the substrate 101, a metal trace 103 formed on the inorganic layer 102, formed on the inorganic layer 102, and covered with a metal.
  • the inorganic layer 102 includes a first inorganic layer 1022 and a second inorganic layer 1023 disposed on the first inorganic layer 1022.
  • the metal traces 103 are disposed on the second inorganic layer 1023.
  • the bending performance reinforcing structure of the metal trace 103 is that at least part of the metal trace 103 is a hollow structure, and the hollow structure includes a plurality of through-hole structures 1031 disposed in the metal traces 103 and a plurality of gaps disposed at edges of the metal traces
  • the structure 1032 wherein the through-hole structure 1031 is a circular through-hole, the diameter d 1 is 3-5 ⁇ m (micrometer), for example, 3 ⁇ m, 4 ⁇ m or 5 ⁇ m; the notch structure 1032 is a semi-circular notch, diameter (not shown)
  • the -30 ⁇ m, for example 3 ⁇ m, 4 ⁇ m or 5 ⁇ m, the notched structure 1032 is located on the same line as the through-hole structure 1031 or staggered.
  • the inorganic layer 102 may further include an isolation layer 1021.
  • the isolation layer 1021 is disposed on the substrate 101, and the first inorganic layer 1022 is disposed on the isolation layer 1021.
  • the notch structure 1032 is disposed offset from the through-hole structure 1031, and a plurality of notch structures 1032 are disposed on both side edges of the metal trace 103.
  • the distance d 2 between the edge of the through-hole mechanism 1031 and the edge of the metal trace 103 is 1.5-3.75 ⁇ m, for example, 1.5 ⁇ m, 2.5 ⁇ m or 3.75 ⁇ m; the distance d 3 between the two gap structures 1032 disposed oppositely is 3.75. -7.5 ⁇ m, for example 3.75 ⁇ m, 4.5 ⁇ m or 7.5 ⁇ m, wherein d 1 :d 2 :d 3 is 2:1:3 to 4:3:5, for example 2:1:3, 3:2:4 or 4:3:5.
  • the notch structure 1032 may be disposed only on one side edge of the metal trace 103.
  • the through-hole structure 1031 in the middle of the metal traces 103 is periodically arranged, and the notch structures 1032 on both sides of the metal traces 103 are periodically arranged, and the through-hole structures 1031 and the notch structures 1032 are alternately arranged.
  • the through-hole structure 1031 and the notch structure 1032 of the metal traces 103 may also be square, polygonal, or the like.
  • the array substrate includes a substrate 101 including a display area 200 and a bending area.
  • the inorganic layer 102, the metal traces 103 and the organic layer 104 are disposed in the bending area, and the bending area is located on the substrate 101.
  • the bending zone may also be located in other areas of the array substrate that need to be bent.
  • the embodiment of the invention strengthens the structure by setting the bending performance on the metal trace, so that the stress of the metal trace in the bending zone is released when the flexible display is bent, thereby avoiding breakage or damage in the bending zone and improving the bendability. .
  • another embodiment of the array substrate of the present invention includes a substrate 201 , an inorganic layer 202 formed on the substrate 201 , a metal trace 204 formed on the inorganic layer 202 , formed on the inorganic layer 202 and covering the metal The organic layer 205 of the trace 204; wherein the inorganic layer 202 includes a bend-strengthening structure.
  • FIG. 5 is a cross-sectional view of the array substrate of FIG. 7 taken along B1-B2
  • FIG. 6 is a cross-sectional view of the array substrate of FIG. 7 taken along C1-C2.
  • the bending performance reinforcing structure of the inorganic layer 202 is such that the inorganic layer 202 is provided with a plurality of boring areas 203, and the boring area 203 is filled with organic matter, and the boring area 203 includes a plurality of first boring areas 2031 and a plurality of second digs.
  • the hole area 2032, and the plurality of first hole-receiving areas 2031 and the plurality of second hole-cutting areas 2032 are respectively located on the same straight line or staggered.
  • the plurality of first boring areas 2031 and the plurality of second boring areas 2032 are arranged in a matrix. In other embodiments, the plurality of first boring areas 2031 and the plurality of second boring areas 2032 may also be arranged in a cycle, a two cycle or an alternating cycle.
  • the first boring area 2031 is correspondingly disposed in the area of the inorganic layer 202 covered by the metal trace 204, and the second boring area 2032 is embedded in the area of the inorganic layer 202 not covered by the covered metal trace 204, wherein The width of the metal trace 204 corresponding to the first boring area 2031 is smaller than the width of the first boring area 2031.
  • the inorganic layer 202 includes a first inorganic layer 2022 and a second inorganic layer 2023 disposed on the first inorganic layer 2022.
  • the cross section of the first punctured region 2031 on the plane in which the second inorganic layer 2023 and the organic layer 205 are in contact is first.
  • the length of the long axis R1 of the first ellipse is greater than the width d 4 of the metal trace 204; the cross section of the second hole-receiving region 2032 on the plane in which the second inorganic layer 2023 and the organic layer 205 are in contact is a second ellipse
  • the length R3 of the long axis of the second ellipse is smaller than the spacing d 5 of the adjacent metal traces 204.
  • the inorganic layer 202 may further include a spacer layer 2021.
  • the isolation layer 2021 is disposed on the substrate 201.
  • the first inorganic layer 2022 is disposed on the isolation layer 2021, and the cutout region 203 may be disposed on the isolation layer 2021.
  • the distance between geometric centers between two adjacent first elliptical shapes corresponding to the same column of metal traces 204 is 18-24 ⁇ m (micrometers), for example, 18 ⁇ m, 21 ⁇ m, or 24 ⁇ m; corresponding to the same column of organic layers 205
  • the distance between the geometric centers of two adjacent second ellipticals under the region of the uncovered metal trace 204 is 18-24 ⁇ m, such as 18 ⁇ m, 21 ⁇ m or 24 ⁇ m; the first ellipse and the second elliptical along the metal trace 204
  • the length d 6 of the overlapping line of the projection in the direction is greater than 1 ⁇ m, for example 1.5 ⁇ m or 2 ⁇ m.
  • the ratio of the length R1 of the major axis of the first ellipse to the length R2 of the minor axis may be 3:1 to 2:1, for example 3:1, 7:3 or 2:1; the second ellipse
  • the ratio of the length R3 of the major axis to the length R4 of the minor axis may be 4:1 to 5:2, such as 4:1, 3:1 or 5:2.
  • the boring area 203 may be performed after the isolation layer 2021, the first organic layer 2022, and the second organic layer 2023 are completed, and the isolation layer 2021, the first organic layer 2022, and the second organic layer 2023 are arranged according to the boring area.
  • the shape is hollowed out and then filled with organic matter; the separation layer 2021, the first organic layer 2022 and the second organic layer 2023 may also be prepared after the organic material is prepared on the substrate 201.
  • the substrate 201 may be made of PI (Polyimide, polyimide); the first inorganic layer 2022, the second inorganic layer 2023 may be made of silicon nitride (SiNx), silicon oxide (SiOx) or the like; The organic substance may be an organic photoresist or the like.
  • PI Polyimide, polyimide
  • the first inorganic layer 2022, the second inorganic layer 2023 may be made of silicon nitride (SiNx), silicon oxide (SiOx) or the like
  • the organic substance may be an organic photoresist or the like.
  • the bendability of the organic material is superior to the bendability of the spacer layer 2021, the first inorganic layer 2022, and the second inorganic layer 2023.
  • the bending performance reinforcing structure is arranged in the inorganic layer, so that when the flexible display is bent, the inorganic layer stress of the bending region is released, the breakage or damage of the bending region is avoided, and the bendability is improved.
  • still another embodiment of the array substrate of the present invention comprises a substrate 301 , an inorganic layer 302 formed on the substrate 301 , a metal trace 304 formed on the inorganic layer 302 , formed on the inorganic layer 302 and covering the metal The organic layer 305 of the trace 304; wherein the metal trace 304 and the inorganic layer 303 both comprise a bend-strengthening structure.
  • FIG. 9 is a cross-sectional view of the array substrate of FIG. 11 taken along D1-D2
  • FIG. 10 is a cross-sectional view of the array substrate of FIG. 11 taken along E1-E2.
  • the bending performance reinforcing structure of the metal trace 304 of the embodiment of the present invention includes a through-hole structure 3041 and a notch structure 3042;
  • the bending performance reinforcing structure of the inorganic layer 302 is a hole-filling area 303 filled with organic matter, the metal trace 304 and
  • For the structure of the boring area 303 refer to the above array substrate embodiment, and details are not described herein again.
  • the first boring area 3031 is disposed in the area of the inorganic layer 302 corresponding to the notch structure 3042 to form a staggered structure, and the stress of the bending area is more directly and effectively released.
  • the stress generated by the metal trace during the curling process can be released to a certain extent, the damage to the device is reduced, and the organic substance is added to the inorganic layer to further improve the rollability of the product, and at the same time increase the array substrate.
  • the above array substrate can be used for a flexible organic light emitting diode display device.
  • the embodiment of the invention strengthens the structure by setting the bending performance on the metal trace and the inorganic layer, so that when the flexible display is bent, the stress of the metal trace and the inorganic layer in the bending zone is released, thereby avoiding breakage or damage of the bend zone. , improve the bendability.

Abstract

一种阵列基板，包括基板（101）、形成于基板（101）上的无机层（102）、形成于无机层（102）上的金属走线（103）、形成于无机层（102）上且覆盖金属走线（103）的有机层（104）；其中，金属走线（103）和/或无机层（102）包括折弯性能加强结构，这使得柔性显示器在弯折时，弯折区应力得到释放，避免弯折区出现断裂或损伤。

Description

阵列基板 【技术领域】
本发明涉及显示技术领域，特别涉及阵列基板。
【背景技术】
OLED(Organic Light-Emitting Diode，有机发光二极管)显示器因其对比度高、色域广、轻薄、节能等优点，受到人们的广泛关注。而与其他显示器相比，OLED显示器最大的特点在于可以实现柔性显示，而柔性显示会成为未来的主流技术，因此OLED显示器的制备朝着轻薄、可弯折、易携带的方向发展。
本申请的发明人在长期的研发中发现，目前柔性显示器中，弯折区的走线一般采用整面金属直线，走线下方采用整面无机层与隔离层设置，在弯折时产生的应力无法释放，容易造成弯折区出现断裂或损伤，可弯折性能低。
【发明内容】
本发明提供阵列基板，以解决现有技术中柔性显示器弯折区在弯折时应力无法释放，易造成断裂或损伤，可弯折性能低的技术问题。
为解决上述技术问题，本发明采用的一个技术方案是提供一种阵列基板，包括基板、形成于所述基板上的无机层、形成于所述无机层上的金属走线、形成于所述无机层上且覆盖所述金属走线的有机层；
其中，所述金属走线和/或所述无机层包括折弯性能加强结构；
所述金属走线的弯折性能加强结构为所述金属走线的至少部分是镂空结构；
所述阵列基板包括显示区和弯折区，所述无机层、金属走线和有机层设于所述弯折区，所述弯折区位于所述阵列基板的底端和/或所述显示区的两侧。
为解决上述技术问题，本发明采用的另一个技术方案是提供一种阵列基板，包括基板、形成于所述基板上的无机层、形成于所述无机层上的金属走线、形 成于所述无机层上且覆盖所述金属走线的有机层；
其中，所述金属走线和/或所述无机层包括折弯性能加强结构。
本发明通过在金属走线和/或无机层设置折弯性能加强结构，使得柔性显示器在弯折时，弯折区应力得到释放，避免弯折区出现断裂或损伤，提高可弯折性能。
【附图说明】
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域普通技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图，其中：
图1是本发明阵列基板一实施例的剖视结构示意图；
图2是本发明阵列基板一实施例的俯视结构示意图；
图3是本发明阵列基板一实施例的金属走线的局部放大示意图；
图4是本发明阵列基板一实施例的结构示意图；
图5是本发明阵列基板另一实施例的剖视结构示意图；
图6是本发明阵列基板另一实施例的剖视结构示意图；
图7是本发明阵列基板另一实施例的俯视结构示意图；
图8是本发明阵列基板另一实施例的金属走线与有机物棒的局部放大示意图；
图9是本发明阵列基板又一实施例的剖视结构示意图；
图10是本发明阵列基板又一实施例的剖视结构示意图；
图11是本发明阵列基板又一实施例的俯视结构示意图。
【具体实施方式】
下面将结合本发明实施例中的附图，对本发明实施例中的技术方案进行清 楚、完整地描述，显然，所描述的实施例仅仅是本发明一部分实施例，而不是全部的实施例。基于本发明中的实施例，本领域普通技术人员在没有做出创造性劳动前提下所获得的所有其他实施例，均属于本发明保护的范围。
参见图1至图3，本发明阵列基板一实施例包括基板101、形成于基板101上的无机层102、形成于无机层102上的金属走线103、形成于无机层102上且覆盖金属走线103的有机层104；其中，金属走线103包括折弯性能加强结构。
其中，图1为图2中阵列基板沿A1-A2的剖视图。无机层102包括第一无机层1022和设于第一无机层1022上的第二无机层1023，金属走线103设于第二无机层1023上。金属走线103的折弯性能加强结构为金属走线103的至少部分是镂空结构，镂空结构包括设置在金属走线103内的多个透孔结构1031和设置于金属走线边缘的多个缺口结构1032，其中，透孔结构1031为圆形透孔，直径d 1为3-5μm(微米)，例如3μm、4μm或5μm；缺口结构1032为半圆形缺口，直径(图中未示出)为3-5μm，例如3μm、4μm或5μm，缺口结构1032与透孔结构1031位于同一直线上或错开设置。
在本实施例中，无机层102还可以包括隔离层1021，隔离层1021设置于基板101上，第一无机层1022设置于隔离层1021上。
在本实施例中，缺口结构1032与透孔结构1031错开设置，且金属走线103的两侧边缘上都设有多个缺口结构1032。其中，透孔机构1031的边缘与金属走线103边缘的间距d 2为1.5-3.75μm，例如1.5μm、2.5μm或3.75μm；相对设置的两个缺口结构1032之间的距离d 3为3.75-7.5μm，例如3.75μm、4.5μm或7.5μm，其中，d 1：d 2：d 3为2:1:3至4:3:5，例如2:1:3、3:2:4或4:3:5。
在其他实施例中，缺口结构1032可以仅设置于金属走线103的一侧边缘。
可选的，金属走线103中间的透孔结构1031呈周期排列，金属走线103两侧边缘的缺口结构1032呈周期排列，且透孔结构1031与缺口结构1032交替排列。
可选的，金属走线103的透孔结构1031和缺口结构1032也可以为方形、 多边形等其他形状的结构。
参见图1和图4，阵列基板包括基板101，基板101上包括显示区200和弯折区，无机层102、金属走线103和有机层104设于弯折区，弯折区位于基板101的底端300和/或显示区200的两侧区域400。
可选的，弯折区也可以位于阵列基板的其他需要弯折的区域。
本发明实施例通过在金属走线设置折弯性能加强结构，使得柔性显示器在弯折时，弯折区的金属走线的应力得到释放，避免弯折区出现断裂或损伤，提高可弯折性能。
参见图5至图8，本发明阵列基板另一实施例包括基板201、形成于基板201上的无机层202、形成于无机层202上的金属走线204、形成于无机层202上且覆盖金属走线204的有机层205；其中，无机层202包括折弯性能加强结构。
其中，图5为图7中阵列基板沿B1-B2的剖视图，图6为图7中阵列基板沿C1-C2的剖视图。无机层202的折弯性能加强结构为无机层202上设有多个挖孔区域203，挖孔区域203内填充有机物，挖孔区域203包括多个第一挖孔区域2031和多个第二挖孔区域2032，且多个第一挖孔区域2031和多个第二挖孔区域2032分别位于同一直线上或错开设置。
在本实施例中，多个第一挖孔区域2031和多个第二挖孔区域2032分别呈矩阵排列。在其他实施例中，多个第一挖孔区域2031和多个第二挖孔区域2032还可以呈一周期、二周期或交替周期排列。
其中，第一挖孔区域2031对应设置在无机层202内被金属走线204覆盖的区域，第二挖孔区域2032嵌设在无机层202内未被覆盖金属走线204覆盖的区域，其中，第一挖孔区域2031对应的金属走线204的宽度小于第一挖孔区域2031的宽度。
无机层202包括第一无机层2022和设于第一无机层2022上的第二无机层2023，第一挖孔区域2031在第二无机层2023和有机层205接触的平面上的截面为第一椭圆形，第一椭圆形的长轴R1的长度大于金属走线204的宽度d 4；第 二挖孔区域2032在第二无机层2023和有机层205接触的平面上的截面为第二椭圆形，第二椭圆形的长轴的长度R3小于相邻金属走线204的间距d 5。
在本实施例中，无机层202还可以包括隔离层2021，隔离层2021设置于基板201上，第一无机层2022设置于隔离层2021上，挖孔区域203还可以设置于隔离层2021。
可选的，对应同一列金属走线204下相邻两个第一椭圆形之间的几何中心之间的距离为18-24μm(微米)，例如18μm、21μm或24μm；对应同一列有机层205未覆盖金属走线204的区域下相邻两个第二椭圆形的几何中心之间的距离为18-24μm，例如18μm、21μm或24μm；第一椭圆形和第二椭圆形沿金属走线204方向上的投影的交叠线的长度d 6大于1μm，例如1.5μm或2μm。
可选的，第一椭圆形的长轴的长度R1与短轴的长度R2的比例可以为3:1至2:1，例如3:1、7:3或2:1；第二椭圆形的长轴的长度R3与短轴的长度R4的比例可以为4:1至5:2，例如4:1、3:1或5:2。
可选的，挖孔区域203可以在隔离层2021、第一有机层2022和第二有机层2023制备完成之后，在隔离层2021、第一有机层2022和第二有机层2023按照挖孔区域的形状进行挖空，再填入有机物；还可以在基板201上制备有机物之后再制备隔离层2021、第一有机层2022和第二有机层2023。
可选的，基板201可以由PI(Polyimide，聚酰亚胺)制成；第一无机层2022、第二无机层2023可以由氮化硅(SiNx)、氧化硅(SiOx)等材料制成；有机物可以为有机光阻等。
可选的，有机物材料的可弯折性能优于隔离层2021、第一无机层2022和第二无机层2023材料的可弯折性能。
本发明实施例通过在无机层设置折弯性能加强结构，使得柔性显示器在弯折时，弯折区的无机层应力得到释放，避免弯折区出现断裂或损伤，提高可弯折性能。
参见图9至图11，本发明阵列基板又一实施例包括基板301、形成于基板301上的无机层302、形成于无机层302上的金属走线304、形成于无机层302上且覆盖金属走线304的有机层305；其中，金属走线304和无机层303都包括折弯性能加强结构。
其中，图9为图11中阵列基板沿D1-D2的剖视图，图10为图11中阵列基板沿E1-E2的剖视图。
具体的，本发明实施例金属走线304的折弯性能加强结构包括透孔结构3041和缺口结构3042；无机层302的折弯性能加强结构为填充有机物的挖孔区域303，金属走线304和挖孔区域303的结构参见上述阵列基板实施例，在此不再赘述。
其中，第一挖孔区域3031设置在无机层302内对应缺口结构3042的区域，以形成交错结构，更直接有效地释放弯折区的应力。
通过上述结构，可以使得金属走线在卷曲过程中，所产生的应力得到一定程度的释放，减少对器件的损坏，在无机层中加入有机物，进一步提高产品的可卷性，同时增加阵列基板的可卷曲次数。上述阵列基板可用于柔性有机发光二极管显示装置。
本发明实施例通过在金属走线和无机层设置折弯性能加强结构，使得柔性显示器在弯折时，弯折区的金属走线和无机层的应力得到释放，避免弯折区出现断裂或损伤，提高可弯折性能。
以上所述仅为本发明的实施方式，并非因此限制本发明的专利范围，凡是利用本发明说明书及附图内容所作的等效结构或等效流程变换，或直接或间接运用在其他相关的技术领域，均同理包括在本发明的专利保护范围内。

Claims (18)

  1. 一种阵列基板，其中，包括基板、形成于所述基板上的无机层、形成于所述无机层上的金属走线、形成于所述无机层上且覆盖所述金属走线的有机层；
    其中，所述金属走线和/或所述无机层包括折弯性能加强结构；
    所述金属走线的弯折性能加强结构为所述金属走线的至少部分是镂空结构；
    所述阵列基板包括显示区和弯折区，所述无机层、金属走线和有机层设于所述弯折区，所述弯折区位于所述阵列基板的底端和/或所述显示区的两侧。
  2. 根据权利要求1所述的阵列基板，其中，所述镂空结构包括设置在所述金属走线内的多个透孔结构和设置于所述金属走线边缘的多个缺口结构，所述缺口结构与所述透孔结构位于同一直线上或错开设置。
  3. 根据权利要求2所述的阵列基板，其中，所述透孔结构的直径为d 1，所述透孔结构的边缘与所述金属走线的边缘的间距为d 2，所述相对设置的两个缺口结构之间的距离为d 3，其中，d 1：d 2：d 3为2:1:3至4:3:5。
  4. 根据权利要求2所述的阵列基板，其中，
    所述无机层的折弯性能加强结构为所述无机层上设有多个挖孔区域，所述挖孔区域内填充有机物，所述挖孔区域包括多个第一挖孔区域和多个第二挖孔区域，所述多个第一挖孔区域和多个第二挖孔区域分别位于同一直线上或错开设置。
  5. 根据权利要求4所述的阵列基板，其中，
    所述第一挖孔区域对应设置在所述无机层内被所述金属走线覆盖的区域，所述第二挖孔区域设置在所述无机层内未被所述金属走线覆盖的区域。
  6. 根据权利要求5所述的阵列基板，其中，所述第一挖孔区域设置在所述无机层内对应所述缺口结构的区域。
  7. 根据权利要求3所述的阵列基板，其中，
    所述无机层包括设于所述基板上的第一无机层和设于所述第一无机层上的第二无机层，所述第一挖孔区域在所述第二无机层和所述有机层接触的平面上的截面为第一椭圆形，对应同一列所述金属走线下相邻两个第一椭圆形的几何中心之间的距离为18-24μm，所述第二挖孔区域在所述第二无机层和所述有机层接触的平面上的截面为第二椭圆形，对应同一列所述有机层未覆盖所述金属走线的区域下相邻两个第二椭圆形的几何中心之间的距离为18-24μm。
  8. 根据权利要求4所述的阵列基板，其中，
    所述第一椭圆形的长轴的长度大于所述金属走线的宽度，所述第二椭圆形的长轴的长度小于相邻所述金属走线的间距；
    所述第一椭圆形和所述第二椭圆形沿所述金属走线方向上的投影的交叠线的长度大于1μm。
  9. 一种阵列基板，其中，包括基板、形成于所述基板上的无机层、形成于所述无机层上的金属走线、形成于所述无机层上且覆盖所述金属走线的有机层；
    其中，所述金属走线和/或所述无机层包括折弯性能加强结构。
  10. 根据权利要求9所述的阵列基板，其中，所述金属走线的弯折性能加强结构为所述金属走线的至少部分是镂空结构。
  11. 根据权利要求10所述的阵列基板，其中，所述镂空结构包括设置在所述金属走线内的多个透孔结构和设置于所述金属走线边缘的多个缺口结构，所述缺口结构与所述透孔结构位于同一直线上或错开设置。
  12. 根据权利要求11所述的阵列基板，其中，所述透孔结构的直径为d 1，所述透孔结构的边缘与所述金属走线的边缘的间距为d 2，所述相对设置的两个缺口结构之间的距离为d 3，其中，d 1：d 2：d 3为2:1:3至4:3:5。
  13. 根据权利要求11所述的阵列基板，其中，
    所述无机层的折弯性能加强结构为所述无机层上设有多个挖孔区域，所述挖孔区域内填充有机物，所述挖孔区域包括多个第一挖孔区域和多个第二挖孔区域，所述多个第一挖孔区域和多个第二挖孔区域分别位于同一直线上或错开 设置。
  14. 根据权利要求13所述的阵列基板，其中，
    所述第一挖孔区域对应设置在所述无机层内被所述金属走线覆盖的区域，所述第二挖孔区域设置在所述无机层内未被所述金属走线覆盖的区域。
  15. 根据权利要求14所述的阵列基板，其中，所述第一挖孔区域设置在所述无机层内对应所述缺口结构的区域。
  16. 根据权利要求12所述的阵列基板，其中，
    所述无机层包括设于所述基板上的第一无机层和设于所述第一无机层上的第二无机层，所述第一挖孔区域在所述第二无机层和所述有机层接触的平面上的截面为第一椭圆形，对应同一列所述金属走线下相邻两个第一椭圆形的几何中心之间的距离为18-24μm，所述第二挖孔区域在所述第二无机层和所述有机层接触的平面上的截面为第二椭圆形，对应同一列所述有机层未覆盖所述金属走线的区域下相邻两个第二椭圆形的几何中心之间的距离为18-24μm。
  17. 根据权利要求13所述的阵列基板，其中，
    所述第一椭圆形的长轴的长度大于所述金属走线的宽度，所述第二椭圆形的长轴的长度小于相邻所述金属走线的间距；
    所述第一椭圆形和所述第二椭圆形沿所述金属走线方向上的投影的交叠线的长度大于1μm。
  18. 根据权利要求9所述的阵列基板，其中，所述阵列基板包括显示区和弯折区，所述无机层、金属走线和有机层设于所述弯折区，所述弯折区位于所述阵列基板的底端和/或所述显示区的两侧。
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