WO2019100411A1 - 阵列基板缺陷修补方法 - Google Patents

阵列基板缺陷修补方法 Download PDF

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Publication number
WO2019100411A1
WO2019100411A1 PCT/CN2017/113224 CN2017113224W WO2019100411A1 WO 2019100411 A1 WO2019100411 A1 WO 2019100411A1 CN 2017113224 W CN2017113224 W CN 2017113224W WO 2019100411 A1 WO2019100411 A1 WO 2019100411A1
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pixel
defective
sub
pixels
array substrate
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PCT/CN2017/113224
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English (en)
French (fr)
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申肖晴
金元仲
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武汉华星光电半导体显示技术有限公司
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Publication of WO2019100411A1 publication Critical patent/WO2019100411A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/1306—Details
    • G02F1/1309—Repairing; Testing
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136259—Repairing; Defects

Definitions

  • the invention relates to a display panel technology, in particular to an array substrate defect repairing method.
  • Thin film transistor liquid crystal display panels have been increasingly popular in various industries.
  • TFT Thin Film Transisto
  • sub-pixel defects often occur, and sub-pixel defects not only affect the quality of the thin film transistor display panel, but also greatly
  • the production cost has increased, and there is currently no better method for repairing sub-pixel defects in the industry.
  • the present invention provides an array substrate defect repairing method, thereby improving the repair success rate and reducing the difficulty of repairing.
  • the invention provides a method for repairing an array substrate defect, comprising the following steps:
  • the diced defective sub-pixel is connected to an adjacent normal sub-pixel.
  • the puncturing the defective portion in the defective sub-pixel is specifically to punch the film layer where the defective portion is located in the defective sub-pixel.
  • the cutting the defective sub-pixel comprises dividing the defective sub-pixel into two halves.
  • the dividing the defective sub-pixel into two halves is specifically dividing the film layer in the defective sub-pixel into two halves.
  • the connecting the defective sub-pixels after cutting to the adjacent normal sub-pixels is specifically to connect the film layer in which the defective portion is divided in the defective sub-pixels to the corresponding film layer in the adjacent normal sub-pixels.
  • the cutting defective sub-pixels are connected to adjacent normal sub-pixels Learn the way of vapor deposition.
  • segmentation is performed by cutting along a diagonal line of the defective sub-pixel or a midpoint connection on the opposite sides.
  • each process of the array substrate is monitored before the defective portion of the defective sub-pixel is punched.
  • the present invention achieves the repairing effect by punching, cutting, and connecting with adjacent normal sub-pixels in the defective sub-pixel, and since the repair in the present invention is the repair defect portion The film layer is therefore difficult to repair and improves the success rate of repair.
  • Figure 1 is a flow chart of the repairing method of the present invention
  • FIG. 2 is a schematic view of a defective portion in a defective sub-pixel of the present invention.
  • Figure 3 is a schematic view of the defect portion of the present invention.
  • FIG. 4 is a schematic view of cutting a defective sub-pixel according to the present invention.
  • FIG. 5 is a schematic diagram of connecting a defective sub-pixel after cutting to an adjacent normal sub-pixel according to the present invention
  • Figure 6 is a schematic diagram of the brightness after the connection
  • Figure 7 is a schematic view of a first cutting position of the present invention.
  • Figure 8 is a schematic view of a second cutting position of the present invention.
  • Figure 9 is a schematic illustration of a third cutting position of the present invention.
  • the present invention provides a method for repairing an array substrate defect, comprising the following steps:
  • Step S01 as shown in FIG. 3, the defective portion of the defective sub-pixel is culled (the black filled portion in the figure is the defective portion, that is, the mark 11); in this step, the defective sub-pixel may have a normal sub-peripheral Pixels (shown in FIG. 2) may also have a normal sub-pixel on at least two sides of the defective sub-pixel; specifically, the defective portion in the defective sub-pixel is culled, specifically, the film layer in which the defective portion is located in the defective sub-pixel is performed.
  • Punching the punching here can use the repairing machine used in the defect repairing in the prior art to punch the defective portion; but the invention is not limited thereto, and the corresponding position of the defective portion in the defective sub-pixel can also be used.
  • the hole, that is, the film layer where the defect portion is located and the remaining film layers corresponding to the defect portion are all removed.
  • the perforated holes are rectangular holes, round holes, and the like.
  • Step S02 as shown in FIG. 4, cutting the defective sub-pixel; specifically, the cutting the defective sub-pixel includes dividing the defective sub-pixel into two halves; in the present invention, dividing the defective sub-pixel into two The half is specifically to divide the film layer in which the defective portion is located in the defective sub-pixel into two halves; however, the present invention is not limited thereto, and the segmentation may further divide the defective sub-pixel into two halves as a whole.
  • Step S03 as shown in FIG. 5, the diced defective sub-pixel is connected to the adjacent normal sub-pixel; specifically, the diced defective sub-pixel is connected to the adjacent normal sub-pixel as the defective sub-pixel.
  • the defect layer in the middle segmentation is connected to the corresponding film layer in the adjacent normal sub-pixel.
  • the defective sub-pixel is connected to the upper and lower sub-pixels, where the connection may be an electrical connection or a general connection;
  • the connection When the film layer of the defect portion is a conductive film layer (such as a common electrode, a pixel electrode, etc.), the connection is electrically connected, and if the film layer of the defect portion is a general film layer (such as a passivation layer, a flat layer, etc.), the connection is generally Connecting; however, the present invention is not limited thereto, and when a defective sub-pixel is integrally divided into two halves, a partial film layer cut in the defective sub-pixel may be connected to a corresponding one of adjacent normal sub-pixels, for example, for example, The common electrode of the cut defective sub-pixel is electrically connected to the common electrode of the adjacent normal sub-pixel; the flat layer of the cut defective sub-pixel is connected to the flat layer of the adjacent normal sub-pixel; Cutting the defective sub-pixel passivation layer connected to the normal of the passivation layer adjacent to the sub-pixel
  • the voltage of the pixel electrode to be cut is made to coincide with the voltage of the normal sub-pixel.
  • the diced defective sub-pixel is connected to the adjacent normal sub-pixel by chemical vapor deposition, and the film layer where the defect portion is located is repaired by chemical vapor deposition, for example, if the defect is in the pixel Electrode, then the chemically vapor deposited on the cut pixel electrode
  • the film material for electrical connection is deposited, of course, the material may be selected to be the same material as the film layer.
  • each process of the array substrate can also be monitored, where the monitoring is after the preparation of the source and drain electrodes.
  • the monitoring is after the preparation of the source and drain electrodes.
  • the repairing method of the present invention is directed to a film layer above the source drain, that is, including a flat layer, a common electrode, a passivation layer, and or a pixel electrode.
  • the invention cuts the defective sub-pixel into two halves in order to prevent the defective sub-pixel 1 from being significantly connected to the adjacent one of the normal sub-pixels 2 and 3, so that the defective sub-pixel is cut into
  • the two halves 111, 112 are connected to the adjacent normal sub-pixels 2, 3, respectively, and the brightness of the defective sub-pixel is the average brightness of the brightness of two adjacent normal sub-pixels (as shown in FIG. 6). Thus, the defective sub-pixel will not be significantly different from the normal sub-pixel.
  • the cutting is performed along the midpoint connecting lines on opposite sides of the defective sub-pixel. Specifically, the middle point connecting lines on the left and right sides of the figure are cut so that the defective sub-pixels are equally divided into upper and lower halves, so that when step S03 is performed, two normal sub-pixels adjacent to the upper and lower sides are Connected, it can also be connected to two normal sub-pixels adjacent to each other.
  • the cutting is performed along the midpoint connecting lines on opposite sides of the defective sub-pixel. Specifically, the middle point connecting lines on the upper and lower sides of the figure are cut so that the defective sub-pixels are equally divided into left and right halves, so that when step S03 is performed, two normal sub-pixels adjacent to the left and right are performed. Connected, it can also be connected to two normal sub-pixels adjacent to each other.
  • the cutting is performed along the diagonal of the defective sub-pixel. Specifically, the diagonal lines of the lower left corner and the upper right corner of the figure are cut so that the defective sub-pixels are equally divided into left and right halves, so that when step S03 is performed, two normal sub-pixels adjacent to the left and right are Connected, it can also be connected to two normal sub-pixels adjacent to each other.
  • the cutting method of the present invention is not limited to the above three cutting methods, and can be specifically adjusted depending on the actual situation and the position of the defective portion.
  • Step S01 as shown in FIG. 2 and FIG. 3, the defective portion 11 in the defective sub-pixel 1 is culled; specifically, the defective portion 11 in the defective sub-pixel 1 is culled, specifically, the defective portion 11 in the defective sub-pixel 1 is located.
  • the film layer is perforated to make the defect portion 11 into a rectangular hole 12 in the figure, where the hole can be punched by the repairing machine used in the prior art for repairing the defect; however, the invention is not limited thereto. Therefore, the corresponding positions of the defective portions in the defective sub-pixels may be punched, that is, the film layers in which the defective portions are located and the remaining film layers corresponding to the defective portions are all removed.
  • the perforated holes are rectangular holes, round holes, and the like.
  • Step S02 as shown in FIG. 4, the defective sub-pixel is cut along the midpoint connecting line on the left and right sides; the cutting here is to divide the defective sub-pixel as a whole; at this time, the rectangular hole 12 is located in the cut.
  • Step S03 as shown in FIG. 5, the cut defective sub-pixel is connected to the adjacent normal sub-pixel; in FIG. 5, the upper half 111 and the lower half 112 of the cut defective sub-pixel are upper and lower.
  • the normal sub-pixels 2, 3 are connected to connect a portion of the film layer cut in the defective sub-pixel 1 with a corresponding one of the adjacent normal sub-pixels.
  • the invention combines the defective portion of the defective sub-pixel, cuts and connects with the adjacent normal sub-pixel, so that the cut defective sub-pixel and the adjacent normal sub-pixel are combined into a new normal sub-pixel. Thereby achieving the purpose of repairing defects.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
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Abstract

提供一种阵列基板缺陷修补方法，包括：将缺陷子像素中缺陷部分（11）进行剔除；对缺陷子像素进行切割；将切割后的缺陷子像素与相邻的正常的子像素相连。通过对缺陷子像素中缺陷部分（11）进行打孔、切割、与相邻的正常的子像素连接最终达到修补的作用，修补难度低，提高修补的成功率。

Description

阵列基板缺陷修补方法 技术领域
本发明涉及一种显示面板技术，特别是一种阵列基板缺陷修补方法。
背景技术
薄膜晶体管液晶显示面板已经日益普及至各行各业，而在TFT(Thin Film Transisto，薄膜晶体管)阵列基板中，子像素缺陷时常出现，子像素缺陷不仅影响薄膜晶体管显示面板的品质，而且也会大大的增加了生产成本，目前行业中还没有一种较好的对子像素缺陷进行修补的方法。
发明内容
为克服现有技术的不足，本发明提供一种阵列基板缺陷修补方法，从而提高修补成功率以及降低修补的难度。
本发明提供了一种阵列基板缺陷修补方法，包括如下步骤：
将缺陷子像素中缺陷部分进行剔除；
对该缺陷子像素进行切割；
将切割后的缺陷子像素与相邻的正常的子像素相连。
进一步地，所述将缺陷子像素中缺陷部分进行剔除具体为将缺陷子像素中缺陷部分所在膜层进行打孔。
进一步地，所述对该缺陷子像素进行切割包括将缺陷子像素分割为两半。
进一步地，所述将缺陷子像素分割为两半具体为将缺陷子像素中缺陷部分所在膜层分割为两半。
进一步地，所述将切割后的缺陷子像素与相邻的正常的子像素相连具体为将缺陷子像素中分割后的缺陷部分所在膜层与相邻正常的子像素中对应膜层相连。
进一步地，所述将切割后的缺陷子像素与相邻的正常的子像素相连采用化 学气相沉积的方式进行。
进一步地，所述分割采用沿缺陷子像素的对角线或相对两侧的中点连线进行切割。
进一步地，所述在将缺陷子像素中缺陷部分进行打孔之前，对阵列基板的每一道制程进行监控。
进一步地，当其中一道制程中出现缺陷子像素时，停机并对缺陷子像素进行修补。
本发明与现有技术相比，通过对缺陷子像素中缺陷部分进行打孔、切割、与相邻的正常的子像素连接最终达到修补的作用，而且由于本发明中的修补为修补缺陷部分所在的膜层，因此其修补难度低，提高修补的成功率。
附图说明
图1是本发明修补方法的流程图；
图2是本发明缺陷子像素中缺陷部分的示意图；
图3是本发明剔除缺陷部分的示意图；
图4是本发明对缺陷子像素进行切割的示意图；
图5是本发明将切割后的缺陷子像素与相邻正常子像素进行相连的示意图；
图6是相连后的亮度示意图；
图7是本发明的第一种切割位置的示意图；
图8是本发明的第二种切割位置的示意图；
图9是本发明的第三种切割位置的示意图。
具体实施方式
下面结合附图和实施例对本发明作进一步详细说明。
如图1所示，本发明提供了一种阵列基板缺陷修补方法，包括如下步骤：
步骤S01、如图3所示，将缺陷子像素中缺陷部分进行剔除(图中黑色填充部分为缺陷部分，即标示11)；在该步骤中，缺陷子像素的四周可能均具有一个正常的子像素(图2所示)，也有可能在缺陷子像素的至少两侧有一个正常的子像素；具体地，将缺陷子像素中缺陷部分进行剔除具体为将缺陷子像素中缺陷部分所在膜层进行打孔，这里的打孔可采用现有技术中缺陷修补时所采用的修补机台对缺陷部分进行打孔；但本发明不限于此，还可以采用将缺陷子像素中缺陷部分对应位置进行打孔，即将缺陷部分所在膜层以及缺陷部分对应的其余膜层均进行剔除。所述打孔的孔为矩形孔、圆孔等。
步骤S02、如图4所示，对该缺陷子像素进行切割；具体地，所述对该缺陷子像素进行切割包括将缺陷子像素分割为两半；在本发明中将缺陷子像素分割为两半具体为将缺陷子像素中缺陷部分所在膜层分割为两半；但本发明不限于此，分割还可以为将缺陷子像素整体分割成两半。
步骤S03、如图5所示，将切割后的缺陷子像素与相邻的正常子像素相连；具体地，将切割后的缺陷子像素与相邻的正常的子像素相连具体为将缺陷子像素中分割后的缺陷部分所在膜层与相邻正常的子像素中对应膜层相连，在图5中，缺陷子像素与上下两个子像素相连，这里的相连可以为电性连接或一般连接；若缺陷部分所在膜层为导电膜层时(如公共电极、像素电极等)则相连为电性连接，若缺陷部分所在膜层为一般膜层(如钝化层、平坦层等)则相连为一般连接；但本发明不限于此，还可以采用当缺陷子像素被整体分割成两半时，将缺陷子像素中被切割的部分膜层与相邻正常的子像素中的对应膜层相连，例如被切割的缺陷子像素的公共电极与相邻的正常的子像素的公共电极电性连接；被切割的缺陷子像素的平坦层与相邻的正常的子像素的平坦层连接；被切割的缺陷子像素的钝化层与相邻的正常的子像素的钝化层连接；被切割的缺陷子像素的像素电极与相邻的正常的子像素的像素电极电性连接等。
从而使被切割的像素电极的电压与正常的子像素的电压一致。
所述步骤S03中，将切割后的缺陷子像素与相邻的正常子像素相连采用化学气相沉积的方式进行，采用化学气相沉积大对缺陷部分所在的膜层进行修补，例如若缺陷部分在于像素电极，则对切割后的像素电极通过化学气相沉积 沉积用于电性连接的膜层材料，当然，材料的选择可以为与膜层相同的材料。
本发明的阵列基板的修补方法中，在步骤S01之前，还可以对阵列基板的每一道制程进行监控，这里的监控为在源漏极的制备之后。当其中一道制程中出现缺陷子像素时，停机并对缺陷子像素进行修补；但本发明不限于此，也可以是在阵列基板所有制程结束后进行监控并对缺陷子像素进行修补。
本发明的修补方法针对的是源漏极以上的膜层，即包括了平坦层、公共电极、钝化层和或像素电极等。
本发明将缺陷子像素切割为两半是为了避免缺陷子像素1与相邻的一个正常的子像素2、3整体相连时会对显示的亮度造成较为明显的区别，因此将缺陷子像素切割为两半111、112，并各自与相邻的正常的子像素2、3相连，那么该缺陷子像素的亮度就为相邻两个正常的子像素亮度的平均值亮度(如图6所示)，这样该缺陷子像素就不会与正常的子像素有较明显的区别。
如图7所示，本发明的第一种切割方法中，沿缺陷子像素相对两侧的中点连线进行切割。具体地，为图中左右两侧边的中点连线进行切割，这样使缺陷子像素被均分为上下两半，这样在进行步骤S03时，为与上下相邻的两个正常的子像素进行相连，也可以与左右相邻的两个正常的子像素进行相连。
如图8所示，本发明的第二种切割方法中，沿缺陷子像素相对两侧的中点连线进行切割。具体地，为图中上下两侧边的中点连线进行切割，这样使缺陷子像素被均分为左右两半，这样在进行步骤S03时，为与左右相邻的两个正常的子像素进行相连，也可以与上下相邻的两个正常的子像素进行相连。
如图9所示，本发明的第三种切割方法中，沿缺陷子像素的对角线进行切割。具体地，为图中左下角和右上角的对角线进行切割，这样使缺陷子像素被均分为左右两半，这样在进行步骤S03时，为与左右相邻的两个正常的子像素进行相连，也可以与上下相邻的两个正常的子像素进行相连。
本发明的切割方法不限于上述的三种切割方式，还可根据实际情况以及缺陷部分的位置进行具体的调整。
下面以缺陷部分在图1中所示的位置，对本发明进行说明；
如图2所示，当监测到位置中间的子像素为缺陷子像素时，采用以下修补方法：
步骤S01、如图2和图3所示，将缺陷子像素1中缺陷部分11进行剔除；具体地，将缺陷子像素1中缺陷部分11进行剔除具体为将缺陷子像素1中缺陷部分11所在膜层进行打孔，使缺陷部分11变为图中的矩形孔12，这里的打孔可采用现有技术中缺陷修补时所采用的修补机台对缺陷部分进行打孔；但本发明不限于此，还可以采用将缺陷子像素中缺陷部分对应位置进行打孔，即将缺陷部分所在膜层以及缺陷部分对应的其余膜层均进行剔除。所述打孔的孔为矩形孔、圆孔等。
步骤S02、如图4所示，对该缺陷子像素沿左右两侧边的中点连线进行切割；这里的切割为将缺陷子像素进行整体的分割；这时，矩形孔12位于被切割的缺陷子像素的上半部分111中。
步骤S03、如图5所示，将切割后的缺陷子像素与相邻的正常子像素相连；在图5中，被切割的缺陷子像素的上半部分111和下半部分112与上下两个正常的子像素2、3相连为将缺陷子像素1中被切割的部分膜层与相邻正常的子像素中的对应膜层连接。
本发明通过将缺陷子像素的缺陷部分进行剔除、切割并与相邻正常的子像素进行相连，从而使被切割的缺陷子像素与相邻的正常的子像素组合成一个新的正常子像素，从而达到修补缺陷的目的。
虽然已经参照特定实施例示出并描述了本发明，但是本领域的技术人员将理解：在不脱离由权利要求及其等同物限定的本发明的精神和范围的情况下，可在此进行形式和细节上的各种变化。

Claims (9)

  1. 一种阵列基板缺陷修补方法，其中：包括如下步骤：
    将缺陷子像素中缺陷部分进行剔除；
    对该缺陷子像素进行切割；
    将切割后的缺陷子像素与相邻的正常的子像素相连。
  2. 根据权利要求1所述的阵列基板缺陷修补方法，其中：所述将缺陷子像素中缺陷部分进行剔除具体为将缺陷子像素中缺陷部分所在膜层进行打孔。
  3. 根据权利要求1所述的阵列基板缺陷修补方法，其中：所述对该缺陷子像素进行切割包括将缺陷子像素分割为两半。
  4. 根据权利要求3所述的阵列基板缺陷修补方法，其中：所述将缺陷子像素分割为两半具体为将缺陷子像素中缺陷部分所在膜层分割为两半。
  5. 根据权利要求1所述的阵列基板缺陷修补方法，其中：所述将切割后的缺陷子像素与相邻的正常的子像素相连具体为将缺陷子像素中分割后的缺陷部分所在膜层与相邻正常的子像素中对应膜层相连。
  6. 根据权利要求1所述的阵列基板缺陷修补方法，其中：所述将切割后的缺陷子像素与相邻的正常的子像素相连采用化学气相沉积的方式进行。
  7. 根据权利要求1所述的阵列基板缺陷修补方法，其中：所述分割采用沿缺陷子像素的对角线或相对两侧的中点连线进行切割。
  8. 根据权利要求1所述的阵列基板缺陷修补方法，其中：所述在将缺陷子像素中缺陷部分进行打孔之前，对阵列基板的每一道制程进行监控。
  9. 根据权利要求8所述的阵列基板缺陷修补方法，其中：当其中一道制程中出现缺陷子像素时，停机并对缺陷子像素进行修补。
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CN108646476B (zh) * 2018-03-22 2020-12-25 南京中电熊猫液晶显示科技有限公司 一种液晶面板的断线修复方法
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001147649A (ja) * 1999-11-19 2001-05-29 Fujitsu Ltd 表示装置及びその欠陥修復方法
US20080224991A1 (en) * 2007-03-12 2008-09-18 Prime View International Co., Ltd. Repairing Method and Structure of Display Electrode
CN101776808A (zh) * 2010-02-10 2010-07-14 深超光电（深圳）有限公司 一种液晶显示器阵列基板及其修补方法
KR20110101000A (ko) * 2010-03-05 2011-09-15 엘지디스플레이 주식회사 액정표시장치의 레이저 리페어방법
CN105759522A (zh) * 2016-05-11 2016-07-13 深圳市华星光电技术有限公司 Tft基板的断线修复方法
CN107329296A (zh) * 2017-08-25 2017-11-07 深圳市华星光电技术有限公司 液晶面板暗点化修补方法及阵列基板结构

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN1567076A (zh) * 2003-06-20 2005-01-19 友达光电股份有限公司 修复含有异物的液晶显示器的方法
KR101407287B1 (ko) * 2006-12-19 2014-06-16 엘지디스플레이 주식회사 액정표시장치 및 이의 리페어 방법
CN101424792A (zh) * 2007-11-02 2009-05-06 上海广电Nec液晶显示器有限公司 液晶显示装置的点缺陷修复方法
CN101533844A (zh) * 2008-03-14 2009-09-16 北京京东方光电科技有限公司 薄膜晶体管阵列基板及其维修方法
KR101733820B1 (ko) * 2011-05-26 2017-05-08 가부시키가이샤 제이올레드 표시 패널 및 그 제조 방법
CN102736341B (zh) * 2012-07-10 2015-08-19 深圳市华星光电技术有限公司 一种液晶显示面板及其修复方法

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001147649A (ja) * 1999-11-19 2001-05-29 Fujitsu Ltd 表示装置及びその欠陥修復方法
US20080224991A1 (en) * 2007-03-12 2008-09-18 Prime View International Co., Ltd. Repairing Method and Structure of Display Electrode
CN101776808A (zh) * 2010-02-10 2010-07-14 深超光电（深圳）有限公司 一种液晶显示器阵列基板及其修补方法
KR20110101000A (ko) * 2010-03-05 2011-09-15 엘지디스플레이 주식회사 액정표시장치의 레이저 리페어방법
CN105759522A (zh) * 2016-05-11 2016-07-13 深圳市华星光电技术有限公司 Tft基板的断线修复方法
CN107329296A (zh) * 2017-08-25 2017-11-07 深圳市华星光电技术有限公司 液晶面板暗点化修补方法及阵列基板结构

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