CN105974705B - 阵列基板、其制作方法、修复方法、显示面板及显示装置 - Google Patents
阵列基板、其制作方法、修复方法、显示面板及显示装置 Download PDFInfo
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Abstract
本发明实施例公开了一种阵列基板、其制作方法、修复方法、显示面板及显示装置。该阵列基板包括衬底基板,层叠在所述衬底基板上的像素电极和公共电极;在所述像素电极和所述公共电极之间交叠的区域还设置有导电层;所述导电层至少与所述像素电极和所述公共电极其中的一个绝缘设置。由于在像素电极和公共电极之间的交叠的区域增加了导电层,在进行阵列基板的灭点维修时,在激光处理下,该导电层可熔接像素电极和公共电极,从而提高了灭点效果,进而提高了产品良率。
Description
技术领域
本发明涉及显示技术领域,尤其涉及一种阵列基板、其制作方法、修复方法、显示面板及显示装置。
背景技术
现有技术中,在薄膜晶体管液晶显示器(Thin Film Transistor Liquid CrystalDiode,TFT-LCD)制作过程中,由于制作工艺的影响,会在薄膜晶体管(Thin FilmTransistor,TFT)阵列基板上形成各种不良,其中一类叫做像素不良,表现为暗点和亮点,由于暗点对视觉的影响较小,而亮点对视觉的影响较大,因而需要进行对为亮点的不良像素进行灭点维修。
例如,在高透过率高级超维场转换(High Transmittance Advanced SuperDimension Switch,HADS)显示模式下,如图1所示的TFT阵列基板,包括:衬底基板10;位于衬底基板10上的相互独立的栅极11、像素电极12、公共电极引线13;覆盖衬底基板10、栅极11、像素电极12、公共电极引线13的栅绝缘层12;位于栅绝缘层12上的源极15和漏极16;覆盖源极15和漏极16的钝化层17;位于钝化层17上且位于像素电极12上方的公共电极18,该公共电极18通过过孔19与公共电极引线13电连接。对于该HADS模式下的TFT阵列基板,在维修时,将像素电极12和公共电极18利用激光(图中箭头所示)进行高温熔接。但是,由于像素区域的像素电极12和公共电极18有限,熔融的像素电极12和公共电极18不足以实现良好的连接,容易导致像素电极12和公共电极18的熔接性较差,灭点维修效果较差。
综上,现有技术中存在不良像素灭点维修效果较差的问题。
发明内容
本发明实施例的目的是提供一种阵列基板、其制作方法、修复方法、显示面板及显示装置,用于解决不良像素灭点维修效果较差的问题。
本发明实施例的目的是通过以下技术方案实现的:
一种阵列基板,包括衬底基板,层叠在所述衬底基板上的像素电极和公共电极;在所述像素电极和所述公共电极之间交叠的区域还设置有导电层;
所述导电层至少与所述像素电极和所述公共电极其中的一个绝缘设置。
较佳地,所述导电层的材料包括金属和金属氧化物。
较佳地,所述金属氧化物为透明金属氧化物。
较佳地,所述导电层位于非显示区域。
较佳地,所述阵列基板还包括在所述像素电极和公共电极之间层叠的第一绝缘层和第二绝缘层;
所述导电层位于所述第一绝缘层和所述第二绝缘层之间。
较佳地,所述阵列基板还包括栅极、源极和漏极;
所述导电层与所述源极和漏极同层同材料;或者
所述导电层与所述栅极同层同材料。
一种阵列基板的制作方法,该方法包括:
在衬底基板上形成像素电极、导电层和公共电极的步骤;其中,所述导电层在所述衬底基板上所述像素电极和所述公共电极之间交叠的区域,所述导电层至少与所述像素电极和所述公共电极其中的一个绝缘设置。
一种阵列基板的修复方法,该方法包括:
检测如以上任一项所述的阵列基板上为亮点的不良像素;
对检测到的所述不良像素中的所述导电层所在区域进行激光处理,以使得所述导电层熔接所述像素电极和所述公共电极。
一种显示面板,包括如以上任一项所述的阵列基板。
一种显示装置,包括如以上所述的显示面板。
本发明实施例的有益效果如下:
本发明实施例提供的一种阵列基板、其制作方法、修复方法、显示面板及显示装置中,由于在像素电极和公共电极之间的交叠的区域增加了导电层,在进行阵列基板的灭点维修时,在激光处理下,该导电层可熔接像素电极和公共电极,从而提高了灭点效果,进而提高了产品良率。
附图说明
图1为现有技术中HADS显示模式的阵列基板的结构示意图;
图2为本发明实施例提供的一种阵列基板的结构示意图之一;
图3为本发明实施例提供的一种阵列基板的结构置示意图之二;
图4为本发明实施例提供的一种阵列基板的结构置示意图之三;
图5为本发明实施例提供的一种阵列基板的结构置示意图之四;
图6a~图6e为本发明实施例提供的一种阵列基板的制作方法中制作各个结构时的示意图;
图7为本发明实施例提供的一种阵列基板的修复方法流程图。
具体实施方式
为了解决上述技术问题,本发明实施例提供一种阵列基板,该一种阵列基板,包括衬底基板,层叠在衬底基板上的像素电极和公共电极;在像素电极和公共电极之间交叠的区域还设置有导电层;导电层至少与像素电极和公共电极其中的一个绝缘设置。
其中,像素电极、导电层和公共电极在衬底基板上的层叠顺序可以是像素电极、导电层、公共电极,还可以是公共电极、导电层、像素电极。
其中,导电层用于在像素不良且为亮点时,在激光处理下熔接像素电极和公共电极。
本发明实施例中,由于在像素电极和公共电极之间的交叠的区域增加了导电层,在进行阵列基板的灭点维修时,在激光处理下,该导电层可熔接像素电极和公共电极,从而提高了灭点效果,进而提高了产品良率。
下面结合附图和实施例对本发明提供的方案进行更详细地说明。附图中各膜层的厚度和形状不反映真实比例,目的只是示意说明本发明内容。
本发明实施例提供的上述阵列基板中,导电层至少与像素电极和公共电极其中的一个绝缘设置,包括三种结构:第一种结构是:导电层与公共电极电连接且与像素电极绝缘设置;第二种结构是:导电层与像素电极电连接且与公共电极绝缘设置;第三种结构是:导电层与公共电极和像素电极二者均绝缘设置。下面分别结合附图对这三种结构进行举例说明。
第一种结构,导电层与公共电极电连接且与像素电极绝缘设置:
如图2所示的阵列基板,包括衬底基板001,依次层叠在衬底基板001上的像素电极002和公共电极003;在像素电极002和公共电极003之间的交叠的区域还设置有导电层004;导电层004用于在像素不良且为亮点时,在激光处理下熔接像素电极002和公共电极003;该阵列基板还包括在像素电极002和公共电极003之间层叠的第一绝缘层005;该第一绝缘层005位于导电层004和像素电极002之间。其中,第一绝缘层005使得导电层004与像素电极002绝缘。
为了使得公共电极003的表面平整,上述实施例中,较佳地,导电层004位于第一绝缘层005的凹陷区域内。该导电层004的上表面与第一绝缘层005的上表面位于同一水平面。
第二种结构,导电层与像素电极电连接且公共电极绝缘设置:
如图3所示的阵列基板,包括衬底基板001,依次层叠在衬底基板001上的像素电极002和公共电极003;在像素电极002和公共电极003之间的交叠的区域还设置有导电层004;导电层004用于在像素不良且为亮点时,在激光处理下熔接像素电极002和公共电极003;该阵列基板还包括在像素电极002和公共电极003之间层叠的第一绝缘层005;该第一绝缘层005位于导电层004和公共电极003之间。其中,第一绝缘层005使得导电层004与公共电极003绝缘。
第三种结构,导电层004与公共电极003和像素电极002二者均绝缘设置:
如图4所示的阵列基板,包括衬底基板001,依次层叠在衬底基板001上的像素电极002和公共电极003;在像素电极002和公共电极003之间的交叠的区域还设置有导电层004;导电层004用于在像素不良且为亮点时,在激光处理下熔接像素电极002和公共电极003;该阵列基板还包括在像素电极002和公共电极003之间层叠的第一绝缘层005和第二绝缘层006;导电层004位于第一绝缘层005和第二绝缘层006之间。其中,第一绝缘层005使得导电层004与像素电极001绝缘,第二绝缘层006使得导电层004与公共电极003绝缘。
以上三种结构均是在衬底基板上依次层叠像素电极、导电层、公共电极的顺序,对于公共电极、导电层、像素电极这一层叠顺序可以参照以上三种结构实施,此处不再赘述。
基于以上任意实施例,较佳地,导电层的材料包括金属和金属氧化物。导电层的材料也可以是其它合适的导电材料。
其中,金属材料可以是钼(Molybdenum,Mo)、铝(Aluminium,Al),等等。
其中,金属可以是透明金属,金属氧化物可以是透明金属氧化物,这样,导电层就是透明的,可以减小导电层对开口率的影响。
其中,透明金属氧化物可以是氧化铟锡导电材料(Indium Tin Oxide,ITO),等等。
基于以上任意实施例,较佳地,导电层位于非显示区域。这样,可以避免导电层对像素单元的开口率产生影响。其中,非显示区域是指,像素电极边缘被黑矩阵遮挡的区域。
需要说明的是,本发明实施例中,导电层的厚度可以根据实际需要设置,且其在衬底基板上的投影区域的大小也可以根据实际需要设置,在此不作具体限定。
本发明实施例的阵列基板为TFT阵列基板,其中,TFT可以是顶栅型的,也可以是底栅型的。因而,具体实施时,较佳地,阵列基板还包括栅极、源极和漏极;导电层与源极和漏极同层同材料;或者,导电层与栅极同层同材料。
其中,TFT是底栅型时,导电层与源极和漏极同层同材料;TFT是顶栅型时,导电层与栅极同层同材料。本实施例中,可以在制作顶栅型TFT的栅极时,同时制作导电层,或者,也可以在制作底栅型TFT的源极和漏极时,同时制作导电层,不会增加工艺复杂度。
下面以底栅型TFT为例,对本发明实施例提供的一种阵列基板进行更加详细地说明。
如图5所示的阵列基板,包括衬底基板001;位于衬底基板001上的相互独立的栅极007、像素电极002、公共电极引线010;覆盖衬底基板001、栅极007、像素电极002、公共电极003引线的第一绝缘层005;位于第一绝缘层005上的源极008、漏极009和导电层004;覆盖源极008、漏极009和导电层004的第二绝缘层006;位于第二绝缘层006上且位于像素电极002上方的公共电极003,该公共电极003通过贯穿第一绝缘层005和第二绝缘层006的过孔011与公共电极引线010电连接。
其中,导电层004位于像素电极002和公共电极003之间的交叠的区域,用于在像素不良且为亮点时,在激光处理下熔接像素电极002和公共电极003;该导电层004与源极008和漏极009的材料相同,这样,可以在制作源极008和漏极009的同时,制作该导电层004,简化了制作工艺。并且,该导电层004位于非显示区域,以保证像素单元的开口率。
基于以上阵列基板,在需要进行灭点维修时,对于不良像素中的导电层004上采用激光(图中箭头所示)高温熔接,该导电层004就可以连通像素电极002和公共电极003,实现灭点维修。
基于同样的发明构思,本发明实施例还提供一种阵列基板的制作方法,该制作方法至少包括:
在衬底基板上形成像素电极、导电层和公共电极的步骤;其中,导电层在衬底基板上像素电极和公共电极之间交叠的区域,并且该导电层至少与像素电极和所述公共电极其中的一个绝缘设置。
本发明实施例中,由于在像素电极和公共电极之间的交叠的区域增加了导电层,在进行阵列基板的灭点维修时,在激光处理下,该导电层可熔接像素电极和公共电极,从而提高了灭点效果,进而提高了产品良率。
具体实施时,如果导电层与像素电极绝缘设置:
较佳地,本发明实施例提供的阵列基板的制作方法,一种具体的实现方式可以是:在衬底基板上形成像素电极;在形成有像素电极的衬底基板上形成第一绝缘层;在第一绝缘层上形成导电层。进一步地,如果导电层位于第一绝缘层的凹陷区域内,在第一绝缘层上形成导电层之前,还需要在第一绝缘层上像素电极和公共电极之间的交叠区域刻蚀一个凹陷区域;相应的,在第一绝缘层上形成导电层,具体可以是:在第一绝缘层的凹陷区域内形成导电层,该导电层的上表面与第一绝缘层的上表面位于同一水平面。
具体实施时,如果上述导电层与公共电极绝缘设置:
较佳地,本发明实施例提供的阵列基板的制作方法,一种具体的实现方式可以是:在衬底基板上形成像素电极;在形成有像素电极的衬底基板上形成导电层;在形成有导电层的衬底基板上形成第一绝缘层;在第一绝缘层上形成公共电极。
具体实施时,如果导电层与公共电极和像素电极二者均绝缘设置:
较佳地,本发明实施例提供的阵列基板的制作方法,一种具体的实现方式可以是:在衬底基板上形成像素电极;在形成有像素电极的衬底基板上形成第一绝缘层;在第一绝缘层上形成导电层;在导电层上形成第二绝缘层;在第二绝缘层上形成公共电极。
本实施例的阵列基板为TFT阵列基板,因而还包括栅极、源极和漏极,以上述导电层与公共电极和像素电极二者均绝缘设置为例,进一步说明具体实现方式。较佳地,本发明实施例提供的制作方法还包括:在衬底基板上形成栅极;在第一绝缘层上形成源极和漏极。相应的,在第一绝缘层上形成导电层,具体可以是:在第一绝缘层上形成源极和漏极的同时,形成导电层。该方案中适用于底栅型TFT的阵列基板。或者,本发明实施例提供的制作方法还包括:在衬底基板上形成源极和漏极;在第一绝缘层上形成栅极。相应的,在第一绝缘层上形成导电层,具体可以是:在第一绝缘层上形成栅极的同时,形成导电层。
以上列举的三种制作方法是基于像素电极、导电层、公共电极这一在衬底基板上的顺序,对于公共电极、导电层、像素电极这一层叠顺序可以参照以上制作方法实施,此处不再赘述。
下面以底栅型TFT为例,对本发明实施例提供的一种阵列基板的制作方法进行更加详细地说明。
步骤一、如图6a所示,在衬底基板001上形成栅极007、像素电极002和公共电极引线010。
该步骤中,像素电极002的材料为ITO。
步骤二、如图6b所示,在形成有栅极007、像素电极002和公共电极引线010的衬底基板001上形成第一绝缘层005。
步骤三、如图6c所示,在形成有第一绝缘层005的衬底基板001上,利用一张掩模版同时形成源极008、漏极009和导电层004。其中,源极009和漏极009位于栅极上方,导电层004位于像素电极002和待形成的公共电极交叠的区域。
该步骤中,源极008、漏极009和导电层004的材料包括两种:Mo和Al,并且,按照Mo膜层、Al膜层、Mo膜层的顺序层叠设置。
步骤四、如图6d所示,在形成有源极008、漏极009和导电层004的衬底基板001上形成第二绝缘层006。
步骤五、如图6e所示,在形成有第二绝缘层006的衬底基板上形成贯穿第一绝缘层005和第二绝缘层006的过孔011。
步骤六、在第二绝缘层006上形成位于像素电极002上方的公共电极003且该公共电极003通过过孔011与公共电极引线010电连接,如图6所示。
该步骤中,公共电极003的材料为ITO。
基于同样的发明构思,本发明实施例还提供一种阵列基板的修复方法,如图7所示,该修复方法至少包括如下步骤:
步骤710、检测如以上任一实施例所述的阵列基板上为亮点的不良像素;
步骤720、对检测到的不良像素中的导电层所在区域进行激光处理,以使得导电层熔接像素电极和公共电极。
本发明实施例中,由于在像素电极和公共电极之间的交叠区域增加了导电层,在进行阵列基板的灭点维修时,在激光处理下,该导电层可熔接像素电极和公共电极,从而提高了灭点效果,进而提高了产品良率。
基于同样的发明构思,本发明实施例还提供一种显示面板,该显示面板包括如以上任意实施例所述的阵列基板。
基于同样的发明构思,本发明实施例还提供一种显示装置,该显示装置包括如以上任意实施例所述的显示面板。
本发明实施例中的显示装置可以但不限于是HADS模式和ADS模式的显示装置。
本发明实施例提供的一种阵列基板、其制作方法、修复方法、显示面板及显示装置中,由于在像素电极和公共电极之间的交叠的区域增加了导电层,在进行阵列基板的灭点维修时,在激光处理下,该导电层可熔接像素电极和公共电极,从而提高了灭点效果,进而提高了产品良率。
显然,本领域的技术人员可以对本发明进行各种改动和变型而不脱离本发明的精神和范围。这样,倘若本发明的这些修改和变型属于本发明权利要求及其等同技术的范围之内,则本发明也意图包含这些改动和变型在内。
Claims (9)
1.一种阵列基板,包括衬底基板,层叠在所述衬底基板上的像素电极和公共电极;其特征在于,在所述像素电极和所述公共电极之间交叠的区域还设置有导电层;
所述导电层至少与所述像素电极和所述公共电极其中的一个绝缘设置;
所述导电层位于非显示区域;
还包括:依次位于所述衬底基板上的栅极,第一绝缘层,源漏电极和第二绝缘层;
与所述公共电极电连接的公共电极引线与所述栅极同层设置,所述公共电极通过贯穿所述第一绝缘层和所述第二绝缘层的过孔与所述公共电极引线电连接;
其中,所述源漏电极与所述导电层分别位于所述过孔的两侧。
2.根据权利要求1所述的阵列基板,其特征在于,所述导电层的材料包括金属和金属氧化物。
3.根据权利要求2所述的阵列基板,其特征在于,所述金属为透明金属;所述金属氧化物为透明金属氧化物。
4.根据权利要求1所述的阵列基板,其特征在于,所述导电层位于所述第一绝缘层和所述第二绝缘层之间。
5.根据权利要求1所述的阵列基板,其特征在于,所述导电层与所述源漏电极同层同材料;或者
所述导电层与所述栅极同层同材料。
6.一种如权利要求1-5任一项所述的阵列基板的制作方法,其特征在于,该方法包括:
在衬底基板上形成像素电极、导电层和公共电极的步骤;其中,所述导电层在所述衬底基板上所述像素电极和所述公共电极之间交叠的区域,所述导电层至少与所述像素电极和所述公共电极其中的一个绝缘设置。
7.一种阵列基板的修复方法,其特征在于,该方法包括:
检测如权利要求1~5任一项所述的阵列基板上为亮点的不良像素;
对检测到的所述不良像素中的所述导电层所在区域进行激光处理,以使得所述导电层熔接所述像素电极和所述公共电极。
8.一种显示面板,其特征在于,包括如权利要求1~5任一项所述的阵列基板。
9.一种显示装置,其特征在于,包括如权利要求8所述的显示面板。
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