WO2019056993A1 - 显示面板及其制备方法和显示装置 - Google Patents

显示面板及其制备方法和显示装置 Download PDF

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Publication number
WO2019056993A1
WO2019056993A1 PCT/CN2018/105741 CN2018105741W WO2019056993A1 WO 2019056993 A1 WO2019056993 A1 WO 2019056993A1 CN 2018105741 W CN2018105741 W CN 2018105741W WO 2019056993 A1 WO2019056993 A1 WO 2019056993A1
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WIPO (PCT)
Prior art keywords
substrate
pixel electrode
display panel
common electrode
forming
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Application number
PCT/CN2018/105741
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English (en)
French (fr)
Inventor
李晓吉
赵彦礼
李哲
范昊翔
栗鹏
辛兰
秦鹏
Original Assignee
京东方科技集团股份有限公司
重庆京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 重庆京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US16/338,320 priority Critical patent/US11048128B2/en
Priority to EP18857432.1A priority patent/EP3686664A4/en
Publication of WO2019056993A1 publication Critical patent/WO2019056993A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133371—Cells with varying thickness of the liquid crystal layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1341—Filling or closing of cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134363—Electrodes characterised by their geometrical arrangement for applying an electric field parallel to the substrate, i.e. in-plane switching [IPS]
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133354—Arrangements for aligning or assembling substrates
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present disclosure relates to the field of display, and in particular to a display panel, a method of fabricating the same, and a display device.
  • In-Plane Switching (IPS) type liquid crystal display device has the advantages of fast response speed, large viewing angle, true color, and no water mark.
  • the present disclosure proposes a display panel, a method of fabricating the same, and a display device.
  • the display panel includes: a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer formed between the first substrate and the second substrate, wherein the first substrate includes a first substrate; and At least one pixel electrode and at least one common electrode on at least one of the first substrate and the second substrate; wherein an orthographic projection of the at least one pixel electrode on the first substrate substrate and the at least An orthographic projection of a common electrode on the first substrate is alternately disposed in a first direction in which the first substrate extends; and a ratio of a height of the at least one pixel electrode to a thickness of the liquid crystal layer is 20% to 50%; and/or a ratio of a height of the at least one common electrode to a thickness of the liquid crystal layer: 20% to 50%.
  • the at least one pixel electrode is disposed on the first substrate; and the second substrate includes a second substrate, and the at least one common electrode is disposed on the second liner On the base substrate.
  • the at least one pixel electrode and the at least one common electrode are alternately disposed on the first substrate.
  • the distance between any adjacent common electrodes and pixel electrodes in the first direction between the orthographic projections on the first substrate is equal.
  • the distance ranges from 4 ⁇ m to 16 ⁇ m.
  • the height of the at least one pixel electrode ranges from 0.56 ⁇ m to 1.6 ⁇ m; and/or the height of the at least one common electrode ranges from 0.56 ⁇ m to 1.6 ⁇ m.
  • the width of the at least one pixel electrode in the first direction ranges from 0.5 ⁇ m to 2.5 ⁇ m; and the width of the at least one common electrode in the first direction ranges from 0.5 ⁇ m to 2.5 ⁇ m.
  • the at least one pixel electrode material is a metallic material; and/or the material of the at least one common electrode is a metallic material.
  • each of the at least one pixel electrode includes: a first pedestal and a first conductive outer sleeve, wherein the first pedestal is located on the first base substrate toward the liquid crystal layer a side, the first conductive outer cover covering a side of the first pedestal and a surface of the first pedestal facing the liquid crystal layer side; and/or each of the at least one common electrode
  • the second base and the second conductive outer casing are disposed on a side of the second base substrate facing the liquid crystal layer, and the second conductive outer cover covers a side of the second base and The second pedestal faces a surface on one side of the liquid crystal layer.
  • the first substrate further includes: a passivation layer and a first alignment layer; the passivation layer is located on a side of the first substrate toward the second substrate, and the first alignment layer is located The passivation layer faces away from the side of the first substrate; the at least one pixel electrode is located between the passivation layer and the first alignment layer.
  • the second substrate further includes: a color film layer and a second alignment layer; the color film layer is located on a side of the second substrate opposite the first substrate, and the second alignment layer is located The color film layer faces away from the side of the second substrate; the at least one common electrode is located between the color film layer and the second alignment layer.
  • the present disclosure also provides a display device including the above display panel and a backlight for providing backlight to the display panel.
  • the present disclosure also provides a method of fabricating a display panel, comprising: forming a first substrate such that the first substrate includes a first substrate and forming on at least one of the first substrate and the second substrate At least one pixel electrode and at least one common electrode; pairing the first substrate and the second substrate such that an orthographic projection of the at least one pixel electrode on the first substrate substrate and the at least one An orthographic projection of the common electrode on the first substrate substrate is alternately disposed in a first direction in which the first substrate substrate extends, and a liquid crystal layer is formed between the first substrate and the second substrate to cause
  • the ratio of the height of the at least one pixel electrode to the thickness of the liquid crystal layer is: 20% to 50%; and/or the ratio of the height of the at least one common electrode to the thickness of the liquid crystal layer is: 20% ⁇ 50%.
  • the step of forming the pixel electrode and the at least one common electrode includes: forming the at least one pixel electrode on a first substrate of the first substrate; and forming the at least on the second substrate of the second substrate A common electrode.
  • the step of the pixel electrode and the at least one common electrode includes forming the at least one pixel electrode and the at least one common electrode on the first substrate of the first substrate.
  • the forming the at least one pixel electrode on the first substrate of the first substrate comprises: forming a first conductive material film on the first substrate; Forming a film of a conductive material to obtain a pattern of the at least one pixel electrode; and forming the at least one common electrode on the second substrate of the second substrate comprises: on the second substrate Forming a second conductive material film; patterning the second conductive material film to obtain a pattern of the at least one common electrode.
  • the forming the at least one pixel electrode and the at least one common electrode on the first substrate of the first substrate comprises: forming a first conductive on the first substrate a material film; and patterning the first conductive material film to obtain a pattern of the at least one pixel electrode and the at least one pixel electrode.
  • the material of the first conductive material film is a metal material; and/or the material of the second conductive material film is a metal material.
  • the forming the at least one pixel electrode on the first substrate of the first substrate comprises: forming a first insulating material film on the first substrate; Forming a film of an insulating material to obtain a pattern of at least one first pedestal; forming a third conductive material film on a side of the first substrate opposite the first pedestal, for the third conductive
  • the forming the at least one pixel electrode on the first substrate of the first substrate comprises: forming a first insulating material film on the first substrate; Forming a film of insulating material to obtain a pattern of at least one first pedestal; spraying or printing a third conductive material on an outer surface of the first pedestal to obtain a pattern of at least one first conductive outer casing,
  • the first conductive outer casing is in one-to-one correspondence with the first base, and the first conductive outer cover covers a side surface of the corresponding first base and a surface facing away from a side of the first base substrate; and/or
  • the step of forming the at least one common electrode on the second substrate of the second substrate comprises: forming a second insulating material film on the second substrate; performing the second insulating film Forming a pattern to obtain a pattern of at least one second pedestal; spraying or printing a fourth conductive material film on the outer surface of the second pedestal to obtain a pattern of at least one second conductive outer casing, the second guide
  • FIG. 1 is a schematic cross-sectional view of an IPS type display panel in the related art
  • FIG. 2 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure
  • FIG. 3 is a schematic structural diagram of a display panel according to an embodiment of the present disclosure.
  • FIG. 4 is a schematic view showing a case where a voltage of 7.2 V is applied to a pixel electrode of a display panel in the related art
  • FIG. 5 is a schematic view showing a case where a pixel electrode of a display panel of the present disclosure is applied with a voltage of 6.2 V;
  • FIG. 6 is a schematic view showing a case where a voltage of 6.2 V is applied to a pixel electrode of a display panel in the present disclosure
  • Figure 7 is a schematic view showing azimuth angles of liquid crystal molecules at different positions on line A in Figures 4 to 6;
  • FIGS. 4 to 6 is a schematic diagram of a pixel voltage-transmittance curve in the display panel shown in FIGS. 4 to 6;
  • FIG. 9 is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • FIG. 10 is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • FIG. 11 is a flowchart of a method for preparing a display panel according to an embodiment of the present disclosure
  • FIG. 12 is a flowchart of a method for preparing a display panel according to an embodiment of the present disclosure.
  • the voltage applied to the common electrode is a ground voltage (the size is close to 0 V) as an example.
  • the “driving voltage” in the present disclosure refers to a pixel voltage applied to a pixel electrode when the transmittance of the display panel reaches a maximum value.
  • the driving chip supplies the driving voltage to the source driving, and the source driving is based on the driving.
  • the voltage is converted to a pixel voltage corresponding to 256 different gray levels, wherein the maximum value of the pixel voltage is equal to the driving voltage value.
  • the “transmittance” of the display panel in the present disclosure refers to the ratio of the light intensity of the light-emitting surface of the display panel to the light intensity of the light-incident surface of the display panel.
  • FIG. 1 is a schematic cross-sectional view of an IPS type display panel in a related art.
  • a plurality of pixel electrodes 6 and a plurality of common electrodes 7 are disposed on the array substrate 1 in the same layer and are alternately arranged.
  • the pixel electrode 6 and the common electrode 7 are strips or panels, and the height thereof is small. For example, the height may be 0.04 ⁇ m.
  • the cell case thickness (thickness of the liquid crystal layer) is usually 2.8 to 3.2 ⁇ m.
  • the liquid crystal molecules in the liquid crystal layer 3 are in a horizontal state under the action of the alignment layer; when a voltage is applied to the common electrode 7 and the pixel electrode 6, respectively, and a pressure difference is formed therebetween, the liquid crystal layer may be present.
  • a horizontal deflection electric field is formed in 3 to drive the liquid crystal molecules to rotate in the horizontal plane.
  • the liquid crystal molecules located in the vicinity of the color filter substrate 2 are mainly driven by the rotation of the liquid crystal molecules of the intermediate layer. For this reason, it is generally only possible to drive the liquid crystal molecules located in the vicinity of the color filter substrate 2 to be deflected by applying a large driving voltage so that the deflection electric field can be distributed as much as possible in the vicinity of the color filter substrate 2.
  • high drive voltages place higher demands on the driver chip and also burden the driver chip.
  • an embodiment of the present application provides a display panel.
  • the display panel includes: a first substrate and a second substrate disposed opposite to each other, and a liquid crystal layer between the first substrate and the second substrate; and disposed in the first substrate and the second substrate At least one pixel electrode and at least one common electrode on the at least one; wherein an orthographic projection of the at least one pixel electrode on the first substrate and the at least one common electrode on the first substrate The orthogonal projections are alternately disposed in a first direction in which the first substrate substrate extends; and wherein a ratio of a height of the at least one pixel electrode to a thickness of the liquid crystal layer ranges from 20% to 50%; and/or The ratio of the height of the at least one common electrode to the thickness of the liquid crystal layer ranges from 20% to 50%.
  • the heights of the pixel electrode and the common electrode are increased, so that the ratio of the height of the pixel electrode and the common electrode to the thickness of the liquid crystal layer is significantly increased relative to the related art, that is, the pixel electrode and the common electrode are increased.
  • the depth of the electric field formed therebetween (the length of the region in which the liquid crystal layer is covered by the deflection electric field in the longitudinal direction) is capable of driving liquid crystal molecules in the vicinity of the substrate, for example, near the other side.
  • the second substrate 2 illustrates a display panel based on the related art IPS type liquid crystal display panel shown in FIG. 1 , including a first substrate 1 and a second substrate 2 disposed opposite to each other, and disposed at a first level according to an embodiment of the present disclosure.
  • the first substrate 1 includes a first substrate substrate 4 and a plurality of pixel electrodes 6 and a plurality of common electrodes 7 disposed on the first substrate substrate 4; the plurality of pixel electrodes 6 and the plurality of common electrodes 7 are strip-shaped, And alternately disposed in the first direction in which the first base substrate 4 extends (ie, the direction X shown in FIG. 2).
  • the IPS type display panel of the related art shown in FIG. 1 including a first substrate 1 and a second substrate 2 disposed opposite to each other, and disposed at a first level according to an embodiment of the present disclosure.
  • the first substrate 1 includes
  • the ratio between the height H0 of the pixel electrode 6 and the common electrode 7 and the thickness of the liquid crystal layer Significantly increased, so that the depth of the deflection electric field formed between the common electrode 7 and the pixel electrode 6 (the length of the region of the liquid crystal layer 3 covered by the deflection electric field in the longitudinal direction Z) can be increased, and the deflection electric field is easier to color
  • the liquid crystal molecules in the vicinity of the film substrate and in the middle of the liquid crystal layer are covered, so that the required driving voltage is smaller.
  • the heights of the pixel electrode and the common electrode are small, about 0.04 ⁇ m, and the thickness of the liquid crystal cell is about 2.8 to 3.2 ⁇ m.
  • the heights of the pixel electrode and the common electrode disposed on the same array substrate are more High, for example, may be between 20% and 50% of the thickness of the liquid crystal cell, i.e., the height is in the range of about 0.56 ⁇ m to 1.6 ⁇ m.
  • the pixel electrode 6 and the common electrode 7 may be disposed to be evenly distributed on the first substrate 1, and the heights thereof may be the same, for example, the height H0 may be 0.8 ⁇ m.
  • the interval between the adjacent common electrode 7 and the pixel electrode 6 can be 12 ⁇ m like the IPS type liquid crystal display panel in the related art shown in FIG. 1.
  • the first substrate 1 may be an array substrate, and the second substrate 2 may be a counter substrate, such as a color filter substrate.
  • each of the pixel electrodes 6 and the common electrodes 7 are of a unitary structure, and the materials of the pixel electrode 6 and the common electrode 7 are both metal materials and ITO materials, wherein the metal materials can improve the contrast of the display panel. ITO materials can increase the transmittance.
  • the materials of the common electrode 6 and the pixel electrode 7 can be selected according to the required parameters.
  • the width W0 of the pixel electrode 6 and the common electrode 7 may be designed to be small, for example, 1 ⁇ m.
  • the common electrode and the pixel electrode in the display panel may also be respectively disposed on different substrates on both sides of the display panel, as shown in FIG. .
  • the common electrode 7 and the pixel electrode 6 in the display panel shown in FIG. 3 are respectively disposed on the second substrate 2 and the first substrate 1, with the The depth of the deflection electric field formed is deeper, and the deflection electric field makes it easier to cover the liquid crystal molecules in the vicinity of the first substrate, in the vicinity of the second substrate, and in the middle of the liquid crystal layer, so that the required driving voltage can be made smaller.
  • the display panel is based on the related art IPS type liquid crystal display panel shown in FIG. 1 , including the first substrate 1 and the second substrate 2 disposed opposite to each other, the first substrate 1 and the second substrate 2 A liquid crystal layer 3 is formed between the first substrate 1 and a plurality of pixel electrodes 6 on the first substrate 4;
  • the second substrate 2 includes: a second substrate 5 and is located A plurality of common electrodes 7 on the second substrate substrate 5, an orthographic projection of the plurality of pixel electrodes 6 on the first substrate substrate 4 and an orthographic projection of the plurality of common electrodes 7 on the first substrate substrate 4 at the first
  • the base substrate 4 is alternately arranged in the X direction.
  • a higher pixel electrode 6 and a common electrode 7 can be disposed.
  • the ratio of the height of the pixel electrode 6 to the thickness of the liquid crystal layer may be set to 20% to 50%; and/or the ratio of the height of the common electrode 7 to the thickness of the liquid crystal layer may be set to 20% to 50%.
  • the liquid crystal layer thickness of the IPS type liquid crystal display panel is usually 2.8 to 3.2 ⁇ m, and therefore, the heights H1 and H2 of the pixel electrode 6 and the common electrode 7 can be set to be the same and both are 0.56 to 1.6 ⁇ m.
  • the distance between the adjacent projections of the adjacent adjacent common electrodes 7 and the pixel electrodes 6 on the first base substrate 4 in the first direction is equal, for example, the distance may be set to 4 to 16 ⁇ m.
  • the first substrate 1 may be an array substrate, and the second substrate 2 may be a counter substrate.
  • each of the pixel electrodes 6 and the common electrodes 7 are of a unitary structure, and the materials of the pixel electrode 6 and the common electrode 7 are both metal materials to improve the contrast of the display panel.
  • the pixel electrode 6 and the common electrode 7 can be used.
  • the widths W1 and W2 are set to be the same, for example, the width is 0.5 ⁇ m to 2.5 ⁇ m.
  • the pixel electrode or the common electrode may be set to be narrow.
  • each of the pixel electrodes 6 and the common electrodes 7 may be prepared using a transparent ITO material to increase the transmittance.
  • the common electrode 7 and the pixel electrode 6 in the display panel provided by the present disclosure are respectively located on the both sides of the display panel, and after the pixel voltage is applied to the pixel electrode 6, a deflection electric field can be formed between the common electrode 7 and the pixel electrode 6.
  • the depth of the deflection electric field formed between the common electrode 7 and the pixel electrode 6 in the present embodiment is compared with the IPS type liquid crystal display panel of the related art shown in FIG.
  • the length in the direction Z is deeper, and the deflection electric field makes it easier to cover the liquid crystal molecules in the vicinity of the first substrate 1, the vicinity of the second substrate 2, and the intermediate portion of the liquid crystal layer 3, so that the required driving voltage is smaller.
  • FIG. 4 is a schematic view showing a case where a pixel electrode of a display panel of the related art is applied with a voltage of 7.2 V, and FIGS. 5 and 6 are applied with a voltage of 6.2 V to a pixel electrode of the display panel of the embodiment shown in FIGS. 2 and 3 of the present disclosure.
  • FIG. 7 is a schematic view showing the azimuth angles of liquid crystal molecules at different positions on the line A in FIGS. 4 to 6. In the display panel shown in FIG. 4 to FIG. 6, the thickness of the liquid crystal cell in FIG.
  • the width of the pixel electrode 6 and the common electrode 7 may each be 2.1 ⁇ m, and adjacent pixel electrodes in the first direction X
  • the distance between the 6 and the common electrode 7 is 12 ⁇ m; the thickness of the liquid crystal cell in FIG. 5 may be 2.8 ⁇ m, the width of the pixel electrode 6 and the common electrode 7 may each be 1 ⁇ m, and the heights of the pixel electrode 6 and the common electrode 7 are both 0.8 ⁇ m. , about 28.6% of the thickness of the liquid crystal cell, the distance between the pixel electrode 6 adjacent to the common electrode 7 in the first horizontal direction is 12 ⁇ m; the thickness of the liquid crystal cell in FIG.
  • the pixel electrode 6 may be 2.8 ⁇ m
  • the pixel electrode 6 and the common electrode 7 may each have a width of 1 ⁇ m
  • the heights of the pixel electrode 6 and the common electrode 7 are both 0.8 ⁇ m, between the adjacent pixel electrodes 6 in the first horizontal direction and the orthographic projection of the common electrode 7 on the first substrate 1.
  • the distance is 12 ⁇ m.
  • the “distance” between the pixel electrode 6 adjacent to the common electrode 7 in the first direction X in this embodiment specifically refers to the center of the pixel electrode 6 adjacent in the first direction X.
  • the distance between the line and the center line of the common electrode 7 in the first direction X is as shown by the distance S in FIG.
  • the line A is perpendicular to the first direction X, which is located between the adjacent pixel electrode 6 and the common electrode 7, and the distance from the nearest pixel electrode 6 or the common electrode 7 on the left and right sides is equal.
  • Line A is the main light-emitting area of the corresponding pixel unit in the display panel, and the deflection state of the liquid crystal molecules on the line A can reflect the electric field intensity distribution of the corresponding pixel unit to a large extent.
  • the abscissa "distance" in Fig. 7 indicates the distance between the liquid crystal molecules on the line A and the first substrate 1.
  • the voltage applied to the common electrode 7 of the display panel shown in FIG. 4 is 0 V, and the voltage applied to the pixel electrode 6 is 7.2 V; the voltage applied to the common electrode 7 of the display panel shown in FIGS. 5 and 6 is 0 V, The pixel voltage applied to the pixel electrode 6 is 6.2 V.
  • the deflection state of the liquid crystal molecules at the line A in FIGS. 5 and 6 is substantially the same as the deflection state of the liquid crystal molecules at the line A in FIG.
  • FIG. 8 is a schematic diagram of a pixel voltage-transmittance curve in the display panel shown in FIG. 4 to FIG. 6.
  • the maximum transmittance of the display panel in the related art shown in FIG. 4 is used as a reference value, corresponding to The voltage applied to the pixel electrode of the maximum transmittance is 7.2V, that is, the driving voltage corresponding to the display panel shown in FIG. 4 is 7.2V; compared with the display panel shown in FIG. 4, the embodiment shown in FIG. 5 and FIG.
  • the maximum transmittance of the display panel in the example can be increased by about 7.5%, wherein the maximum transmittance of the display panel shown in FIG. 5 is larger than the maximum transmittance of the display panel shown in FIG.
  • the pixel voltage of the maximum transmittance is about 6.2V, that is, the driving voltage corresponding to the display panel shown in FIG. 5 and FIG. 6 is 6.2V.
  • the driving voltage of the display panel of the present application shown in FIG. 5 and FIG. 6 can be reduced by about 1 V and the maximum transmittance by 7.5% compared with the display panel of the related art shown in FIG. 4 .
  • the reason why the display panel provided in this embodiment can improve the transmittance of the display panel is that the area corresponding to the pixel electrode 6 and the common electrode 7 on the display panel is opaque, and the widths of the pixel electrode 6 and the common electrode 7 in this embodiment are different.
  • the width of the pixel electrode 6 and the common electrode 7 in the related art It is smaller than the width of the pixel electrode 6 and the common electrode 7 in the related art, and the number of the pixel electrode 6 and the common electrode 7 (the number is determined by the distance between the adjacent pixel electrode 6 and the common electrode 7, and the distance between the two is larger,
  • the area of the area is such that the maximum transmittance of the display panel provided in this embodiment is greater than the maximum transmittance of the display panel in the related art.
  • the width W1 of the pixel electrode 6 and the width W2 of the common electrode 7 the maximum transmission of the display panel. The greater the rate.
  • the width W1 of the pixel electrode 6 in the first direction X may be set to 0.5 ⁇ m to 2.5 ⁇ m, and the common electrode 7 may be in the first direction X.
  • the upper width W2 is set to be 0.5 ⁇ m to 2.5 ⁇ m.
  • the length of the pixel electrode 6 and the common electrode 7 in the second direction Y in the present disclosure is approximately equal to the length of one pixel unit on the display panel.
  • the distances S between the adjacent common electrodes 7 and the pixel electrodes 6 in the first direction X may be equal.
  • the size of each pixel unit on the display panel is equal and the pixel units are evenly distributed.
  • the corresponding display gray levels are equal, which is convenient for driving.
  • the range S of the distance between the adjacent common electrode 7 and the pixel electrode 6 in the first direction X is: 4 ⁇ m to 16 ⁇ m.
  • an electric field having a certain intensity is formed between the pixel electrode 6 and the common electrode 7, and if the distance S between the adjacent common electrode 7 and the pixel electrode 6 in the first direction X is smaller, it is required to be applied.
  • the pixel voltage to the pixel electrode 6 is smaller. That is, the smaller the distance between the adjacent common electrode 7 and the pixel electrode 6 in the first direction X, the smaller the driving voltage corresponding to the display panel.
  • the distance S between the common electrode 7 and the pixel electrode 6 decreases, the number of the common electrode 7 and the pixel electrode 6 to be disposed on the display panel increases, and the widths W1, W2 of the common electrode 7 and the pixel electrode 6 increase. Under certain circumstances, the area of the light-transmitting area on the display panel is reduced, and the maximum transmittance of the display panel is lowered.
  • the distance S between the common electrode 7 and the pixel electrode 6 can be set to 4 ⁇ m to 16 ⁇ m in consideration of the requirements of the driving voltage and the light transmittance.
  • the driving voltage of the display panel can be reduced while adjusting the distance S between the adjacent common electrode 7 and the pixel electrode 6, and the widths W1 and W2 of the common electrode 7 and the pixel electrode 6.
  • the maximum transmittance of the display panel is not lower than the current level.
  • the ratio of the height H1 of the pixel electrode 6 to the thickness d of the liquid crystal layer 3 is in the range of 20% to 50%, and the height H2 of the common electrode 7 and the liquid crystal layer 3
  • the ratio of the thickness d is in the range of 20% to 50%.
  • the heights H1 and H2 of the common electrode 7 increase, and the pixel electrode 6 and the common electrode 7 overlap in the longitudinal direction Z.
  • the ratio of the height H1 of the pixel electrode 6 to the thickness d of the liquid crystal layer 3 may be set to 20% to 50%, and the ratio of the height H2 of the common electrode 7 to the thickness d of the liquid crystal layer 3 may be set to 20 % ⁇ 50%.
  • the thickness d (liquid crystal cell box thickness) of the liquid crystal layer 3 is generally 2.8 ⁇ m to 3.2 ⁇ m.
  • the height H1 of the pixel electrode 6 can be set at 0.56 ⁇ m to 1.6 ⁇ m
  • the electrode of the common electrode 7 is The height H2 is set to be 0.56 ⁇ m to 1.6 ⁇ m.
  • the first substrate 1 may be an array substrate including: a plurality of thin film transistors (not shown) on the side of the first substrate substrate 4 facing the second substrate 2, and the first side of the thin film transistor facing away from the first substrate a passivation layer 9 on one side of the base substrate 4 and a first alignment layer 10 on the side of the passivation layer 9 facing away from the first base substrate 4, and the pixel electrode 6 is located between the passivation layer 9 and the first alignment layer 10.
  • the thin film transistor includes a gate, a gate insulating layer 8, a source and a drain (both gate, source and drain are not shown), and the pixel electrode 6 is electrically connected to the drain of the corresponding thin film transistor.
  • the second substrate 2 may be a color filter substrate including: a color film layer 11 on a side of the second substrate substrate 5 facing the first substrate 1 and a second layer on a side of the color film layer 11 facing away from the second substrate substrate 5
  • the alignment layer 12 and the common electrode 7 are located between the color film layer 11 and the second alignment layer 12.
  • the first alignment layer 10 and the second alignment layer 12 are both horizontally oriented.
  • FIG. 9 is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • each pixel electrode 6 and each common electrode 7 in this embodiment are not an overall structure.
  • the pixel electrode 6 in this embodiment includes: a first pedestal 61 on a side of the first base substrate 4 facing the second substrate 2 and a side surface covering the first pedestal and facing away from the first base substrate a first conductive outer jacket 62 of a surface on one side of the fourth side;
  • the common electrode 7 includes: a second base 71 on a side of the second base substrate 5 facing the first substrate 1 and a side covering the second base and facing away from the second A second conductive outer sleeve 72 on the surface of one side of the base substrate 5.
  • first pedestal 61 and the second pedestal 71 are both made of a resin material
  • first conductive outer casing 62 and the second conductive outer casing 72 are both made of a metal material or an ITO material.
  • one of the common electrode 7 and the pixel electrode 6 may be a monolithic structure composed of a metal material, and the other may be a non-unitary structure composed of a pedestal and a conductive outer casing.
  • FIG. 10 is a schematic cross-sectional view of a display panel according to an embodiment of the present disclosure.
  • the pixel electrode 6 and the common electrode 7 in the display panel shown in FIG. 10 are both disposed on the first base substrate 4.
  • the pixel electrode 6 includes a first pedestal 61 on a side of the first base substrate 4 facing the second substrate 2, a side surface covering the first pedestal, and a surface facing away from the side of the first base substrate 4.
  • the common electrode 7 includes a second base 71 on a side of the first base substrate 4 facing the second substrate 2 and a side covering the second base and a side facing away from the first base substrate 4
  • the second electrically conductive outer sleeve 72 of the surface
  • the first pedestal 61 and the second pedestal 71 are both made of a resin material
  • the first conductive outer casing 62 and the second conductive outer casing 72 are both made of a metal material or an ITO material.
  • one of the common electrode 7 and the pixel electrode 6 may be a monolithic structure composed of a metal material, and the other may be a non-unitary structure composed of a pedestal and a conductive outer casing.
  • FIG. 11 is a flowchart of a method for fabricating a display panel according to an embodiment of the present disclosure. As shown in FIG. 11 , the method for preparing the display panel in the above embodiment includes:
  • Step S1 forming a first substrate.
  • the first substrate includes a first substrate and at least one pixel electrode on the first substrate.
  • the first substrate in this embodiment may be an array substrate, including: a thin film transistor, a passivation layer, and a first alignment layer, and the pixel electrode is located between the passivation layer and the first alignment layer.
  • Step S1 specifically includes:
  • Step S101 forming a thin film transistor.
  • a thin film transistor is formed on the first substrate by using an existing thin film transistor fabrication process, and the thin film transistor includes a gate, a gate insulating layer, a source, and a drain, and the specific process is not detailed here. description. It should be noted that the thin film transistor in the present disclosure may be either a bottom gate thin film transistor or a top gate thin film transistor.
  • Step S102 forming a passivation layer.
  • step S102 a film of a passivation material is formed on a side of the thin film transistor facing away from the first substrate, and a film of the passivation material is patterned once to obtain a pattern of the passivation layer.
  • a via hole is formed in a region of the passivation layer corresponding to the drain of the thin film transistor.
  • the patterning process in the present disclosure includes a process of photoresist coating, exposure, development, etching, photolithography, and the like.
  • Step S103 forming a pixel electrode.
  • the step of forming the pixel electrode includes: first, forming a first conductive material film on a side of the passivation layer facing away from the first substrate; A patterning process is performed on the first conductive material film to obtain a pattern of the pixel electrode.
  • the material of the first conductive material film is a metal material.
  • the step of forming the pixel electrode includes: first, forming a first insulating material film on a side of the passivation layer facing away from the first substrate substrate; Forming a first insulating material film to obtain a pattern of at least one first pedestal; then, forming a third conductive material film on a side of the passivation layer facing away from the first substrate; and finally, third The conductive material film is subjected to a patterning process to obtain a pattern in which at least one of the first pedestal surfaces respectively forms a pattern of the corresponding at least one first conductive outer casing to form a pixel electrode.
  • the material of the first insulating material film is an organic resin material
  • the material of the third conductive material film is a metal material.
  • the third conductive material may be sprayed or printed directly on the outer surface of the first pedestal to obtain a pattern of the first conductive outer casing.
  • the pixel electrode is connected to the drain of the corresponding thin film transistor through a via on the passivation layer.
  • the width of the pixel electrode in the first direction ranges from 0.5 ⁇ m to 2.5 ⁇ m.
  • the distance between adjacent pixel electrodes in the first direction is: 8 ⁇ m to 32 ⁇ m.
  • the height of the pixel electrode in the longitudinal direction ranges from 0.56 ⁇ m to 1.6 ⁇ m.
  • Step S104 forming a first alignment layer.
  • step S104 first, a film of an alignment material is formed on a side of the passivation layer facing away from the first substrate, and optionally, the material of the film of the alignment material is polyimide; and then, by rubbing or photo-alignment The alignment material film is subjected to a horizontal alignment treatment to obtain a first alignment layer.
  • Step S2 forming a second substrate.
  • the second substrate includes a second substrate and at least one common electrode on the second substrate.
  • the second substrate in this embodiment may be a color film substrate (to the substrate), comprising: a color film layer and a second alignment layer, and the common electrode is located between the color film layer and the second alignment layer.
  • Step S2 specifically includes:
  • Step S201 forming a color film layer.
  • step S201 a black matrix and a color matrix pattern are formed on one side of the second substrate by an existing color film layer preparation process, and the specific process is not described in detail herein.
  • Step S202 forming a common electrode.
  • the step of forming the common electrode includes: first, forming a second conductive material film on a side of the color film layer facing away from the second substrate; A patterning process is performed on the second conductive material film to obtain a pattern of the common electrode.
  • the material of the second conductive material film is a metal material or an ITO material.
  • the step of forming the common electrode includes: first, forming a second insulating material film on a side of the color film layer facing away from the second substrate; Forming a second insulating material film to obtain a pattern of at least one second pedestal; then, forming a fourth conductive material film on a side of the passivation layer facing away from the second substrate; and finally, fourth The conductive material film is subjected to a patterning process to obtain a pattern in which at least one second conductive base is formed on at least one of the second pedestals to form a common electrode.
  • the material of the second insulating material film is an organic resin material
  • the material of the fourth conductive material film is a metal material or an ITO material.
  • the width of the common electrode in the first direction ranges from 0.5 ⁇ m to 2.5 ⁇ m.
  • the distance between the adjacent common electrodes in the first direction is: 8 ⁇ m to 32 ⁇ m.
  • the height of the common electrode in the longitudinal direction ranges from 0.56 ⁇ m to 1.6 ⁇ m.
  • Step S203 forming a second alignment layer.
  • step S204 first, a film of an alignment material is formed on a side of the color film layer facing away from the second substrate, and optionally, the material of the film of the alignment material is polyimide; and then, by rubbing or photo-alignment The oriented material film is subjected to a horizontal alignment treatment to obtain a second alignment layer.
  • Step S3 performing the box processing on the first substrate and the second substrate.
  • the orthographic projection of the at least one pixel electrode on the first substrate is in contact with the at least one common electrode
  • the orthographic projections on the first substrate substrate are alternately disposed in a first direction in which the first substrate substrate extends, and a liquid crystal layer is filled between the first substrate and the second substrate.
  • the distance between the adjacent common electrode and the pixel electrode in the first direction X may be equal.
  • the distance between the adjacent common electrode and the pixel electrode in the first direction is in the range of 4 ⁇ m to 16 ⁇ m.
  • the above preparation method is directed to a display panel in which the pixel electrode and the common electrode are respectively disposed on two oppositely disposed first and second substrates, such as the display panel shown in FIGS. 3 and 8.
  • the display panel provided on the same substrate as the pixel electrode and the common electrode shown in FIG. 2 and FIG. 9 is different from the preparation method shown in FIG. 12 in that the method includes the steps of: forming a first on the first substrate. a film of a conductive material; and patterning the first conductive material film to obtain a pattern of the at least one pixel electrode and the at least one pixel electrode, as shown in step S103' in FIG.
  • the step of forming the pixel electrode and the common electrode includes: first, forming a first conductive layer on a side of the passivation layer facing away from the first substrate substrate a material film; then, a patterning process is performed on the first conductive material film to obtain a pattern of the pixel electrode and the common electrode.
  • the material of the first conductive material film is a metal material.
  • the step of forming the pixel electrode and the common electrode includes: first, forming a first side of the passivation layer facing away from the first substrate a thin film of insulating material; then, patterning the first insulating material film to obtain a pattern of at least one first pedestal and at least one second pedestal; and then, a passivation layer facing away from the first substrate Forming a third conductive material film on the side; finally, patterning the third conductive material film to obtain a pattern of forming at least one first conductive outer casing on at least one first pedestal surface to form a pixel electrode and A pattern is formed on each of the at least one second pedestal surface to form a pattern of the corresponding at least one second electrically conductive outer casing to form a common electrode.
  • the material of the first insulating material film is an organic resin material
  • the material of the third conductive material film is a metal material.
  • the third conductive material may be sprayed or printed directly on the outer surfaces of the first pedestal and the second pedestal to obtain the first conductive The pattern of the jacket and the second conductive jacket.
  • step S1' at this time includes steps S101, S102, S103', and S104
  • step S2' includes steps S201 and S203.
  • steps S101, S102, S104 and steps S201 and S203 and step S3 is the same as previously described with reference to FIG. 11, and will not be repeated here.
  • An embodiment of the present disclosure provides a display device, including: a display panel and a backlight for providing backlighting to the display panel, the display panel adopting the display panel in the above embodiment, corresponding to the specific description of the display panel
  • a display device including: a display panel and a backlight for providing backlighting to the display panel, the display panel adopting the display panel in the above embodiment, corresponding to the specific description of the display panel
  • the display device in the present disclosure may specifically be any product or component having a display function, such as a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigator, and the like.

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Abstract

一种显示面板包括：相对设置的第一基板(1)和第二基板(2)、以及所述第一基板(1)和所述第二基板(2)之间的液晶层(3)；以及设置在所述第一基板(1)和所述第二基板(2)中的至少一个上的至少一个像素电极(6)和至少一个公共电极(7)；其中，所述至少一个像素电极(6)在所述第一基板(1)的第一衬底基板(4)上的正投影与所述至少一个公共电极(7)在所述第一衬底基板(4)上的正投影在第一衬底基板(4)延伸的第一方向上交替设置；以及其中，所述至少一个像素电极(6)的高度与所述液晶层(3)的厚度的比值范围是：20％～50％；和/或所述至少一个公共电极(7)的高度与所述液晶层(3)的厚度的比值范围是：20％～50％。

Description

显示面板及其制备方法和显示装置 技术领域
本公开涉及显示领域，具体的涉及一种显示面板及其制备方法和显示装置。
背景技术
平面内切换(In-Plane Switching，简称IPS)型液晶显示装置具有响应速度快、可视角度大、色彩真实、触摸无水纹等优点。
发明内容
本公开提出了一种显示面板及其制备方法和显示装置。
所述显示面板包括：相对设置的第一基板和第二基板、以及所述第一基板和所述第二基板之间形成的液晶层，其中第一基板包括第一衬底基板；以及设置在所述第一基板和所述第二基板中的至少一个上的至少一个像素电极和至少一个公共电极；其中所述至少一个像素电极在所述第一衬底基板上的正投影与所述至少一个公共电极在所述第一衬底基板上的正投影在第一衬底基板延伸的第一方向上交替设置；以及所述至少一个像素电极的高度与所述液晶层的厚度的比值范围是：20％～50％；和/或所述至少一个公共电极的高度与所述液晶层的厚度的比值范围是：20％～50％。
在一个实施例中，所述至少一个像素电极设置在所述第一衬底基板上；以及所述第二基板包括第二衬底基板，并且所述至少一个公共电极设置在所述第二衬底基板上。
在一个实施例中，所述至少一个像素电极和所述至少一个公共电极交替设置在所述第一衬底基板上。
在一个实施例中，在第一方向上任意相邻的公共电极和像素电极在所述第一衬底基板上的正投影之间的距离相等。
在一个实施例中，所述距离的范围是：4μm～16μm。
在一个实施例中，所述至少一个像素电极的高度范围是：0.56μm～1.6μm；和/或所述至少一个公共电极的高度范围是：0.56μm～1.6μm。
在一个实施例中，所述至少一个像素电极在第一方向上的宽度范围是：0.5μm～2.5μm；所述至少一个公共电极在第一方向上的宽度范围是：0.5μm～2.5μm。
在一个实施例中，所述至少一个像素电极材料为金属材料；和/或，所述至少一个公共电极的材料为金属材料。
在一个实施例中，所述至少一个像素电极中的每一个像素电极包括：第一基座和第一导电外套，所述第一基座位于所述第一衬底基板朝向所述液晶层一侧，所述第一导电外套覆盖所述第一基座的侧面以及所述第一基座朝向所述液晶层一侧的表面；和/或，所述至少一个公共电极中的每一个公共电极包括：第二基座和第二导电外套，所述第二基座位于所述第二衬底基板朝向所述液晶层一侧，所述第二导电外套覆盖所述第二基座的侧面以及所述第二基座朝向所述液晶层一侧的表面。
在一个实施例中，所述第一基板还包括：钝化层和第一取向层；所述钝化层位于第一衬底基板朝向所述第二基板一侧，所述第一取向层位于所述钝化层背向所述第一衬底基板一侧；所述至少一个像素电极位于所述钝化层和第一取向层之间。
在一个实施例中，所述第二基板还包括：彩膜层和第二取向层；所述彩膜层位于第二衬底基板朝向所述第一基板一侧，所述第二取向层位于所述彩膜层背向所述第二衬底基板一侧；所述至少一个公共电极位于所述彩膜层和所述第二取向层之间。
本公开还提供了一种显示装置，包括上述的显示面板和用于给显示面板提供背光的背光源。
本公开还提供了一种显示面板的制备方法，包括：形成第一基板以使得所述第一基板包括第一衬底基板并且所述第一基板和所述第二基板中的至少一个上形成至少一个像素电极和至少一个公共电 极；将所述第一基板和所述第二基板进行对盒以使得所述至少一个像素电极在所述第一衬底基板上的正投影与所述至少一个公共电极在所述第一衬底基板上的正投影在第一衬底基板延伸的第一方向上交替设置，以及在所述第一基板和所述第二基板之间形成液晶层以使得所述至少一个像素电极的高度与所述液晶层的厚度的比值范围是：20％～50％；和/或所述至少一个公共电极的高度与所述液晶层的厚度的比值范围是：20％～50％。
在一个实施例中，所述形成第一基板和第二基板以使得所述第一基板包括第一衬底基板并且所述第一基板和所述第二基板中的至少一个上设置有至少一个像素电极和至少一个公共电极的步骤包括：在所述第一基板的第一衬底基板上形成所述至少一个像素电极；以及在所述第二基板的第二衬底基板上形成所述至少一个公共电极。
在一个实施例中，所述形成第一基板和第二基板以使得所述第一基板包括第一衬底基板并且所述第一基板和所述第二基板中的至少一个上设置有至少一个像素电极和至少一个公共电极的步骤包括：在所述第一基板的第一衬底基板上形成所述至少一个像素电极和所述至少一个公共电极。
在一个实施例中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极的步骤包括：在第一衬底基板上形成第一导电材料薄膜；对所述第一导电材料薄膜进行构图工艺，以得到所述至少一个像素电极的图形；在所述第二基板的第二衬底基板上形成所述至少一个公共电极的步骤包括：在第二衬底基板上形成第二导电材料薄膜；对所述第二导电材料薄膜进行构图工艺，以得到所述至少一个公共电极的图形。
在一个实施例中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极和所述至少一个公共电极的步骤包括：在第一衬底基板上形成第一导电材料薄膜；以及对所述第一导电材料薄膜进行构图工艺，以得到所述至少一个像素电极和所述至少一个像素电极的图形。
在一个实施例中，所述第一导电材料薄膜的材料为金属材料； 和/或所述第二导电材料薄膜的材料为金属材料。
在一个实施例中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极的步骤包括：在第一衬底基板上形成第一绝缘材料薄膜；对所述第一绝缘材料薄膜进行构图工艺，以得到至少一个第一基座的图形；在所述第一衬底基板朝向所述第一基座的一侧形成第三导电材料薄膜，对所述第三导电材料薄膜进行构图工艺，以得到至少一个第一导电外套的图形，所述第一导电外套与所述第一基座一一对应，所述第一导电外套覆盖对应的所述第一基座的侧面以及背向所述第一衬底基板一侧的表面；和/或，所述在所述第二基板的第二衬底基板上形成所述至少一个公共电极的步骤包括：在第二衬底基板上形成第二绝缘材料薄膜；对所述第二绝缘材料薄膜进行构图工艺，以得到至少一个第二基座的图形；在所述第二衬底基板朝向所述第二基座的一侧形成第四导电材料薄膜；对所述第四导电材料薄膜进行构图工艺，以得到至少一个第二导电外套的图形，所述第二导电外套与所述第二基座一一对应，所述第二导电外套覆盖对应的所述第二基座的侧面以及背向所述第二衬底基板一侧的表面。
在一个实施例中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极的步骤包括：在第一衬底基板上形成第一绝缘材料薄膜；对所述第一绝缘材料薄膜进行构图工艺，以得到至少一个第一基座的图形；在所述第一基座的外表面上喷涂或打印第三导电材料以得到至少一个第一导电外套的图形，所述第一导电外套与所述第一基座一一对应，所述第一导电外套覆盖对应的所述第一基座的侧面以及背向所述第一衬底基板一侧的表面；和/或，所述在所述第二基板的第二衬底基板上形成所述至少一个公共电极的步骤包括：在第二衬底基板上形成第二绝缘材料薄膜；对所述第二绝缘材料薄膜进行构图工艺，以得到至少一个第二基座的图形；在所述第二基座的外表面上喷涂或打印第四导电材料薄膜，以得到至少一个第二导电外套的图形，所述第二导电外套与所述第二基座一一对应，所述第二导电外套覆盖对应的所述第二基座的侧面以及背向所述第二衬底基板一侧的表面。
附图说明
图1为相关技术中一种IPS型显示面板的截面示意图；
图2为本公开实施例提供的一种显示面板的结构示意图；
图3为本公开实施例提供的一种显示面板的结构示意图；
图4为相关技术中的显示面板的像素电极施加7.2V电压时的示意图；
图5为本公开中的显示面板的像素电极施加6.2V电压时的示意图；
图6为本公开中的显示面板的像素电极施加6.2V电压时的示意图；
图7为图4至图6中线A上不同位置的液晶分子的方位角的示意图；
图8为图4至图6所示显示面板中的像素电压-透过率曲线示意图；
图9为本公开实施例提供的一种显示面板的截面示意图；
图10为本公开实施例提供的一种显示面板的截面示意图；
图11为本公开实施例提供的一种显示面板的制备方法的流程图；以及
图12为本公开实施例提供的一种显示面板的制备方法的流程图。
具体实施方式
为使本领域的技术人员更好地理解本公开的技术方案，下面结合附图对本公开提供的一种显示面板及其制备方法和显示装置进行详细描述。
本公开中以公共电极上施加的电压为接地电压(大小接近于0V)为例进行示意性说明。
本公开中的“驱动电压”是指显示面板的透过率达到最大值时施加至像素电极上的像素电压，在实际应用中驱动芯片向源极驱动提 供该驱动电压，源极驱动基于该驱动电压转化为对应256种不同灰阶的像素电压，其中像素电压的最大值等于驱动电压值。
本公开中显示面板的“透过率”是指显示面板出光面的光强与显示面板入光面的光强的比值。
图1为一种相关技术中IPS型显示面板的截面示意图。如图1所示，多个像素电极6和多个公共电极7同层设置于阵列基板1上且两者交替排布，像素电极6和公共电极7均为条状或面板，其高度较小，例如高度可以为0.04μm。液晶盒盒厚(液晶层的厚度)通常为2.8至3.2μm。在未形成电场时，液晶层3中的液晶分子在取向层的作用下呈水平状态；在向公共电极7和像素电极6分别施加电压并在二者之间形成压差时，可在液晶层3内形成水平偏转电场，驱动液晶分子在水平面内进行转动。
在实际应用中，在向公共电极7和像素电极6施加电压时，形成的电场仅分布于接近阵列基板1的位置，而在彩膜基板2附近的位置其电场强度较弱甚至无电场。因此，位于彩膜基板2附近的液晶分子主要靠中间层的液晶分子的转动带动其转动。为此，通常仅能通过施加较大驱动电压，以使得偏转电场能尽量分布在彩膜基板2附近从而驱动位于彩膜基板2附近的液晶分子进行偏转。然而，高驱动电压会对驱动芯片的要求更高，同时也会加重驱动芯片的负担。
为了在减小驱动电压的情况下能够尽量驱动位于彩膜基板2附近的液晶分子偏转，本申请的实施例提供了一种显示面板。该显示面板包括：相对设置的第一基板和第二基板、以及所述第一基板和所述第二基板之间的液晶层；以及设置在所述第一基板和所述第二基板中的至少一个上的至少一个像素电极和至少一个公共电极；其中，所述至少一个像素电极在所述第一衬底基板上的正投影与所述至少一个公共电极在所述第一衬底基板上的正投影在第一衬底基板延伸的第一方向上交替设置；以及其中，所述至少一个像素电极的高度与所述液晶层的厚度的比值范围是：20％～50％；和/或所述至少一个公共电极的高度与所述液晶层的厚度的比值范围是：20％～50％。
在本申请的显示面板中，增大了像素电极和公共电极的高度，使得像素电极和公共电极的高度与液晶层的厚度比值相对于相关技术而言显著增大，即增加像素电极和公共电极之间形成的电场的纵深(液晶层被偏转电场所覆盖的区域在纵向方向上的长度)，从而能够驱动例如靠近另一侧的基板附近的液晶分子。
图2示出了根据本公开一个实施例的显示面板，其基于图1所示的相关技术的IPS型液晶显示面板，包括相对设置的第一基板1和第二基板2、以及设置在第一基板1和第二基板2之间的液晶层3。第一基板1包括第一衬底基板4和设置在第一衬底基板4上的多个像素电极6和多个公共电极7；多个像素电极6和多个公共电极7均为条状，并且在第一衬底基板4延伸的第一方向(即图2所示的方向X)上交替设置。与图1所示的相关技术的IPS型显示面板相比，在图2所示的本申请实施例的显示面板中，像素电极6和公共电极7的高度H0与液晶层的厚度之间的比值显著增大，因此可以增加公共电极7和像素电极6之间形成的偏转电场的纵深(液晶层3被偏转电场所覆盖的区域在纵向方向Z上的长度)更深，该偏转电场更容易对彩膜基板附近以及液晶层中间位置的液晶分子均进行覆盖，因而所需的驱动电压更小。
如上所述，在相关技术中，像素电极和公共电极的高度很小，大概为0.04μm，而液晶盒厚度大约为2.8至3.2μm。在本发明中，如图2所示，为了提交像素电极6和公共电极7之间形成的电场的场深，在一个实施例中，设置在同一阵列基板上的像素电极和公共电极的高度更高，例如可以为液晶盒厚度的20％-50％之间，即高度在大约0.56μm-1.6μm范围内。
在图2所示的实施例中，可以将像素电极6和公共电极7设置为在第一基板1上均匀分布，二者高度可以相同，例如高度H0可以为0.8μm。可以与图1所示的相关技术中的IPS型液晶显示面板一样，相邻的公共电极7和像素电极6之间的间隔为12μm。
第一基板1可以为阵列基板，第二基板2可以为对盒基板，例 如彩膜基板。可选地，各像素电极6和各公共电极7均为整体结构，且像素电极6和公共电极7的材料均为金属材料，也可以为ITO材料，其中金属材料可以提高显示面板的对比度，而ITO材料可以提高透过率。实际应用中，可以根据所需的参数来选择公共电极6和像素电极7的材料。在采用金属材料制备像素电极6和公共电极7时，为了提高透过率，可以将像素电极6和公共电极7的宽度W0设计为较小，例如为1μm。
根据本公开的一个实施例，显示面板中的公共电极和像素电极也可以分别设置在显示面板两侧的不同基板上，如图3所示的本公开实施例提供的一种显示面板的结构示意图。与图1所示的相关技术IPS型液晶显示面板相比，图3所示的显示面板中的公共电极7和像素电极6分别设置在第二基板2和第一基板1上，二者之间形成的偏转电场的纵深更深，该偏转电场更容易对第一基板附近、第二基板附近、以及液晶层中间位置的液晶分子均进行覆盖，因而所需的驱动电压可以更小。
具体地，如图3所示，该显示面板基于图1所示的相关技术的IPS型液晶显示面板，包括相对设置的第一基板1和第二基板2，第一基板1和第二基板2之间形成有液晶层3，第一基板1包括：第一衬底基板4和位于第一衬底基板4上的多个像素电极6；第二基板2包括：第二衬底基板5和位于第二衬底基板5上的多个公共电极7，多个像素电极6在第一衬底基板4上的正投影与多个公共电极7在第一衬底基板4上的正投影在第一衬底基板4延伸的X方向上交替设置。
如图3所示，可以设置较高的像素电极6和公共电极7。例如，可以将像素电极6的高度与液晶层的厚度的比值范围设置为20％～50％；和/或将公共电极7的高度与液晶层的厚度的比值范围设置为20％～50％。通常IPS型液晶显示面板的液晶层厚度在2.8至3.2μm，因此，可以将像素电极6和公共电极7的高度H1和H2设置为相同并且均为0.56至1.6μm。另外，如图3所示，在第一方向上任意相邻 的公共电极7和像素电极6在第一衬底基板4上的正投影之间的距离相等，例如距离可以设置为4至16μm。
第一基板1可以为阵列基板，第二基板2可以为对盒基板。可选地，各像素电极6和各公共电极7均为整体结构，且像素电极6和公共电极7的材料均为金属材料以提高显示面板的对比度，此时可以将像素电极6和公共电极7的宽度W1和W2设置为相同，例如宽度均为0.5μm～2.5μm。在提高显示面板对比度的同时，为了提高显示面板的透过率，可以将像素电极或公共电极设置得较窄。可选地，可以采用透明的ITO材料来制备各像素电极6和各公共电极7以增大透过率。
本公开提供的显示面板中的公共电极7和像素电极6分别位于显示面板的两侧基板上，在向像素电极6施加像素电压后，在公共电极7和像素电极6之间可形成偏转电场。与图1所示的相关技术的IPS型液晶显示面板相比，本实施例中的公共电极7和像素电极6之间形成的偏转电场的纵深(液晶层3被偏转电场所覆盖的区域在纵向方向Z上的长度)更深，该偏转电场更容易对第一基板1附近、第二基板2附近、以及液晶层3中间位置的液晶分子进行覆盖，因而所需的驱动电压更小。
图4为相关技术中的显示面板的像素电极施加7.2V电压时的示意图，图5和图6为本公开的图2和图3所示的实施例中的显示面板的像素电极施加6.2V电压时的示意图，图7为图4至图6中线A上不同位置的液晶分子的方位角的示意图。在图4至图6所示的显示面板中，图4中液晶盒厚可以为2.8μm，像素电极6和公共电极7的宽度均可以为2.1μm，在第一方向X上相邻的像素电极6与公共电极7之间的距离为12μm；图5中液晶盒厚可以为2.8μm，像素电极6和公共电极7的宽度均可以为1μm，像素电极6和公共电极7的高度均为0.8μm，约为液晶盒厚的28.6％，在第一水平方向上相邻的像素电极6与公共电极7之间的距离为12μm；图6中液晶盒厚可以为2.8μm，像素电极6和公共电极7的宽度均可以为1μm，像素电极6和公共电极7的高度均为0.8μm，在第一水平方向上相邻的像素电 极6与公共电极7在第一基板1上的正投影之间的距离为12μm。
需要说明的是，本实施例中的在第一方向X上相邻的像素电极6与公共电极7之间的“距离”具体是指，在第一方向X上相邻的像素电极6的中心线与公共电极7的中心线在第一方向X上的距离，如图3中的距离S所示。
线A垂直于第一方向X，其位于相邻的像素电极6和公共电极7之间，且距离左、右两侧最近的像素电极6或公共电极7的距离相等。线A为显示面板中对应像素单元的主要出光区域，线A上液晶分子的偏转状态可在较大程度上反映出对应像素单元的电场强度分布。图7中的横坐标“距离”表示位于线A上的液晶分子与第一基板1之间的距离。
图4所示的显示面板的公共电极7上施加的电压为0V，像素电极6上施加的电压为7.2V；图5和图6所示的显示面板的公共电极7上施加的电压为0V，像素电极6上施加的像素电压为6.2V，通过图7可见，图5和图6中线A处液晶分子的偏转状态与图4中线A处的液晶分子偏转状态基本相同。
图8为图4至图6所示显示面板中的像素电压-透过率曲线示意图，如图8所示，以图4所示相关技术中的显示面板的最大透过率作为参考值，对应最大透过率的像素电极上施加的电压为7.2V，即图4所示显示面板对应的驱动电压为7.2V；相较于图4所示的显示面板，图5和图6所示本实施例中的显示面板的最大透过率可大约提升7.5％，其中图5所示的显示面板的最大透过率相比于图6所示的显示面板的最大透过率更大一些，且对应最大透过率的像素电压约为6.2V，即图5和图6所示显示面板对应的驱动电压为6.2V。
由此可见，相较于图4所示的相关技术中的显示面板，图5和图6所示的本申请中的显示面板的驱动电压可下降约1V，最大透过率提升7.5％。
本实施例提供的显示面板可提升显示面板的透过率的原因在于，显示面板上对应像素电极6和公共电极7的区域不透光，在本实施例中像素电极6和公共电极7的宽度小于相关技术中像素电极6 和公共电极7的宽度，且像素电极6和公共电极7的数量(该数量由相邻像素电极6和公共电极7之间的距离决定，两者间距离越大，则显示面板中设置的像素电极6和公共电极7的数量越少)均相等的情况下，则使得本实施例提供的显示面板上的透光区域的面积要大于相关技术中显示面板上透光区域的面积，因此本实施例提供的显示面板的最大透过率大于相关技术中显示面板的最大透过率。
继续参见图3所示，在相邻像素电极6和公共电极7之间的距离S一定的情况下，像素电极6的宽度W1和公共电极7的宽度W2越小，则显示面板的最大透过率越大。然而，由于本实施例中的像素电极6和公共电极7具有一定高度，若宽度W1、W2过小，则使得像素电极6和公共电极7容易出现倾斜或形变。考虑到显示面板的透过率以及像素电极6和公共电极7的稳定性，可以将像素电极6在第一方向X上的宽度W1设置为0.5μm～2.5μm，公共电极7在第一方向X上的宽度W2设置为0.5μm～2.5μm。
需要说明的是，本公开中像素电极6和公共电极7在第二方向Y上的长度与显示面板上一个像素单元的长度近似相等。
本实施例中，对于在第一方向X上任意相邻的公共电极7和像素电极6之间的距离S可以均相等，此时显示面板上各像素单元的尺寸均相等且像素单元均匀分布。此外，对于各像素单元而言，对于相同的像素电压，其所对应的显示灰阶均相等，便于驱动。
可选地，在第一方向X上相邻的公共电极7和像素电极6之间的距离S的范围是：4μm～16μm。在本公开中，在像素电极6和公共电极7之间形成具有一定强度的电场，若在第一方向X上相邻的公共电极7和像素电极6之间的距离S越小，则需要施加至像素电极6上的像素电压越小。即，在第一方向X上相邻的公共电极7和像素电极6之间的距离越小，该显示面板对应的驱动电压越小。然而，随着公共电极7和像素电极6之间的距离S的减小，显示面板上需要设置的公共电极7和像素电极6的数量增多，在公共电极7和像素电极6的宽度W1、W2一定的情况下，显示面板上的透光区域的面积减小，显示面板的最大透过率下降。在本公开中，考虑到驱动电压和透光率 的需求，可以将公共电极7和像素电极6之间的距离S的设置为4μm～16μm。
在本实施例中，可通过调节相邻的公共电极7和像素电极6之间的距离S，以及公共电极7和像素电极6的宽度W1、W2，来实现降低显示面板的驱动电压的同时保证显示面板的最大透过率不低于现有水平。
如上所述，在本申请图3所示的实施例中，像素电极6的高度H1与液晶层3的厚度d的比值范围是：20％～50％，公共电极7的高度H2与液晶层3的厚度d的比值范围是：20％～50％。在本实施例中，像素电极6与公共电极7的高度H1、H2越高，两者之间形成的电场的纵深越深，显示面板所需的驱动电压越小；然而，随着像素电极6和公共电极7的高度H1、H2增大，像素电极6与公共电极7在纵向方向Z上出现重叠部分，此时像素电极6与公共电极7之间容易产生寄生电容，该寄生电容会对像素电极6上加载的像素电压造成影响。为此，本公开中可以将像素电极6的高度H1与液晶层3的厚度d的比值设置为20％～50％，将公共电极7的高度H2与液晶层3的厚度d的比值设置为20％～50％。
在实际应用中，液晶层3的厚度d(液晶盒盒厚)一般是2.8μm～3.2μm，本公开中可以将像素电极6的高度H1设置在0.56μm～1.6μm，将公共电极7电极的高度H2设置为0.56μm～1.6μm。
在本实施例中，第一基板1可以为阵列基板，其包括：位于第一衬底基板4朝向第二基板2一侧的多个薄膜晶体管(未示出)、位于薄膜晶体管背向第一衬底基板4一侧的钝化层9和位于钝化层9背向第一衬底基板4一侧的第一取向层10，像素电极6位于钝化层9和第一取向层10之间，薄膜晶体管包括：栅极、栅绝缘层8、源极、漏极(栅极、源极、漏极均未示出)，像素电极6与对应的薄膜晶体管的漏极电连接。第二基板2可以为彩膜基板，包括：位于第二衬底基板5朝向第一基板1一侧的彩膜层11和位于彩膜层11背向第二衬底基板5一侧的第二取向层12，公共电极7位于彩膜层11和第二取向层12之间。其中，第一取向层10和第二取向层12均为水平取向。
图9为本公开实施例提供的一种显示面板的截面示意图，如图9所示，与上述实施例中不同的是，本实施例中的各像素电极6和各公共电极7均不是整体结构，具体地，本实施例中的像素电极6包括：位于第一衬底基板4朝向第二基板2一侧的第一基座61和覆盖第一基座的侧面以及背向第一衬底基板4一侧的表面的第一导电外套62；公共电极7包括：位于第二衬底基板5朝向第一基板1一侧的第二基座71和覆盖第二基座的侧面以及背向第二衬底基板5一侧的表面的第二导电外套72。
可选地，第一基座61和第二基座71均为树脂材料构成，第一导电外套62和第二导电外套72均为金属材料或ITO材料构成。
需要说明的是，在一个实施例中，公共电极7和像素电极6中的一者可以为由金属材料构成的整体结构，而另一者可以为由基座和导电外套构成的非整体结构。
图10为本公开实施例提供的一种显示面板的截面示意图。与图9不同，图10示出的显示面板中像素电极6和公共电极7均设置在第一衬底基板4上。在图10中，像素电极6包括位于第一衬底基板4朝向第二基板2一侧的第一基座61和覆盖第一基座的侧面以及背向第一衬底基板4一侧的表面的第一导电外套62；公共电极7包括位于第一衬底基板4朝向第二基板2一侧的第二基座71和覆盖第二基座的侧面以及背向第一衬底基板4一侧的表面的第二导电外套72。在该实施例中，第一基座61和第二基座71均为树脂材料构成，第一导电外套62和第二导电外套72均为金属材料或ITO材料构成。
需要说明的是，在一个实施例中，公共电极7和像素电极6中的一者可以为由金属材料构成的整体结构，而另一者可以为由基座和导电外套构成的非整体结构。
图11为本公开实施例提供的一种显示面板的制备方法的流程图，如图11所示，该制备方法用于制备上述实施例中的显示面板，包括：
步骤S1、形成第一基板。
第一基板包括：第一衬底基板和位于第一衬底基板上的至少一 个像素电极。
本实施例中的第一基板可以为阵列基板，包括：薄膜晶体管、钝化层和第一取向层，像素电极位于钝化层和第一取向层之间。
步骤S1具体包括：
步骤S101、形成薄膜晶体管。
在步骤S101中，可采用现有的薄膜晶体管制备工艺在第一衬底基板上形成薄膜晶体管，薄膜晶体管包括栅极、栅绝缘层、源极、漏极，具体工艺过程，此处不再详细描述。需要说明的是，本公开中的薄膜晶体管既可以为底栅型薄膜晶体管，也可以为顶栅型薄膜晶体管。
步骤S102、形成钝化层。
在步骤S102中，在薄膜晶体管背向第一衬底基板的一侧形成钝化材料薄膜，并对钝化材料薄膜进行一次构图，以得到钝化层的图形。钝化层上对应薄膜晶体管的漏极的区域形成有过孔。
需要说明的是，本公开中的构图工艺包括光刻胶涂布、曝光、显影、刻蚀、光刻剥离等工艺。
步骤S103、形成像素电极。
当像素电极为上述实施例中所述的整体结构的像素电极时，形成像素电极的步骤包括：首先，在钝化层背向第一衬底基板的一侧形成第一导电材料薄膜；然后，对第一导电材料薄膜进行构图工艺，以得到像素电极的图形。可选地，第一导电材料薄膜的材料为金属材料。
当像素电极为上述实施例中所述的非整体结构的像素电极时，形成像素电极的步骤包括：首先，在钝化层背向第一衬底基板的一侧形成第一绝缘材料薄膜；然后，对第一绝缘材料薄膜进行构图工艺，以得到至少一个第一基座的图形；接着，在钝化层背向第一衬底基板的一侧形成第三导电材料薄膜；最后，对第三导电材料薄膜进行构图工艺，以得到在至少一个第一基座表面上分别形成对应的至少一个第一导电外套的图形从而形成像素电极的图形。可选地，第一绝缘材料薄膜的材料为有机树脂材料，第三导电材料薄膜的材料为金属材料。
另外，在得到至少一个第一基座的图形后，还可以直接在第一 基座的外表面上喷涂或打印第三导电材料来得到第一导电外套的图形。
像素电极通过钝化层上的过孔与对应的薄膜晶体管的漏极连接。
可选地，在第一方向上像素电极的宽度范围是：0.5μm～2.5μm。
可选地，在第一方向上相邻的像素电极之间的距离是：8μm～32μm。
可选地，像素电极在纵向方向上的高度范围是：0.56μm～1.6μm。
步骤S104、形成第一取向层。
在步骤S104中，首先在钝化层背向第一衬底基板的一侧形成取向材料薄膜，可选地，取向材料薄膜的材料为聚酰亚胺；然后，通过摩擦取向或光取向工艺对取向材料薄膜进行水平取向处理，以得到第一取向层。
步骤S2、形成第二基板。
第二基板包括：第二衬底基板和位于第二衬底基板上的至少一个公共电极。
本实施例中的第二基板可以为彩膜基板(对盒基板)，包括：彩膜层和第二取向层，公共电极位于彩膜层和第二取向层之间。
步骤S2具体包括：
步骤S201、形成彩膜层。
在步骤S201中，通过现有的彩膜层制备工艺以在第二衬底基板的一侧形成黑矩阵和彩色矩阵图形，具体工艺过程，此处不再详细描述。
步骤S202、形成公共电极。
当公共电极为上述实施例中所述的整体结构的公共电极时，形成公共电极的步骤包括：首先，在彩膜层背向第二衬底基板的一侧形成第二导电材料薄膜；然后，对第二导电材料薄膜进行构图工艺，以得到公共电极的图形。可选地，第二导电材料薄膜的材料为金属材料或ITO材料。
当公共电极为上述实施例中所述的非整体结构的公共电极时，形成公共电极的步骤包括：首先，在彩膜层背向第二衬底基板的一侧形成第二绝缘材料薄膜；然后，对第二绝缘材料薄膜进行构图工艺，以得到至少一个第二基座的图形；接着，在钝化层背向第二衬底基板的一侧形成第四导电材料薄膜；最后，对第四导电材料薄膜进行构图工艺，以得到在至少一个第二基座上分别形成对应的至少一个第二导电外套的图形从而形成公共电极的图形。可选地，第二绝缘材料薄膜的材料为有机树脂材料，第四导电材料薄膜的材料为金属材料或ITO材料。
可选地，在第一方向上公共电极的宽度范围是：0.5μm～2.5μm。
可选地，在第一方向上相邻的公共电极之间的距离是：8μm～32μm。
可选地，公共电极在纵向方向上的高度范围是：0.56μm～1.6μm。
步骤S203、形成第二取向层。
在步骤S204中，首先在彩膜层背向第二衬底基板的一侧形成取向材料薄膜，可选地，取向材料薄膜的材料为聚酰亚胺；然后，通过摩擦取向或光取向工艺对取向材料薄膜进行水平取向处理，以得到第二取向层。
步骤S3、将第一基板和第二基板进行对盒处理。
将通过步骤S1制得的第一基板与通过步骤S2制得的第二基板进行对盒处理所述至少一个像素电极在所述第一衬底基板上的正投影与所述至少一个公共电极在所述第一衬底基板上的正投影在第一衬底基板延伸的第一方向上交替设置，以及在第一基板和第二基板之间填充液晶层。
在第一方向X上相邻的公共电极和像素电极之间的距离可以相等。例如，第一方向上相邻的公共电极和像素电极之间的距离的范围是：4μm～16μm。
以上制备方法针对的是像素电极和公共电极分别设置在两个相对设置的第一基板和第二基板上的显示面板，例如图3和图8所示的 显示面板。对于图2和图9所示的像素电极和公共电极设置在同一基板上的显示面板，与图12所示的制备方法不同的是，其制备方法包括：在第一衬底基板上形成第一导电材料薄膜；以及对所述第一导电材料薄膜进行构图工艺，以得到所述至少一个像素电极和所述至少一个像素电极的图形，如图12中的步骤S103’所示。
例如，当像素电极和公共电极为上述实施例中所述的整体结构时，形成像素电极和公共电极的步骤包括：首先，在钝化层背向第一衬底基板的一侧形成第一导电材料薄膜；然后，对第一导电材料薄膜进行构图工艺，以得到像素电极和公共电极的图形。可选地，第一导电材料薄膜的材料为金属材料。
当像素电极和公共电极为上述实施例中所述的非整体结构的像素电极时，形成像素电极和公共电极的步骤包括：首先，在钝化层背向第一衬底基板的一侧形成第一绝缘材料薄膜；然后，对第一绝缘材料薄膜进行构图工艺，以得到至少一个第一基座和至少一个第二基座的图形；接着，在钝化层背向第一衬底基板的一侧形成第三导电材料薄膜；最后，对第三导电材料薄膜进行构图工艺，以得到在至少一个第一基座表面上分别形成对应的至少一个第一导电外套的图形从而形成像素电极的图形以及得到在至少一个第二基座表面上分别形成对应的至少一个第二导电外套的图形从而形成公共电极的图形。可选地，第一绝缘材料薄膜的材料为有机树脂材料，第三导电材料薄膜的材料为金属材料。
另外，在得到至少一个第一基座和至少一个第二基座的图形后，还可以直接在第一基座和第二基座的外表面上喷涂或打印第三导电材料来得到第一导电外套和第二导电外套的图形。
在图12中，此时步骤S1’包括步骤S101、S102、S103’和S104，而步骤S2’包括步骤S201和S203。步骤S101、S102、S104和步骤S201和S203以及步骤S3的描述与之前参照图11描述相同，在此不再重复。
本公开实施例提供了一种显示装置，该显示装置包括：显示面板和用于给该显示面板提供背光的背光源，该显示面板采用上述实施 例中的显示面板，对应该显示面板的具体描述，可参见上述实施例中的内容，此处不再赘述。
本公开中的显示装置具体可以为：手机、平板电脑、电视机、显示器、笔记本电脑、数码相框、导航仪等任何具有显示功能的产品或部件。
可以理解的是，以上实施方式仅仅是为了说明本公开的原理而采用的示例性实施方式，然而本公开并不局限于此。对于本领域内的普通技术人员而言，在不脱离本公开的精神和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本公开的保护范围。

Claims (20)

  1. 一种显示面板，包括：
    相对设置的第一基板和第二基板、以及所述第一基板和所述第二基板之间的液晶层，其中第一基板包括第一衬底基板；以及
    设置在所述第一基板和所述第二基板中的至少一个上的至少一个像素电极和至少一个公共电极；
    其中，所述至少一个像素电极在所述第一衬底基板上的正投影与所述至少一个公共电极在所述第一衬底基板上的正投影在第一衬底基板延伸的第一方向上交替设置；以及
    其中，所述至少一个像素电极的高度与所述液晶层的厚度的比值范围是：20％～50％；和/或
    所述至少一个公共电极的高度与所述液晶层的厚度的比值范围是：20％～50％。
  2. 根据权利要求1所述的显示面板，其中，
    所述至少一个像素电极设置在所述第一衬底基板上；以及
    所述第二基板包括第二衬底基板，并且所述至少一个公共电极设置在所述第二衬底基板上。
  3. 根据权利要求1所述的显示面板，其中，
    所述至少一个像素电极和所述至少一个公共电极交替设置在所述第一衬底基板上。
  4. 根据权利要求1至3中任意一项所述的显示面板，其中，在第一方向上任意相邻的公共电极和像素电极在所述第一衬底基板上的正投影之间的距离相等。
  5. 根据权利要求4所述的显示面板，其中，所述距离的范围是：4μm～16μm。
  6. 根据权利要求1至5中任意一项所述的显示面板，其中，所述像素电极的高度范围包括：0.56μm～1.6μm；和/或
    所述公共电极的高度范围包括：0.56μm～1.6μm。
  7. 根据权利要求1至6中任意一项所述的显示面板，其中，所述至少一个像素电极在第一方向上的宽度范围是：0.5μm～2.5μm；和/或
    所述至少一个公共电极在第一方向上的宽度范围是：0.5μm～2.5μm。
  8. 根据权利要求1至7中任意一项所述的显示面板，其中，所述至少一个像素电极材料为金属材料；
    和/或，所述至少一个公共电极的材料为金属材料。
  9. 根据权利要求1至8中任意一项所述的显示面板，其中，所述至少一个像素电极中的每一个像素电极包括：第一基座和第一导电外套，所述第一基座位于所述第一衬底基板朝向所述液晶层一侧，所述第一导电外套覆盖所述第一基座的侧面以及所述第一基座朝向所述液晶层一侧的表面；
    和/或，所述至少一个公共电极中的每一个公共电极包括：第二基座和第二导电外套，所述第二基座位于所述第二衬底基板朝向所述液晶层一侧，所述第二导电外套覆盖所述第二基座的侧面以及所述第二基座朝向所述液晶层一侧的表面。
  10. 根据权利要求2所述的显示面板，其中，所述第一基板还包括：钝化层和第一取向层；
    所述钝化层位于第一衬底基板朝向所述第二基板一侧，所述第一取向层位于所述钝化层背向所述第一衬底基板一侧；
    所述至少一个像素电极位于所述钝化层和第一取向层之间。
  11. 根据权利要求2所述的显示面板，其中，所述第二基板还包括：彩膜层和第二取向层；
    所述彩膜层位于第二衬底基板朝向所述第一基板一侧，所述第二取向层位于所述彩膜层背向所述第二衬底基板一侧；
    所述至少一个公共电极位于所述彩膜层和所述第二取向层之间。
  12. 一种显示装置，包括：权利要求1-11中任意一项所述的显示面板和用于给显示面板提供背光的背光源。
  13. 一种显示面板的制备方法，包括：
    形成第一基板和第二基板以使得所述第一基板包括第一衬底基板并且所述第一基板和所述第二基板中的至少一个上设置有至少一个像素电极和至少一个公共电极；
    将所述第一基板和所述第二基板进行对盒以使得所述至少一个像素电极在所述第一衬底基板上的正投影与所述至少一个公共电极在所述第一衬底基板上的正投影在第一衬底基板延伸的第一方向上交替设置；以及
    在所述第一基板和所述第二基板之间形成液晶层以使得所述至少一个像素电极的高度与所述液晶层的厚度的比值范围是：20％～50％；和/或所述至少一个公共电极的高度与所述液晶层的厚度的比值范围是：20％～50％。
  14. 根据权利要求13所述的显示面板的制备方法，其中，所述形成第一基板和第二基板以使得所述第一基板包括第一衬底基板并且所述第一基板和所述第二基板中的至少一个上设置有至少一个像素电极和至少一个公共电极的步骤包括：
    在所述第一基板的第一衬底基板上形成所述至少一个像素电极；以及
    在所述第二基板的第二衬底基板上形成所述至少一个公共电极。
  15. 根据权利要求13所述的显示面板的制备方法，其中，所述形成第一基板和第二基板以使得所述第一基板包括第一衬底基板并且所述第一基板和所述第二基板中的至少一个上设置有至少一个像素电极和至少一个公共电极的步骤包括：
    在所述第一基板的第一衬底基板上形成所述至少一个像素电极和所述至少一个公共电极。
  16. 根据权利要求14所述的显示面板的制备方法，其中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极的步骤包括：
    在第一衬底基板上形成第一导电材料薄膜；
    对所述第一导电材料薄膜进行构图工艺，以得到所述至少一个像素电极的图形；
    所述在所述第二基板的第二衬底基板上形成所述至少一个公共电极的步骤包括：
    在第二衬底基板上形成第二导电材料薄膜；
    对所述第二导电材料薄膜进行构图工艺，以得到所述至少一个公共电极的图形。
  17. 根据权利要求15所述的显示面板的制备方法，其中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极和所述至少一个公共电极的步骤包括：
    在第一衬底基板上形成第一导电材料薄膜；以及
    对所述第一导电材料薄膜进行构图工艺，以得到所述至少一个像素电极和所述至少一个像素电极的图形。
  18. 根据权利要求16或17所述的显示面板的制备方法，其中， 所述第一导电材料薄膜的材料为金属材料；
    和/或所述第二导电材料薄膜的材料为金属材料。
  19. 根据权利要求15所述的显示面板的制备方法，其中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极的步骤包括：
    在第一衬底基板上形成第一绝缘材料薄膜；
    对所述第一绝缘材料薄膜进行构图工艺，以得到至少一个第一基座的图形；
    在所述第一衬底基板朝向所述第一基座的一侧形成第三导电材料薄膜；
    对所述第三导电材料薄膜进行构图工艺，以得到至少一个第一导电外套的图形，所述第一导电外套与所述第一基座一一对应，所述第一导电外套覆盖对应的所述第一基座的侧面以及背向所述第一衬底基板一侧的表面；
    和/或，所述在所述第二基板的第二衬底基板上形成所述至少一个公共电极的步骤包括：
    在第二衬底基板上形成第二绝缘材料薄膜；
    对所述第二绝缘材料薄膜进行构图工艺，以得到至少一个第二基座的图形；
    在所述第二衬底基板朝向所述第二基座的一侧形成第四导电材料薄膜；
    对所述第四导电材料薄膜进行构图工艺，以得到至少一个第二导电外套的图形，所述第二导电外套与所述第二基座一一对应，所述第二导电外套覆盖对应的所述第二基座的侧面以及背向所述第二衬底基板一侧的表面。
  20. 根据权利要求15所述的显示面板的制备方法，其中，所述在所述第一基板的第一衬底基板上形成所述至少一个像素电极的步骤包括：
    在第一衬底基板上形成第一绝缘材料薄膜；
    对所述第一绝缘材料薄膜进行构图工艺，以得到至少一个第一基座的图形；
    在所述第一基座的外表面上喷涂或打印第三导电材料以得到至少一个第一导电外套的图形，所述第一导电外套与所述第一基座一一对应，所述第一导电外套覆盖对应的所述第一基座的侧面以及背向所述第一衬底基板一侧的表面；
    和/或，所述在所述第二基板的第二衬底基板上形成所述至少一个公共电极的步骤包括：
    在第二衬底基板上形成第二绝缘材料薄膜；
    对所述第二绝缘材料薄膜进行构图工艺，以得到至少一个第二基座的图形；
    在所述第二基座的外表面上喷涂或打印第四导电材料薄膜，以得到至少一个第二导电外套的图形，所述第二导电外套与所述第二基座一一对应，所述第二导电外套覆盖对应的所述第二基座的侧面以及背向所述第二衬底基板一侧的表面。
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CN113376905B (zh) * 2021-06-28 2023-05-12 厦门天马微电子有限公司 一种显示面板及显示装置

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