WO2016090750A1 - 显示基板及其制造方法 - Google Patents

显示基板及其制造方法 Download PDF

Info

Publication number
WO2016090750A1
WO2016090750A1 PCT/CN2015/072491 CN2015072491W WO2016090750A1 WO 2016090750 A1 WO2016090750 A1 WO 2016090750A1 CN 2015072491 W CN2015072491 W CN 2015072491W WO 2016090750 A1 WO2016090750 A1 WO 2016090750A1
Authority
WO
WIPO (PCT)
Prior art keywords
insulating layer
opening
extending portion
pixel
gate
Prior art date
Application number
PCT/CN2015/072491
Other languages
English (en)
French (fr)
Inventor
吴欲志
Original Assignee
深圳市华星光电技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 深圳市华星光电技术有限公司 filed Critical 深圳市华星光电技术有限公司
Priority to US14/424,013 priority Critical patent/US9523891B2/en
Publication of WO2016090750A1 publication Critical patent/WO2016090750A1/zh

Links

Images

Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133345—Insulating layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133512—Light shielding layers, e.g. black matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1337—Surface-induced orientation of the liquid crystal molecules, e.g. by alignment layers
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/13624—Active matrix addressed cells having more than one switching element per pixel
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
    • H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
    • H01L29/78633—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device with a light shield
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133397—Constructional arrangements; Manufacturing methods for suppressing after-image or image-sticking
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134318—Electrodes characterised by their geometrical arrangement having a patterned common electrode
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/13629—Multilayer wirings
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G02F1/136295—Materials; Compositions; Manufacture processes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/121—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode common or background
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F2201/00—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00
    • G02F2201/12—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode
    • G02F2201/123—Constructional arrangements not provided for in groups G02F1/00 - G02F7/00 electrode pixel

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a display substrate and a method of fabricating the same.
  • LCDs liquid crystal displays
  • Various consumer electronic products such as assistants, digital cameras, notebook computers, and desktop computers have become mainstream in display devices.
  • liquid crystal displays which include a casing, a liquid crystal display panel disposed in the casing, and a backlight module disposed in the casing.
  • a conventional liquid crystal display panel is formed by laminating a thin film transistor array substrate (TFT Array Substrate) and a color filter substrate (Color Filter, CF), and is formed on a TFT substrate and a CF substrate, respectively.
  • TFT Array Substrate thin film transistor array substrate
  • CF color filter substrate
  • a pixel electrode and a common electrode and a liquid crystal is injected between the TFT substrate and the CF substrate, and the working principle is to control the liquid crystal by applying an electric field between the pixel electrode and the common electrode by applying a driving voltage between the pixel electrode and the common electrode.
  • the rotation of the liquid crystal molecules in the layer refracts the light of the backlight module to produce a picture.
  • the conventional liquid crystal display panel has a defect of narrow viewing angle, and there is a color shift phenomenon at a large viewing angle.
  • a liquid crystal display panel of a Plane-to-Line Switching (PLS) type is proposed.
  • the PLS type liquid crystal display panel has the pixel electrode and the common electrode disposed on the same substrate, and the liquid crystal molecules are driven to rotate in a direction parallel to the substrate by a lateral electric field formed between the pixel electrode and the common electrode to expand the viewing angle.
  • the color exhibited by the PLS type liquid crystal display panel changes depending on the observation angle, and a color shift phenomenon occurs.
  • a method of forming a plurality of domains in a single pixel region is used to improve the color shift problem.
  • a liquid crystal texture is formed near the boundary of each domain, thereby reducing display brightness and affecting display. effect.
  • An object of the present invention is to provide a display substrate capable of aligning liquid crystal molecules in different directions and forming a plurality of domains in a plurality of pixel regions, thereby improving color shift while reducing or preventing The display brightness is lowered due to the formation of a liquid crystal texture near the boundary of each domain.
  • the present invention provides a display substrate comprising: a substrate, a plurality of TFTs arranged in an array on the substrate, and gate lines electrically connected to the TFT and arranged in a horizontal direction. a data line electrically connected to the TFT and disposed in a vertical direction, a pixel electrode electrically connected to the TFT, and a common electrode disposed above the pixel electrode and overlapping the pixel electrode;
  • the gate line and the data line intersect each other to define a plurality of pixel regions arranged in an array, each pixel region has a pixel electrode, and each TFT correspondingly drives one pixel region;
  • the common electrode has a first opening and a second opening symmetrical with respect to the gate line with respect to the first opening; the first opening overlaps with a first pixel region of the plurality of pixel regions, and the second opening Overlapping the second pixel region adjacent to the first pixel region in the vertical direction;
  • the first opening has an eleventh extending portion extending in an oblique direction, a twelfth extending portion extending from one end of the eleventh extending portion and perpendicular to the eleventh extending portion, and another from the eleventh extending portion a 13th extending portion extending at one end and perpendicular to the eleventh extending portion; and the extending direction of the twelfth extending portion and the thirteenth extending portion are opposite.
  • Each of the eleventh extending portion, the twelfth extending portion, and the thirteenth extending portion overlaps the pixel electrode.
  • the common electrode further has a third opening symmetrical with respect to the data line of the first opening, and a fourth opening symmetrical with respect to the data line with the second opening; the third opening is adjacent to the horizontal direction
  • a third pixel region of the first pixel region overlaps with a fourth pixel region adjacent to the third pixel region in the vertical direction and adjacent to the second pixel region in the horizontal direction.
  • the display substrate further includes: a light shielding layer disposed on the substrate, a first insulating layer disposed on the light shielding layer, a semiconductor layer disposed on the first insulating layer, and disposed on the semiconductor layer a second insulating layer, a gate disposed on the second insulating layer, and a third insulating layer disposed on the gate, respectively disposed on both sides of the gate and passing through the second insulating layer and the third a source and a drain separated by an insulating layer;
  • the source and the drain both contact the semiconductor layer to form an electrical connection with the semiconductor layer
  • the gate line is in the same layer as the gate; the data line is in the same layer as the source and the drain;
  • the semiconductor layer, the gate, the source, and the drain collectively form the TFT.
  • the source and the drain respectively pass through the first through the second insulating layer and the third insulating layer
  • the hole and the second via contact the semiconductor layer.
  • the gate line is electrically connected to a gate of the TFT, and the data line is electrically connected to a source of the TFT.
  • the display substrate further includes a fourth insulating layer disposed on the source and the drain, a fifth insulating layer disposed between the fourth insulating layer and the pixel electrode, and disposed between the pixel electrode and the common electrode a sixth insulating layer, a lower alignment layer disposed on the common electrode;
  • the pixel electrode contacts the drain to form an electrical connection.
  • the pixel electrode contacts the drain through a third via hole penetrating the fourth insulating layer and the fifth insulating layer.
  • the invention also provides a method for manufacturing a display substrate, comprising the steps of:
  • Step 1 providing a substrate, sequentially forming a light shielding layer, a first insulating layer, a semiconductor layer, and a second insulating layer on the substrate;
  • Step 2 forming a first metal layer on the second insulating layer, and patterning the first metal layer to form a gate and a gate line;
  • the gate line is electrically connected to the gate
  • Step 3 forming a third insulating layer covering the gate and the gate line on the second insulating layer, and patterning the second insulating layer and the third insulating layer to form a first pass on both sides of the gate a hole, and a second via;
  • Step 4 forming a second metal layer on the third insulating layer, and patterning the second metal layer to form a source, a drain, and a data line;
  • the source and the drain respectively contact the semiconductor layer through the first via and the second via to form an electrical connection with the semiconductor layer;
  • the data line is electrically connected to the source
  • the semiconductor layer, the gate, the source and the drain together form a TFT
  • the gate lines and the data lines cross each other to define a plurality of pixel regions arranged in an array, and each TFT correspondingly drives one pixel region;
  • Step 5 sequentially forming a fourth insulating layer covering the source, the drain and the data line, and a fifth insulating layer covering the fourth insulating layer on the third insulating layer, and forming the fourth The insulating layer and the fifth insulating layer are patterned to form a third via hole;
  • Step 6 Form and pattern a pixel electrode on the fifth insulating layer to have a pixel electrode in each pixel region;
  • the pixel electrode contacts the drain through the third via to form an electrical connection
  • Step 7 forming a sixth insulating layer covering the pixel electrode on the fifth insulating layer
  • Step 8 Forming and patterning a common electrode on the sixth insulating layer
  • the common electrode is located above the pixel electrode and overlaps the pixel electrode
  • the common electrode has a first opening and a second opening symmetrical with respect to the gate line with respect to the first opening; the first opening overlaps with a first pixel region of the plurality of pixel regions, and the second opening Overlapping the second pixel region adjacent to the first pixel region in the vertical direction;
  • the first opening has an eleventh extending portion extending in an oblique direction, a twelfth extending portion extending from one end of the eleventh extending portion and perpendicular to the eleventh extending portion, and another from the eleventh extending portion a third extending portion extending at one end and perpendicular to the eleventh extending portion; and the extending direction of the twelfth extending portion and the thirteenth extending portion are opposite;
  • Step 9 Form a lower alignment layer on the common electrode.
  • the eleventh extending portion, the twelfth extending portion, and the thirteenth extending portion are all overlapped with the pixel electrode;
  • the common electrode further has a third opening that is symmetrical with respect to the data line of the first opening, and a second opening that is symmetric about the data line; the third opening overlaps with a third pixel region adjacent to the first pixel region in a horizontal direction, the fourth opening being adjacent to the first in the vertical direction.
  • the present invention also provides a display substrate comprising: a substrate, a plurality of TFTs arranged in an array on the substrate, a gate line electrically connected to the TFT and disposed in a horizontal direction, and an electrical connection a data line disposed in the vertical direction to the TFT, a pixel electrode electrically connected to the TFT, a common electrode disposed above the pixel electrode and overlapping the pixel electrode;
  • the gate line and the data line intersect each other to define a plurality of pixel regions arranged in an array, each pixel region has a pixel electrode, and each TFT correspondingly drives one pixel region;
  • the common electrode has a first opening and a second opening symmetrical with respect to the gate line with respect to the first opening; the first opening overlaps with a first pixel region of the plurality of pixel regions, and the second opening Overlapping the second pixel region adjacent to the first pixel region in the vertical direction;
  • the first opening has an eleventh extending portion extending in an oblique direction, a twelfth extending portion extending from one end of the eleventh extending portion and perpendicular to the eleventh extending portion, and another from the eleventh extending portion a third extending portion extending at one end and perpendicular to the eleventh extending portion; and the extending direction of the twelfth extending portion and the thirteenth extending portion are opposite;
  • the common electrode further has a third opening symmetrical with respect to the data line of the first opening, and a fourth opening symmetrical with respect to the data line with the second opening;
  • the third opening is adjacent to the horizontal direction a third pixel region of the first pixel region overlaps, the fourth opening overlapping with a fourth pixel region adjacent to the third pixel region in a vertical direction and adjacent to the second pixel region in a horizontal direction;
  • the method further includes: a light shielding layer disposed on the substrate, a first insulating layer disposed on the light shielding layer, a semiconductor layer disposed on the first insulating layer, and a first layer disposed on the semiconductor layer a second insulating layer, a gate disposed on the second insulating layer, and a third insulating layer disposed on the gate, respectively disposed on both sides of the gate and passing through the second insulating layer and the third insulating layer Isolated source and drain;
  • the source and the drain both contact the semiconductor layer to form an electrical connection with the semiconductor layer
  • the gate line is in the same layer as the gate; the data line is in the same layer as the source and the drain;
  • the semiconductor layer, the gate, the source, and the drain collectively form the TFT.
  • the present invention provides a display substrate and a method of fabricating the same, in which a common electrode is disposed over a pixel electrode and overlaps a pixel electrode, and the common electrode has a first opening and a second symmetrically disposed with each other.
  • An opening, a third opening, and a fourth opening wherein the first opening has an eleventh extending portion extending in an oblique direction, a twelfth extending portion perpendicular to the eleventh extending portion, and a portion perpendicular to the eleventh extending portion 13 extending portion capable of aligning liquid crystal molecules in different directions, forming a plurality of domains in a plurality of pixel regions, thereby being capable of improving color shift while reducing or preventing display luminance degradation due to formation of liquid crystal texture near boundaries of respective domains .
  • Figure 1 is a cross-sectional view of a display substrate of the present invention
  • Figure 2 is a plan view of the display substrate of the present invention.
  • FIG. 3 is a schematic plan view showing a deflection direction of liquid crystal molecules arranged on a display substrate of the present invention
  • FIG. 4 is a flow chart of a method of manufacturing a display substrate of the present invention.
  • the present invention first provides a display substrate which is applied to a PLS type liquid crystal display panel.
  • the display substrate of the present invention includes: a substrate 100, a plurality of TFTs arranged in an array on the substrate 100, and electrically connected to the TFTs and disposed in a horizontal direction.
  • the gate lines GL and the data lines DL cross each other to define a plurality of pixel regions arranged in an array, each pixel region having a pixel electrode 20, and each TFT correspondingly drives one pixel region.
  • the common electrode 10 has a first opening OP1 and a second opening OP2 that is symmetrical with respect to the gate line GL with the first opening OP1.
  • the first opening OP1 overlaps with the first pixel region PX1 of the plurality of pixel regions
  • the second opening OP2 overlaps with the second pixel region PX2 adjacent to the first pixel region PX1 in the vertical direction.
  • the first opening OP1 has an eleventh extending portion OP11 extending in an oblique direction, a second extending portion OP12 extending from one end of the eleventh extending portion OP11 and perpendicular to the eleventh extending portion OP11, from the first The other end of the extension portion OP11 extends and is perpendicular to the thirteenth extension portion OP13 of the eleventh extension portion OP11.
  • the eleventh extension portion OP11, the twelfth extension portion OP12, and the thirteenth extension portion OP13 both overlap the pixel electrode 20, and the eleventh extension portion OP11 extends in a direction different from the gate line GL and the data line DL.
  • the direction that is, the inclination with respect to the horizontal direction and the vertical direction, is opposite to the extending direction of the thirteenth extension portion OP13.
  • the second opening OP2 is symmetrical with the first opening OP1 with respect to the gate line GL.
  • the second opening OP2 has a 21st extension OP21 extending from one end of the 21st extension OP21 and perpendicular to the The 22nd extension OP22 of the 21st extension part OP21 extends from the other end of the 21st extension part OP21, and is perpendicular to the 23rd extension part OP23 of the 21st extension part OP21.
  • the common electrode 10 further has a third opening OP3 that is symmetrical with respect to the data line DL with the first opening OP1, and a fourth opening OP4 that is symmetrical with respect to the data line DL with the second opening OP2.
  • the third opening OP3 overlaps with a third pixel region PX3 adjacent to the first pixel region PX1 in a horizontal direction, the fourth opening OP4 being adjacent to the third pixel region PX3 in a vertical direction and at a level
  • the fourth pixel region PX4 adjacent to the second pixel region PX2 in the direction overlaps.
  • the third opening OP3 has substantially the same shape as the second opening OP2, and has a 31st extension OP31, a portion extending from one end of the 31st extension OP31 and perpendicular to the 31st extension OP31.
  • 32 extending portion OP32 extending from the other end of the 31st extending portion OP31 and perpendicular to the 33rd extending portion OP33 of the 31st extending portion OP31;
  • the shape of the fourth opening OP4 and the first opening OP1 is basically Similarly, correspondingly, there is a 41st extension OP41, a 42nd extension OP42 extending from one end of the 41st extension OP41 and perpendicular to the 41st extension OP41, and another from the 41st extension OP41 One end extends and is perpendicular to the 43rd extension OP43 of the 41st extension OP41.
  • the common electrode 10 has a repeating unit corresponding to two adjacent rows and the phase Four pixel regions in adjacent two columns intersecting two rows.
  • the display substrate further includes a light shielding layer 40 disposed on the substrate 100, a first insulating layer 31 disposed on the light shielding layer 40, and a semiconductor layer 60 disposed on the first insulating layer 31.
  • a second insulating layer 32 on the semiconductor layer 60, a gate electrode 70 disposed on the second insulating layer 32, and a third insulating layer 33 disposed on the gate electrode 70, respectively disposed on the gate a source 80 and a drain 90 which are separated from the third insulating layer 33 by the second insulating layer 32, and a fourth insulating layer 34 disposed on the source 80 and the drain 90 are disposed on a fifth insulating layer 35 between the fourth insulating layer 34 and the pixel electrode 20, a sixth insulating layer 36 disposed between the pixel electrode 20 and the common electrode 10, and a lower alignment layer disposed on the common electrode 10. 50.
  • the source electrode 80 and the drain electrode 90 respectively contact the semiconductor layer 60 and the semiconductor layer 60 through the first via hole 801 and the second via hole 901 penetrating the second insulating layer 32 and the third insulating layer 33. Form an electrical connection.
  • the gate line GL is located in the same layer as the gate 70, and the gate line GL is electrically connected to the gate 70 of the TFT; the data line DL is in the same layer as the source 80 and the drain 90, and The data line DL is electrically connected to the source 80 of the TFT.
  • the semiconductor layer 60, the gate 70, the source 80, and the drain 90 together form the TFT.
  • the pixel electrode 20 is electrically connected to the drain electrode 90 by the third via 201 passing through the fourth insulating layer 34 and the fifth insulating layer 35.
  • the liquid crystal molecules LC are deflected in accordance with an electric field formed between the pixel electrode 10 and the common electrode 20.
  • the common electrode 20 has a first opening OP1, a second opening OP2, a third opening OP3, and a fourth opening OP4, and the first opening OP1 has an eleventh extending portion OP11 extending in an oblique direction, perpendicular to the first
  • the twelfth extension OP12 of the extension portion OP11 and the thirteenth extension portion OP13 perpendicular to the eleventh extension portion OP11 are correspondingly located in the first pixel region PX1, the second pixel region PX2, the third pixel region PX3, and the fourth
  • the liquid crystal molecules LC in the pixel region PX4 are arranged in different directions to form a plurality of domains, so that color shift can be improved while reducing or preventing display luminance degradation due to formation of liquid crystal texture near the boundary of each domain.
  • the present invention further provides a method for manufacturing a display substrate, comprising the following steps:
  • Step 1 A substrate 100 is provided, and a light shielding layer 40, a first insulating layer 31, a semiconductor layer 60, and a second insulating layer 32 are sequentially formed on the substrate 100.
  • Step 2 forming a first metal layer on the second insulating layer 32, and patterning the first metal layer to form a gate 70 and a gate line GL;
  • the gate line GL is electrically connected to the gate 70.
  • Step 3 forming a third insulating layer 33 covering the gate electrode 70 and the gate line GL on the second insulating layer 32, and patterning the second insulating layer 32 and the third insulating layer 33 to form gate electrodes respectively The first via 801 and the second via 901 on both sides of the 70.
  • Step 4 forming a second metal layer on the third insulating layer 33, and patterning the second metal layer to form a source electrode 80, a drain electrode 90, and a data line DL.
  • the source electrode 80 and the drain electrode 90 are in contact with the semiconductor layer 60 through the first via hole 801 and the second via hole 901, respectively, and are electrically connected to the semiconductor layer 60.
  • the data line DL is electrically connected to the source 80.
  • the semiconductor layer 60, the gate 70, the source 80, and the drain 90 together form a TFT.
  • the gate lines GL and the data lines DL cross each other to define a plurality of pixel regions arranged in an array, and each of the TFTs drives one pixel region.
  • Step 5 sequentially forming a fourth insulating layer 34 covering the source electrode 80, the drain electrode 90 and the data line DL, and a fifth insulating layer 35 covering the fourth insulating layer 34 on the third insulating layer 33. And patterning the fourth insulating layer 34 and the fifth insulating layer 35 to form a third via 201.
  • Step 6 Form and pattern the pixel electrode on the fifth insulating layer 35 so that each pixel region has a pixel electrode 20.
  • the pixel electrode 20 contacts the drain 90 through the third via 201 to form an electrical connection.
  • Step 7 Form a sixth insulating layer 36 covering the pixel electrode 20 on the fifth insulating layer 35.
  • Step 8 Form and pattern the common electrode 10 on the sixth insulating layer 36.
  • the common electrode 10 is located above the pixel electrode 20 and overlaps the pixel electrode 20.
  • the common electrode 10 has a first opening OP1 and a second opening OP2 that is symmetrical with respect to the gate line GL with the first opening OP1; the first opening OP1 overlaps with the first pixel region PX1 of the plurality of pixel regions The second opening OP2 overlaps with the second pixel region PX2 adjacent to the first pixel region PX1 in the vertical direction.
  • the first opening OP1 has an eleventh extending portion OP11 extending in an oblique direction, a second extending portion OP12 extending from one end of the eleventh extending portion OP11 and perpendicular to the eleventh extending portion OP11, from the first The other end of the extension portion OP11 extends and is perpendicular to the thirteenth extension portion OP13 of the eleventh extension portion OP11; and the extension direction of the twelfth extension portion OP12 and the thirteenth extension portion OP13 is opposite.
  • the eleventh extension portion OP11, the twelfth extension portion OP12, and the thirteenth extension portion OP13 both overlap the pixel electrode 20.
  • the common electrode 10 further has a third opening OP3 that is symmetrical with respect to the data line DL with the first opening OP1, and a fourth opening OP4 that is symmetrical with respect to the data line DL with the second opening OP2.
  • the third opening OP3 overlaps with a third pixel region PX3 adjacent to the first pixel region PX1 in a horizontal direction, the fourth opening OP4 being adjacent to the third pixel region PX3 in a vertical direction and at a level
  • the fourth pixel region PX4 adjacent to the second pixel region PX2 in the direction overlaps.
  • Step 9 Form the lower alignment layer 50 on the common electrode 10.
  • the display substrate manufactured by the method can align liquid crystal molecules in different directions and form a plurality of domains in a plurality of pixel regions, thereby improving color shift while reducing or preventing formation of liquid crystal texture due to the vicinity of boundaries of respective domains.
  • the display brightness drops.
  • the display substrate and the method of fabricating the same according to the present invention have a common electrode disposed above the pixel electrode and overlapping the pixel electrode on the same substrate, the common electrode having a first opening, a second opening, and a third symmetrically disposed with each other An opening and a fourth opening, wherein the first opening has an eleventh extending portion extending in an oblique direction, a twelfth extending portion perpendicular to the eleventh extending portion, and a thirteenth extending portion perpendicular to the eleventh extending portion,
  • the liquid crystal molecules can be aligned in different directions, and a plurality of domains are formed in the plurality of pixel regions, so that color shift can be improved while reducing or preventing display luminance degradation due to formation of liquid crystal texture near the boundary of each domain.

Abstract

提供了一种显示基板及其制造方法。该显示基板在同一基板(100)上设置位于像素电极(20)上方且与像素电极(20)重叠的公共电极(10)；所述公共电极(10)具有相互对称设置的第一开口(OP1)、第二开口(OP2)、第三开口(OP3)与第四开口(OP4)；所述第一开口(OP1)具有沿倾斜方向延伸的第11延伸部(OP11)、垂直于所述第11延伸部(OP11)的第12延伸部(OP12)、及垂直于所述第11延伸部(OP11)的第13延伸部(OP13)，能够使液晶分子沿不同的方向排列，在多个像素区中形成多个畴，从而能够改善色偏，同时减少或防止由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。

Description

显示基板及其制造方法 技术领域
本发明涉及显示技术领域，尤其涉及一种显示基板及其制造方法。
背景技术
随着显示技术的发展，液晶显示器(Liquid Crystal Display，LCD)等平面显示装置因具有高画质、省电、机身薄、无辐射等优点，而被广泛的应用于手机、电视、个人数字助理、数字相机、笔记本电脑、台式计算机等各种消费性电子产品，成为显示装置中的主流。
现有市场上的液晶显示器大部分为背光型液晶显示器，其包括壳体、设于壳体内的液晶显示面板及设于壳体内的背光模组(Backlight module)。
传统的液晶显示面板是由一片薄膜晶体管阵列基板(Thin Film Transistor Array Substrate，TFT Array Substrate)与一片彩色滤光片基板(Color Filter，CF)贴合而成，分别在TFT基板和CF基板上形成像素电极和公共电极，并在TFT基板与CF基板之间灌入液晶，其工作原理是通过在像素电极与公共电极之间施加驱动电压，利用像素电极与公共电极之间形成的电场来控制液晶层内的液晶分子的旋转，将背光模组的光线折射出来产生画面。传统的液晶显示面板具有视角狭窄的缺陷，且在大视角下存在色偏现象。
为了扩大液晶显示面板的视角，提出了一种面到线切换(Plane-to-Line Switching，PLS)型的液晶显示面板。该PLS型的液晶显示面板将像素电极和公共电极设置在同一基板上，利用像素电极与公共电极之间形成的横向电场驱动液晶分子在与基板平行的方向上旋转，以扩大视角。但是，在该PLS型的液晶显示面板中由于所有的液晶分子仅沿同一方向排列，会造成该PLS型的液晶显示面板呈现的颜色会随着观察角度的不同而改变，产生色偏现象。通常采用在单个像素区中形成多个畴的方法来改善色偏问题，然而该方法应用于PLS型的液晶显示面板时，会在各畴的边界附近形成液晶纹理，从而降低显示亮度，影响显示效果。
发明内容
本发明的目的在于提供一种显示基板，能够使液晶分子沿不同的方向排列，在多个像素区中形成多个畴，从而能够改善色偏，同时减少或防止 由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。
本发明的目的还在于提供一种显示基板制造方法，使用该方法制造的显示基板，能够使液晶分子沿不同的方向排列，在多个像素区中形成多个畴，从而能够改善色偏，同时减少或防止由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。
为实现上述目的，本发明提供一种显示基板，包括：基板、设于所述基板上的呈阵列式排布的多个TFT、电性连接至所述TFT且沿水平方向设置的栅极线、电性连接至所述TFT且沿竖直方向设置的数据线、电性连接至所述TFT的像素电极、设于所述像素电极上方且与所述像素电极重叠的公共电极；
所述栅极线与数据线相互交叉限定出呈阵列式排布的多个像素区，每一像素区内具有一像素电极，每一TFT对应驱动一个像素区；
所述公共电极具有第一开口、及与所述第一开口关于栅极线对称的第二开口；所述第一开口与多个像素区中的第一像素区重叠，所述第二开口与在竖直方向上邻近所述第一像素区的第二像素区重叠；
所述第一开口具有沿倾斜方向延伸的第11延伸部、自所述第11延伸部的一端延伸并垂直于所述第11延伸部的第12延伸部、自所述第11延伸部的另一端延伸并垂直于所述第11延伸部的第13延伸部；且所述第12延伸部与第13延伸部的延伸方向相反。
所述第11延伸部、第12延伸部及第13延伸部均与所述像素电极重叠。
所述公共电极还具有与所述第一开口关于数据线对称的第三开口、及与所述第二开口关于数据线对称的第四开口；所述第三开口与在水平方向上邻近所述第一像素区的第三像素区重叠，所述第四开口与在竖直方向上邻近所述第三像素区且在水平方向上邻近所述第二像素区的第四像素区重叠。
所述显示基板还包括：设于所述基板上的遮光层、设于所述遮光层上的第一绝缘层、设于所述第一绝缘层上的半导体层、设于所述半导体层上的第二绝缘层、设于所述第二绝缘层上的栅极、设于所述栅极上的第三绝缘层、分别设于所述栅极两侧并通过第二绝缘层与第三绝缘层隔开的的源极与漏极；
所述源极与漏极均接触所述半导体层，与所述半导体层形成电性连接；
所述栅极线与栅极位于同一层；所述数据线与源极和漏极位于同一层；
所述半导体层、栅极、源极及漏极共同形成所述TFT。
所述源极、漏极分别通过贯穿所述第二绝缘层与第三绝缘层的第一过 孔、第二过孔接触所述半导体层。
所述栅极线电性连接于TFT的栅极，所述数据线电性连接于TFT的源极。
所述显示基板还包括设于所述源极、漏极上的第四绝缘层、设于所述第四绝缘层与像素电极之间的第五绝缘层、设于像素电极与公共电极之间的第六绝缘层、设于所述公共电极上的下取向层；
所述像素电极接触漏极，形成电性连接。
所述像素电极通过贯穿第四绝缘层与第五绝缘层上的第三过孔接触漏极。
本发明还提供一种显示基板制造方法，包括以下步骤：
步骤1、提供一基板，在所述基板上依次形成遮光层、第一绝缘层、半导体层、第二绝缘层；
步骤2、在所述第二绝缘层上形成第一金属层，并对该第一金属层图案化，形成栅极与栅极线；
所述栅极线电性连接于栅极；
步骤3、在所述第二绝缘层上形成覆盖栅极与栅极线的第三绝缘层，并对第二绝缘层与第三绝缘层图案化，形成分别位于栅极两侧的第一过孔、与第二过孔；
步骤4、在所述第三绝缘层上形成第二金属层，并对该第二金属层图案化，形成源极、漏极、与数据线；
所述源极、漏极分别通过所述第一过孔、第二过孔接触所述半导体层，与所述半导体层形成电性连接；
所述数据线电性连接于源极；
所述半导体层、栅极、源极及漏极共同形成TFT；
所述栅极线与数据线相互交叉限定出呈阵列式排布的多个像素区，每一TFT对应驱动一个像素区；
步骤5、在所述第三绝缘层上依次形成覆盖所述源极、漏极与数据线的第四绝缘层、及覆盖所述第四绝缘层的第五绝缘层，并对所述第四绝缘层与第五绝缘层图案化，形成第三过孔；
步骤6、在所述第五绝缘层上形成并图案化像素电极，使每一像素区内具有一像素电极；
所述像素电极通过第三过孔接触漏极，形成电性连接；
步骤7、在所述第五绝缘层上形成覆盖像素电极的第六绝缘层；
步骤8、在所述第六绝缘层上形成并图案化公共电极；
所述公共电极位于所述像素电极上方且与所述像素电极重叠；
所述公共电极具有第一开口、及与所述第一开口关于栅极线对称的第二开口；所述第一开口与多个像素区中的第一像素区重叠，所述第二开口与在竖直方向上邻近所述第一像素区的第二像素区重叠；
所述第一开口具有沿倾斜方向延伸的第11延伸部、自所述第11延伸部的一端延伸并垂直于所述第11延伸部的第12延伸部、自所述第11延伸部的另一端延伸并垂直于所述第11延伸部的第13延伸部；且所述第12延伸部与第13延伸部的延伸方向相反；
步骤9、在所述公共电极上形成下取向层。
所述第11延伸部、第12延伸部及第13延伸部均与所述像素电极重叠；所述公共电极还具有与所述第一开口关于数据线对称的第三开口、及与所述第二开口关于数据线对称的第四开口；所述第三开口与在水平方向上邻近所述第一像素区的第三像素区重叠，所述第四开口与在竖直方向上邻近所述第三像素区且在水平方向上邻近所述第二像素区的第四像素区重叠。
本发明还提供一种显示基板，包括：基板、设于所述基板上的呈阵列式排布的多个TFT、电性连接至所述TFT且沿水平方向设置的栅极线、电性连接至所述TFT且沿竖直方向设置的数据线、电性连接至所述TFT的像素电极、设于所述像素电极上方且与所述像素电极重叠的公共电极；
所述栅极线与数据线相互交叉限定出呈阵列式排布的多个像素区，每一像素区内具有一像素电极，每一TFT对应驱动一个像素区；
所述公共电极具有第一开口、及与所述第一开口关于栅极线对称的第二开口；所述第一开口与多个像素区中的第一像素区重叠，所述第二开口与在竖直方向上邻近所述第一像素区的第二像素区重叠；
所述第一开口具有沿倾斜方向延伸的第11延伸部、自所述第11延伸部的一端延伸并垂直于所述第11延伸部的第12延伸部、自所述第11延伸部的另一端延伸并垂直于所述第11延伸部的第13延伸部；且所述第12延伸部与第13延伸部的延伸方向相反；
其中，所述第11延伸部、第12延伸部及第13延伸部均与所述像素电极重叠；
其中，所述公共电极还具有与所述第一开口关于数据线对称的第三开口、及与所述第二开口关于数据线对称的第四开口；所述第三开口与在水平方向上邻近所述第一像素区的第三像素区重叠，所述第四开口与在竖直方向上邻近所述第三像素区且在水平方向上邻近所述第二像素区的第四像素区重叠；
其中，还包括：设于所述基板上的遮光层、设于所述遮光层上的第一绝缘层、设于所述第一绝缘层上的半导体层、设于所述半导体层上的第二绝缘层、设于所述第二绝缘层上的栅极、设于所述栅极上的第三绝缘层、分别设于所述栅极两侧并通过第二绝缘层与第三绝缘层隔开的的源极与漏极；
所述源极与漏极均接触所述半导体层，与所述半导体层形成电性连接；
所述栅极线与栅极位于同一层；所述数据线与源极和漏极位于同一层；
所述半导体层、栅极、源极及漏极共同形成所述TFT。
本发明的有益效果：本发明提供的一种显示基板及其制造方法，在同一基板上设置位于像素电极上方且与像素电极重叠的公共电极，公共电极具有相互对称设置的第一开口、第二开口、第三开口与第四开口，且第一开口具有沿倾斜方向延伸的第11延伸部、垂直于所述第11延伸部的第12延伸部、及垂直于所述第11延伸部的第13延伸部，能够使液晶分子沿不同的方向排列，在多个像素区中形成多个畴，从而能够改善色偏，同时减少或防止由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。
附图说明
下面结合附图，通过对本发明的具体实施方式详细描述，将使本发明的技术方案及其它有益效果显而易见。
附图中，
图1为本发明的显示基板的剖面图；
图2为本发明的显示基板的平面图；
图3为排列在本发明的显示基板上的液晶分子的偏转方向的平面示意图；
图4为本发明的显示基板制造方法的流程图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明首先提供一种显示基板，该显示基板应用于PLS型液晶显示面板。请同时参阅图1、图2，本发明的显示基板包括：基板100、设于所述基板100上的呈阵列式排布的多个TFT、电性连接至所述TFT且沿水平方向设置的栅极线GL、电性连接至所述TFT且沿竖直方向设置的数据线DL、电性连接至所述TFT的像素电极20、设于所述像素电极20上方且与 所述像素电极20重叠的公共电极10。所述栅极线GL与数据线DL相互交叉限定出呈阵列式排布的多个像素区，每一像素区内具有一像素电极20，每一TFT对应驱动一个像素区。
所述公共电极10具有第一开口OP1、及与所述第一开口OP1关于栅极线GL对称的第二开口OP2。所述第一开口OP1与多个像素区中的第一像素区PX1重叠，所述第二开口OP2与在竖直方向上邻近所述第一像素区PX1的第二像素区PX2重叠。
所述第一开口OP1具有沿倾斜方向延伸的第11延伸部OP11、自所述第11延伸部OP11的一端延伸并垂直于所述第11延伸部OP11的第12延伸部OP12、自所述第11延伸部OP11的另一端延伸并垂直于所述第11延伸部OP11的第13延伸部OP13。所述第11延伸部OP11、第12延伸部OP12及第13延伸部OP13均与所述像素电极20重叠，且所述第11延伸部OP11的延伸方向不同于栅极线GL与数据线DL的方向，即相对于水平方向与竖直方向均倾斜，所述第12延伸部OP12与第13延伸部OP13的延伸方向相反。
所述第二开口OP2与第一开口OP1关于栅极线GL对称，相应的，所述第二开口OP2具有第21延伸部OP21、自所述第21延伸部OP21的一端延伸并垂直于所述第21延伸部OP21的第22延伸部OP22、自所述第21延伸部OP21的另一端延伸并垂直于所述第21延伸部OP21的第23延伸部OP23。
所述公共电极10进一步具有与所述第一开口OP1关于数据线DL对称的第三开口OP3、及与所述第二开口OP2关于数据线DL对称的第四开口OP4。所述第三开口OP3与在水平方向上邻近所述第一像素区PX1的第三像素区PX3重叠，所述第四开口OP4与在竖直方向上邻近所述第三像素区PX3且在水平方向上邻近所述第二像素区PX2的第四像素区PX4重叠。所述第三开口OP3与所述第二开口OP2的形状基本相同，相应的具有第31延伸部OP31、自所述第31延伸部OP31的一端延伸并垂直于所述第31延伸部OP31的第32延伸部OP32、自所述第31延伸部OP31的另一端延伸并垂直于所述第31延伸部OP31的第33延伸部OP33；所述第四开口OP4与所述第一开口OP1的形状基本相同，相应的，具有第41延伸部OP41、自所述第41延伸部OP41的一端延伸并垂直于所述第41延伸部OP41的第42延伸部OP42、自所述第41延伸部OP41的另一端延伸并垂直于所述第41延伸部OP41的第43延伸部OP43。
所述公共电极10具有重复单元，该重复单元对应于相邻两行、与该相 邻两行交叉的相邻两列中的四个像素区。
所述显示基板还包括：设于所述基板100上的遮光层40、设于所述遮光层40上的第一绝缘层31、设于所述第一绝缘层31上的半导体层60、设于所述半导体层60上的第二绝缘层32、设于所述第二绝缘层32上的栅极70、设于所述栅极70上的第三绝缘层33、分别设于所述栅极70两侧并通过第二绝缘层32与第三绝缘层33隔开的的源极80与漏极90、设于所述源极80、漏极90上的第四绝缘层34、设于所述第四绝缘层34与像素电极20之间的第五绝缘层35、设于像素电极20与公共电极10之间的第六绝缘层36、设于所述公共电极10上的下取向层50。
所述源极80与漏极90分别通过贯穿所述第二绝缘层32与第三绝缘层33的第一过孔801、第二过孔901接触所述半导体层60，与所述半导体层60形成电性连接。
所述栅极线GL与栅极70位于同一层，且所述栅极线GL电性连接于TFT的栅极70；所述数据线DL与源极80和漏极90位于同一层，且所述数据线DL电性连接于TFT的源极80。
所述半导体层60、栅极70、源极80及漏极90共同形成所述TFT。
所述像素电极20通过贯穿第四绝缘层34与第五绝缘层35上的第三过孔201接触漏极90，形成电性连接。
如图3所示，当向所述像素电极10施加电压时，液晶分子LC依据由像素电极10和公共电极20之间形成的电场进行偏转。由于所述公共电极20具有第一开口OP1、第二开口OP2、第三开口OP3、与第四开口OP4，且第一开口OP1具有沿倾斜方向延伸的第11延伸部OP11、垂直于所述第11延伸部OP11的第12延伸部OP12、及垂直于所述第11延伸部OP11的第13延伸部OP13，对应位于第一像素区PX1、第二像素区PX2、第三像素区PX3、第四像素区PX4内的液晶分子LC沿不同的方向排列，形成多个畴，从而能够改善色偏，同时减少或防止由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。
请参阅图4，同时结合图1、图2，本发明还提供一种显示基板制造方法，包括以下步骤：
步骤1、提供一基板100，在所述基板100上依次形成遮光层40、第一绝缘层31、半导体层60、第二绝缘层32。
步骤2、在所述第二绝缘层32上形成第一金属层，并对该第一金属层图案化，形成栅极70与栅极线GL；
所述栅极线GL电性连接于栅极70。
步骤3、在所述第二绝缘层32上形成覆盖栅极70与栅极线GL的第三绝缘层33，并对第二绝缘层32与第三绝缘层33图案化，形成分别位于栅极70两侧的第一过孔801、与第二过孔901。
步骤4、在所述第三绝缘层33上形成第二金属层，并对该第二金属层图案化，形成源极80、漏极90、与数据线DL。
所述源极80、漏极90分别通过所述第一过孔801、第二过孔901接触所述半导体层60，与所述半导体层60形成电性连接。
所述数据线DL电性连接于源极80。
所述半导体层60、栅极70、源极80及漏极90共同形成TFT。
所述栅极线GL与数据线DL相互交叉限定出呈阵列式排布的多个像素区，每一TFT对应驱动一个像素区。
步骤5、在所述第三绝缘层33上依次形成覆盖所述源极80、漏极90与数据线DL的第四绝缘层34、及覆盖所述第四绝缘层34的第五绝缘层35，并对所述第四绝缘层34与第五绝缘层35图案化，形成第三过孔201。
步骤6、在所述第五绝缘层35上形成并图案化像素电极，使每一像素区内具有一像素电极20。
所述像素电极20通过第三过孔201接触漏极90，形成电性连接。
步骤7、在所述第五绝缘层35上形成覆盖像素电极20的第六绝缘层36。
步骤8、在所述第六绝缘层36上形成并图案化公共电极10。
所述公共电极10位于所述像素电极20上方且与所述像素电极20重叠。
所述公共电极10具有第一开口OP1、及与所述第一开口OP1关于栅极线GL对称的第二开口OP2；所述第一开口OP1与多个像素区中的第一像素区PX1重叠，所述第二开口OP2与在竖直方向上邻近所述第一像素区PX1的第二像素区PX2重叠。
所述第一开口OP1具有沿倾斜方向延伸的第11延伸部OP11、自所述第11延伸部OP11的一端延伸并垂直于所述第11延伸部OP11的第12延伸部OP12、自所述第11延伸部OP11的另一端延伸并垂直于所述第11延伸部OP11的第13延伸部OP13；且所述第12延伸部OP12与第13延伸部OP13的延伸方向相反。
进一步的，所述第11延伸部OP11、第12延伸部OP12及第13延伸部OP13均与所述像素电极20重叠。
所述公共电极10还具有与所述第一开口OP1关于数据线DL对称的第三开口OP3、及与所述第二开口OP2关于数据线DL对称的第四开口OP4。 所述第三开口OP3与在水平方向上邻近所述第一像素区PX1的第三像素区PX3重叠，所述第四开口OP4与在竖直方向上邻近所述第三像素区PX3且在水平方向上邻近所述第二像素区PX2的第四像素区PX4重叠。
步骤9、在所述公共电极10上形成下取向层50。
通过该方法制造的显示基板，能够使液晶分子沿不同的方向排列，在多个像素区中形成多个畴，从而能够改善色偏，同时减少或防止由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。
综上所述，本发明的显示基板及其制造方法，在同一基板上设置位于像素电极上方且与像素电极重叠的公共电极，公共电极具有相互对称设置的第一开口、第二开口、第三开口与第四开口，且第一开口具有沿倾斜方向延伸的第11延伸部、垂直于所述第11延伸部的第12延伸部、及垂直于所述第11延伸部的第13延伸部，能够使液晶分子沿不同的方向排列，在多个像素区中形成多个畴，从而能够改善色偏，同时减少或防止由于各畴的边界附近形成液晶纹理而导致的显示亮度下降。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明权利要求的保护范围。

Claims (15)

  1. 一种显示基板，包括：基板、设于所述基板上的呈阵列式排布的多个TFT、电性连接至所述TFT且沿水平方向设置的栅极线、电性连接至所述TFT且沿竖直方向设置的数据线、电性连接至所述TFT的像素电极、设于所述像素电极上方且与所述像素电极重叠的公共电极；
    所述栅极线与数据线相互交叉限定出呈阵列式排布的多个像素区，每一像素区内具有一像素电极，每一TFT对应驱动一个像素区；
    所述公共电极具有第一开口、及与所述第一开口关于栅极线对称的第二开口；所述第一开口与多个像素区中的第一像素区重叠，所述第二开口与在竖直方向上邻近所述第一像素区的第二像素区重叠；
    所述第一开口具有沿倾斜方向延伸的第11延伸部、自所述第11延伸部的一端延伸并垂直于所述第11延伸部的第12延伸部、自所述第11延伸部的另一端延伸并垂直于所述第11延伸部的第13延伸部；且所述第12延伸部与第13延伸部的延伸方向相反。
  2. 如权利要求1所述的显示基板，其中，所述第11延伸部、第12延伸部及第13延伸部均与所述像素电极重叠。
  3. 如权利要求1所述的显示基板，其中，所述公共电极还具有与所述第一开口关于数据线对称的第三开口、及与所述第二开口关于数据线对称的第四开口；所述第三开口与在水平方向上邻近所述第一像素区的第三像素区重叠，所述第四开口与在竖直方向上邻近所述第三像素区且在水平方向上邻近所述第二像素区的第四像素区重叠。
  4. 如权利要求1所述的显示基板，其中，还包括：设于所述基板上的遮光层、设于所述遮光层上的第一绝缘层、设于所述第一绝缘层上的半导体层、设于所述半导体层上的第二绝缘层、设于所述第二绝缘层上的栅极、设于所述栅极上的第三绝缘层、分别设于所述栅极两侧并通过第二绝缘层与第三绝缘层隔开的的源极与漏极；
    所述源极与漏极均接触所述半导体层，与所述半导体层形成电性连接；
    所述栅极线与栅极位于同一层；所述数据线与源极和漏极位于同一层；
    所述半导体层、栅极、源极及漏极共同形成所述TFT。
  5. 如权利要求4所述的显示基板，其中，所述源极、漏极分别通过贯穿所述第二绝缘层与第三绝缘层的第一过孔、第二过孔接触所述半导体层。
  6. 如权利要求5所述的显示基板，其中，所述栅极线电性连接于TFT 的栅极，所述数据线电性连接于TFT的源极。
  7. 如权利要求6所述的显示基板，其中，还包括设于所述源极、漏极上的第四绝缘层、设于所述第四绝缘层与像素电极之间的第五绝缘层、设于像素电极与公共电极之间的第六绝缘层、设于所述公共电极上的下取向层；
    所述像素电极接触漏极，形成电性连接。
  8. 如权利要求7所述的显示基板，其中，所述像素电极通过贯穿第四绝缘层与第五绝缘层上的第三过孔接触漏极。
  9. 一种显示基板制造方法，包括以下步骤：
    步骤1、提供一基板，在所述基板上依次形成遮光层、第一绝缘层、半导体层、第二绝缘层；
    步骤2、在所述第二绝缘层上形成第一金属层，并对该第一金属层图案化，形成栅极与栅极线；
    所述栅极线电性连接于栅极；
    步骤3、在所述第二绝缘层上形成覆盖栅极与栅极线的第三绝缘层，并对第二绝缘层与第三绝缘层图案化，形成分别位于栅极两侧的第一过孔、与第二过孔；
    步骤4、在所述第三绝缘层上形成第二金属层，并对该第二金属层图案化，形成源极、漏极、与数据线；
    所述源极、漏极分别通过所述第一过孔、第二过孔接触所述半导体层，与所述半导体层形成电性连接；
    所述数据线电性连接于源极；
    所述半导体层、栅极、源极及漏极共同形成TFT；
    所述栅极线与数据线相互交叉限定出呈阵列式排布的多个像素区，每一TFT对应驱动一个像素区；
    步骤5、在所述第三绝缘层上依次形成覆盖所述源极、漏极与数据线的第四绝缘层、及覆盖所述第四绝缘层的第五绝缘层，并对所述第四绝缘层与第五绝缘层图案化，形成第三过孔；
    步骤6、在所述第五绝缘层上形成并图案化像素电极，使每一像素区内具有一像素电极；
    所述像素电极通过第三过孔接触漏极，形成电性连接；
    步骤7、在所述第五绝缘层上形成覆盖像素电极的第六绝缘层；
    步骤8、在所述第六绝缘层上形成并图案化公共电极；
    所述公共电极位于所述像素电极上方且与所述像素电极重叠；
    所述公共电极具有第一开口、及与所述第一开口关于栅极线对称的第二开口；所述第一开口与多个像素区中的第一像素区重叠，所述第二开口与在竖直方向上邻近所述第一像素区的第二像素区重叠；
    所述第一开口具有沿倾斜方向延伸的第11延伸部、自所述第11延伸部的一端延伸并垂直于所述第11延伸部的第12延伸部、自所述第11延伸部的另一端延伸并垂直于所述第11延伸部的第13延伸部；且所述第12延伸部与第13延伸部的延伸方向相反；
    步骤9、在所述公共电极上形成下取向层。
  10. 如权利要求9所述的显示基板制造方法，其中，所述第11延伸部、第12延伸部及第13延伸部均与所述像素电极重叠；所述公共电极还具有与所述第一开口关于数据线对称的第三开口、及与所述第二开口关于数据线对称的第四开口；所述第三开口与在水平方向上邻近所述第一像素区的第三像素区重叠，所述第四开口与在竖直方向上邻近所述第三像素区且在水平方向上邻近所述第二像素区的第四像素区重叠。
  11. 一种显示基板，包括：基板、设于所述基板上的呈阵列式排布的多个TFT、电性连接至所述TFT且沿水平方向设置的栅极线、电性连接至所述TFT且沿竖直方向设置的数据线、电性连接至所述TFT的像素电极、设于所述像素电极上方且与所述像素电极重叠的公共电极；
    所述栅极线与数据线相互交叉限定出呈阵列式排布的多个像素区，每一像素区内具有一像素电极，每一TFT对应驱动一个像素区；
    所述公共电极具有第一开口、及与所述第一开口关于栅极线对称的第二开口；所述第一开口与多个像素区中的第一像素区重叠，所述第二开口与在竖直方向上邻近所述第一像素区的第二像素区重叠；
    所述第一开口具有沿倾斜方向延伸的第11延伸部、自所述第11延伸部的一端延伸并垂直于所述第11延伸部的第12延伸部、自所述第11延伸部的另一端延伸并垂直于所述第11延伸部的第13延伸部；且所述第12延伸部与第13延伸部的延伸方向相反；
    其中，所述第11延伸部、第12延伸部及第13延伸部均与所述像素电极重叠；
    其中，所述公共电极还具有与所述第一开口关于数据线对称的第三开口、及与所述第二开口关于数据线对称的第四开口；所述第三开口与在水平方向上邻近所述第一像素区的第三像素区重叠，所述第四开口与在竖直方向上邻近所述第三像素区且在水平方向上邻近所述第二像素区的第四像素区重叠；
    其中，还包括：设于所述基板上的遮光层、设于所述遮光层上的第一绝缘层、设于所述第一绝缘层上的半导体层、设于所述半导体层上的第二绝缘层、设于所述第二绝缘层上的栅极、设于所述栅极上的第三绝缘层、分别设于所述栅极两侧并通过第二绝缘层与第三绝缘层隔开的的源极与漏极；
    所述源极与漏极均接触所述半导体层，与所述半导体层形成电性连接；
    所述栅极线与栅极位于同一层；所述数据线与源极和漏极位于同一层；
    所述半导体层、栅极、源极及漏极共同形成所述TFT。
  12. 如权利要求11所述的显示基板，其中，所述源极、漏极分别通过贯穿所述第二绝缘层与第三绝缘层的第一过孔、第二过孔接触所述半导体层。
  13. 如权利要求11所述的显示基板，其中，所述栅极线电性连接于TFT的栅极，所述数据线电性连接于TFT的源极。
  14. 如权利要求11所述的显示基板，其中，还包括设于所述源极、漏极上的第四绝缘层、设于所述第四绝缘层与像素电极之间的第五绝缘层、设于像素电极与公共电极之间的第六绝缘层、设于所述公共电极上的下取向层；
    所述像素电极接触漏极，形成电性连接。
  15. 如权利要求14所述的显示基板，其中，所述像素电极通过贯穿第四绝缘层与第五绝缘层上的第三过孔接触漏极。
PCT/CN2015/072491 2014-12-11 2015-02-09 显示基板及其制造方法 WO2016090750A1 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
US14/424,013 US9523891B2 (en) 2014-12-11 2015-02-09 Display panel and manufacture method thereof

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN201410764697.XA CN104503156A (zh) 2014-12-11 2014-12-11 显示基板及其制造方法
CN201410764697.X 2014-12-11

Publications (1)

Publication Number Publication Date
WO2016090750A1 true WO2016090750A1 (zh) 2016-06-16

Family

ID=52944561

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2015/072491 WO2016090750A1 (zh) 2014-12-11 2015-02-09 显示基板及其制造方法

Country Status (3)

Country Link
US (1) US9523891B2 (zh)
CN (1) CN104503156A (zh)
WO (1) WO2016090750A1 (zh)

Families Citing this family (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN105259716B (zh) * 2015-11-24 2018-08-03 京东方科技集团股份有限公司 一种阵列基板、曲面显示面板及曲面显示装置
KR102481169B1 (ko) * 2015-11-26 2022-12-26 삼성디스플레이 주식회사 액정 표시 장치
KR102603598B1 (ko) * 2016-11-30 2023-11-21 엘지디스플레이 주식회사 표시장치
KR102391918B1 (ko) * 2017-05-23 2022-04-29 삼성디스플레이 주식회사 유기발광표시장치
CN112925142A (zh) * 2021-03-16 2021-06-08 京东方科技集团股份有限公司 一种基板和显示装置

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101276102A (zh) * 2007-03-30 2008-10-01 精工爱普生株式会社 电场驱动型装置、液晶装置以及电子设备
CN101441369A (zh) * 2007-11-21 2009-05-27 爱普生映像元器件有限公司 液晶显示装置
US20090244468A1 (en) * 2008-03-27 2009-10-01 Epson Imaging Devices Corporation Liquid crystal device
US20110216280A1 (en) * 2010-03-05 2011-09-08 Hitachi Displays, Ltd. Liquid crystal display device
CN103713431A (zh) * 2012-10-05 2014-04-09 三星显示有限公司 显示基板及具有该显示基板的液晶显示面板

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101276102A (zh) * 2007-03-30 2008-10-01 精工爱普生株式会社 电场驱动型装置、液晶装置以及电子设备
CN101441369A (zh) * 2007-11-21 2009-05-27 爱普生映像元器件有限公司 液晶显示装置
US20090244468A1 (en) * 2008-03-27 2009-10-01 Epson Imaging Devices Corporation Liquid crystal device
US20110216280A1 (en) * 2010-03-05 2011-09-08 Hitachi Displays, Ltd. Liquid crystal display device
CN103713431A (zh) * 2012-10-05 2014-04-09 三星显示有限公司 显示基板及具有该显示基板的液晶显示面板

Also Published As

Publication number Publication date
CN104503156A (zh) 2015-04-08
US9523891B2 (en) 2016-12-20
US20160342034A1 (en) 2016-11-24

Similar Documents

Publication Publication Date Title
EP2717093B1 (en) Display substrate and liquid crystal display panel having the same
US9927659B2 (en) Liquid crystal display
US9057921B2 (en) Thin film transistor array panel and liquid crystal display device including the same
US9740037B2 (en) Liquid crystal display device
US11264407B2 (en) Array substrate
US10288955B2 (en) Liquid crystal display device
CN102033360B (zh) 液晶显示面板
US20150103296A1 (en) Liquid crystal display
US9448452B2 (en) Liquid crystal display device with double rate driving structure with increased aperture ratio
WO2016090750A1 (zh) 显示基板及其制造方法
KR102155051B1 (ko) 액정 디스플레이 장치와 이의 제조 방법
US20170168354A1 (en) Array substrate, manufacturing method of the same and display device
US10818700B2 (en) Array substrate, liquid crystal display panel and display device
KR102043578B1 (ko) 어레이 기판, 액정 디스플레이 패널 및 액정 디스플레이 장치
US10088716B2 (en) Liquid crystal display device
WO2020220794A1 (zh) 阵列基板、显示面板、显示装置及阵列基板的制造方法
US10209581B2 (en) Display panel having stable maintenance ratio with viewing angle changed in different gray levels
KR101296631B1 (ko) 액정표시장치
KR20080067729A (ko) 시야각 조절이 가능한 프린지 필드 스위칭 액정표시장치
TWI402584B (zh) 影像顯示系統
CN202995199U (zh) 一种蓝相液晶显示器
US10551694B2 (en) Liquid crystal device
WO2017219443A1 (zh) 阵列基板、液晶显示面板显示装置
JP6893430B2 (ja) 液晶表示パネルおよびそれを用いた液晶表示装置
KR20160086013A (ko) 액정 표시 장치

Legal Events

Date Code Title Description
WWE Wipo information: entry into national phase

Ref document number: 14424013

Country of ref document: US

121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 15867294

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 15867294

Country of ref document: EP

Kind code of ref document: A1