WO2019001079A1 - 一种印刷电路板和通信设备 - Google Patents

一种印刷电路板和通信设备 Download PDF

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Publication number
WO2019001079A1
WO2019001079A1 PCT/CN2018/082322 CN2018082322W WO2019001079A1 WO 2019001079 A1 WO2019001079 A1 WO 2019001079A1 CN 2018082322 W CN2018082322 W CN 2018082322W WO 2019001079 A1 WO2019001079 A1 WO 2019001079A1
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WO
WIPO (PCT)
Prior art keywords
pad
transmission line
direction transmission
pads
multilayer pcb
Prior art date
Application number
PCT/CN2018/082322
Other languages
English (en)
French (fr)
Inventor
高峰
谢二堂
经纬
Original Assignee
华为技术有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 华为技术有限公司 filed Critical 华为技术有限公司
Priority to EP18823554.3A priority Critical patent/EP3629681B1/en
Publication of WO2019001079A1 publication Critical patent/WO2019001079A1/zh
Priority to US16/727,402 priority patent/US11019724B2/en

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
    • H05K1/113—Via provided in pad; Pad over filled via
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/42—Plated through-holes or plated via connections
    • H05K3/429—Plated through-holes specially for multilayer circuits, e.g. having connections to inner circuit layers
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0237—High frequency adaptations
    • H05K1/0243—Printed circuits associated with mounted high frequency components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/111—Pads for surface mounting, e.g. lay-out
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09409—Multiple rows of pads, lands, terminals or dummy patterns; Multiple rows of mounted components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09372—Pads and lands
    • H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/095—Conductive through-holes or vias
    • H05K2201/09545—Plated through-holes or blind vias without lands
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621—Components characterised by their electrical contacts
    • H05K2201/10666—Plated through-hole for surface mounting on PCB
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/02—Details related to mechanical or acoustic processing, e.g. drilling, punching, cutting, using ultrasound
    • H05K2203/0207—Partly drilling through substrate until a controlled depth, e.g. with end-point detection

Definitions

  • the present application relates to the field of communications, and in particular, to a printed circuit board and a communication device.
  • each of the pads corresponding to the surface of the multilayer PCB has a corresponding through hole or blind via (hereinafter referred to as "hole").
  • holes are one-to-one. Therefore, in the case where the pad density is getting larger and larger, the hole density is also getting larger.
  • the signal lines need to be laid out in the area between adjacent two holes. As the density of the holes becomes larger and larger, more and more holes need to be avoided when the signal lines are laid, resulting in a difficulty in layout of the signal lines in the signal layer.
  • the present application provides a multilayer printed circuit board (PCB) for reducing the difficulty of layout of signal lines to some extent.
  • PCB printed circuit board
  • the present application also provides corresponding communication devices.
  • the present application provides a multilayer PCB including a multilayer sub-board, and the surface of the multi-layer PCB has an array of pads.
  • the pad array has X rows and Y columns, where X and Y are integers greater than or equal to two.
  • the pad array includes at least one pad unit including a first pad and a second pad, the first pad and the second pad being adjacent.
  • the multilayer PCB further has a Z-directed groove penetrating part or all of the sub-boards of the multilayer PCB from the surface of the multilayer PCB in the thickness direction of the multilayer PCB.
  • first pad and the second pad are both located on the same side of the Z-direction slot.
  • first side of the Z-direction groove in which the first pad and the second pad are located is defined as the first side of the Z-direction groove.
  • inner wall of the inner wall of the Z-direction groove adjacent to the first pad and the second pad is also defined as a first inner wall (hereinafter, the "first inner wall” is directly used, and the explanation will not be repeated).
  • the first inner wall has a first Z-direction transmission line extending along a thickness direction of the multilayer PCB. That is, the extending direction of the first Z-direction transmission line is a linear direction, and the extending direction of the first Z-direction transmission line is the same as the thickness direction of the multilayer PCB.
  • both the first pad and the second pad are connected to the first Z-directed transmission line.
  • the Z-direction groove replaces the hole in the prior art, and the two pads on the same side of the Z-direction groove are connected to a first Z-direction transmission line of the Z-direction groove. That is, in the present embodiment, one Z-direction groove can correspond to two pads, so the distribution density of the Z-direction grooves in the PCB is smaller than that of the prior art holes in the PCB. Correspondingly, in the case where the number of pads is determined, the number of Z-direction slots that need to be avoided in the layout signal line in this embodiment is smaller than the number of holes that need to be avoided in the layout signal lines in the prior art. Therefore, the technical solution provided by the embodiment reduces the layout difficulty of the signal line at least to some extent.
  • the first Z-direction transmission line located in the Z-direction groove does not cover the inner wall of the Z-direction groove, but only occupies part of the inner wall of the Z-direction groove (ie, only occupies one of the inner walls, Or it only occupies the first inner wall).
  • the first Z-direction transmission line usually uses metal because of the signal to be transmitted.
  • it may be a thick copper layer plated on the inner wall of the Z-direction groove, but the shape is set to be along one more. A straight line extending in the thickness direction of the layer PCB.
  • the first Z-direction transmission line occupies only a part of the inner wall of the Z-direction groove, so the solution provided by the embodiment is provided with respect to the technical solution that the inner wall of the Z-direction groove is plated with a thick copper layer.
  • the technical solution saves resources.
  • the first pad and the second pad are both ground pads or power pads connected to the same power source. If two pads are pads that receive and transmit different signals, connecting the two pads to the same signal transmission line causes two different signals to crosstalk on the same signal transmission line, causing both A different signal failed to transmit.
  • the multi-layer PCB includes a ground layer, and in a case where the first pad and the second pad are both ground pads, the first Z-direction transmission line is far away from the One end of the surface of the layer PCB is connected to the ground layer.
  • the surface of the multilayer PCB refers to the surface of the multilayer PCB on which the array of pads is provided. All occurrences of "the surface of the multilayer PCB" appearing in this application can be referred to the explanation herein, and will not be repeatedly explained elsewhere.
  • the multi-layer PCB includes a power layer, and in a case where the first pad and the second pad are both power pads, the first Z-direction transmission line is away from the multi-layer One end of the surface of the PCB is connected to the power layer.
  • the pad unit further includes a third pad and a fourth pad, and the first solder Excluding the second pad, adjacent to the fourth pad, the third pad is also adjacent to the second pad and the fourth pad, respectively, and The first pad and the third pad are not adjacent.
  • the third pad and the fourth pad are also located on the same side of the Z-direction slot.
  • the first pad and the second pad are respectively located on opposite sides of the Z-direction groove from the third pad and the fourth pad.
  • the first side is defined above, and the other side of the Z-direction groove may be defined herein as the second side of the Z-direction groove, wherein the other side of the Z-direction groove is opposite to the first side of the Z-direction groove .
  • the third pad and the fourth pad are both located on the second side of the Z-direction slot.
  • the inner wall of the Z-direction groove adjacent to the third pad and the fourth pad is also defined as a second inner wall (hereinafter, the "second inner wall” is directly used, and the explanation is not repeated. ). Then the second inner wall has a second Z-direction transmission line. Similar to the aforementioned first Z-direction transmission line, the second Z-direction transmission line also extends along the thickness direction of the multilayer PCB, and the second Z-direction transmission line is isolated from the first Z-direction transmission line.
  • one Z-direction slot corresponds to four pads (that is, the aforementioned first pad, second pad, third pad, and fourth pad).
  • the Z-direction slot has two Z-direction transmission lines that do not interfere with each other, and are a first Z-direction transmission line and a second Z-direction transmission line, respectively, and the two Z-direction transmission lines are respectively used to transmit different signals.
  • the first pad and the second pad are both connected to the first Z-direction transmission line
  • the third pad and the fourth pad are both connected to the second Z-direction transmission line.
  • the density of the Z-direction grooves in this embodiment is smaller than the density of the holes in the prior art, and correspondingly, the Z-direction grooves to be avoided in the layout of the signal lines in this embodiment
  • the number is smaller than the number of holes that need to be avoided in the prior art. Therefore, the technical solution provided by the embodiment can reduce the layout difficulty of the signal line to a certain extent.
  • the third pad and the fourth pad are both ground pads or power supplies connected to the same power source. Pad.
  • the type of the third pad and the fourth pad reference may be made to the foregoing explanation for defining the types of the first pad and the second pad, here No longer.
  • the multi-layer PCB includes a ground layer, and in a case where the third pad and the fourth pad are both ground pads, the second Z-direction transmission line is far away from the One end of the surface of the layer PCB is connected to the ground layer.
  • the multi-layer PCB includes a power layer, and in a case where the third pad and the fourth pad are both power pads, the second Z-direction transmission line is away from the plurality of layers One end of the surface of the PCB is connected to the power layer.
  • the application further includes a fourth possible implementation.
  • the fourth possible implementation manner of the first aspect and the second possible implementation manner of the foregoing first aspect are two parallel implementation manners, and there are many similarities between the two. The following is a description of the differences between the two. For other parts, refer to the description in the second possible implementation, and details are not described herein again.
  • the second inner wall has two second Z-direction transmission lines, and the two second Z-direction transmission lines are isolated from each other, and each of the second Z-directions The transmission line and the first Z-direction transmission line are also isolated from each other.
  • the third pad and the fourth pad are respectively connected to one of the second Z-directed transmission lines.
  • the second inner wall has two second Z-directional transmission lines, the The third pad and the fourth pad are respectively connected to one of the second Z-directed transmission lines.
  • one of the Z-directed slots corresponds to four pads.
  • the density of the Z-direction grooves in this embodiment is smaller than the density of the holes in the prior art, and accordingly, the number of Z-direction slots to be avoided when laying out the signal lines in this embodiment. It is smaller than the number of holes that need to be avoided in the prior art. Therefore, the technical solution provided by the embodiment can reduce the layout difficulty of the signal line to a certain extent.
  • the third pad and the fourth pad may be different types of pads, or signal pads for receiving a pair of differential signals, or signal pads for receiving different single-ended signals, or It is used to receive power pads for different power sources.
  • the third pad and the fourth pad are respectively used to transmit different signals, they should be respectively connected to a second Z-directed transmission line. Because if they are connected to the same second Z-direction transmission line, two different signals will be transmitted on the same second Z-direction transmission line, which will cause serious crosstalk between the two different signals, thereby causing the two A different signal failed to transmit.
  • the third pad and the fourth pad may be different types of pads.
  • one of the third pad and the fourth pad may be Ground pad, the other is the power pad; one of them can be the ground pad, the other is the signal pad of the single-ended signal; one can be the power pad and the other is the single-ended signal Signal pad.
  • the third pad and the fourth pad may also be The ground pad, or both are the power signals connected to the same power source.
  • the third pad and the corresponding second Z-direction The transmission lines may be connected by a first metal line, wherein the extending direction of the first metal lines is perpendicular to the corresponding second Z-direction transmission lines. Because in this case, the length of the first metal wire is the shortest, which is conducive to saving resources.
  • the third pad and the second Z-directed transmission line are in direct contact.
  • the fourth pad and the corresponding The second Z-direction transmission lines may be connected by a second metal line, wherein the second metal lines extend in a direction perpendicular to the corresponding second Z-direction transmission lines.
  • the purpose of such limitation is to ensure that the length of the second metal wire is the shortest, which is advantageous for saving resources.
  • the third pad and the second Z-directed transmission line are in direct contact.
  • the width of the first Z-directional transmission line Greater than the width of the second Z-direction transmission line.
  • the width of the first Z-direction transmission line is fixed along a thickness direction of the multi-layer PCB, wherein a width of the first Z-direction transmission line refers to the first Z-direction transmission line along the The width of the thickness direction of the multilayer PCB on the plane in which the surface of the multilayer PCB is located.
  • the width of the second Z-direction transmission line is fixed along the thickness direction of the multilayer PCB, wherein the width of the second Z-direction transmission line refers to the second Z-direction transmission line along the plurality
  • the thickness of the layer PCB is the width of the projection of the plane in which the surface of the multilayer PCB is located.
  • the first Z-direction transmission line is connected to two pads (that is, two signals are transmitted), and the second Z-direction transmission line is connected to one pad (that is, only one signal needs to be transmitted), the The width of the first Z-direction transmission line is greater than the width of the second Z-direction transmission line, and the two signals transmitted on the first Z-direction transmission line can be ensured to be relatively fast. Thereby, the problem that the transmission rate of the two signals transmitted on the first Z-direction transmission line is low when the width of the first Z-direction transmission line is the same as the width of the second Z-direction transmission line is avoided.
  • the width of the first Z-direction transmission line refers to an end surface of the first Z-direction transmission line that is in contact with the first pad and the second pad along a thickness direction of the multilayer PCB.
  • the width of the second Z-direction transmission line means that an end surface of the second Z-direction transmission line that is in contact with the third pad or the fourth pad is along a thickness direction of the multilayer PCB.
  • the width of the first Z-direction transmission line is defined to be larger than the width of the second Z-direction transmission line. It is ensured that both pads connected to the first Z-direction transmission line can achieve good contact with the first Z-direction transmission line.
  • the multi-layer PCB includes a signal layer, a power layer, and a ground layer.
  • the second Z-direction transmission line connected to the ground pad One end away from the surface of the multilayer PCB is connected to the ground layer, and an end of the second Z-direction transmission line connected to the power pad that is away from the surface of the multilayer PCB is connected to the power layer.
  • the An end of the second Z-direction transmission line remote from the surface of the multilayer PCB is connected to the ground layer, and a surface of the second Z-direction transmission line connected to the signal pad of the single-ended signal is away from the surface of the multilayer PCB One end is connected to the signal layer.
  • the An end of the second Z-direction transmission line remote from the surface of the multilayer PCB is connected to the power layer, and the second Z-direction transmission line connected to the signal pad of the single-ended signal is away from the surface of the multilayer PCB. One end is connected to the signal layer.
  • the multi-layer PCB includes two or more signal layers, and signals transmitted by each of the two or more signal layers are different.
  • the third pad and the fourth pad are signal pads for receiving a pair of differential signals, or in the case of signal pads for receiving different single-ended signals
  • An end of the second Z-direction transmission line of the third Z-transport line remote from the surface of the multi-layer PCB and the second Z-direction transmission line connected to the fourth pad are remote from the surface of the multi-layer PCB One end is connected to a different signal layer.
  • the multi-layer PCB includes two or more power supply layers, and each of the two or more power supply layers provides different power sources.
  • the second Z-direction transmission line connected to the third pad is away from One end of the surface of the multilayer PCB and one end of the second Z-direction transmission line connected to the fourth pad remote from the surface of the multilayer PCB are respectively connected to different power supply layers.
  • the first welding The disk and the second pad are in the same row, and the length direction of the Z-direction slot is the direction in which the rows in the pad array are located.
  • the length direction of the Z-directed groove refers to a direction in which the line between the two points of the multilayer PCB and which corresponds to the longest distance in the window of the Z-direction groove is the longest.
  • the length of the Z-direction slot is greater than or equal to a minimum distance between the first pad and the second pad.
  • the first The pad and the second pad are in the same column, and the length direction of the Z-direction groove is the direction in which the columns in the pad array are located.
  • the length direction of the adjacent two Z-direction slots is the same In the case, the adjacent two Z-direction slots are in communication. This design is simpler and can increase production efficiency.
  • the first pad and the second pad are both located in the Nth row
  • the third pad and the fourth pad are both located in the N+1th row, and are located in the Nth row.
  • And between each of the plurality of Z-direction slots between the plurality of Z-direction slots and the Z-direction slots are in communication with each other.
  • N is an integer greater than or equal to 1 and less than or equal to X-1.
  • the first pad and the second pad are both located in the Mth column, and the third pad and the fourth pad are both located in the M+1th column, and are located in the Mth column. And between each of the plurality of Z-direction slots between the plurality of Z-direction slots and the Z-direction slots are in communication with each other.
  • M is an integer greater than or equal to 1 and less than or equal to Y-1.
  • the signal The line traverses the area between two adjacent Z-direction slots.
  • the multi-layer PCB includes at least one of the Z-direction grooves and at least one hole, and at least one of the Z-direction grooves in the Z-direction groove is adjacent to the hole, and in the signal layer, A signal line traverses an adjacent region of the Z-directed slot and the aperture.
  • the hole may be a through hole or a blind hole.
  • a so-called through hole refers to a hole that penetrates the multilayer PCB.
  • the so-called blind via is a hole that penetrates the molecular plate in the middle of the multilayer PCB from a surface of the multilayer PCB.
  • the Z The groove is filled with a non-conductive medium.
  • the non-conductive medium is a non-conductive resin.
  • the non-conductive medium is used to isolate the first Z-direction transmission line from the second Z-direction transmission line.
  • the second inner wall has two second Z-direction transmission lines, and in this case, the non-conductive medium is further used to make the two The second Z-direction transmission lines are isolated from each other, and each of the second Z-direction transmission lines is isolated from the first Z-direction transmission line.
  • a shape of the window corresponding to the Z-direction slot in the surface of the multilayer PCB is an elongated slit.
  • the length of the slit is the length of the Z-direction groove.
  • a shape of the window corresponding to the Z-direction slot in the surface of the multi-layer PCB is a rectangle, an ellipse or a peanut shape.
  • the first pad and the second pad are both located in the Nth row
  • the third pad and the fourth pad are both located in the N+1th row
  • the Z slot The width is less than or equal to the spacing between the Nth row and the N+1th row. It should be noted that the width direction of the Z-direction groove is perpendicular to the longitudinal direction of the Z-direction groove. This explanation also applies to other embodiments of the present application, and thus will not be described again in other embodiments. For the value of N, please refer to the foregoing rules, and details are not described here.
  • the first pad and the second pad are both located in the Mth column, and the third pad and the fourth pad are both located in the M+1th column, and the Z-direction slot
  • the width is less than or equal to the spacing between the Mth column and the M+1th column.
  • the spacing between the two second Z-direction transmission lines is greater than or equal to 4 mils and less than or equal to the length of the Z-direction slots.
  • a distance between the second Z-direction transmission line and the first Z-direction transmission line is greater than or equal to 4 mils and less than or less than a width of the Z-direction slots.
  • the thickness of the Z-direction transmission line is greater than zero and less than half the width of the Z-direction slot.
  • the thickness of the Z-direction transmission line is greater than or equal to 15 microns and less than or equal to 50 microns.
  • the Z-direction transmission line may be the aforementioned first Z-direction transmission line or the aforementioned second Z-direction transmission line.
  • the "Z-direction transmission line" that appears later in this application can be referred to the explanation herein, and the description will not be repeated later.
  • the width of the Z-direction transmission line is fixed, and the width of the Z-direction transmission line is greater than or equal to 4 mils and less than or equal to 20 mils.
  • the present application further provides a communication device comprising the multi-layer PCB and an input/output (I/O) chip of any of the preceding embodiments.
  • the I/O chip has an array of X rows*Y columns. Wherein, the pins of the I/O chip and the pads of the surface of the multilayer PCB are in one-to-one contact. It should be noted that the values of X and Y refer to the foregoing rules, and are not described here.
  • the wiring difficulty of the signal lines is reduced to some extent. Due to the reduced process difficulty of the multilayer PCB, correspondingly, the process difficulty of the communication device including the multilayer PCB is also reduced.
  • FIG. 1 is a top plan view of a surface of a multilayer PCB in the prior art.
  • FIG. 2 is a structural diagram of a communication device provided by the present application.
  • I/O input/output
  • FIG. 4A is a structural diagram of a multilayer PCB provided by the present application.
  • 4B is a perspective view of a multilayer PCB provided by the present application.
  • FIG. 5A is a structural diagram of a pad unit provided by the present application.
  • FIG. 5B is a structural diagram of another pad unit provided by the present application.
  • Figure 6 is a perspective view of the pad unit shown in Figure 5B.
  • the multi-layer PCB refers to a PCB including a plurality of sub-boards including a signal layer sub-board (hereinafter referred to as “signal layer”), a power layer sub-board (hereinafter referred to as “power layer”), and a ground.
  • Line layer daughter board hereinafter referred to as “ground layer”.
  • the signal layer referred to herein refers to a daughter board that transmits signals
  • the power layer is a daughter board that supplies power
  • the ground layer is a grounded daughter board.
  • the surface of the multilayer PCB to which the present application relates has a pad array of X rows * Y columns, wherein X and Y are integers greater than or equal to 2. It should be noted that X and Y appearing in any of the following embodiments can be referred to herein for their definition, and will not be described again.
  • the plurality of pads included in the pad array may be classified into the following types according to the use: signal pads, power pads, and ground pads. It should be understood that so-called signal pads are used to receive and transmit signals. The so-called power pad is used to receive and transmit power. The so-called ground pad is used for grounding.
  • the signal pad can also be divided into a signal pad that receives the differential signal and a signal pad that receives the single-ended signal. It should be understood that the differential signals appear in pairs, and the differential signals that appear in pairs in this application are expressed as "a pair of differential signals.”
  • each of the pads of the X row * Y column pad array located on the surface of the multilayer PCB it is common for each of the pads of the X row * Y column pad array located on the surface of the multilayer PCB to have a corresponding hole.
  • the holes mentioned in the present application may be through holes or blind holes, and one hole is specifically a through hole or a blind hole, and needs to be determined according to actual conditions. It is also worth noting that the types of holes are different for different types of pads.
  • a hole connected to a signal pad in the prior art is referred to as a signal hole
  • a hole connected to a power pad is referred to as a power hole
  • a hole connected to a ground pad is referred to as a ground hole.
  • the multi-layer PCB also has an array of holes of X rows * Y columns.
  • the hole array has a corresponding Kth row of holes, wherein The Kth row hole may be located between the Kth row pad and the K+1th row pad. Further, when K is equal to X, the Kth row of holes corresponding to the pad of the Kth row may be located outside the pad of the Kth row.
  • the hole array has a corresponding Jth column hole, wherein the Jth column The column holes may be located between the Jth column pad and the J+1th column pad. Further, when J is equal to Y, the J-th column hole corresponding to the J-th column pad may be located outside the J-th column pad.
  • FIG. 1 there is shown a top plan view of the surface of a multilayer PCB in the prior art.
  • a row array of 5 rows*4 columns that is, X is equal to 5 and Y is equal to 4.
  • the multi-layer PCB surface also has an array of holes of 5 rows * 4 columns (strictly speaking, what should be seen in Figure 1 is an array of openings of 5 rows * 4 columns, each opening is one through which The opening of some or all of the sub-boards of the layer PCB on the surface of the multi-layer PCB is directly expressed as an array of holes of 5 rows * 4 columns, but in order to make the description simpler, those skilled in the art should know that the actual On the surface of a multilayer PCB, an array of holes cannot be directly seen).
  • the relationship between each pad and the corresponding hole, the relationship between each row of pads and the corresponding row of holes, and between each column of pads and a corresponding row of holes The relationship of the above meets the above requirements and will not be repeated here.
  • the circle marked with GND/PWR in FIG. 1 represents the ground pad or the power pad
  • the circle marked with SIG indicates the signal pad
  • the blank circle represents the hole.
  • the multi-layer PCB provided by the present application is used to reduce the layout of signal layers and signal lines on the multilayer PCB to a certain extent.
  • FIG. 2 is a block diagram showing the structure of a communication device including the multilayer PCB and input/output (I/O) chip provided by the present application.
  • the I/O chip has an X-row*Y column pin array having a surface array of X rows*Y columns, wherein the pins and pads are one-to-one and each A pin is in contact with the corresponding pad.
  • the I/O chip may be a high speed serial (SERDES) interface chip, a memory chip or a processor chip.
  • SERDES high speed serial
  • the lead pitch of the mainstream I/O chip is 1.0 mm, 0.8 mm, 0.65 mm, 0.5 mm, or 0.4 mm.
  • the so-called pin pitch refers to the distance between two adjacent pins. Since two adjacent pins can be on the same line, they can also be in the same column. Typically, the distance between each adjacent two pins in the same row is the same, and the distance between each adjacent two pins in the same column is the same. In the present application, the distance between adjacent two pins in the same row is referred to as the pin pitch on the row, and the distance between adjacent two pins in the same column is referred to as a column.
  • the pitch of the pins It should be understood that the pitch of the pins on the rows of the same pad array and the pitch of the pins on the columns may be the same or different.
  • the distance between adjacent two pads in the pad array corresponds to the aforementioned pin pitch. That is, the pad pitch on the row is the same as the pitch on the row, and the pad pitch on the column is the same as the pin pitch on the column.
  • the pad pitch on the row refers to the distance between adjacent two pads in the same row.
  • the pad pitch on a column refers to the distance between two adjacent pads in the same column.
  • the distance between each adjacent two pads in the same row is the same, and the distance between each adjacent two pads in the same column is also the same.
  • FIG. 3 shows a structural diagram of a pin array of the I/O chip. It is easy to see that the I/O chip has a 10-row*10-column pin array.
  • FIG. 4A shows a structural diagram of a multilayer PCB provided by the present application. Specifically, FIG. 4A is a plan view of the surface of the multilayer PCB. As shown in FIG. 4A, it is easy to see that the surface of the multilayer PCB has an array of pads having 10 rows and 10 columns. It should be understood that the pin array of Figure 3 corresponds to the pad array of Figure 4A. Then, in the communication device including the I/O chip shown in FIG. 3 and the multilayer PCB shown in FIG. 4A, there is a one-to-one correspondence between the pins and the pads, and each of the pins is in contact with the corresponding pad.
  • the multilayer PCB provided by the present application will be described. Specifically, the surface of the multilayer PCB has a row array of X rows*Y columns, the pad array includes at least one pad unit, the pad unit includes a first pad and a second pad, wherein the first The pad and the second pad are adjacent.
  • FIG. 4B a perspective view of the multilayer PCB provided by the present application is shown. Please pay attention to the portion of the dotted circle in Fig. 4B, which is a pad unit.
  • first pad and second pad are only used to illustrate that they are two different pads, and the first and second themselves do not constitute a limitation of the pad. That is, in the present application, the purpose of using the first, second, third or fourth is to facilitate distinguishing a plurality of components from each other when they modify similar components such as pads, and they do not constitute a pair by themselves. Limitation of component characteristics.
  • the multilayer PCB also has a Z-directed slot.
  • the so-called Z-directed groove refers to a groove that penetrates the multilayer PCB in the thickness direction of the multilayer PCB in the multilayer PCB, or from the multilayer in the thickness direction of the multilayer PCB
  • the surface of the PCB extends through the slots of the molecular plates inside the multilayer PCB. That is, the Z-directed groove may penetrate the multilayer PCB along the thickness direction of the multilayer PCB like a through hole, or may penetrate the multilayer PCB only in the thickness direction of the multilayer PCB like a blind hole. Part of the daughter board.
  • the opening direction of the Z-direction groove is provided with the surface of the pad array toward the multi-layer PCB.
  • the shape of the opening of the Z-direction groove is an elongated slit.
  • the elongated slit may have a rectangular shape, an elliptical shape, a peanut shape or the like.
  • the inner wall of the Z-directed groove is insulated except for the region plated with the Z-direction transmission line, and the Z-direction transmission line may be the first Z-direction transmission line and the second Z-direction transmission line described below.
  • the aforementioned partial daughter board refers to at least one layer of daughter boards.
  • the partial daughter board refers to two or more daughter boards.
  • the first pad and the second pad are located on the same side of the Z-direction slot.
  • one side of the Z-direction groove in which the first pad and the second pad are located is defined as the first side of the Z-direction groove.
  • the inner wall of the inner wall of the Z-direction groove adjacent to the first pad and the second pad is also defined as a first inner wall (hereinafter, the "first inner wall" is directly used, and the explanation will not be repeated).
  • the first inner wall has a first Z-direction transmission line, and the first pad and the second pad are both connected to the first Z-direction transmission line.
  • the thickness direction of the multilayer PCB is defined as the Z direction
  • the so-called first Z-direction transmission line means a transmission line extending in the Z direction.
  • the first Z-direction transmission line is a straight line, and the first Z-direction transmission line is perpendicular to a plane where the surface of the multilayer PCB is located.
  • the length of the Z-direction slot is greater than or equal to a minimum distance between the first pad and the second pad.
  • the length of the Z-direction groove refers to a distance between two points of the surface of the multi-layer PCB and corresponding to the longest distance in the window of the Z-direction groove.
  • the direction in which the length of the Z-direction slot is located (hereinafter referred to as “the length direction of the Z-direction slot”) is the same as the direction in which the rows of the pad array are located, or The columns of the pad array are in the same direction. Further, the length direction of the Z-direction groove is perpendicular to the width direction of the Z-direction groove (or the direction in which the width of the Z-direction groove is located). It should be understood that in the pad array, the rows of the pad arrays are oriented perpendicular to the direction in which the columns of the pad arrays are located.
  • the width direction of the Z-direction groove is the same as the direction in which the columns of the pad array are located.
  • the width direction of the Z-direction groove is the same as the direction in which the rows of the pad array row are located.
  • the shape of the fenestration on the surface of the multilayer PCB and corresponding to the Z-directed slot is an elongated slit. It should be understood that the length of the slit is the length of the Z-directed groove. It should be noted that the first pad and the second pad may be located in the same row or in the same column.
  • the first pad and the second pad are in the same row, and the length direction of the Z-direction slot is the same as the direction of the row of the pad array, or the Z-direction
  • the length direction of the slot is the direction in which the rows of the pad array are located.
  • the pad unit 21 in FIG. 4A in which two of the pad units are located in the same row, and the other two pad units are also in the same row, then the two of the pad units and The length direction of the Z-direction groove between the other two pad units is the same as the direction in which the rows of the pad array are located.
  • the first pad and the second pad are in the same column, and the length direction of the Z-direction slot is the same as the direction of the column of the pad array, or the Z-direction
  • the length direction of the slot is the direction in which the columns of the pad array are located.
  • the pad unit 11 will be described below as an example. It is easy to see that two of the pad cells located in the pad unit 11 are in the same column, and the other two pad cells are also in the same column, between the two pad cells and the other two pad cells.
  • the Z-direction slot has the same length direction as the column of the pad array.
  • the thickness of the first Z-direction transmission line is greater than zero and less than half of the width of the Z-direction slot.
  • the thickness of the first Z-direction transmission line may be greater than or equal to 15 micrometers and less than or equal to 50 micrometers.
  • the first Z-direction transmission line is plated on the inner wall of the Z-direction groove, and the first Z-direction transmission line is substantially also Thick copper layer. Therefore, the thickness of the first Z-direction transmission line is similar to the thickness of the thick copper layer, and means that the surface of the first Z-direction transmission line that is attached to the inner wall of the Z-direction groove and the Z-direction transmission line are attached thereto. The distance between the Z-direction faces on the inner wall of the groove.
  • the width of the first Z-direction transmission line is fixed, and the width of the first Z-direction transmission line is greater than or equal to 4 mils and less than or equal to 50 micrometers.
  • the width of the first Z-direction transmission line refers to a width of a projection of the first Z-direction transmission line along a plane of the Z-direction on a surface of the multi-layer PCB.
  • first pad and the second pad are both connected to the same first Z-direction transmission line, the first pad and the second pad may both be grounded.
  • the pads can also be power pads that are connected to the same power supply.
  • the multilayer PCB described in the present application includes a signal layer, a power layer, and a ground layer.
  • both the first pad and the second pad are ground pads
  • an end of the first Z-direction transmission line remote from the surface of the multilayer PCB is connected to the ground layer.
  • the first pad and the second pad are both power supply pads of the same power source
  • an end of the first Z-direction transmission line remote from the surface of the multilayer PCB is connected to the power layer.
  • first pad and the second pad may be directly in contact with the first Z-direction transmission line, or may be connected to the first Z-direction transmission line through a metal line, respectively.
  • the pad unit further includes a third pad and a fourth pad, wherein the first pad is adjacent to the second pad and the fourth pad, respectively, the third Pads are also adjacent to the second pad and the fourth pad, respectively. It should be noted that the first pad and the third pad are not adjacent. It should be understood that the first to fourth pads are respectively located at the four corners of the rectangle.
  • the third pad and the fourth pad are also located on the same side of the Z-direction slot.
  • the foregoing defines that the first pad and the second pad are located on a first side of the Z-directed slot, where the Z-slot is located where the third pad and the fourth pad are located
  • One side is defined as the second side of the Z-direction slot, and the second side and the first side are opposite sides of the Z-direction slot (so-called opposite sides, see FIG. 5A, pad) 1.
  • the pad 2 is located on the first side, and the pad 3 and the pad 4 are located on the second side, and the first side and the second side are opposite sides).
  • the inner wall of the Z-direction groove adjacent to the third pad and the fourth pad is also defined as a second inner wall.
  • the second inner wall may have a second Z-direction transmission line or two second Z-direction transmission lines. Wherein, the second Z-direction transmission line also extends along the Z direction.
  • the second Z-direction transmission line is a straight line, and the second Z-direction transmission line is perpendicular to a plane where the surface of the multilayer PCB is located.
  • the thickness of the second Z-direction transmission line is greater than zero and less than half of the width of the Z-direction slot. Specifically, the thickness of the second Z-direction transmission line may be greater than or equal to 15 micrometers and less than or equal to 50 micrometers. It should be noted that, in the present application, the definition of the thickness of the second Z-direction transmission line can be referred to the foregoing definition of the thickness of the first Z-direction transmission line, and details are not described herein again.
  • the width of the second Z-direction transmission line is fixed along a thickness direction of the multilayer PCB, and the width of the second Z-direction transmission line is greater than or equal to 4 mils and less than or equal to 50 micrometers.
  • the width of the second Z-direction transmission line refers to a width of a projection of the second Z-direction transmission line along a plane of the Z-direction on a surface of the multi-layer PCB.
  • the second inner wall has one of the second Z-direction transmission lines, and the third pad and the fourth pad are both connected to the second Z-direction transmission line. It should be noted that the second Z-direction transmission line is isolated from the first Z-direction transmission line on the first inner wall.
  • the third pad and the fourth pad may both be For the ground pad, it can also be a power pad that is connected to the same power supply. It should be noted that, when both the third pad and the fourth pad are ground pads, one end of the second Z-direction transmission line remote from the surface of the multilayer PCB is connected to the ground layer. When the third pad and the fourth pad are both power supply pads of the same power source, an end of the second Z-direction transmission line remote from the surface of the multilayer PCB is connected to the power layer.
  • FIG. 5A there is shown a block diagram of a pad unit provided by the present application.
  • the first pads 1 are adjacent to the second pads 2 and the fourth pads 4, respectively, and the third pads 3 are also adjacent to the second pads 2 and the fourth pads 4, respectively, but The first pad 1 and the third pad 3 are not adjacent.
  • the first pad 1 and the second pad 2 are located on one side of the Z-direction groove 8, and the third pad 3 and the fourth pad 4 are located on the other side of the Z-direction groove 8.
  • the Z-direction groove 8 has a first Z-direction transmission line 5 on the inner wall of the first pad 1 and the second pad 2, and the first pad 1 and the second pad 2 are both connected to the first Z-direction transmission line 5.
  • the Z-direction groove 8 has a second Z-direction transmission line 7 on the inner wall of the third pad 3 and the fourth pad 4, and the third pad 3 and the fourth pad 4 are both connected to the second Z-direction transmission line 7.
  • the first pad 1 and the first Z-direction transmission line 5 are connected by a metal line
  • the second pad 2 and the first Z-direction transmission line 5 Also connected by a metal wire
  • the third pad 3 and the second Z-direction transmission line 7 are also connected by a metal wire
  • the fourth pad 4 and the second Z-direction transmission line 7 are also connected by a metal wire.
  • the second inner wall has two second Z-direction transmission lines, and the third pad is connected to one of the two second Z-direction transmission lines, the The four pads are connected to the other of the two of the second Z-directional transmission lines. It should be noted that each of the two second Z-direction transmission lines is isolated from the first Z-direction transmission line and the first Z-direction transmission line.
  • a spacing between each of the second Z-direction transmission lines and the first Z-direction transmission line may be greater than or equal to 4 mils and less than or equal to a width of the Z-direction slots.
  • the two second Z-direction transmission lines may be isolated from each other or may be in contact with each other.
  • the two second Z-direction transmission lines are in contact with each other, and the third pad and the fourth pad may both be ground pads or all of the power pads connected to the same power source.
  • the two second Z-direction transmission lines are isolated from each other, and the third pad and the fourth pad may be different types of pads or used to receive a pair of differential signals.
  • Signal pads either signal pads for receiving different single-ended signals, or power pads for receiving different power supplies.
  • the third pad and the fourth pad may also be ground pads, or both are connected to the same power source. plate. Referring to the pad unit marked with a broken line in FIG. 4B, it is easy to see that the second inner wall of the pad unit has two mutually separated second Z-direction transmission lines. The types of pads connected to the two second Z-direction transmission lines are different.
  • the third pad and the fourth pad may be different types of pads", and optionally, one of the third pads and the fourth pads is grounded
  • the pad, the other pad is the power pad; or one of the pads is the ground pad, the other pad is the signal pad of the single-ended signal; or one of the pads is the power pad, the other
  • the pad is a signal pad that is connected to a single-ended signal.
  • the multilayer PCB described herein includes a signal layer, a power plane, and a ground plane. It should also be noted that the multilayer PCB may include only one signal layer, and may also include more than two signal layers. When the multilayer PCB includes more than two signal layers, the signals transmitted on different signal layers are different. Further, the multilayer PCB may include only one power layer, and may also include more than two power layers. When the multilayer PCB includes more than two power planes, the power supplies provided by the different power planes are different. Similarly, the multilayer PCB may include only one ground layer or more than two ground layers. Regardless of how many layers of ground layers the multilayer PCB includes, the effect of each layer of ground layers is the same.
  • each of the two second Z-direction transmission lines is away from the multilayer PCB surface One end is connected to the same ground layer, or is connected to two ground layers respectively.
  • each of the two second Z-direction transmission lines is away from the plurality of layers of the second Z-direction transmission line
  • One end of the PCB surface is connected to the same power supply layer, or is connected to a different power supply layer.
  • the third pad and the fourth pad are signal pads for receiving a pair of differential signals, or are signal pads for receiving different single-ended signals
  • the first connection is performed.
  • One end of the second Z-direction transmission line away from the multi-layer PCB surface and one end of the second Z-direction transmission line connecting the fourth pad away from the surface of the multi-layer PCB are respectively different from The signal layer is connected.
  • the second Z-direction transmission line connecting the third pads is away from the multi-layer PCB surface
  • One end of the second Z-direction transmission line connecting the fourth pads and one end away from the surface of the multilayer PCB are respectively connected to different power supply layers.
  • the second Z-direction transmission line connecting the ground pad An end away from the surface of the multilayer PCB is connected to the ground layer, and an end of the second Z-direction transmission line connecting the power pad from the surface of the multilayer PCB is connected to the power layer.
  • the first connection of the ground pad is connected
  • One end of the two Z-direction transmission lines remote from the surface of the multi-layer PCB is connected to the ground layer, and the end of the second Z-direction transmission line connecting the signal pads of the single-ended signal away from the surface of the multi-layer PCB and the signal Layer connection.
  • the first of the power pads is connected
  • One end of the two Z-direction transmission lines remote from the surface of the multi-layer PCB is connected to the power supply layer, and one end of the second Z-direction transmission line connecting the signal pads of the single-ended signal away from the surface of the multi-layer PCB and the signal layer connection.
  • the two pads are the first pad and the second pad, Or the third pad and the fourth pad.
  • any two of the corresponding two-terminal signals are different.
  • the above or below mentioned in the present application includes the number, for example, two or more include two.
  • the spacing between the two second Z-direction transmission lines may be greater than or equal to 4 mi l and less than or equal to the Z-direction slot. length.
  • the third pad and the second Z-direction transmission line corresponding to the third pad may be in direct contact or may be connected by a first metal line.
  • the second Z-direction transmission line corresponding to the third pad refers to the second Z-direction transmission line connected to the third pad among the two second Z-direction transmission lines.
  • the first metal wire One end is in contact with the third pad, the other end is in contact with the second Z-direction transmission line corresponding to the third pad, and the first metal line is perpendicular to the third pad Corresponding to the second Z-direction transmission line.
  • the fourth pad and the second Z-direction transmission line corresponding to the fourth pad may be in direct contact or may be connected by a second metal line.
  • the second Z-direction transmission line corresponding to the fourth pad refers to the second Z-direction transmission line connected to the fourth pad among the two second Z-direction transmission lines.
  • the second metal line One end is in contact with the fourth pad, the other end is in contact with the second Z-direction transmission line corresponding to the fourth pad, and the second metal line is perpendicular to the fourth pad Corresponding to the second Z-direction transmission line.
  • the first Z-direction transmission line may be greater than the width of the second Z-directed transmission line.
  • the width of the first Z-direction transmission line may be fixed or non-fixed (for example, having more than two width values) along the thickness direction of the multilayer PCB.
  • the width of the second Z-direction transmission line may be fixed or unfixed (for example, having more than two width values)
  • the width of the first Z-direction transmission line and the width of the second Z-direction transmission line are both fixed, and the width of the first Z-direction transmission line refers to a width of a projection of the first Z-direction transmission line along a thickness direction of the multilayer PCB on a plane where the surface of the multilayer PCB is located, and a width of the second Z-direction transmission line refers to the second Z-direction transmission line
  • the width of the first Z-direction transmission line is greater than the width of the second Z-direction transmission line.
  • the width of the first Z-direction transmission line is equal to the width of the second Z-direction transmission line.
  • the width of the first Z-direction transmission line refers to an end surface of the first Z-direction transmission line that is in contact with the first pad and the second pad along a thickness direction of the multilayer PCB.
  • the width of the second Z-direction transmission line means that the end face of the second Z-direction transmission line that is in contact with the third pad or the fourth pad is in the thickness direction of the multilayer PCB.
  • the width of the first Z-direction transmission line is greater than the width of the second Z-direction transmission line.
  • the width of the first Z-direction transmission line is equal to the width of the second Z-direction transmission line.
  • FIG. 5B there is shown a block diagram of another pad unit provided by the present application. Only the difference between the pad unit shown in FIG. 5B and the pad unit shown in FIG. 5A will be described below. For the same, the description of FIG. 5A is omitted, and details are not described herein again.
  • the pad unit shown in FIG. 5B is different from the pad unit shown in FIG. 5A in that the Z-direction groove 8 has a second Z-direction transmission line 6 and an inner wall on the inner wall of the third pad 3 and the fourth pad 4 The second Z-direction transmission line 7, wherein the third pad 3 is connected to the second Z-direction transmission line 7, and the fourth pad 4 is connected to the second Z-direction transmission line 6.
  • FIG. 6 it is a perspective structural view of the pad unit shown in Fig. 5B.
  • the pad 601 in FIG. 6 corresponds to the first pad 1 in FIG. 5B
  • the pad 602 in FIG. 6 corresponds to the second pad 2 in FIG. 5B
  • the pad 603 in FIG. 6 corresponds to FIG. 5B.
  • the third pad 3, the pad 604 in FIG. 6, corresponds to the fourth pad 4 in FIG. 5B.
  • the Z-direction transmission line 605 in FIG. 6 corresponds to the Z-direction transmission line 5 in FIG. 5B
  • the Z-direction transmission line 606 in FIG. 6 corresponds to the Z-direction transmission line 6 in FIG. 5B
  • the Z-direction transmission line 607 in FIG. 6 corresponds to FIG.
  • the pads 601 and 602 are both connected to the Z-direction transmission line 605, the pad 603 is connected to the Z-direction transmission line 607, and the pad 604 is connected to the Z-direction transmission line 606. Also shown in Figure 6 are two signal lines 608 and 609, which illustrate that pads 603 and 604 are connected to a pair of differential signals or to a single-ended signal, respectively.
  • the adjacent two Z-direction slots may be in communication.
  • the Z-direction groove corresponding to the pad unit 13 and the Z-direction groove corresponding to the pad unit 23 are in communication.
  • Each of the plurality of Z-direction slots between the Nth row and the (N+1)th row is in communication with each of the adjacent two Z-direction slots. It should be understood that N is an integer greater than or equal to 1 and less than or equal to X-1.
  • the The width of the Z-directed trench is less than or equal to the minimum spacing between the Nth row of pads and the (N+1)th row of pads. It should be understood that in the pad array, the minimum spacing between adjacent rows of pads is clear.
  • the first pad and the second pad are both located in the Mth column
  • the third pad and the fourth pad are both located in the M+1th column, located in the Mth column and
  • Each of the plurality of Z-direction slots between the M+1 columns is in communication with each other between the two Z-direction slots.
  • M is an integer greater than or equal to 1 and less than or equal to Y-1.
  • the width of the Z-direction groove is less than or equal to the minimum spacing between the M-th column pad and the M+1-th column pad. It should be understood that in the pad array, the minimum spacing between adjacent columns of pads is clear.
  • the Z-direction slot described in the present application is filled with a non-conductive medium.
  • the non-conductive medium is a non-conductive resin. It should be noted that, since the Z-direction groove is filled with a non-conductive medium, wherein the material filled in the Z-direction groove is different from the composition of the multi-layer PCB, the Z-direction groove is formed in the multilayer PCB. of. Therefore, in the actual product of the multilayer PCB, the Z-directed groove may not be directly visible.
  • the Z-direction transmission line may be the first Z-direction transmission line, or Is the second Z-direction transmission line. Since in the present application, each Z-direction transmission line is isolated from the other Z-direction transmission lines, the area other than the area in which the Z-direction transmission line is disposed is insulated in the inner wall defining the Z-direction groove. It is beneficial to ensure that any two Z-direction transmission lines are insulated from each other, thereby ensuring that signals transmitted on the two Z-direction transmission lines do not affect signal quality due to mutual crosstalk.
  • the signal line located at the signal layer may pass through the area between two adjacent Z-direction slots, or may be from the adjacent Z-direction slot and the hole. The area between them passes through.
  • the pad array can include a plurality of pad cells, and each of the pad arrays is located within one pad cell.
  • the pad array may also include more than one pad unit, but in addition to the pads included in the one or more pad units, the pad array includes other pads, and the other pads are still like the prior art The same, it is connected to the hole.
  • the pad array includes not only the pad unit but also other pads connected to the holes, there is a case where the Z-direction groove is adjacent to the hole, and accordingly, the signal line can be laid in the adjacent Z-direction. The area between the slot and the hole.

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Abstract

本申请提供了一种多层印刷电路板(PCB)，该多层PCB的表面具有一焊盘阵列，该焊盘阵列包括至少一个焊盘单元，每一焊盘单元包括相邻的第一焊盘和第二焊盘，其中，该第一焊盘和该第二焊盘均与位于一个Z向槽的一条第一Z向传输线连接。因此，位于该该多层PCB信号层的信号线在布线的时候，需要避让的Z向槽的数量小于现有技术中需要避让的孔的数量，也即该信号线的布线在一定程度上难度降低了。另外，本申请还提供了相应的通信设备。

Description

一种印刷电路板和通信设备
本申请要求于2017年6月27日提交中国专利局、申请号为201710502428.X、发明名称为“一种印刷电路板和通信设备”的中国专利申请的优先权，其全部内容通过引用结合在本申请中。
技术领域
本申请涉及通信领域，尤其涉及一种印刷电路板和通信设备。
背景技术
随着网络设备信号传输速率的提升，多层印刷电路板(printed circuit board，PCB)表面布局的焊盘密度越来越大。通常来说，对应于该多层PCB表面的每一个焊盘，该多层PCB内具有一个对应的通孔或盲孔(以下简称“孔”)。常见地，焊盘和孔是一对一的。所以在焊盘密度越来越大的情况下，孔密度也越来越大。应当知道的是，在该多层PCB的信号层，信号线需要布局在相邻两个孔之间的区域。随着孔的密度越来越大，布局该信号线时需要避让的孔越来越多，导致在信号层，该信号线的布局难度较大。
发明内容
本申请提供一种多层印刷电路板(PCB)，用于在一定程度上降低信号线的布局难度。另外，本申请还提供了相应的通信设备。
第一方面，本申请提供一种多层PCB，该多层PCB包括多层子板，且该多层PCB的表面具有一焊盘阵列。该焊盘阵列具有X行和Y列，其中，X和Y均为大于或等于2的整数。
该焊盘阵列包括至少一个焊盘单元，该焊盘单元包括第一焊盘和第二焊盘，该第一焊盘和该第二焊盘是相邻的。
相应的，该多层PCB还具有一个Z向槽，该Z向槽沿该多层PCB的厚度方向从该多层PCB的表面穿透该多层PCB的部分或全部子板。
进一步的，该第一焊盘和该第二焊盘均位于该Z向槽的同一侧。
需要注意的是，为了表述方便，在本申请中，将该第一焊盘和该第二焊盘所位于的该Z向槽的一侧定义为该Z向槽的第一侧。另外，还将该Z向槽的内壁中靠近所述第一焊盘和所述第二焊盘的内壁定义为第一内壁(以下直接使用“第一内壁”，不再重复做解释)。
该第一内壁上具有一条第一Z向传输线，该第一Z向传输线沿该多层PCB的厚度方向延伸。也即，该第一Z向传输线的延伸方向为直线方向，且该第一Z向传输线的延伸方向与该多层PCB的厚度方向相同。
值得关注的是，该第一焊盘和该第二焊盘均与该第一Z向传输线连接。
可知，在本实施例中，Z向槽取代了现有技术中的孔，且位于该Z向槽同一侧的两个焊盘均与该Z向槽的一条第一Z向传输线连接。也即，在本实施例中，一个Z向槽可以对应两个焊盘，所以，Z向槽在PCB中的分布密度要小于现有技术中的孔在PCB中的分布密度。相应的，在焊盘数量确定的情况下，本实施例中布局信号线需要避让的Z向槽的数量要小于现有技术中布局信号线需要避让的孔的数量。因此，本实施例提供的技术方案至少在一定程度上降低信号线的布局难度。
还容易看出的是，位于该Z向槽内的该第一Z向传输线并非铺满该Z向槽的内壁， 而是仅占据该Z向槽的部分内壁(即只占据其中一侧内壁，或者说是只占据第一内壁)。应当知道的是，该第一Z向传输线由于要传输信号，通常都会使用金属，例如，可以是一镀在该Z向槽的内壁的厚铜层，只不过将其形状设置成一条沿该多层PCB的厚度方向延伸的直线。相应的，由于本实施例中，该第一Z向传输线仅占据该Z向槽的部分内壁，所以相对于在Z向槽的内壁镀满厚铜层的技术方案来说，本实施例提供的技术方案节约了资源。
结合第一方面，在第一种可能的实施方式下，前述的第一焊盘和第二焊盘均为接地焊盘，或均为接同一电源的电源焊盘。如果两个焊盘是接收并传输不同信号的焊盘，则将这两个焊盘连接到同一条信号传输线上，会造成两个不同的信号在同一条信号传输线上相互串扰，进而导致这两个不同的信号均传输失败。
可选的，所述多层PCB包括地线层，则在所述第一焊盘和所述第二焊盘均为接地焊盘的情况下，所述第一Z向传输线的远离所述多层PCB的表面的一端与所述地线层连接。应当知道的是，在本申请中，所述多层PCB的表面是指所述多层PCB的设有所述焊盘阵列的表面。本申请中所有出现的“所述多层PCB的表面”均可参见此处的解释，其他地方将不再重复解释。
可选的，所述多层PCB包括电源层，则在所述第一焊盘和所述第二焊盘均为电源焊盘的情况下，所述第一Z向传输线的远离所述多层PCB的表面的一端与所述电源层连接。
结合第一方面或第一方面的第一种可能的实施方式，在第二种可能的实施方式下，所述焊盘单元还包括第三焊盘和第四焊盘，则所述第一焊盘除了与所述第二焊盘相邻外，还与所述第四焊盘相邻，所述第三焊盘也分别与所述第二焊盘和所述第四焊盘相邻，且所述第一焊盘和所述第三焊盘不相邻。
其中，该第三焊盘和该第四焊盘也位于所述Z向槽的同一侧。当然，所述第一焊盘和所述第二焊盘，与所述第三焊盘和所述第四焊盘分别位于所述Z向槽相对的两侧。
前面定义了第一侧，此处可以将该Z向槽的另一侧定义为该Z向槽的第二侧，其中，该Z向槽的另一侧与该Z向槽的第一侧相对。则相应的，所述第三焊盘和该第四焊盘均位于该Z向槽的第二侧。
进一步的，本申请中还将所述Z向槽内靠近所述第三焊盘和所述第四焊盘的内壁定义为第二内壁(以下直接使用“第二内壁”，不再重复做解释)。则该第二内壁上具有一条第二Z向传输线。与前述的第一Z向传输线类似，该第二Z向传输线也是沿该多层PCB的厚度方向延伸的，且该第二Z向传输线与该第一Z向传输线是相隔离的。
可知，在本实施例中，一个该Z向槽对应四个焊盘(也即前述的第一焊盘、第二焊盘、第三焊盘和第四焊盘)。具体的，该Z向槽内具有两条互不干扰的Z向传输线，分别是第一Z向传输线和第二Z向传输线，这两条Z向传输线可分别用于传输不同的信号。该第一焊盘和该第二焊盘均与该第一Z向传输线连接，该第三焊盘和该第四焊盘均与该第二Z向传输线连接。因此，在焊盘数量确定的情况下，本实施例中的Z向槽的密度要小于现有技术中的孔的密度，相应的，本实施例中布局信号线时需要避让的Z向槽的数量要小于现有技术中需要避让的孔的数量。所以，本实施例提供的技术方案能够在一定程度上降低信号线的布局难度。
结合第一方面的第二种可能的实施方式，在第三种可能的实施方式下，所述第三焊 盘和所述第四焊盘均为接地焊盘，或均为接同一电源的电源焊盘。之所以需要对该第三焊盘和该第四焊盘的类型做这样的限定，可以参见前述在限定所述第一焊盘和所述第二焊盘的类型时所做的解释，此处不再赘述。
可选的，所述多层PCB包括地线层，则在所述第三焊盘和所述第四焊盘均为接地焊盘的情况下，所述第二Z向传输线的远离所述多层PCB的表面的一端与所述地线层连接。
可选的，所述多层PCB包括电源层，则在所述第三焊盘和所述第四焊盘均为电源焊盘的情况下，所述第二Z向传输线的远离所述多层PCB的表面的一端与所述电源层连接。
结合第一方面或第一方面的第一种可能的实施方式，本申请还包括第四种可能的实施方式。需要说明的是，该第一方面的第四种可能的实施方式与前述第一方面的第二种可能的实施方式是两种并列的实施方式，二者之间存在很多相同的地方。下面重点描述二者之间的不同之处，其他部分参见该第二种可能的实施方式中的描述即可，此处不再赘述。
具体的，在该第四种可能的实施方式下，所述第二内壁上具有两条第二Z向传输线，两条该第二Z向传输线之间相互隔离，且每一条该第二Z向传输线与所述第一Z向传输线之间也是相互隔离的。
所述第三焊盘和所述第四焊盘分别与一条所述第二Z向传输线连接。
可知，与前述第二种可能的实施方式不同，在该第四种可能的实施方式中(或者在本实施例中)，所述第二内壁上具有两条第二Z向传输线，所述第三焊盘和所述第四焊盘分别与一条该第二Z向传输线连接。应当知道的是，在本实施例中，一个所述Z向槽也是对应四个焊盘的。由于在焊盘数量确定的情况下，本实施例中的Z向槽的密度要小于现有技术中的孔的密度，相应的，本实施例中布局信号线时需要避让的Z向槽的数量要小于现有技术中需要避让的孔的数量。所以本实施例提供的技术方案能够在一定程度上降低信号线的布局难度。
结合第一方面的第四种可能的实施方式，在第五种可能的实施方式下，
所述第三焊盘和所述第四焊盘可以为不同类型的焊盘，或者为用于接收一对差分信号的信号焊盘，或者为用于接收不同单端信号的信号焊盘，或者为用于接收不同电源的电源焊盘。在前述列举的四种情况中的任一种情况下，由于该第三焊盘和该第四焊盘分别用于传输不同的信号，所以它们应当分别与一条第二Z向传输线连接。因为如果它们与同一条第二Z向传输线连接，则两个不同的信号将同一条第二Z向传输线上传输，这会导致该两个不同的信号之间出现严重的串扰，进而导致该两个不同的信号均传输失败。
可选的，所谓“所述第三焊盘和所述第四焊盘可以为不同类型的焊盘”，具体的，可以是所述第三焊盘和所述第四焊盘中其中一个为接地焊盘，另一个为电源焊盘；也可以是其中一个为接地焊盘，另一个为接单端信号的信号焊盘；还可以是其中一个为电源焊盘，另一个为接单端信号的信号焊盘。
可选的，在所述第三焊盘和所述第四焊盘分别与一条所述第二Z向传输线连接的情况下，所述第三焊盘和所述第四焊盘也可以均是接地焊盘，或均是接同一电源的电源信号。
结合第一方面的第四种可能的实施方式或第一方面的第五种可能的实施方式，在第 六种可能的实施方式下，所述第三焊盘和对应的所述第二Z向传输线之间可以通过一条第一金属线连接，其中，所述第一金属线的延伸方向垂直于对应的所述第二Z向传输线。因为这种情况下，该第一金属线的长度是最短的，有利于节约资源。
可选的，所述第三焊盘和所述第二Z向传输线直接接触。
结合第一方面的第四种可能的实施方式至第一方面的第六种可能的实施方式中任一种实施方式，在第七种可能的实施方式下，所述第四焊盘和对应的所述第二Z向传输线之间可以通过一条第二金属线连接，其中，所述第二金属线的延伸方向垂直于对应的所述第二Z向传输线。类似的，这样限定的目的是为了保证该第二金属线的长度是最短的，有利于节约资源。
可选的，所述第三焊盘和所述第二Z向传输线直接接触。
结合第一方面的第四种可能的实施方式至第一方面的第七种可能的实施方式中任一种实施方式，在第八种可能的实施方式下，所述第一Z向传输线的宽度大于所述第二Z向传输线的宽度。
可选的，沿所述多层PCB的厚度方向，所述第一Z向传输线的宽度是固定的，其中，所述第一Z向传输线的宽度是指所述第一Z向传输线沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。类似的，沿所述多层PCB的厚度方向，所述第二Z向传输线的宽度是固定的，其中，所述第二Z向传输线的宽度是指所述第二Z向传输线沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。
由于所述第一Z向传输线与两个焊盘连接(也即传输两路信号)，而所述第二Z向传输线与一个焊盘连接(也即只需要传输一路信号)，所以限定所述第一Z向传输线的宽度大于所述第二Z向传输线的宽度，能够保证该第一Z向传输线上传输的两路信号均能够比较快速的传输。从而避免了在该第一Z向传输线的宽度与该第二Z向传输线的宽度相同时，该第一Z向传输线上传输的两路信号的传输速率较低的问题。
可选的，所述第一Z向传输线的宽度是指所述第一Z向传输线的与所述第一焊盘和所述第二焊盘相接触的端面沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。类似的，所述第二Z向传输线的宽度是指所述第二Z向传输线的与所述第三焊盘或所述第四焊盘相接触的端面沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。
由于所述第一Z向传输线与两个焊盘连接，而所述第二Z向传输线与一个焊盘连接，所以限定所述第一Z向传输线的宽度大于所述第二Z向传输线的宽度，能够保证与该第一Z向传输线连接的两个焊盘均能与该第一Z向传输线之间实现良好的接触。
结合第一方面的第五种可能的实施方式，在第九种可能的实施方式下，所述多层PCB包括信号层、电源层和地线层。
在所述第三焊盘和所述第四焊盘中其中一个焊盘为接地焊盘，另一个焊盘为电源焊盘的情况下，与该接地焊盘连接的所述第二Z向传输线的远离所述多层PCB表面的一端与该地线层连接，与该电源焊盘连接的所述第二Z向传输线的远离所述多层PCB的表面的一端与该电源层连接。
在所述第三焊盘和所述第四焊盘中其中一个焊盘为接地焊盘，另一个焊盘为接单端信号的信号焊盘的情况下，与该接地焊盘连接的所述第二Z向传输线的远离所述多层 PCB表面的一端与该地线层连接，与该接单端信号的信号焊盘连接的所述第二Z向传输线的远离所述多层PCB的表面的一端与该信号层连接。
在所述第三焊盘和所述第四焊盘中其中一个焊盘为电源焊盘，另一个焊盘为接单端信号的信号焊盘的情况下，与该电源焊盘连接的所述第二Z向传输线的远离所述多层PCB表面的一端与该电源层连接，与该接单端信号的信号焊盘连接的所述第二Z向传输线的远离所述多层PCB的表面的一端与该信号层连接。
可选的，所述多层PCB包括两层以上信号层，且该两层以上信号层中每两层信号层传输的信号是不同的。
则相应的，在所述第三焊盘和所述第四焊盘为用于接收一对差分信号的信号焊盘，或，为用于接收不同单端信号的信号焊盘的情况下，与所述第三焊盘连接的所述第二Z向传输线的远离所述多层PCB表面的一端和与所述第四焊盘连接的所述第二Z向传输线的远离所述多层PCB表面的一端分别连接不同的信号层。
可选的，所述多层PCB包括两层以上电源层，且该两层以上电源层中每两层电源层提供的电源是不同的。
则相应的，在所述第三焊盘和所述第四焊盘为用于接收不同电源的电源焊盘的情况下，与所述第三焊盘连接的所述第二Z向传输线的远离所述多层PCB表面的一端和与所述第四焊盘连接的所述第二Z向传输线的远离所述多层PCB表面的一端分别连接不同的电源层。
结合第一方面或第一方面的第一种可能的实施方式至第一方面的第九种可能的实施方式中任一种实施方式，在第十种可能的实施方式下，所述第一焊盘和所述第二焊盘位于同一行，所述Z向槽的长度方向为所述焊盘阵列中的行所在的方向。
在本申请中，所述Z向槽的长度方向是指位于所述多层PCB的表面且对应于所述Z向槽的开窗中距离最长的两点之间的连线所在的方向。
需要说明的是，本申请中后续任何地方提及的“所述Z向槽的长度方向”均可以参见此处的解释，后续将不再重复描述。
可选的，所述Z向槽的长度大于或等于所述第一焊盘与所述第二焊盘之间的最小距离。
结合第一方面或第一方面的第一种可能的实施方式至第一方面的第九种可能的实施方式中任一种实施方式，在第十一种可能的实施方式下，所述第一焊盘和所述第二焊盘位于同一列，所述Z向槽的长度方向为所述焊盘阵列中的列所在的方向。
结合第一方面的第十种可能的实施方式或第一方面的第十一种可能的实施方式，在第十二种可能的实施方式下，在相邻两个Z向槽的长度方向相同的情况下，相邻两个所述Z向槽之间是连通的。这种设计更加简单，能够提高制作效率。
可选的，所述第一焊盘和所述第二焊盘均位于第N行，所述第三焊盘和所述第四焊盘均位于第N+1行，位于所述第N行和所述第N+1行之间的多个该Z向槽中每相邻两个该Z向槽之间均是连通的。其中，N是大于或等于1且小于或等于X-1的整数。
可选的，所述第一焊盘和所述第二焊盘均位于第M列，所述第三焊盘和所述第四焊盘均位于第M+1列，位于所述第M列和所述第M+1列之间的多个该Z向槽中每相邻两个该Z向槽之间均是连通的。其中，M是大于或等于1且小于或等于Y-1的整数。
结合第一方面的第九种可能的实施方式至第一方面的第十二种可能的实施方式中任一种实施方式，在第十三种可能的实施方式下，在所述信号层，信号线穿越相邻两个所述Z向槽之间的区域。
可选的，所述多层PCB包括至少一个所述Z向槽和至少一个孔，且至少一个所述Z向槽中存在和所述孔相邻的所述Z向槽，则在所述信号层，信号线穿越相邻的所述Z向槽和所述孔之间的区域。需要说明的是，所述孔可以为通孔，也可以为盲孔。所谓的通孔是指贯穿该多层PCB的孔。所谓的盲孔是自该多层PCB的一表面贯穿该多层PCB中部分子板的孔。
结合第一方面或第一方面的第一种可能的实施方式至第一方面的第十三种可能的实施方式中任一种实施方式，在第十四种可能的实施方式下，所述Z向槽内填充有非导电介质。
可选的，所述非导电介质为非导电树脂。
在本实施例中，该非导电介质用于使该第一Z向传输线与该第二Z向传输线相隔离。在前述第一方面的第四种可能的实施方式下，该第二内壁上具有两条该第二Z向传输线，则在这种情况下，该非导电介质还用于使这两条所述第二Z向传输线之间相隔离，以及每一条所述第二Z向传输线均与所述第一Z向传输线相隔离。
可选的，所述多层PCB的表面中对应于所述Z向槽的开窗的形状是一细长的狭缝。其中，该狭缝的长度即为该Z向槽的长度。
可选的，所述多层PCB的表面中对应于所述Z向槽的开窗的形状为长方形、椭圆形或花生形状。
可选的，所述第一焊盘和所述第二焊盘均位于第N行，所述第三焊盘和所述第四焊盘均位于第N+1行，则该Z向槽的宽度小于或等于所述第N行和所述第N+1行之间的间距。需要说明的是，该Z向槽的宽度方向垂直于该Z向槽的长度方向。该解释也适用于本申请的其他实施例，因此在其他实施例中将不再赘述。N的取值请参考前述规定，此处不再赘述。
可选的，所述第一焊盘和所述第二焊盘均位于第M列，所述第三焊盘和所述第四焊盘均位于第M+1列，则该Z向槽的宽度小于或等于所述第M列和所述第M+1列之间的间距。M的取值请参考前述规定，此处不再赘述。
可选的，两条所述第二Z向传输线之间的间距大于或等于4密耳(mil)且小于或等于所述Z向槽的长度。
可选的，所述第二Z向传输线与所述第一Z向传输线之间的间距大于或等于4mil且小于或小于所述Z向槽的宽度。
可选的，Z向传输线的厚度大于零且小于所述Z向槽的宽度的一半。可选的，Z向传输线的厚度大于或等于15微米且小于或等于50微米。应当知道的是，该Z向传输线可以为前述的第一Z向传输线，也可以是前述的第二Z向传输线。本申请后续出现的“Z向传输线”均可以参见此处的解释，后续将不再重复描述。
可选的，沿所述多层PCB的厚度方向，Z向传输线的宽度是固定的，且该Z向传输线的宽度大于或等于4mil且小于或等于20mil。
第二方面，本申请还提供一种通信设备，该通信设备包括前述任一实施例所述的多 层PCB和输入/输出(I/O)芯片。
该I/O芯片具有X行*Y列的阵列引脚。其中，所述I/O芯片的引脚和所述多层PCB表面的焊盘是一对一接触的。需要说明的是，X和Y的取值请参考前述规定，此处不再赘述。
如前所述，在该多层PCB的信号层，信号线的布线难度在一定程度上降低了。由于该多层PCB的工艺难度降低，则相应的，包含该多层PCB的通信设备的工艺难度也在降低了。
附图说明
图1是现有技术中多层PCB的表面的俯视图。
图2是本申请提供的一种通信设备的结构图。
图3是现有技术中一种输入/输出(I/O)芯片的结构图。
图4A是本申请提供的一种多层PCB的结构图。
图4B是本申请提供的一种多层PCB的立体图。
图5A是本申请提供的一种焊盘单元的结构图。
图5B是本申请提供的另一种焊盘单元的结构图。
图6是图5B所示焊盘单元的立体图。
具体实施方式
下面将结合本申请中的附图，对本申请中的技术方案进行清楚且完整地描述。
本申请涉及的多层PCB是指包括多层子板的PCB，该多层子板包括信号层子板(以下简称“信号层”)、电源层子板(以下简称“电源层”)和地线层子板(以下简称“地线层”)。应当知道，此处所说的信号层是指传输信号的子板，电源层是提供电源的子板，地线层是接地的子板。
本申请涉及的多层PCB的表面具有X行*Y列的焊盘阵列，其中，X和Y均为大于或等于2的整数。需要说明的是，后续任一实施例中出现的X和Y，均可以参见此处对它们的限定，后续将不再赘述。作为本领域技术人员，应当知道的是，该焊盘阵列中包括的多个焊盘按照用途的不同，可以划分为以下类型：信号焊盘、电源焊盘和接地焊盘。应当知道的是，所谓的信号焊盘是用于接收并传输信号的。所谓的电源焊盘是用于接收并传输电源的。所谓的接地焊盘是用于接地的。
由于信号又分为差分信号和单端信号，因此信号焊盘还可以被划分为接收差分信号的信号焊盘和接收单端信号的信号焊盘。应当知道的是，差分信号是成对出现的，在本申请中成对出现的差分信号被表述为“一对差分信号”。
在现有技术中，常见的，对应于位于该多层PCB表面的X行*Y列焊盘阵列中的每一焊盘，该多层PCB还具有一个对应的孔。值得注意的是，本申请中所说的孔可以为通孔，也可以为盲孔，一个孔具体是通孔还是盲孔，需要结合实际情况确定。还值得注意的是，对应于不同类型的焊盘，孔的类型也是不同的。在本申请中，将现有技术中与信号焊盘连接的孔称为信号孔，将与电源焊盘连接的孔称为电源孔，将与接地焊盘连接的孔称为接地孔。
通常，每一焊盘和对应的孔之间的距离是相同的，每一焊盘和对应的孔之间的连线相互平行，并且每一焊盘和对应的孔之间的连线和该焊盘阵列的行所在的直线之间的最 小夹角是相同(比如该最小夹角为45度)的。因此，对应于该X行*Y列的焊盘阵列，该多层PCB内还X行*Y列的孔阵列。
应当知道的是，对于该焊盘阵列中的第K行焊盘(K为大于或等于1且小于或等于X-1的整数)，该孔阵列中具有对应的第K行孔，其中，该第K行孔可以位于该第K行焊盘和第K+1行焊盘之间。进一步的，在K等于X时，与该第K行焊盘对应的该第K行孔可以位于该第K行焊盘的外侧。类似的，对于该焊盘阵列中的第J列焊盘(J为大于或等于1且小于或等于Y-1的整数)，该孔阵列中具有对应的第J列孔，其中，该第J列孔可以位于该第J列焊盘和第J+1列焊盘之间。进一步的，在J等于Y时，与该第J列焊盘对应的该第J列孔可以位于该第J列焊盘的外侧。
具体请参见附图1，它示出了现有技术中一种多层PCB的表面的俯视图。如图1所示，位于该多层PCB表面的是一5行*4列的焊盘阵列，也即X等于5，Y等于4。同时，该多层PCB表面还具有一5行*4列的孔阵列(严格地说，在图1中看到的应该是一5行*4列的开口阵列，每一开口为一个贯穿该多层PCB的部分或全部子板的孔在该多层PCB表面的开口，此处直接表述为5行*4列的孔阵列，不过是为了让表述更加简单，但是本领域技术人员应当知道，实际上，在多层PCB的表面是不能直接看到一孔阵列的)。在图1所示的多层PCB中，每一焊盘和对应的孔之间的关系，每一行焊盘和对应的一行孔之间的关系，以及每一列焊盘和对应的一列孔之间的关系，均满足前述规定，此处不再赘述。
需要说明的是，图1中标记有GND/PWR字样的圆圈代表接地焊盘或电源焊盘，标记有SIG字样的圆圈代表信号焊盘，空白的圆圈代表的是孔。结合前述说明，容易看出，在现在技术中，在多层PCB的信号层，信号线是从相邻两个通孔之间的区域穿过的。在该多层PCB的表面用于设置孔的区域面积确定的情况下，孔的密度越大，意味着孔的数量越多，则相应的，在布局该信号线时需要避让的孔的数量就越多。因此在不增加用于设置孔的区域的面积的情况下，孔的密度越大，信号线的布局难度就越大。
本申请提供的多层PCB，用于在一定程度上降低在该多层PCB的信号层，信号线的布局难度。
在对本申请提供的多层PCB进行介绍之前，先结合图2对该多层PCB的应用场景进行介绍。图2示出了一种通信设备的结构示意图，该通信设备包括本申请提供的该多层PCB和输入/输出(I/O)芯片。该I/O芯片具有一X行*Y列的引脚阵列，该多层PCB的表面具有一X行*Y列的焊盘阵列，其中，引脚和焊盘是一对一的，且每一引脚和对应的焊盘相接触。
需要说明的是，该I/O芯片可以为高速串行(SERDES)接口芯片、存储芯片或处理器芯片等。
具体的，目前，主流I/O芯片的引脚间距为1.0mm、0.8mm、0.65mm、0.5mm或0.4mm等。所谓的引脚间距是指相邻两个引脚之间的距离。由于相邻两个引脚可以位于同一行，也可以位于同一列。通常，位于同一行的每相邻两个引脚之间的距离是相同的，且位于同一列的每相邻两个引脚之间的距离也是相同的。本申请中为了表述简介，将位于同一行的相邻两个引脚之间的距离称为行上的引脚间距，将位于同一列的相邻两个引脚之间的距离称为列上的引脚间距。应当知道的是，同一焊盘阵列的行上的引脚间距和列上的 引脚间距可以相同，也可以不同。
根据前述描述，容易知道，焊盘阵列中的每一焊盘和对应的引脚是相接触的。因此，该焊盘阵列中相邻两个焊盘之间的距离(以下称为“焊盘间距”)和前述的引脚间距是相对应的。也即，行上的焊盘间距和行上的引脚间距相同，且列上的焊盘间距和列上的引脚间距的引脚间距相同的。其中，行上的焊盘间距是指位于同一行的相邻两个焊盘之间的距离。列上的焊盘间距是指位于同一列的相邻两个焊盘之间的距离。类似的，该焊盘阵列中，位于同一行的每相邻两个焊盘之间的距离是相同的，位于同一列的每相邻两个焊盘之间的距离也是相同的。
请参阅附图3，它示出了一I/O芯片的结构图。具体的，图3示出了该I/O芯片的引脚阵列的结构图，容易看出，该I/O芯片具有一10行*10列的引脚阵列。请参阅附图4A，它示出了本申请提供的一种多层PCB的结构图。具体的，图4A是该多层PCB的表面的俯视图。如图4A所示，容易看出，该多层PCB的表面具有一焊盘阵列，该焊盘阵列具有10行和10列。应当知道的是，图3中的引脚阵列和图4A中的焊盘阵列是相对应的。则在包含图3所示的I/O芯片和图4A所示的多层PCB的通信设备中，引脚和焊盘之间一一对应，且每一引脚和对应的焊盘相接触。
接下来将对本申请提供的该多层PCB进行介绍。具体的，该多层PCB的表面具有X行*Y列的焊盘阵列，该焊盘阵列包括至少一个焊盘单元，该焊盘单元包括第一焊盘和第二焊盘，其中该第一焊盘和该第二焊盘是相邻的。请参见图4B，它示出了本申请提供的多层PCB的立体图。请关注图4B中虚线线圈框起来的部分，即为一个焊盘单元。
需要说明的是，前述的第一焊盘和第二焊盘仅用于说明它们是两个不同的焊盘，第一和第二本身不构成对焊盘的限定。也即在本申请中，使用第一、第二、第三或第四的目的是为了在它们修饰同类部件(比如焊盘)时，便于将多个部件彼此区分开来，它们本身不构成对部件特性的限定。
该多层PCB还具有一个Z向槽。所谓的Z向槽是指位于所述多层PCB内的，沿所述多层PCB的厚度方向贯穿所述多层PCB的槽，或，沿所述多层PCB的厚度方向从所述多层PCB的表面贯穿所述多层PCB内部分子板的槽。也即，该Z向槽可以像通孔一样，沿该多层PCB的厚度方向贯穿该多层PCB，也可以像盲孔一样，沿该多层PCB的厚度方向仅穿透该多层PCB的部分子板。需要说明的是，在该Z向槽仅穿透该多层PCB的部分子板的情况下，该Z向槽的开口方向朝向该多层PCB设有该焊盘阵列的表面。其中，该Z向槽的开口的形状为一细长的狭缝。该细长的狭缝可以呈长方形、椭圆形或花生形状等。进一步地，该Z向槽的内壁中除了镀有Z向传输线的区域之外的区域均是绝缘的，该Z向传输线可以为下述的第一Z向传输线和第二Z向传输线。另外，前述的部分子板是指至少一层子板。可选的，该部分子板是指两层以上的子板。其中，该第一焊盘和该第二焊盘位于该Z向槽的同一侧。需要注意的是，为了表述方便，在本申请中，将该第一焊盘和该第二焊盘所位于的该Z向槽的一侧定义为该Z向槽的第一侧。另外，还将该Z向槽的内壁中靠近所述第一焊盘和所述第二焊盘的内壁定义为第一内壁(以下直接使用“第一内壁”，不再重复做解释)。
则该第一内壁上具有一条第一Z向传输线，该第一焊盘和该第二焊盘均与该第一Z向传输线连接。需要说明的是，本申请中，将该多层PCB的厚度方向定义为Z向，则所 谓的第一Z向传输线是指沿所述Z向延伸的传输线。
可选的，所述第一Z向传输线为一直线，且所述第一Z向传输线垂直于所述多层PCB的表面所在的平面。
可选的，该Z向槽的长度大于或等于所述第一焊盘和所述第二焊盘之间的最小距离。其中，所述Z向槽的长度是指位于所述多层PCB的表面且对应于所述Z向槽的开窗中距离最长的两点之间的距离。
需要说明的是，在本申请中，所述Z向槽的长度所在的方向(以下简称“所述Z向槽的长度方向”)与所述焊盘阵列的行所在的方向相同，或，与所述焊盘阵列的列所在的方向相同。进一步的，所述Z向槽的长度方向垂直于所述Z向槽的宽度方向(或所述Z向槽的宽度所在的方向)。应当知道的是，在所述焊盘阵列中，所述焊盘阵列的行所在的方向垂直于所述焊盘阵列的列所在的方向。因此，在所述Z向槽的长度方向与所述焊盘阵列的行所在的方向相同的情况下，所述Z向槽的宽度方向与所述焊盘阵列的列所在的方向相同。在所述Z向槽的长度方向与所述焊盘阵列的列所在的方向相同的情况下，所述Z向槽的宽度方向与所述焊盘阵行的行所在的方向相同。
可选的，位于所述多层PCB的表面且对应于所述Z向槽的开窗的形状是一细长的狭缝。应当知道的是，该狭缝的长度就是该Z向槽的长度。值得注意的是，所述第一焊盘和所述第二焊盘可以位于同一行，也可以位于同一列。
可选的，所述第一焊盘和所述第二焊盘位于同一行，则所述Z向槽的长度方向与所述焊盘阵列的行所在的方向相同，或者说，所述Z向槽的长度方向为所述焊盘阵列的行所在的方向。具体可以参见图4A中的焊盘单元21，位于该焊盘单元21内的其中两个焊盘单元位于同一行，另外两个焊盘单元也位于同一行，则该其中两个焊盘单元和该另外两个焊盘单元之间的Z向槽的长度方向与该焊盘阵列的行所在的方向相同。
可选的，所述第一焊盘和所述第二焊盘位于同一列，则所述Z向槽的长度方向与所述焊盘阵列的列所在的方向相同，或者说，所述Z向槽的长度方向为所述焊盘阵列的列所在的方向。具体可以参见图4A中的焊盘单元11和焊盘单元22，下面以焊盘单元11为例进行说明。容易看出，位于焊盘单元11内的其中两个焊盘单元位于同一列，另外两个焊盘单元也位于同一列，则该其中两个焊盘单元和该另外两个焊盘单元之间的Z向槽的长度方向与该焊盘阵列的列所在的方向相同。
可选的，所述第一Z向传输线的厚度大于零且小于所述Z向槽的宽度的一半。具体的，所述第一Z向传输线的厚度可以大于或等于15微米且小于或等于50微米。
应当知道的是，与现有技术中镀在孔内壁的厚铜层类似，该第一Z向传输线是被镀在该Z向槽的内壁上的，且该第一Z向传输线实质上也是一厚铜层。所以该第一Z向传输线的厚度也和该厚铜层的厚度类似，是指该第一Z向传输线中贴合在该Z向槽内壁上的面和该Z向传输线中与该贴合在该Z向槽内壁上的面相对的面之间的距离。
可选的，沿所述多层PCB的厚度方向，所述第一Z向传输线的宽度是固定的，且该第一Z向传输线的宽度大于或等于4mil且小于或等于50微米。其中，所述第一Z向传输线的宽度是指所述第一Z向传输线沿所述Z向在所述多层PCB的表面所在的平面的投影的宽度。
需要说明的是，由于所述第一焊盘和所述第二焊盘均与同一条所述第一Z向传输线 连接，所以所述第一焊盘和所述第二焊盘可以均为接地焊盘，也可以均为接同一电源的电源焊盘。
值得注意的是，本申请所述的多层PCB包括信号层、电源层和地线层。则相应的，在所述第一焊盘和所述第二焊盘均为接地焊盘时，所述第一Z向传输线的远离所述多层PCB表面的一端与地线层连接。在所述第一焊盘和所述第二焊盘均为接同一电源的电源焊盘时，所述第一Z向传输线的远离所述多层PCB表面的一端与电源层连接。
还需要说明的是，所述第一焊盘和所述第二焊盘可以直接与所述第一Z向传输线接触，也可以分别通过一条金属线与所述第一Z向传输线连接。
结合前述任一实施例，容易知道，由于在本申请中一个Z向槽是对应两个焊盘的，所以Z向槽的布局密度要小于现有技术中的孔的布局密度。相应的，在焊盘数量确定的情况下，本申请中信号线在布线的时候需要避让的Z向槽的数量要小于现有技术中需要避让的孔的数量。因此，本实施例提供的技术方案至少在一定程度上降低信号线的布线难度。
进一步的，所述焊盘单元还包括第三焊盘和第四焊盘，其中，所述第一焊盘分别与所述第二焊盘和所述第四焊盘相邻，所述第三焊盘也分别与所述第二焊盘和所述第四焊盘相邻。需要说明的是，所述第一焊盘和所述第三焊盘是不相邻。应当理解的是，该第一焊盘至第四焊盘，分别位于矩形的四个角上。
其中，所述第三焊盘和所述第四焊盘也位于所述Z向槽的同一侧。前述定义了所述第一焊盘和所述第二焊盘位于所述Z向槽的第一侧，此处将所述第三焊盘和所述第四焊盘所位于的该Z向槽的一侧定义为该Z向槽的第二侧，则所述第二侧与所述第一侧是所述Z向槽相对的两侧(所谓的相对的两侧，参见图5A，焊盘1、焊盘2所在的为第一侧，焊盘3、焊盘4所在的为第二侧，该第一侧和该第二侧即为相对的两侧)。进一步的，本申请中还将所述Z向槽内靠近所述第三焊盘和所述第四焊盘的内壁定义为第二内壁。
则所述第二内壁上可以具有一条第二Z向传输线，也可以具有两条该第二Z向传输线。其中，该第二Z向传输线也是沿所述Z向延伸的。
可选的，所述第二Z向传输线为一直线，且所述第二Z向传输线垂直于所述多层PCB的表面所在的平面。
可选的，所述第二Z向传输线的厚度大于零且小于所述Z向槽的宽度的一半。具体的，所述第二Z向传输线的厚度可以大于或等于15微米且小于或等于50微米。需要说明的是，本申请中对所述第二Z向传输线的厚度的定义可以参见前述对所述第一Z向传输线的厚度的定义，此处不再赘述。
可选的，沿所述多层PCB的厚度方向，所述第二Z向传输线的宽度是固定的，所述第二Z向传输线的宽度大于或等于4mil且小于或等于50微米。其中，所述第二Z向传输线的宽度是指所述第二Z向传输线沿所述Z向在所述多层PCB的表面所在的平面的投影的宽度。
作为本申请的一个实施例，所述第二内壁上具有一条所述第二Z向传输线，所述第三焊盘和所述第四焊盘均与该第二Z向传输线连接。需要说明的是，该第二Z向传输线 与位于所述第一内壁上的所述第一Z向传输线是相隔离的。
值得注意的是，在所述第三焊盘和所述第四焊盘均与同一条所述第二Z向传输线连接的情况下，所述第三焊盘和所述第四焊盘可以均为接地焊盘，也可以均为接同一电源的电源焊盘。需要说明的是，在所述第三焊盘和所述第四焊盘均为接地焊盘时，所述第二Z向传输线的远离所述多层PCB表面的一端与地线层连接。在所述第三焊盘和所述第四焊盘均为接同一电源的电源焊盘时，所述第二Z向传输线的远离所述多层PCB表面的一端与该电源层连接。
参见附图5A，它示出了本申请提供的一种焊盘单元的结构图。如图5A所示，第一焊盘1分别与第二焊盘2和第四焊盘4相邻，第三焊盘3也分别与第二焊盘2和第四焊盘4相邻，但是第一焊盘1和第三焊盘3是不相邻的。其中，第一焊盘1和第二焊盘2位于Z向槽8的一侧，第三焊盘3和第四焊盘4位于Z向槽8的另一侧。Z向槽8靠近第一焊盘1和第二焊盘2的内壁上具有第一Z向传输线5，且第一焊盘1和第二焊盘2均与第一Z向传输线5连接。Z向槽8靠近第三焊盘3和第四焊盘4的内壁上具有第二Z向传输线7，且第三焊盘3和第四焊盘4均与第二Z向传输线7连接。进一步的，在图5A所示的焊盘单元中，第一焊盘1与第一Z向传输线5之间是通过一条金属线连接的，第二焊盘2与第一Z向传输线5之间也是通过一条金属线连接的，第三焊盘3与第二Z向传输线7之间也是通过一条金属线连接的，第四焊盘4与第二Z向传输线7之间也是通过一条金属线连接的。
作为本申请的另一个实施例，所述第二内壁上具有两条所述第二Z向传输线，所述第三焊盘与两条所述第二Z向传输线中的一条连接，所述第四焊盘与两条所述第二Z向传输线中的另一条连接。需要说明的是，两条所述第二Z向传输线中每一条所述第二Z向传输线与所述第一Z向传输线之间均是相隔离的。
可选的，每一所述第二Z向传输线与所述第一Z向传输线之间的间距可以大于或等于4mil且小于或等于所述Z向槽的宽度。
需要说明的是，两条所述第二Z向传输线之间可以相互隔离，也可以相互接触。
可选的，两条所述第二Z向传输线之间相互接触，则所述第三焊盘和所述第四焊盘可以均为接地焊盘，或均为接同一电源的电源焊盘。
可选的，两条所述第二Z向传输线之间相互隔离，则所述第三焊盘和所述第四焊盘可以为不同类型的焊盘，或者为用于接收一对差分信号的信号焊盘，或者为用于接收不同单端信号的信号焊盘，或者为用于接收不同电源的电源焊盘。自然，在两条所述第二Z向传输线之间相互隔离的情况下，所述第三焊盘和所述第四焊盘也可以均为接地焊盘，或均为接同一电源的电源焊盘。请参阅附图4B中虚线线圈标记的焊盘单元，容易看出，该焊盘单元的第二内壁上具有两条相互隔离的第二Z向传输线。其中，这两条第二Z向传输线连接的焊盘类型是不同的。
所谓的“所述第三焊盘和所述第四焊盘可以为不同类型的焊盘”，可选的，所述第三焊盘和所述第四焊盘中的其中一个焊盘为接地焊盘，另一个焊盘为电源焊盘；或者，其中一个焊盘为接地焊盘，另一个焊盘为接单端信号的信号焊盘；或者，其中一个焊盘为电源焊盘，另一个焊盘为接单端信号的信号焊盘。
正如前文所说的，本申请所述的多层PCB包括信号层、电源层和地线层。还需要说明的是，该多层PCB可以只包括一个信号层，也可以包括两个以上信号层。在该多层PCB包括两个以上信号层时，不同的信号层上传输的信号是不同的。进一步地，该多层PCB可以只包括一个电源层，也可以包括两个以上电源层。在该多层PCB包括两个以上电源层时，不同的电源层提供的电源是不同的。类似地，该多层PCB可以只包括一个地线层，也可以包括两个以上地线层。不管该多层PCB包括多少层地线层，每层地线层的作用都是一样的。
相应的，在所述第三焊盘和所述第四焊盘均为接地焊盘时，两条所述第二Z向传输线中每一条所述第二Z向传输线远离所述多层PCB表面的一端均与同一地线层连接，或者，分别与两个地线层连接。
在所述第三焊盘和所述第四焊盘均为接同一电源的电源焊盘时，两条所述第二Z向传输线中每一条所述第二Z向传输线的远离所述多层PCB表面的一端与均与同一电源层连接，或者，分别与不同的电源层连接。
进一步地，在所述第三焊盘和所述第四焊盘为用于接收一对差分信号的信号焊盘，或者为用于接收不同单端信号的信号焊盘时，则连接所述第三焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端和连接所述第四焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端分别与不同的信号层连接。
在所述第三焊盘和所述第四焊盘为用于接收不同电源的电源焊盘时，则连接所述第三焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端和连接所述第四焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端分别与不同的电源层连接。
在所述第三焊盘和所述第四焊盘中的其中一个焊盘为接地焊盘，另一个焊盘为电源焊盘时，则连接该接地焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端与地线层连接，连接该电源焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端与电源层连接。
在所述第三焊盘和所述第四焊盘中的其中一个焊盘为接地焊盘，另一个焊盘为接单端信号的信号焊盘时，则连接该接地焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端与地线层连接，连接该接单端信号的信号焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端与信号层连接。
在所述第三焊盘和所述第四焊盘中的其中一个焊盘为电源焊盘，另一个焊盘为接单端信号的信号焊盘时，则连接该电源焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端与电源层连接，连接该接单端信号的信号焊盘的所述第二Z向传输线中远离所述多层PCB表面的一端与信号层连接。
需要说明的是，在同一个焊盘单元中，只可能存在两个用于接收一对差分信号的焊盘，且这两个焊盘为所述第一焊盘和所述第二焊盘，或者为所述第三焊盘和所述第四焊盘。
值得关注的是，在同一个焊盘单元中出现两个以上用于接单端信号的信号焊盘时，对应的该两个以上单端信号中任意两个单端信号是不同的。其中，本申请中所提及的以上或以下，是包含本数的，比如两个以上就是包含两个的。
可选的，在两条所述第二Z向传输线之间相互隔离的情况下，两条所述第二Z向传 输线之间的间距可以大于或等于4mi l且小于或等于所述Z向槽的长度。
容易理解的是，所述第三焊盘和与所述第三焊盘对应的所述第二Z向传输线之间可以直接接触，也可以通过第一金属线连接。其中，该与所述第三焊盘对应的所述第二Z向传输线是指两条所述第二Z向传输线中与所述第三焊盘连接的那条所述第二Z向传输线。
可选的，在所述第三焊盘和该与所述第三焊盘对应的所述第二Z向传输线之间通过所述第一金属线连接的情况下，所述第一金属线的一端与所述第三焊盘接触，另一端和该与所述第三焊盘对应的所述第二Z向传输线接触，并且所述第一金属线是垂直于该与所述第三焊盘对应的所述第二Z向传输线的。
容易理解的是，所述第四焊盘和与所述第四焊盘对应的所述第二Z向传输线之间可以直接接触，也可以通过第二金属线连接。其中，该与所述第四焊盘对应的所述第二Z向传输线是指两条所述第二Z向传输线中与所述第四焊盘连接的那条所述第二Z向传输线。
可选的，在所述第四焊盘和该与所述第四焊盘对应的所述第二Z向传输线之间通过所述第二金属线连接的情况下，所述第二金属线的一端与所述第四焊盘接触，另一端和该与所述第四焊盘对应的所述第二Z向传输线接触，并且所述第二金属线是垂直于该与所述第四焊盘对应的所述第二Z向传输线的。
可选的，在所述第三焊盘与一条所述第二Z向传输线连接，所述第四焊盘与另一条所述第二Z向传输线连接的情况下，所述第一Z向传输线的宽度可以大于所述第二Z向传输线的宽度。沿所述多层PCB的厚度方向，所述第一Z向传输线的宽度可以是固定，也可以是不固定的(例如具有两个以上的宽度值)。类似的，沿所述多层PCB的厚度方向，所述第二Z向传输线的宽度可以是固定，也可以是不固定的(例如具有两个以上的宽度值)
可选的，沿所述多层PCB的厚度方向，所述第一Z向传输线的宽度和所述第二Z向传输线的宽度均是固定的，且所述第一Z向传输线的宽度是指所述第一Z向传输线沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度，所述第二Z向传输线的宽度是指所述第二Z向传输线沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。则在本实施例中，所述第一Z向传输线的宽度大于所述第二Z向传输线的宽度。相对于所述第一Z向传输线的宽度等于所述第二Z向传输线的宽度，本实施例提供的方案可以保证该第一Z向传输线上传输的两路信号也能以较宽的速率传输。
可选的，所述第一Z向传输线的宽度是指所述第一Z向传输线的与所述第一焊盘和所述第二焊盘相接触的端面沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。所述第二Z向传输线的宽度是指所述第二Z向传输线的与所述第三焊盘或所述第四焊盘相接触的端面沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。则在本实施例中，所述第一Z向传输线的宽度大于所述第二Z向传输线的宽度。相对于所述第一Z向传输线的宽度等于所述第二Z向传输线的宽度，本实施例提供的方案可以保证与该第一Z向传输线连接的两个焊盘均能与该第一Z向传输线之间实现良好的接触。
参见附图5B，它示出了本申请提供的另一种焊盘单元的结构图。下面仅就图5B所示的焊盘单元与图5A所示的焊盘单元不同之处进行描述，相同之处参见前述对图5A的描述即可，此处不再赘述。图5B所示的焊盘单元与图5A所示的焊盘单元不同之处在于：Z向槽8靠近第三焊盘3和第四焊盘4的内壁上具有第二Z向传输线6和第二Z向传输线7，其中，第三焊盘3与第二Z向传输线7连接，第四焊盘4与第二Z向传输线6连接。
进一步地，参见附图6，它是图5B所示焊盘单元的立体结构图。图6中的焊盘601对应于图5B中的第一焊盘1，图6中的焊盘602对应于图5B中的第二焊盘2，图6中的焊盘603对应于图5B中的第三焊盘3，图6中的焊盘604对应于图5B中的第四焊盘4。图6中的Z向传输线605对应于图5B中的Z向传输线5，图6中的Z向传输线606对应于图5B中的Z向传输线6，图6中的Z向传输线607对应于图5B中的Z向传输线7.如图6所示，焊盘601和602均与Z向传输线605连接，焊盘603与Z向传输线607连接，焊盘604与Z向传输线606连接。图6中还示出了两条信号线608和609，则说明了焊盘603和604连接一对差分信号，或分别与一个单端信号连接。
可选的，在相邻两个所述Z向槽的长度方向相同的情况下，相邻两个所述Z向槽之间可以是连通的。参见附图4A，焊盘单元13对应的Z向槽和焊盘单元23对应的Z向槽之间就是连通的。
进一步地，在所述第一焊盘和所述第二焊盘均位于第N行，所述第三焊盘和所述第四焊盘均位于第N+1行的情况下，则位于所述第N行和所述第N+1行之间的多个该Z向槽中每相邻两个该Z向槽之间均是连通的。应当知道的是，N是大于或等于1且小于或等于X-1的整数。
需要说明的是，在所述第一焊盘和所述第二焊盘均位于第N行，所述第三焊盘和所述第四焊盘均位于第N+1行的情况下，该Z向槽的宽度小于或等于所述第N行焊盘和所述第N+1行焊盘之间的最小间距。应当知道的是，在焊盘阵列中，相邻两行焊盘之间的最小间距是明确的。
类似地，所述第一焊盘和所述第二焊盘均位于第M列，所述第三焊盘和所述第四焊盘均位于第M+1列，位于所述第M列和所述第M+1列之间的多个该Z向槽中每相邻两个该Z向槽之间均是连通的。其中，M是大于或等于1且小于或等于Y-1的整数。
需要说明的是，在所述第一焊盘和所述第二焊盘均位于第M列，所述第三焊盘和所述第四焊盘均位于第M+1列的情况下，该Z向槽的宽度小于或等于所述第M列焊盘和所述第M+1列焊盘之间的最小间距。应当知道的是，在焊盘阵列中，相邻两列焊盘之间的最小间距是明确的。
可选的，本申请所述Z向槽内填充有非导电介质。其中，所述非导电介质为非导电树脂。需要说明的是，由于该Z向槽内填充有非导电介质，其中，该Z向槽内填充的物质和该多层PCB的成分是不同的，该Z向槽是形成在该多层PCB内的。因此，在该多层PCB的实际产品中，该Z向槽可能是不能直接看到的。
值得注意的是，前文限定了所述Z向槽的内壁中除了镀有Z向传输线的区域之外的区域均是绝缘的，且该Z向传输线可以为所述第一Z向传输线，也可以为所述第二Z向传输线。由于在本申请中，每一条Z向传输线与其他Z向传输线之间均是隔离的，因此 在限定该Z向槽的内壁中除了设置有Z向传输线的区域之外的其他区域均是绝缘的，有利于确保任意两条Z向传输线之间相互绝缘，进而确保该两条Z向传输线上传输的信号不会因为相互串扰而影响信号质量。
值得关注的是，在本申请中，位于信号层的信号线可以从相邻两个所述Z向槽之间的区域穿过，也可以从相邻的所述Z向槽和所述孔之间的区域穿过。
应当知道的是，所述焊盘阵列可以包括多个焊盘单元，且该焊盘阵列中的每一焊盘均位于一个焊盘单元内。所述焊盘阵列也可以包括一个以上的焊盘单元，但是除了该一个以上焊盘单元包括的焊盘之外，该焊盘阵列还包括其他焊盘，而该其他焊盘依然像现有技术一样，是和孔连接的。在该焊盘阵列不仅包括焊盘单元，还包括与孔连接的其他焊盘的情况下，就会存在Z向槽与孔相邻的情况，相应的，信号线就可以布局在相邻的该Z向槽与该孔之间的区域。
以上，仅为本发明的具体实施方式，但本申请的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本申请揭露的技术范围内，可轻易想到变化或替换，都应涵盖在本申请的保护范围之内。因此，本申请的保护范围应该以权利要求的保护范围为准。

Claims (14)

  1. 一种多层印刷电路板PCB，其特征在于，所述多层PCB包括多层子板，所述多层PCB的表面具有X行*Y列的焊盘阵列，其中，X和Y均为大于或等于2的整数，所述焊盘阵列包括至少一个焊盘单元，所述焊盘单元包括相邻的第一焊盘和第二焊盘，所述多层PCB还具有一Z向槽，所述第一焊盘和所述第二焊盘均位于所述Z向槽的第一侧，所述Z向槽沿所述多层PCB的厚度方向从所述多层PCB的表面穿透所述多层PCB的部分或全部子板；
    所述Z向槽内靠近所述第一焊盘和所述第二焊盘的内壁为第一内壁，所述第一内壁上具有一条第一Z向传输线，所述第一焊盘和所述第二焊盘均与所述第一Z向传输线连接，所述第一Z向传输线沿所述多层PCB的厚度方向延伸。
  2. 根据权利要求1所述的多层PCB，其特征在于，所述第一焊盘和第二焊盘均为接地焊盘，或均为接同一电源的电源焊盘。
  3. 根据权利要求1或2所述的多层PCB，其特征在于，所述焊盘单元还包括相邻的第三焊盘和第四焊盘，所述第三焊盘还与所述第二焊盘相邻，所述第四焊盘还与所述第一焊盘相邻，所述第三焊盘和所述第四焊盘均位于所述Z向槽的第二侧，且所述第一侧和所述第二侧是所述Z向槽相对的两侧；
    所述Z向槽内靠近所述第三焊盘和所述第四焊盘的内壁为第二内壁，所述第二内壁上具有一条第二Z向传输线，所述第三焊盘和所述第四焊盘均与所述第二Z向传输线连接，所述第二Z向传输线沿所述多层PCB的厚度方向延伸，且所述第二Z向传输线与所述第一Z向传输线相隔离。
  4. 根据权利要求3所述的多层PCB，其特征在于，所述第三焊盘和所述第四焊盘均为接地焊盘，或均为接同一电源的电源焊盘。
  5. 根据权利要求1或2所述的多层PCB，其特征在于，所述焊盘单元还包括相邻的第三焊盘和第四焊盘，所述第三焊盘还与所述第二焊盘相邻，所述第四焊盘还与所述第一焊盘相邻，所述第三焊盘和所述第四焊盘均位于所述Z向槽的第二侧，且所述第一侧和所述第二侧是所述Z向槽相对的两侧；
    所述Z向槽内靠近所述第三焊盘和所述第四焊盘的内壁为第二内壁，所述第二内壁上具有两条第二Z向传输线，所述第三焊盘和所述第四焊盘分别与一条所述第二Z向传输线连接，所述第二Z向传输线沿所述多层PCB的厚度方向延伸，两条所述第二Z向传输线之间相互隔离，且每一条所述第二Z向传输线均与所述第一Z向传输线相隔离。
  6. 根据权利要求5所述的多层PCB，其特征在于，所述第三焊盘和所述第四焊盘为不同类型的焊盘，或为用于接收一对差分信号的信号焊盘，或为用于接收不同单端信号的信号焊盘，或为用于接不同电源的电源焊盘。
  7. 根据权利要求5或6所述的多层PCB，其特征在于，所述第三焊盘与对应的所述第二Z向传输线之间通过一条第一金属线连接，且所述第一金属线的延伸方向垂直于对应的所述第二Z向传输线。
  8. 根据权利要求5至7任一项所述的多层PCB，其特征在于，所述第一Z向传输线的宽度大于所述第二Z向传输线的宽度，其中，沿所述多层PCB的厚度方向，所述第一Z向传输线的宽度是固定的，所述第一Z向传输线的宽度是指所述第一Z向传输线沿所 述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度；
    沿所述多层PCB的厚度方向，所述第二Z向传输线的宽度是固定的，所述第二Z向传输线的宽度是指所述第二Z向传输线沿所述多层PCB的厚度方向在所述多层PCB的表面所在的平面的投影的宽度。
  9. 根据权利要求3至8任一项所述的多层PCB，其特征在于，所述多层PCB包括信号层、电源层和地线层；
    Z向传输线的一端连接信号焊盘，所述Z向传输线的另一端与所述信号层连接；或，
    Z向传输线的一端连接电源焊盘，所述Z向传输线的另一端与所述电源层连接；或，
    Z向传输线的一端连接接地焊盘，所述Z向传输线的另一端与所述地线层连接；
    其中，所述Z向传输线为所述第一Z向传输线或所述第二Z向传输线。
  10. 根据权利要求1至9任一项所述的多层PCB，其特征在于，
    在所述第一焊盘和所述第二焊盘位于同一行时，所述Z向槽的长度方向为所述焊盘阵列中的行所在的方向；或，
    在所述第一焊盘和所述第二焊盘位于同一列时，所述Z向槽的长度方向为所述焊盘阵列中的列所在的方向；
    其中，所述Z向槽的长度方向是指所述多层PCB的表面的对应于所述Z向槽的开窗中距离最长的两点之间的连线所在的方向。
  11. 根据权利要求10所述的多层PCB，其特征在于，在相邻两个Z向槽的长度方向相同的情况下，相邻两个所述Z向槽之间是连通的。
  12. 根据权利要求9至11所述的多层PCB，其特征在于，在所述信号层，信号线穿越相邻两个所述Z向槽之间的区域。
  13. 根据权利要求1至12所述的多层PCB，其特征在于，所述Z向槽内填充有非导电介质。
  14. 一种通信设备，其特征在于，包括如权利要求1至13任一项所述的多层PCB和输入/输出芯片，所述输入/输出芯片具有X行*Y列的阵列引脚，其中，X和Y均为大于或等于2的整数；所述输入/输出芯片的引脚和所述多层PCB表面的焊盘是一对一的，且每一引脚和对应的一个焊盘接触。
PCT/CN2018/082322 2017-06-27 2018-04-09 一种印刷电路板和通信设备 WO2019001079A1 (zh)

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Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107241857B (zh) * 2017-06-27 2019-08-13 华为技术有限公司 一种印刷电路板和通信设备
CN109587943A (zh) * 2018-11-09 2019-04-05 加弘科技咨询(上海)有限公司 差分线零桩线共铺走线电路板及电子器件
CN114080104B (zh) * 2020-08-19 2022-09-27 荣耀终端有限公司 电路板组件及电子设备
CN116230676A (zh) * 2021-12-06 2023-06-06 华为技术有限公司 一种封装基板、半导体封装件以及电子设备
CN116981160A (zh) * 2022-04-24 2023-10-31 华为技术有限公司 一种电子设备、电路板及其制作方法
CN115101497B (zh) * 2022-08-29 2022-12-02 成都登临科技有限公司 一种集成电路封装体、印制电路板、板卡和电子设备

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101252817A (zh) * 2008-03-26 2008-08-27 中兴通讯股份有限公司 一种多层印刷电路板的设计生产方法
CN102111957A (zh) * 2009-12-28 2011-06-29 丛林网络公司 用于增加每pcb层的布线通道数目的bga印迹图案
CN107241857A (zh) * 2017-06-27 2017-10-10 华为技术有限公司 一种印刷电路板和通信设备

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5784262A (en) * 1995-11-06 1998-07-21 Symbios, Inc. Arrangement of pads and through-holes for semiconductor packages
US6107119A (en) * 1998-07-06 2000-08-22 Micron Technology, Inc. Method for fabricating semiconductor components
US6388208B1 (en) * 1999-06-11 2002-05-14 Teradyne, Inc. Multi-connection via with electrically isolated segments
US7463122B2 (en) * 2003-06-02 2008-12-09 Nec Corporation Compact via transmission line for printed circuit board and its designing method
CN101010754A (zh) * 2004-09-15 2007-08-01 松下电器产业株式会社 芯片型电子元件
US7709747B2 (en) * 2004-11-29 2010-05-04 Fci Matched-impedance surface-mount technology footprints
US7884481B2 (en) * 2007-08-02 2011-02-08 Mediatek Inc. Semiconductor chip package and method for designing the same
JP5108496B2 (ja) * 2007-12-26 2012-12-26 三洋電機株式会社 回路基板およびその製造方法、回路装置およびその製造方法
US8912862B2 (en) 2009-09-08 2014-12-16 Siklu Communication ltd. Impedance matching between a bare-die integrated circuit and a transmission line on a laminated PCB
CN102281725B (zh) * 2010-06-10 2013-03-20 富葵精密组件(深圳)有限公司 电路板的制作方法
US8981578B2 (en) * 2012-04-30 2015-03-17 Apple Inc. Sensor array package
CN103857209A (zh) * 2012-11-28 2014-06-11 宏启胜精密电子(秦皇岛)有限公司 多层电路板及其制作方法
CN103260348B (zh) 2013-04-01 2016-02-10 广州兴森快捷电路科技有限公司 高速pcb板以及差分过孔阻抗控制方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101252817A (zh) * 2008-03-26 2008-08-27 中兴通讯股份有限公司 一种多层印刷电路板的设计生产方法
CN102111957A (zh) * 2009-12-28 2011-06-29 丛林网络公司 用于增加每pcb层的布线通道数目的bga印迹图案
CN107241857A (zh) * 2017-06-27 2017-10-10 华为技术有限公司 一种印刷电路板和通信设备

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
See also references of EP3629681A4 *

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