WO2018176541A1 - 柔性有机发光二极管显示器及其制作方法 - Google Patents

柔性有机发光二极管显示器及其制作方法 Download PDF

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WO2018176541A1
WO2018176541A1 PCT/CN2017/081834 CN2017081834W WO2018176541A1 WO 2018176541 A1 WO2018176541 A1 WO 2018176541A1 CN 2017081834 W CN2017081834 W CN 2017081834W WO 2018176541 A1 WO2018176541 A1 WO 2018176541A1
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channel
layer
amorphous silicon
organic light
emitting diode
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French (fr)
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王威
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Wuhan China Star Optoelectronics Technology Co Ltd
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Wuhan China Star Optoelectronics Technology Co Ltd
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    • H10P14/3402—Deposited materials, e.g. layers characterised by the chemical composition
    • H10P14/3404—Deposited materials, e.g. layers characterised by the chemical composition being Group IVA materials
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    • H10D30/031—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT]
    • H10D30/0312—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes
    • H10D30/0314—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] characterised by the gate electrodes of lateral top-gate TFTs comprising only a single gate
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    • H10D30/0321—Manufacture or treatment of FETs having insulated gates [IGFET] of thin-film transistors [TFT] comprising silicon, e.g. amorphous silicon or polysilicon
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    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
    • H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
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    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6741—Group IV materials, e.g. germanium or silicon carbide
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    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
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    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
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    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H10D86/0223—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials
    • H10D86/0229—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies comprising crystallisation of amorphous, microcrystalline or polycrystalline semiconductor materials characterised by control of the annealing or irradiation parameters
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    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/411—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs characterised by materials, geometry or structure of the substrates
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    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
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    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
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    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
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    • H10K59/121—Active-matrix OLED [AMOLED] displays characterised by the geometry or disposition of pixel elements
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    • H10K71/421—Thermal treatment, e.g. annealing in the presence of a solvent vapour using coherent electromagnetic radiation, e.g. laser annealing
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    • H10P14/38—Formation of materials, e.g. in the shape of layers or pillars of semiconductor materials characterised by treatments done after the formation of the materials
    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
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    • H10P14/3802—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
    • H10P14/3808—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth using laser beams
    • H10P14/3816—Pulsed laser beam
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    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a flexible organic light emitting diode display and a method of fabricating the same.
  • LTPS-TFT backplane which uses excimer laser (excimer laser) Annealing, ELA) Crystallized Low Temperature Poly-silicon (LTPS) as Thin Film Transistor (Thin Film) Channel layer of Transistor, TFT).
  • ELA excimer laser
  • LTPS Crystallized Low Temperature Poly-silicon
  • the electrical parameters of the TFT are strongly correlated with the grain boundary density in the channel.
  • the LTPS film is required to have a very uniform grain size.
  • the LTPS film is composed of many silicon grains, and it is inevitable that there is a grain boundary. Due to the weak atomic bonding force at the crystal interface of the LTPS film, under the bending stress, the intergranular bond breakage/deformation easily occurs at the grain boundary, which deteriorates the electrical properties of the TFT and even the device failure.
  • the present invention provides a method for fabricating a flexible organic light emitting diode display, which includes:
  • the length direction of the channel is parallel to the first side; the width direction of the channel is parallel to the second side.
  • the polysilicon film is crystallized along an extension line direction of the first side.
  • the polysilicon film includes a plurality of polysilicon grains, and a length direction of the polysilicon grains is consistent with a length direction of the channel, and a width of the polysilicon grains The direction coincides with the width direction of the channel.
  • the step of depositing an amorphous silicon film on the flexible substrate comprises:
  • An amorphous silicon film is deposited on the buffer layer.
  • the step of sequentially forming the gate on the channel includes:
  • the invention provides a manufacturing method of a flexible organic light emitting diode display, which comprises:
  • An encapsulation layer is formed on the OLED display layer.
  • the amorphous silicon film is subjected to a first patterning process to form a plurality of sub-amorphous silicon films, and the sub-amorphous silicon film has two adjacent groups. One side and the second side, the length of the first side is less than the length of the second side;
  • the length direction of the channel is parallel to the first side; the width direction of the channel is parallel to the second side.
  • the polysilicon film is crystallized along an extension line direction of the first side.
  • the polysilicon film includes a plurality of polysilicon grains, and a length direction of the polysilicon grains is consistent with a length direction of the channel, and a width of the polysilicon grains The direction coincides with the width direction of the channel.
  • the crystallization treatment is performed by an excimer annealing treatment.
  • the step of depositing an amorphous silicon film on the flexible substrate comprises:
  • An amorphous silicon film is deposited on the buffer layer.
  • the material of the buffer layer is SiO2, SiNx or Al2O3.
  • the step of sequentially forming the gate on the channel includes:
  • the present invention also provides a flexible organic light emitting diode display comprising:
  • An active array layer on the flexible substrate comprising an active layer for forming a channel, the channel being obtained by performing a second patterning process on the oriented crystalline polysilicon film;
  • the directionally crystallized polycrystalline silicon film is formed by performing a first patterning treatment on the amorphous silicon film and performing crystallization treatment on the first patterned amorphous silicon film;
  • An OLED display layer is disposed on the active array layer
  • An encapsulation layer is on the OLED display layer.
  • the first patterned amorphous silicon film includes a plurality of sub-amorphous silicon films having two adjacent first sides and a first On both sides, the length of the first side is smaller than the length of the second side;
  • the length direction of the channel is parallel to the first side; the width direction of the channel is parallel to the second side.
  • the polysilicon film includes a plurality of polysilicon grains, a length direction of the polysilicon grains is consistent with a length direction of the channel, and a width direction of the polysilicon grains is The width directions of the channels are the same.
  • the crystallization treatment is performed by an excimer annealing treatment.
  • the active layer is formed by using a directional crystallized polycrystalline silicon film
  • the grain boundary density of the LTPS film along the channel direction of the TFT is low. Therefore, the TFT has better electrical properties, and the intergranular bond breaking/deformation is less likely to occur at the grain boundary under the bending stress, the reliability of the TFT is improved, and the reliability of the flexible display device under bending stress is improved.
  • FIG. 1 is a schematic diagram of a first step of a method of fabricating a flexible organic light emitting diode display of the present invention.
  • FIG. 2 is a schematic diagram of a second step of a method of fabricating a flexible organic light emitting diode display of the present invention.
  • FIG. 3 is a schematic enlarged view of the sub-amorphous silicon film of FIG. 2.
  • FIG. 4 is a schematic diagram of a third step of a method of fabricating a flexible organic light emitting diode display of the present invention.
  • FIG. 5 is a schematic diagram of a fourth step of a method of fabricating a flexible organic light emitting diode display of the present invention.
  • FIG. 6 is a schematic structural view of a thin film transistor in a flexible organic light emitting diode display of the present invention.
  • FIG. 7 is a schematic structural view of a flexible organic light emitting diode display of the present invention.
  • FIG. 1 is a schematic structural diagram of a first step of a method for fabricating a flexible organic light emitting diode display according to the present invention.
  • a method for fabricating a flexible organic light emitting diode display of the present invention includes:
  • a barrier layer, a buffer layer, and an amorphous silicon film 12 are sequentially deposited on the substrate 11.
  • the amorphous silicon film 12 is patterned by a yellow light process to obtain a plurality of sub-amorphous silicon films 13.
  • the sub-amorphous silicon film 13 has a rectangular shape. As shown in FIG. 3, the sub-amorphous silicon film 13 has two adjacent first sides 131 (short sides) and a second layer. The side 132 (long side) has a length of the first side 131 that is less than the length of the second side 132.
  • the step of depositing an amorphous silicon film on a flexible substrate includes:
  • the barrier layer 21 is formed on the flexible substrate 11.
  • the material of the barrier layer 21 is an inorganic material such as SiO2, SiNx or Al2O3, for isolating water molecules, and preventing water molecules in the air from damaging the thin film transistor.
  • the barrier layer 21 is subjected to low temperature plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition (PECVD) or Atomic Layer Deposition, ALD) technology.
  • PECVD plasma enhanced chemical vapor deposition
  • ALD Atomic Layer Deposition
  • the material of the buffer layer 22 is an inorganic material.
  • the material of the buffer layer 22 may be SiO2, SiNx or Al2O3.
  • the buffer layer 22 is prepared in the same manner as the barrier layer 21.
  • a plurality of sub-amorphous silicon thin films shown in FIG. 2 are subjected to crystallization treatment to form a polycrystalline silicon thin film 14 which is oriented and crystallized in the short-side direction of the sub-amorphous silicon thin film.
  • the crystallization may be by excimer laser annealing. Since the amorphous silicon film absorbs the laser energy and melts into a liquid state, it is then cooled and crystallized. Since the heat of the edge of the sub-amorphous silicon film 13 is relatively fast and the temperature is low, the edge becomes a nucleation point of the polycrystalline silicon crystal.
  • the polycrystalline silicon crystal grains are directionally crystallized from the edge (low temperature region) of the sub-amorphous silicon thin film 13 toward the center point (high temperature region) of the sub-amorphous silicon thin film 13, thereby forming columnar polycrystalline silicon crystals perpendicular to the long side direction of the sub-amorphous silicon thin film 13. grain. Since the distance along the short side direction of the sub-amorphous silicon film is short and the temperature difference is large, it is easy to form polycrystalline silicon crystal grains grown in the short side direction.
  • the polysilicon film 14 includes a plurality of polysilicon grains 15 which are arranged side by side and have a rectangular shape.
  • the polysilicon die 15 has a long side 151 and a short side 152.
  • the direction in which the long side is located is the length direction, and the direction in which the short side is located is the width direction.
  • the longitudinal direction 161 of the channel 16 coincides with the longitudinal direction of the polysilicon crystal grain 15
  • the width direction 162 of the channel 16 coincides with the width direction of the polysilicon crystal grain 15.
  • the longitudinal direction 161 of the channel 16 is parallel to the first side 131; the width direction 162 of the channel 16 is parallel to the second side 132.
  • a gate insulating layer, a gate electrode, an interlayer insulating layer, and a source and a drain are sequentially formed on the channel.
  • the thin film transistor includes a gate 171, a drain 171, and a source 173, and the channel 16 is located between the source 172 and the drain 171.
  • the step of sequentially forming a gate on the channel in the above step S105 includes:
  • the above method may further include:
  • the active layer is formed by using the oriented crystal polycrystalline silicon film
  • the grain boundary density of the LTPS film along the channel direction of the TFT is low. Therefore, the TFT has better electrical properties, and the intergranular bond breaking/deformation is less likely to occur at the grain boundary under the bending stress, the reliability of the TFT is improved, and the reliability of the flexible display device under bending stress is improved.
  • the flexible organic light emitting diode display of the present invention includes a flexible substrate 11, a barrier layer 21, a buffer layer 22, an active array layer 20, an OLED display layer 30, and an encapsulation layer 40.
  • the barrier layer 21 is on the flexible substrate 11, and the active array layer 20 is on the buffer layer 22.
  • the material of the barrier layer 21 is an inorganic material such as SiO2, SiNx or Al2O3 for isolating water molecules and preventing water molecules in the air from damaging the thin film transistor.
  • the barrier layer 21 is subjected to low temperature plasma enhanced chemical vapor deposition (Plasma Enhanced Chemical Vapor Deposition (PECVD) or Atomic Layer Deposition, ALD) technology.
  • PECVD plasma enhanced chemical vapor deposition
  • ALD Atomic Layer Deposition
  • the material of the buffer layer 22 is an inorganic material, and the material of the buffer layer 22 may be SiO2, SiNx or Al2O3.
  • the buffer layer 22 is prepared in the same manner as the barrier layer 21.
  • the active array layer 20 includes an active layer for forming the channel 16, a gate insulating layer 23, a first metal layer 24, an interlayer insulating layer 25, and a second metal layer 26.
  • the material of the active layer is a directional crystallized polysilicon film, and the directional crystallized polysilicon film is subjected to a first patterning process on the amorphous silicon film, and the amorphous silicon film after the first patterning process is performed. Formed by crystallization treatment.
  • the channel 16 is obtained by performing a second patterning process on the directionally crystallized polysilicon film.
  • a gate insulating layer 23 is disposed between the first metal layer 24 and the active layer, and the first metal layer 24 is patterned to obtain a gate electrode (ie, a gate metal electrode).
  • An interlayer insulating layer 25 is on the gate.
  • the second metal layer 26 is located on the interlayer insulating layer 25, and the second metal layer 26 is patterned to obtain a source and a drain (that is, source and drain metal electrodes).
  • the OLED display layer 30 is located on the active array layer 20.
  • the OLED display layer 30 includes an organic light emitting unit, wherein the organic light emitting unit is electrically connected to the active array layer, and specifically the organic light emitting unit is connected to the drain of the thin film transistor.
  • the encapsulation layer 40 is located on the OLED display layer 30.
  • the active layer is formed by using a directional crystallized polysilicon film, the grain boundary density of the LTPS film along the channel direction of the TFT is low.
  • the TFT has better electrical properties, higher reliability under bending stress, and improved reliability of the flexible display device under bending stress.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Electroluminescent Light Sources (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

一种柔性有机发光二极管显示器及其制作方法，该方法包括对非晶硅薄膜（12）进行第一图形化处理；对第一图形化处理后的非晶硅薄膜（13）进行结晶处理，形成定向结晶的多晶硅薄膜（14）；对多晶硅薄膜（14）进行第二次图形化处理，形成沟道（16）；在沟道（16）上依次形成栅极（171）、源极（172）、漏极（173）、OLED显示层（30）以及封装层（40）。

Description

柔性有机发光二极管显示器及其制作方法 技术领域
本发明涉及显示器技术领域，特别是涉及一种柔性有机发光二极管显示器及其制作方法。
 背景技术
目前，柔性显示技术主要应用在中小尺寸的产品中，一般采用LTPS-TFT背板，其采用准分子雷射退火（excimer laser annealing，ELA）结晶的低温多晶硅（Low Temperature Poly-silicon，LTPS）作为薄膜晶体管 (Thin Film Transistor，TFT)的沟道层。TFT的电学参数（阈值电压、亚阈值摆幅、迁移率等）与沟道内晶界密度强烈相关。若要使得阵列基板具有良好的电性均一性，需要LTPS薄膜具有非常均一的晶粒尺寸。
LTPS薄膜由许多硅晶粒组成，难免存在晶界。由于LTPS薄膜的晶界面上原子结合力较弱，导致在弯曲应力下，晶界处容易发生原子间成键断裂/变形，使TFT电性恶化甚至器件失效。
因此，有必要提供一种柔性有机发光二极管显示器及其制作方法，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种柔性有机发光二极管显示器及其制作方法，能够降低LTPS薄膜沿沟道长度方向上的晶界密度。
技术解决方案
为解决上述技术问题，本发明提供一种柔性有机发光二极管显示器的制作方法，其包括：
在柔性衬底上沉积非晶硅薄膜，并对所述非晶硅薄膜进行第一图形化处理；
对所述第一图形化处理后的非晶硅薄膜进行准分子退火处理，形成定向结晶的多晶硅薄膜；
对所述多晶硅薄膜进行第二次图形化处理，形成沟道；
在所述沟道上依次形成栅极、源极和漏极；
在所述源极和漏极上形成OLED显示层；以及
在所述OLED显示层上形成封装层；
其中对所述非晶硅薄膜进行第一图形化处理后形成多个子非晶硅薄膜，所述子非晶硅薄膜具有两组相邻的第一边和第二边，第一边的长度小于第二边的长度；
所述沟道的长度方向与所述第一边平行；所述沟道的宽度方向与所述第二边平行。
在本发明的柔性有机发光二极管显示器的制作方法中，所述多晶硅薄膜沿所述第一边的延长线方向结晶。
在本发明的柔性有机发光二极管显示器的制作方法中，所述多晶硅薄膜包括多个多晶硅晶粒，所述多晶硅晶粒的长度方向与所述沟道的长度方向一致，所述多晶硅晶粒的宽度方向与所述沟道的宽度方向一致。
在本发明的柔性有机发光二极管显示器的制作方法中，所述在柔性衬底上沉积非晶硅薄膜的步骤包括：
在柔性衬底上形成阻挡层；
在所述阻挡层上形成缓冲层；
在所述缓冲层上沉积非晶硅薄膜。
在本发明的柔性有机发光二极管显示器的制作方法中，在所述沟道上依次形成栅极的步骤包括：
在所述沟道上形成栅绝缘层；
在所述栅绝缘层上形成第一金属层，对所述第一金属层进行图案化处理得到所述栅极。
本发明提供一种柔性有机发光二极管显示器的制作方法，其包括：
在柔性衬底上沉积非晶硅薄膜，并对所述非晶硅薄膜进行第一图形化处理；
对所述第一图形化处理后的非晶硅薄膜进行结晶处理，形成定向结晶的多晶硅薄膜；
对所述多晶硅薄膜进行第二次图形化处理，形成沟道；
在所述沟道上依次形成栅极、源极和漏极；
在所述源极和漏极上形成OLED显示层；
在所述OLED显示层上形成封装层。
在本发明的柔性有机发光二极管显示器的制作方法中，对所述非晶硅薄膜进行第一图形化处理后形成多个子非晶硅薄膜，所述子非晶硅薄膜具有两组相邻的第一边和第二边，第一边的长度小于第二边的长度；
所述沟道的长度方向与所述第一边平行；所述沟道的宽度方向与所述第二边平行。
在本发明的柔性有机发光二极管显示器的制作方法中，所述多晶硅薄膜沿所述第一边的延长线方向结晶。
在本发明的柔性有机发光二极管显示器的制作方法中，所述多晶硅薄膜包括多个多晶硅晶粒，所述多晶硅晶粒的长度方向与所述沟道的长度方向一致，所述多晶硅晶粒的宽度方向与所述沟道的宽度方向一致。
在本发明的柔性有机发光二极管显示器的制作方法中，所述结晶处理的方式为准分子退火处理。
在本发明的柔性有机发光二极管显示器的制作方法中，所述在柔性衬底上沉积非晶硅薄膜的步骤包括：
在柔性衬底上形成阻挡层；
在所述阻挡层上形成缓冲层；
在所述缓冲层上沉积非晶硅薄膜。
在本发明的柔性有机发光二极管显示器的制作方法中，所述缓冲层的材料为SiO2、SiNx或者Al2O3。
在本发明的柔性有机发光二极管显示器的制作方法中，在所述沟道上依次形成栅极的步骤包括：
在所述沟道上形成栅绝缘层；
在所述栅绝缘层上形成第一金属层，对所述第一金属层进行图案化处理得到所述栅极。
本发明还提供一种柔性有机发光二极管显示器，其包括：
柔性衬底；
主动阵列层，位于所述柔性衬底上，所述主动阵列层包括用于形成沟道的主动层，所述沟道是对定向结晶的多晶硅薄膜进行第二次图形化处理得到的；所述定向结晶的多晶硅薄膜是通过对非晶硅薄膜进行第一图形化处理，并且对所述第一图形化处理后的非晶硅薄膜进行结晶处理形成的；
OLED显示层，位于所述主动阵列层上；
封装层，位于所述OLED显示层上。
在本发明的柔性有机发光二极管显示器中，所述第一图形化处理后的非晶硅薄膜包括多个子非晶硅薄膜，所述子非晶硅薄膜具有两组相邻的第一边和第二边，第一边的长度小于第二边的长度；
所述沟道的长度方向与所述第一边平行；所述沟道的宽度方向与所述第二边平行。
在本发明的柔性有机发光二极管显示器中，所述多晶硅薄膜包括多个多晶硅晶粒，所述多晶硅晶粒的长度方向与所述沟道的长度方向一致，所述多晶硅晶粒的宽度方向与所述沟道的宽度方向一致。
在本发明的柔性有机发光二极管显示器中，所述结晶处理的方式为准分子退火处理。
 有益效果
本发明的柔性有机发光二极管显示器及其制作方法，由于采用定向结晶的多晶硅薄膜制作主动层，使得沿TFT沟道方向的LTPS薄膜晶界密度较低。因而，使得TFT具有更好的电学性能，在弯曲应力下晶界处不容易发生原子间成键断裂/变形，提高了TFT的可靠性，提高了柔性显示器件在弯曲应力下的可靠性。
 附图说明
图1为本发明的柔性有机发光二极管显示器的制作方法的第一步的示意图。
图2为本发明的柔性有机发光二极管显示器的制作方法的第二步的示意图。
图3为图2中的子非晶硅薄膜的放大结构示意图。
图4为本发明的柔性有机发光二极管显示器的制作方法的第三步的示意图。
图5为本发明的柔性有机发光二极管显示器的制作方法的第四步的示意图。
图6为本发明的柔性有机发光二极管显示器中薄膜晶体管的结构示意图。
图7为本发明的柔性有机发光二极管显示器的结构示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。在图中，结构相似的单元是以相同标号表示。
请参照图1，图1为本发明的柔性有机发光二极管显示器的制作方法的第一步的结构示意图。
如图1所示，本发明的一种柔性有机发光二极管显示器的制作方法，包括：
S101、在柔性衬底上沉积非晶硅薄膜。
如图1所示，在衬底11上依次沉积阻挡层、缓冲层以及非晶硅薄膜12。
S102、对所述非晶硅薄膜进行第一图形化处理。
如图2所示，采用黄光工艺对非晶硅薄膜12进行图形化处理，以得到多个子非晶硅薄膜13。
在一实施方式中，所述子非晶硅薄膜13的形状为长方形，如图3所示，所述子非晶硅薄膜13具有两组相邻的第一边131（短边）和第二边132（长边），第一边131的长度小于第二边132的长度。
结合图7，所述在柔性衬底上沉积非晶硅薄膜的步骤包括：
S1021、在柔性衬底上形成阻挡层。
比如在柔性衬底11上形成阻挡层21，阻挡层21的材料为SiO2、SiNx或者Al2O3等无机材料，用于隔离水分子，避免空气中的水分子对薄膜晶体管造成破坏。该阻挡层21通过低温等离子增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition，PECVD)或者原子层沉积(Atomic Layer Deposition，ALD)技术制得。
S1022、在所述阻挡层上形成缓冲层。
该缓冲层22的材料为无机材料。所述缓冲层22的材料可为SiO2、SiNx或者Al2O3。缓冲层22的制备方法与阻挡层21的制备方法相同。
S1023、在所述缓冲层上沉积非晶硅薄膜。
S103、对所述第一图形化处理后的非晶硅薄膜进行结晶处理，形成定向结晶的多晶硅薄膜；
如图4所示，也即对图2所示的多个子非晶硅薄膜进行结晶处理，形成沿子非晶硅薄膜的短边方向定向结晶的多晶硅薄膜14。
在一实施方式中，该结晶的方式可以为准分子激光退火。由于非晶硅薄膜吸收激光能量后融化成液态，随后再对其进行降温结晶。由于子非晶硅薄膜13的边缘热量散发比较快，温度较低，因此边缘处成为多晶硅结晶的形核点。多晶硅晶粒由子非晶硅薄膜13的边缘（低温区）向子非晶硅薄膜13的中心点（高温区）定向结晶，从而形成垂直于子非晶硅薄膜13的长边方向的柱状多晶硅晶粒。由于沿子非晶硅薄膜的短边方向的距离较短，温差大，容易形成沿短边方向生长的多晶硅晶粒。
也即，所述多晶硅薄膜14包括多个多晶硅晶粒15，多个晶硅晶粒15并排设置，其形状为长方形。该多晶硅晶粒15具有一长边151和短边152。长边所在的方向为长度方向，短边所在的方向为宽度方向。
S104、对所述多晶硅薄膜进行第二次图形化处理，形成沟道。
如图5所示，所述沟道16的长度方向161与所述多晶硅晶粒15的长度方向一致，所述沟道16的宽度方向162与所述多晶硅晶粒15的宽度方向一致。
进一步地，所述沟道16的长度方向161与所述第一边131平行；所述沟道16的宽度方向162与所述第二边132平行。
从而使得沿薄膜晶体管的沟道长度方向，具有非常低的晶界密度。因而，在弯曲应力下晶界处不容易发生原子间成键断裂/变形，使得在弯曲应力下薄膜晶体管具有更高的可靠性和电学性能，提高了柔性显示器件在弯曲应力下的可靠性。
S105、在所述沟道上依次形成栅极、源极和漏极，以得到薄膜晶体管。
比如，在所述沟道上依次形成栅绝缘层、栅极、层间绝缘层以及源极和漏极。
如图6所示，该薄膜晶体管包括栅极171、漏极171、源极173，沟道16位于源极172和漏极171之间。
上述步骤S105在所述沟道上依次形成栅极的步骤包括：
结合图6和7，S1051、在所述沟道16上形成栅绝缘层23；
S1052、在所述栅绝缘层23上形成第一金属层24，对所述第一金属层24进行图案化处理，以得到栅极。
进一步地，上述方法还可以包括：
S1053、在所述第一金属层24上形成层间绝缘层25；
S1054、在所述层间绝缘层25上形成第二金属层26，对所述第二金属层26进行图案化处理得到所述源极和漏极。
S106、在所述源极和漏极上形成OLED显示层30；
S107、在所述OLED显示层30上形成封装层40。
本发明的柔性有机发光二极管显示器的制作方法，由于采用定向结晶的多晶硅薄膜制作主动层，使得沿TFT沟道方向的LTPS薄膜晶界密度较低。因而，使得TFT具有更好的电学性能，在弯曲应力下晶界处不容易发生原子间成键断裂/变形，提高了TFT的可靠性，提高了柔性显示器件在弯曲应力下的可靠性。
如图7所示，本发明的柔性有机发光二极管显示器包括柔性衬底11、阻挡层21、缓冲层22、主动阵列层20、OLED显示层30、封装层40。
该阻挡层21位于柔性衬底11上，主动阵列层20位于所述缓冲层22上。阻挡层21的材料为SiO2、SiNx或者Al2O3等无机材料，用于隔离水分子，避免空气中的水分子对薄膜晶体管造成破坏。该阻挡层21通过低温等离子增强化学气相沉积(Plasma Enhanced Chemical Vapor Deposition，PECVD)或者原子层沉积(Atomic Layer Deposition，ALD)技术制得。
该缓冲层22的材料为无机材料，所述缓冲层22的材料可为SiO2、SiNx或者Al2O3。缓冲层22的制备方法与阻挡层21的制备方法相同。
所述主动阵列层20包括用于形成沟道16的主动层、栅绝缘层23、第一金属层24、层间绝缘层25、第二金属层26。
所述主动层的材料为定向结晶的多晶硅薄膜，所述定向结晶的多晶硅薄膜是通过对非晶硅薄膜进行第一图形化处理，并且对所述第一图形化处理后的非晶硅薄膜进行结晶处理形成的。所述沟道16是对定向结晶的多晶硅薄膜进行第二次图形化处理得到的。
第一金属层24与主动层之间设置有栅绝缘层23、对第一金属层24进行图案化处理得到栅极（也即栅金属电极）。层间绝缘层25位于栅极上。第二金属层26位于层间绝缘层25上，对第二金属层26进行图案化处理，得到源极和漏极（也即源漏金属电极）。
其中OLED显示层30位于所述主动阵列层20上。OLED显示层30包括有机发光单元，其中有机发光单元与主动阵列层电性连接，具体地有机发光单元与薄膜晶体管的漏极连接。封装层40位于所述OLED显示层30上。
本发明的种柔性有机发光二极管显示器，由于采用定向结晶的多晶硅薄膜制作主动层，使得沿TFT沟道方向的LTPS薄膜晶界密度较低。因而，使得TFT具有更好的电学性能，在弯曲应力下具有更高的可靠性，提高了柔性显示器件在弯曲应力下的可靠性。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (17)

  1. 一种柔性有机发光二极管显示器的制作方法，其包括：
    在柔性衬底上沉积非晶硅薄膜，并对所述非晶硅薄膜进行第一图形化处理；
    对所述第一图形化处理后的非晶硅薄膜进行准分子退火处理，形成定向结晶的多晶硅薄膜；
    对所述多晶硅薄膜进行第二次图形化处理，形成沟道；
    在所述沟道上依次形成栅极、源极和漏极；
    在所述源极和漏极上形成OLED显示层；以及
    在所述OLED显示层上形成封装层；
    其中对所述非晶硅薄膜进行第一图形化处理后形成多个子非晶硅薄膜，所述子非晶硅薄膜具有两组相邻的第一边和第二边，第一边的长度小于第二边的长度；
    所述沟道的长度方向与所述第一边平行；所述沟道的宽度方向与所述第二边平行。
  2. 根据权利要求1所述的柔性有机发光二极管显示器的制作方法，其中所述多晶硅薄膜沿所述第一边的延长线方向结晶。
  3. 根据权利要求1所述的柔性有机发光二极管显示器的制作方法，其中所述多晶硅薄膜包括多个多晶硅晶粒，所述多晶硅晶粒的长度方向与所述沟道的长度方向一致，所述多晶硅晶粒的宽度方向与所述沟道的宽度方向一致。
  4. 根据权利要求1所述的柔性有机发光二极管显示器的制作方法，其中所述在柔性衬底上沉积非晶硅薄膜的步骤包括：
    在柔性衬底上形成阻挡层；
    在所述阻挡层上形成缓冲层；以及
    在所述缓冲层上沉积非晶硅薄膜。
  5. 根据权利要求1所述的柔性有机发光二极管显示器的制作方法，其中在所述沟道上依次形成栅极的步骤包括：
    在所述沟道上形成栅绝缘层；以及
    在所述栅绝缘层上形成第一金属层，对所述第一金属层进行图案化处理得到所述栅极。
  6. 一种柔性有机发光二极管显示器的制作方法，其包括：
    在柔性衬底上沉积非晶硅薄膜，并对所述非晶硅薄膜进行第一图形化处理；
    对所述第一图形化处理后的非晶硅薄膜进行结晶处理，形成定向结晶的多晶硅薄膜；
    对所述多晶硅薄膜进行第二次图形化处理，形成沟道；
    在所述沟道上依次形成栅极、源极和漏极；
    在所述源极和漏极上形成OLED显示层；以及
    在所述OLED显示层上形成封装层。
  7. 根据权利要求6所述的柔性有机发光二极管显示器的制作方法，其中对所述非晶硅薄膜进行第一图形化处理后形成多个子非晶硅薄膜，所述子非晶硅薄膜具有两组相邻的第一边和第二边，第一边的长度小于第二边的长度；
    所述沟道的长度方向与所述第一边平行；所述沟道的宽度方向与所述第二边平行。
  8. 根据权利要求7所述的柔性有机发光二极管显示器的制作方法，其中所述多晶硅薄膜沿所述第一边的延长线方向结晶。
  9. 根据权利要求7所述的柔性有机发光二极管显示器的制作方法，其中所述多晶硅薄膜包括多个多晶硅晶粒，所述多晶硅晶粒的长度方向与所述沟道的长度方向一致，所述多晶硅晶粒的宽度方向与所述沟道的宽度方向一致。
  10. 根据权利要求6所述的柔性有机发光二极管显示器的制作方法，其中所述结晶处理的方式为准分子退火处理。
  11. 根据权利要求6所述的柔性有机发光二极管显示器的制作方法，其中所述在柔性衬底上沉积非晶硅薄膜的步骤包括：
    在柔性衬底上形成阻挡层；
    在所述阻挡层上形成缓冲层；以及
    在所述缓冲层上沉积非晶硅薄膜。
  12. 根据权利要求11所述的柔性有机发光二极管显示器的制作方法，其中所述缓冲层的材料为SiO2、SiNx或者Al2O3。
  13. 根据权利要求6所述的柔性有机发光二极管显示器的制作方法，其中在所述沟道上依次形成栅极的步骤包括：
    在所述沟道上形成栅绝缘层；以及
    在所述栅绝缘层上形成第一金属层，对所述第一金属层进行图案化处理得到所述栅极。
  14. 一种柔性有机发光二极管显示器，其包括
    柔性衬底；
    主动阵列层，位于所述柔性衬底上，所述主动阵列层包括用于形成沟道的主动层，所述沟道是对定向结晶的多晶硅薄膜进行第二次图形化处理得到的；所述定向结晶的多晶硅薄膜是通过对非晶硅薄膜进行第一图形化处理，并且对所述第一图形化处理后的非晶硅薄膜进行结晶处理形成的；
    OLED显示层，位于所述主动阵列层上；以及
    封装层，位于所述OLED显示层上。
  15. 根据权利要求14所述的柔性有机发光二极管显示器，其中
    所述第一图形化处理后的非晶硅薄膜包括多个子非晶硅薄膜，所述子非晶硅薄膜具有两组相邻的第一边和第二边，第一边的长度小于第二边的长度；
    所述沟道的长度方向与所述第一边平行；所述沟道的宽度方向与所述第二边平行。
  16. 根据权利要求15所述的柔性有机发光二极管显示器，其中所述多晶硅薄膜包括多个多晶硅晶粒，所述多晶硅晶粒的长度方向与所述沟道的长度方向一致，所述多晶硅晶粒的宽度方向与所述沟道的宽度方向一致。
  17. 根据权利要求14所述的柔性有机发光二极管显示器，其中所述结晶处理的方式为准分子退火处理。
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