WO2018121184A1 - 晶圆测试系统 - Google Patents
晶圆测试系统 Download PDFInfo
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- WO2018121184A1 WO2018121184A1 PCT/CN2017/114373 CN2017114373W WO2018121184A1 WO 2018121184 A1 WO2018121184 A1 WO 2018121184A1 CN 2017114373 W CN2017114373 W CN 2017114373W WO 2018121184 A1 WO2018121184 A1 WO 2018121184A1
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
- G01R31/28—Testing of electronic circuits, e.g. by signal tracer
- G01R31/282—Testing of electronic circuits specially adapted for particular applications not provided for elsewhere
- G01R31/2831—Testing of materials or semi-finished products, e.g. semiconductor wafers or substrates
Definitions
- the present invention relates to the field of integrated circuit technology, and in particular to a wafer testing system.
- the main purpose of wafer testing is to perform electrical functional testing on the chips in the wafer, screen out the defective chips, and classify the unqualified products according to the type of electrical defects, and provide them to the wafer manufacturer for data analysis and process improvement.
- one way is to represent the different failure types of the corresponding chip by color, such as green for all passes, red for contact failure, yellow for functional failure, etc., and finally reflected in the drawn wafer.
- color such as green for all passes, red for contact failure, yellow for functional failure, etc.
- All of the above methods have a common problem, that is, only the chip corresponding to the two-dimensional image of the wafer is tested, and the failure type can be known at most, but which one of the tests fails, and the test value is Specific information such as how much difference from the design standard can not be obtained intuitively. To get this specific information, it is very inconvenient to search from a large number of test records.
- the present invention provides a wafer testing system.
- the invention provides a wafer testing system comprising a testing unit, a control unit, a data storage unit and a display and interaction unit; the testing unit is configured to test a wafer and store test data in the data storage unit
- the control unit receives instructions according to the display and interaction unit, Extracting test data of the specified test wafer from the data storage unit, and controlling the display and interaction unit to display the specific test data of the specified test wafer through a two-dimensional image according to the specified display mode.
- the specific test data is a specific test value of a specified test item.
- the display mode of the display and interaction unit includes: displaying, on each chip image on the two-dimensional image corresponding to the specified test wafer, a specific test value of the specified test item of the specified test wafer. .
- the display mode of the display and interaction unit includes: displaying a specified color on each chip image on the two-dimensional image corresponding to the specified test wafer to represent a corresponding chip test of the specified test wafer Passing or testing fails, and when the display and interaction unit detects a tap on the specified chip image, information of all test items of the chip corresponding to the specified chip image is displayed.
- the display mode of the display and the interaction unit includes: the control unit superimposes the two-dimensional images of the plurality of test wafers of the same type, and the same coordinate chip of all the same test wafers fails to pass the test.
- the coordinate chip displays the specified color.
- the wafer testing system further includes a data processing unit, the data processing unit is configured to format the test data, and store the sorted test data in the data storage unit.
- the data processed by the data processing unit includes the following information: test item type, test wafer batch number, wafer number, test start time, test end time, test item maximum and minimum limits, specific The coordinates of the chip and the specific test values of the specified test items.
- the test unit is a wafer acceptance test machine.
- the test unit is a chip probe test machine.
- the display and interaction unit includes a display, a mouse, and a keyboard.
- the display and interaction unit includes a touch screen.
- the data storage unit is a server.
- the data storage unit includes a working storage unit and a backup storage unit, where the working storage unit is used for normal data storage exchange, and the backup storage unit backs up data of the working storage unit in real time.
- the control unit extracts test data of the specified test wafer from the data storage unit according to the instruction received by the display and the interaction unit, and controls the display and interaction unit to pass a two-dimensional according to the specified display mode.
- the image shows the specific test data of the specified test wafer.
- the test data of the wafer can be visually displayed on the display and interaction unit, eliminating the cumbersome steps of searching from the massive test data and improving the efficiency of data analysis.
- Embodiment 1 is an intention of a wafer testing system according to Embodiment 1 of the present invention.
- FIG. 2 is a schematic diagram of a display wafer image of a wafer testing system according to Embodiment 1 of the present invention
- FIG. 3 is a schematic diagram of a display wafer image of a wafer testing system according to Embodiment 2 of the present invention.
- the present invention provides a wafer testing system, as shown in FIG. 1, including a testing unit 101, a control unit 102, a data storage unit 103, and a display and interaction unit 105; the testing unit 101 is used to test a wafer, And storing test data in the data storage unit 103; the control unit 102 extracts test data of the specified test wafer from the data storage unit 103 according to the instruction received by the display and interaction unit 105, and controls the display and interaction unit.
- 105 displays the specific test data of the specified test wafer through a two-dimensional image according to the specified display mode.
- the wafer testing system of this embodiment further includes a data processing unit 104 that formats the test data in the data storage unit 103 and stores the collated test data in the data storage unit 103.
- the collated test data includes the following information: test item type, test wafer batch number, wafer number, test start time, test end time, test item maximum and minimum limits, specific chip coordinates, and specified test The specific test value of the project. It can be understood that the collated data can cover the data before the collation; the collated data can also be stored in the unstored area of the data storage unit 103.
- the data processing unit 104 of this embodiment is a server. It can be understood that the processing unit can also be a single chip microcomputer.
- the test unit 101 of this embodiment is a wafer acceptance test machine. It can be understood that the test unit 101 can also be a chip probe test machine.
- the data storage unit 103 is a server. Specifically, it may include a work server and a backup server. The work server is used for normal data storage and exchange, and the backup server backs up data in the work server in real time. It can be understood that the storage unit may also only include a working server, and the storage unit may also be a flash memory, a hard disk, or the like.
- the test unit 101 and the storage unit can be connected by wire or wirelessly, for example, by means of data lines, wifi, Bluetooth, etc., and the test data of the test unit 101 is transmitted and stored in the storage unit.
- the display and interaction unit 105 of this embodiment includes a display screen, a keyboard and a mouse, and the control unit 102 is a computer host.
- the display and interaction unit 105 inputs commands through the keyboard and the mouse, and the control unit 102 can extract test data of all the chips in the specified test item from the database of the data storage unit 103 according to the instruction, and control the display and interaction unit 105. display.
- the display and interaction unit 105 can also be a touch screen, and the control unit 102 can also have other options, such as a server.
- the display mode of the embodiment is: drawing a two-dimensional image 201 corresponding to the test wafer on the screen, and the chip passing coordinates of the test wafer are in one-to-one correspondence with the chip image 202 in the two-dimensional image.
- the test data of all the chips of the test wafer contains its coordinate values, and the specific test data of the specified test item is directly displayed on the chip image 202 of the corresponding coordinates (the number 1 in the figure is the specific test data).
- Other areas of the screen that display other test information for the test wafer, such as wafer lot number, wafer number, test start time, test end time, test item name, test item maximum and minimum limits, etc. Multiple.
- the coordinate origin is the intersection of the X axis and the Y axis. It can be understood that the coordinate origin can also select other points, and the coordinates of the chip can be changed accordingly.
- the difference between this embodiment and the first embodiment is that the display mode is different from that of the interaction unit 105.
- a two-dimensional image 301 corresponding to the test wafer is drawn on the screen, and the chip passing coordinates of the test wafer are in one-to-one correspondence with the chip image 302 in the two-dimensional image.
- the corresponding chip image 302 is displayed in green; if the chip test fails, the corresponding chip image 302 is displayed in red.
- This display mode does not select the specified item.
- the control unit 102 determines that the chip is not tested, and controls the display and interaction unit to display red in the chip image 302. It will be appreciated that other different colors may be used to represent the pass and fail of the chip test.
- the control unit 102 performs data extraction by using the test wafer number and the coordinates of the click chip as keywords, and displays all the information in the display format in the display and interaction unit 105.
- the test data may include a wafer lot number, a wafer number, a click chip coordinate, a click start time of the click chip, a test end time of the click chip, a yield analysis of the test wafer, a test item name, and a test item parameter value. , test project maximum and minimum limits, etc.
- the information displayed by the click chip can be classified and displayed according to the chip coordinates and the test item, and the display is more clear; when the display and interaction unit 105 is a touch screen, directly clicking the chip image 302 has the same effect as the mouse click. .
- the display mode of the display and interaction unit 105 is that the control unit 102 superimposes two-dimensional images of a plurality of test wafers of the same type, and the same coordinate chip of all the test wafers is If the test fails, the coordinate chip displays the specified color.
- This display mode allows quick analysis of the common failure pattern of the wafer to determine the cause of the failure of the test wafer.
- the chip image is clicked by the mouse, the test information of all the test items of the same type of test wafer and the chip corresponding to the click chip image can also be displayed.
- the control unit extracts test data of the specified test wafer from the data storage unit according to the instruction received by the display and the interaction unit, and controls the display and interaction unit to pass a two-dimensional according to the specified display mode.
- the image shows the specific test data of the specified test wafer, and the test data of the wafer can be visually displayed on the display and interaction unit, eliminating the need for massive testing.
- the cumbersome steps in the data search improve the efficiency of data analysis.
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- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Abstract
Description
Claims (13)
- 一种晶圆测试系统,其特征在于,包括测试单元、控制单元、数据存储单元和显示与交互单元;所述测试单元用于对晶圆进行测试,并将测试数据存储于所述数据存储单元;所述控制单元根据显示与交互单元接收的指令,从数据存储单元中提取指定的测试晶圆的测试数据,并控制显示与交互单元按照指定显示模式通过一二维图像显示该指定的测试晶圆的具体测试数据。
- 如权利要求1所述晶圆测试系统,其特征在于,所述具体测试数据是指定测试项目的具体测试值。
- 如权利要求2所述晶圆测试系统,其特征在于,所述显示与交互单元的显示模式包括:在与指定的测试晶圆对应的二维图像上的每个芯片图像上,显示该指定的测试晶圆的指定测试项目的具体测试值。
- 如权利要求2所述晶圆测试系统,其特征在于,所述显示与交互单元的显示模式包括:在与指定的测试晶圆对应的二维图像上的每个芯片图像上,显示指定颜色以代表该指定的测试晶圆的对应芯片测试通过或者测试未通过,以及当所述显示与交互单元检测到对指定的芯片图像的点触时,显示出指定的芯片图像对应的芯片的所有测试项目的信息。
- 如权利要求2所述晶圆测试系统,其特征在于,所述显示与交互单元的显示模式包括:所述控制单元将多个同类测试晶圆的二维图像进行叠加处理,所有同类测试晶圆的同一坐标芯片均测试未通过,则此坐标芯片显示指定颜色。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,还包括一数据处理单元,所述数据处理单元用于对测试数据进行格式整理,并将整理后的测试数据存储于数据存储单元。
- 如权利要求6晶圆测试系统,其特征在于,所述数据处理单元整理后的测试数据,包含如下信息:测试项目类型、测试晶圆的批号、晶圆编号、测试开始时间、测试结束时间、测试项目最高和最低限值、具体芯片的坐标以及指定测试项目的具体测试值。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,所述测试单元为晶圆允收测试机台。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,所述测试单元为芯片探针测试机台。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,所述显示与交互单元包括显示器、鼠标和键盘。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,所述显示与交互单元包括一触摸屏。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,所述数据存储单元为服务器。
- 如权利要求1~5中任意一项所述的晶圆测试系统,其特征在于,所述数据存储单元包括工作存储单元和备份存储单元,所述工作存储单元用于正常的数据存储交换,所述备份存储单元实时备份工作存储单元的数据。
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GB1819585.9A GB2567968A (en) | 2016-12-30 | 2017-12-04 | Wafer test system |
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CN201611264465.3A CN106597261A (zh) | 2016-12-30 | 2016-12-30 | 晶圆测试系统 |
CN201611264465.3 | 2016-12-30 |
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GB (1) | GB2567968A (zh) |
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CN106597261A (zh) * | 2016-12-30 | 2017-04-26 | 上海华岭集成电路技术股份有限公司 | 晶圆测试系统 |
CN108400100A (zh) * | 2018-02-27 | 2018-08-14 | 上海华岭集成电路技术股份有限公司 | 一种晶圆测试参数设置方法 |
CN110879931B (zh) * | 2018-09-05 | 2022-04-05 | 长鑫存储技术有限公司 | 可视化的存储器芯片修补分析程式检验方法和装置 |
CN110967609B (zh) * | 2018-09-29 | 2022-02-08 | 合肥晶合集成电路股份有限公司 | 一种监测系统及监测方法 |
CN110146798B (zh) * | 2019-03-29 | 2021-04-09 | 福建省福联集成电路有限公司 | 一种对失效芯粒的自动分析方法及系统 |
CN110579702A (zh) * | 2019-09-20 | 2019-12-17 | 紫光宏茂微电子(上海)有限公司 | 一种用于芯片测试的显示方法、装置、存储介质及终端 |
CN111983412B (zh) * | 2020-07-21 | 2021-12-31 | 深圳米飞泰克科技有限公司 | 监控系统、监控方法、监控终端及存储介质 |
CN112612755B (zh) * | 2020-12-03 | 2023-05-26 | 海光信息技术股份有限公司 | 一种芯片测试信息展示方法、装置、电子设备及存储介质 |
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GB201819585D0 (en) | 2019-01-16 |
GB2567968A (en) | 2019-05-01 |
CN106597261A (zh) | 2017-04-26 |
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