WO2018074072A1 - 金属配線層形成方法、金属配線層形成装置および記憶媒体 - Google Patents

金属配線層形成方法、金属配線層形成装置および記憶媒体 Download PDF

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WO2018074072A1
WO2018074072A1 PCT/JP2017/030991 JP2017030991W WO2018074072A1 WO 2018074072 A1 WO2018074072 A1 WO 2018074072A1 JP 2017030991 W JP2017030991 W JP 2017030991W WO 2018074072 A1 WO2018074072 A1 WO 2018074072A1
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Prior art keywords
substrate
plating layer
metal wiring
catalyst
forming
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PCT/JP2017/030991
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English (en)
French (fr)
Inventor
啓一 藤田
和俊 岩井
水谷　信崇
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東京エレクトロン株式会社
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Application filed by 東京エレクトロン株式会社 filed Critical 東京エレクトロン株式会社
Priority to JP2018546178A priority Critical patent/JP6776367B2/ja
Priority to US16/331,612 priority patent/US10755973B2/en
Priority to CN201780057134.9A priority patent/CN109715852B/zh
Priority to KR1020197006809A priority patent/KR102424817B1/ko
Publication of WO2018074072A1 publication Critical patent/WO2018074072A1/ja

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    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
    • C23C18/1603—Process or apparatus coating on selected surface areas
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
    • C23C18/1601—Process or apparatus
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    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
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    • C23C18/1601—Process or apparatus
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C18/00—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating
    • C23C18/16—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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    • C23C18/31—Coating with metals
    • C23C18/32—Coating with nickel, cobalt or mixtures thereof with phosphorus or boron
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    • C23C18/52—Chemical coating by decomposition of either liquid compounds or solutions of the coating forming compounds, without leaving reaction products of surface material in the coating; Contact plating by reduction or substitution, e.g. electroless plating using reducing agents for coating with metallic material not provided for in a single one of groups C23C18/32 - C23C18/50
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    • C—CHEMISTRY; METALLURGY
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    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
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Definitions

  • the present invention relates to a metal wiring layer forming method, a metal wiring layer forming apparatus, and a storage medium for forming a metal wiring layer on a substrate.
  • LSIs semiconductor devices such as LSIs are required to have higher density in order to cope with problems such as space saving of mounting area and improvement of processing speed.
  • a multilayer wiring technique for manufacturing a multilayer substrate such as a three-dimensional LSI by stacking a plurality of wiring substrates is known.
  • a through via hole penetrating the wiring board and embedded with a conductive material such as copper (Cu) is provided in the wiring board.
  • the catalyst when a catalyst is applied in the concave portion of the substrate, the catalyst may adhere to the side wall of the concave portion or the substrate surface.
  • a Co-based alloy grows especially on the catalyst attached to the substrate surface.
  • the Co-based alloy plating layer formed on the substrate surface remains as a foreign matter plating layer. In this case, it is necessary to remove this foreign matter plating layer using a subsequent chemical mechanical polishing method.
  • the present invention has been made in consideration of such points, and a metal wiring layer can be easily and easily formed by plating in a recess of a substrate without leaving a foreign matter plating layer on the substrate surface.
  • An object is to provide a metal wiring layer forming method, a metal wiring layer forming apparatus, and a storage medium.
  • the present invention provides a metal wiring layer forming method for forming a metal wiring layer on a substrate, a step of preparing a substrate having a recess having a bottom electrode formed on a bottom surface, and a first plating process on the substrate.
  • a metal wiring comprising: a step of removing; and a step of forming a second plating layer on the first plating layer in the recess by performing a second plating process on the substrate. It is a layer formation method.
  • the present invention provides a metal wiring layer forming apparatus for forming a metal wiring layer on a substrate by performing a first plating process on a substrate having a recess having a bottom electrode formed on a bottom surface, thereby at least a lower portion of the recess.
  • a first plating layer forming portion for forming a first plating layer as a protective layer on the electrode, and a foreign matter for cleaning the substrate and removing a foreign plating layer adhering to the substrate surface formed simultaneously with the first plating layer A plating layer cleaning unit; and a second plating layer forming unit that forms a second plating layer on the first plating layer in the recess by performing a second plating process on the substrate.
  • the present invention relates to a storage medium storing a computer program for causing a computer to execute a metal wiring forming method.
  • the metal wiring layer forming method is a metal wiring layer forming method for forming a metal wiring layer on a substrate.
  • the metal wiring layer can be easily and easily formed in the concave portion of the substrate without leaving a foreign matter plating layer on the substrate surface.
  • FIG. 1A to 1G are views showing a substrate on which a metal wiring layer forming method according to an embodiment of the present invention is applied.
  • FIG. 2 is a flowchart showing a metal wiring layer forming method according to an embodiment of the present invention.
  • FIG. 3 is a block diagram showing a metal wiring layer forming apparatus according to an embodiment of the present invention.
  • a metal wiring layer forming method includes a silicon substrate (such as a semiconductor wafer having a recess 3). Hereinafter, a metal wiring layer is formed on 2).
  • the substrate 2 has a recess 3 having a bottom surface 3a and a side surface 3b.
  • the substrate 2 is made of a Si oxide film, and tungsten (W) or a tungsten alloy as a lower electrode is embedded in the bottom surface 3a of the recess 3 (see FIG. 1A).
  • the substrate 2 having such a configuration can be obtained by a known method.
  • a silicon substrate 2 made of a Si oxide film is prepared.
  • a recess 3 is formed in the substrate 2 by etching.
  • tungsten (W) or tungsten alloy 4 is embedded in the bottom surface 3a of the recess 3 of the substrate 2 by CVD.
  • Such a metal wiring layer forming apparatus 10 includes a catalyst applying unit 11 for applying a catalyst to the substrate 2 and a catalyst formed on tungsten or a tungsten alloy 4 provided on the bottom surface 3 a of the recess 3 by pre-cleaning the substrate 2.
  • a second plating layer forming portion 16 for forming the second plating layer 8 on the first plating layer 7 in the recess 3 is provided.
  • a processing unit 14 is provided.
  • each component of the metal wiring layer forming apparatus 10 described above for example, a catalyst applying unit 11, a catalyst cleaning unit 12, a first plating layer forming unit 13, a UV processing unit or a heating processing unit 14, a foreign matter plating layer cleaning unit 15, and
  • the second plating layer forming unit 16 is driven and controlled by the control device 20 in accordance with various programs recorded in the storage medium 21 provided in the control device 20, whereby various processes are performed on the substrate 2.
  • the storage medium 21 stores various setting data and various programs such as a metal wiring layer forming program described later.
  • known ones such as a computer-readable memory such as ROM and RAM, and a disk-shaped storage medium such as a hard disk, a CD-ROM, a DVD-ROM, and a flexible disk can be used.
  • the substrate 2 in which the recess 3 is formed in the substrate (silicon substrate) 2 made of a semiconductor wafer or the like, the recess 3 is formed, and the bottom surface 3a of the recess 3 is provided with tungsten or a tungsten alloy 4 is according to the present invention. It is conveyed into the metal wiring layer forming apparatus 10. In this case, a recess 3 having a bottom surface 3a is formed in the substrate 2, and the bottom surface 3a of the recess 3 is provided with tungsten or a tungsten alloy (see FIG. 1A).
  • a conventionally known method can be adopted as appropriate. Specifically, for example, as a dry etching technique, a general-purpose technique using a fluorine-based or chlorine-based gas or the like can be applied. In particular, a hole having a large aspect ratio (hole depth / hole diameter) is formed.
  • ICP-RIE Inductively Coupled Plasma Reactive Ion Etching
  • sulfur hexafluoride A method called a Bosch process in which an etching step using SF6) and a protection step using a Teflon-based gas such as C4F8 are repeated can be suitably employed.
  • the substrate 2 having the recess 3 is sent to the catalyst applying unit 11, and the catalyst is applied to the substrate 2 in the catalyst applying unit 11. (See FIG. 1B).
  • an aqueous solution containing Pd ions made of palladium chloride as a raw material is sprayed onto the substrate 2 with a nozzle, and Pd ions serving as a catalyst are sprayed onto the surface of the substrate 2.
  • Pd ions can be easily applied to materials on the surface and materials that are difficult to apply, and are easily applied to tungsten or tungsten alloys on the bottom surface 3a, but difficult to apply to silicon oxide films. Thus, a large amount can be imparted to the bottom surface 3a.
  • a catalyst having a catalytic action capable of promoting the plating reaction for example, nanoparticles
  • the nanoparticle is a particle having a catalytic action and having an average particle diameter of 20 nm or less, for example, in a range of 0.5 nm to 20 nm.
  • the elements constituting the nanoparticles include palladium, gold, and platinum.
  • ruthenium may be used as an element constituting the nanoparticles.
  • the method for measuring the average particle size of the nanoparticles is not particularly limited, and various methods can be used.
  • a dynamic light scattering method or the like can be used.
  • the dynamic light scattering method is a method for calculating the average particle diameter of the nanoparticles by irradiating the nanoparticles dispersed in the catalyst solution with laser light and observing the scattered light.
  • a predetermined number of nanoparticles for example, 20 nanoparticles, are detected from an image obtained using a TEM or SEM.
  • the average value of the particle diameters of these nanoparticles can also be calculated.
  • the catalyst solution contains metal ions that constitute the nanoparticles that serve as the catalyst.
  • the catalyst solution contains a palladium compound such as palladium chloride as a palladium ion source.
  • the specific composition of the catalyst solution is not particularly limited, but preferably the composition of the catalyst solution is set so that the viscosity coefficient of the catalyst solution is 0.01 Pa ⁇ s or less.
  • the catalyst solution can be sufficiently distributed to the bottom surface 3a of the recess 3 of the substrate 2 even when the diameter of the recess 3 of the substrate 2 is small. As a result, the catalyst can be more reliably adsorbed to the bottom surface 3 a of the recess 3 of the substrate 2.
  • the catalyst in the catalyst solution is coated with a dispersant.
  • the interfacial energy at the catalyst interface can be reduced. Therefore, the diffusion of the catalyst in the catalyst solution can be further promoted, and it is considered that the catalyst can reach the bottom surface 3a of the recess 3 of the substrate 2 in a shorter time.
  • the method for preparing the catalyst coated with the dispersant is not particularly limited.
  • a catalyst solution containing a catalyst previously coated with a dispersant may be used.
  • PVP polyvinyl pyrrolidone
  • PAA polyacrylic acid
  • PEI polyethyleneimine
  • TMA tetramethylammonium
  • various chemicals for adjusting the characteristics may be added to the catalyst solution.
  • the catalyst 5 is applied on the tungsten or tungsten alloy 4 formed on the bottom surface 3 a of the recess 3, the side surface 3 b of the recess 3 and the surface 2 a of the substrate 2.
  • the substrate 2 is sent from the catalyst applying unit 11 to the catalyst cleaning unit 12, and the substrate 2 is preliminarily cleaned using a cleaning liquid such as DHF in the catalyst cleaning unit 12.
  • a cleaning liquid such as DHF in the catalyst cleaning unit 12.
  • the adsorption force of the catalyst 5 with respect to tungsten or the tungsten alloy 4 is larger than the adsorption force of the catalyst 5 with respect to the side surface 3b of the recess 3 and the surface 2a of the substrate 2, and therefore the side surface 3b of the recess 3 and The catalyst 5 formed on the surface 2a of the substrate 2 can be selectively washed and removed.
  • the substrate 2 is sent from the catalyst cleaning unit 12 to the first plating layer forming unit 13, and in this first plating layer forming unit 13, a plating solution is supplied to the substrate 2 to perform the first plating process.
  • a first plating layer 7 as a protective layer is formed on at least the tungsten or tungsten alloy 4 provided on the bottom surface 3 a of the recess 3.
  • the catalyst 5 formed on the side surface 3b of the recess 3 and the surface 2a of the substrate 2 has been removed in the previous step. It is difficult to form the first plating layer 7 on the side surface 3b and the surface 2a of the substrate 2. However, even if the catalyst 5 is removed by the catalyst cleaning unit 12, for example, a part of the catalyst 5 may remain on the surface 2a of the substrate 2, and in this case, the surface of the substrate 2 is subjected to the first plating process. A plating layer 7a is formed through the catalyst 5 remaining on 2a. The plating layer 7a remaining on the surface 2a of the substrate 2 is a foreign matter plating layer 7a, which becomes a foreign matter defect and needs to be removed.
  • the first plating layer 7 may be a cobalt or cobalt alloy such as Co, CoB, or CoP formed through the catalyst 5, or a nickel or nickel alloy plating layer such as Ni, NiB, or NiP. It is done.
  • the substrate 2 is sent from the first plating layer forming unit 13 to the UV processing unit or the heat processing unit 14, where the UV processing or the heat processing is performed on the substrate 2 in the UV processing unit or the heat processing unit 14.
  • the foreign matter plating layer 7a formed on the surface 2a of No. 2 is heated, and the foreign matter plating layer 7a can be easily removed by cleaning the substrate 2 in the foreign matter plating layer cleaning section 15 described later (FIG. 1 (e)). reference).
  • the substrate 2 is sent from the UV processing unit or the heat processing unit 14 to the foreign matter plating layer cleaning unit 15, and the foreign matter plating layer cleaning unit 15 performs a cleaning process on the substrate 2 using a cleaning liquid containing an organic acid.
  • the foreign matter plating layer 7a formed on the surface 2a of the substrate 2 is previously subjected to UV treatment or heat treatment, the foreign matter plating layer 7a can be easily and easily removed (see FIG. 1 (f)). ).
  • the substrate 2 is sent from the foreign matter plating layer cleaning unit 15 to the second plating layer forming unit 16, and the second plating layer forming unit 16 is formed on the tungsten or the tungsten alloy 4 in the recess 3 of the substrate 2.
  • the second plating layer 8 is formed in a bottom-up manner using the first plating layer 7 as a catalyst.
  • the second plating layer 8 can be embedded in the recess 3 of the substrate 2.
  • the material constituting the second plating layer 8 is the same as the material constituting the first plating layer 7.
  • Metal wiring layers 7 and 8 are obtained by the first plating layer 7 and the second plating layer 8 formed on the first plating layer 7.
  • tungsten or tungsten alloy 4 is formed as a lower electrode in the recess 3 of the substrate 2, and the first plating layer 7 and the second plating layer 8 are formed on the tungsten or tungsten alloy 4.
  • the first plating layer 7 and the second plating layer 8 can be embedded in the recess 3.
  • the first plating layer 7 is formed as a protective layer on the tungsten or tungsten alloy 4, and then the foreign matter plating layer 7 a on the surface 2 a of the substrate 2 formed simultaneously with the first plating layer 7 is removed, and then the concave portion is formed. Since the second plating layer 8 is formed so as to overlap the first plating layer 7 in 3, the foreign matter plating layer 7 a formed on the surface 2 a of the substrate 2 does not remain or grow as a foreign matter defect.
  • the foreign matter plating layer 7a does not remain as an abnormal defect on the surface 2a of the substrate 2, it is not necessary to remove the abnormal plating layer 7a by chemical mechanical polishing.
  • the first plating layer forming unit 13, the foreign matter plating layer cleaning unit 15, and the second plating layer forming unit 16 can be configured using the same spinner.
  • the UV processing unit or the heat processing unit 14 is not necessarily used. Furthermore, although an example in which tungsten or tungsten alloy 4 is provided in advance on the bottom surface 3a of the recess 3 of the substrate 2 is shown, this tungsten or tungsten alloy 4 may be removed depending on the material of the plating layer.

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Abstract

【課題】基板の凹部内に金属配線層を形成することができ、基板表面に異物めっき層が残ることはない。 【解決手段】金属属配線層形成方法は、基板２の凹部３の底面３ａに設けられたタングステンまたはタングステン合金４上に、保護層としての第１めっき層７を形成する工程と、基板２の表面２ａ上の異物めっき層７ａを洗浄して除去する工程と、凹部３内の第１めっき層７上に第２めっき層８を形成する工程とを備えている。

Description

金属配線層形成方法、金属配線層形成装置および記憶媒体
　本発明は基板に対して金属配線層を形成する金属配線層形成方法、金属配線層形成装置および記憶媒体に関する。
　近年、ＬＳＩなどの半導体装置は、実装面積の省スペース化や処理速度の改善といった課題に対応するべく、より一層高密度化することが求められている。高密度化を実現する技術の一例として、複数の配線基板を積層することにより三次元ＬＳＩなどの多層基板を作製する多層配線技術が知られている。
　多層配線技術においては一般に、配線基板間の導通を確保するため、配線基板を貫通するとともに銅（Ｃｕ）などの導電性材料が埋め込まれた貫通ビアホールが配線基板に設けられている。
　ところで配線基板を作製する場合、導電性材料としてＣｕを用い、基板の凹部にＣｕを埋め込んでいるが、この場合、凹部内にＣｕ拡散防止膜としてのバリア膜を形成し、このバリア膜上にシード膜を無電解Ｃｕめっきにより形成する必要がある。このため配線層の配線容積が低下したり、埋め込まれたＣｕ中にボイドが発生することがある。一方、基板の凹部内に触媒を付与するとともに、Ｃｕの代わりにＣｏ系金属を無電解めっき法により凹部内に埋め込んで配線層として用いる技術が開発されている。この場合、凹部内のＣｏ系合金は、凹部底面に設けられた下部電極上にボトムアップ状に埋め込まれていく。
　しかしながら、基板の凹部内に触媒を付与する場合、この触媒が凹部側壁あるいは基板表面にも付着することがあり、この場合は、とりわけ基板表面に付着された触媒にもＣｏ系合金が成長していくことになり、この基板表面に形成されたＣｏ系合金のめっき層が異物めっき層として残ってしまう。この場合、この異物めっき層はその後の化学機械研磨法を用いて除去する必要がある。
特開２０１０－１８５１１３号公報
　本発明は、このような点を考慮してなされたものであり、基板表面に異物めっき層を残すことなく、基板の凹部内にめっき処理により金属配線層を容易かつ簡単に形成することができる金属配線層形成方法、金属配線層形成装置、および記憶媒体を提供することを目的とする。
　本発明は、基板に対して金属配線層を形成する金属配線層形成方法において、底面に下部電極が形成された凹部を有する基板を準備する工程と、前記基板に対して第１めっき処理を施すことにより、少なくとも前記凹部の下部電極上に保護層としての第１めっき層を形成する工程と、前記基板を洗浄して前記第１めっき層と同時に形成された基板表面に付着する異物めっき層を除去する工程と、前記基板に対して第２めっき処理を施すことにより、前記凹部内の前記第１めっき層上に第２めっき層を形成する工程と、を備えたことを特徴とする金属配線層形成方法である。
　本発明は、基板に対して金属配線層を形成する金属配線層形成装置において、底面に下部電極が形成された凹部を有する基板に対して第１めっき処理を施すことにより、少なくとも前記凹部の下部電極上に保護層としての第１めっき層を形成する第１めっき層形成部と、前記基板を洗浄して前記第１めっき層と同時に形成された基板表面に付着する異物めっき層を除去する異物めっき層洗浄部と、前記基板に対して第２めっき処理を施すことにより、前記凹部内の前記第１めっき層上に第２めっき層を形成する第２めっき層形成部と、を備えたことを特徴とする金属配線層形成装置である。
　本発明は、コンピュータに金属配線形成方法を実行させるためのコンピュータプログラムを格納した記憶媒体において、金属配線層形成方法は、基板に対して金属配線層を形成する金属配線層形成方法において、底面に下部電極が形成された凹部を有する基板を準備する工程と、前記基板に対して第１めっき処理を施すことにより、少なくとも前記凹部の下部電極上に保護層としての第１めっき層を形成する工程と、前記基板を洗浄して前記第１めっき層と同時に形成された基板表面に付着する異物めっき層を除去する工程と、前記基板に対して第２めっき処理を施すことにより、前記凹部内の前記第１めっき層上に第２めっき層を形成する工程と、を備えたことを特徴とする記憶媒体である。
　本発明によれば、基板表面に異物めっき層を残すことなく、基板の凹部内に金属配線層を容易かつ簡単に形成することができる。
図１（ａ）～（ｇ）は、本発明の一実施の形態における金属配線層形成方法が施される基板を示す図。 図２は、本発明の一実施の形態における金属配線層形成方法を示すフローチャート。 図３は、本発明の一実施の形態における金属配線層形成装置を示すブロック図。
　以下、図１乃至図３により本発明の一実施の形態について説明する。
　本発明による金属配線層形成方法は、図１（ａ）（ｂ）（ｃ）（ｄ）（ｅ）（ｆ）（ｇ）に示すように、凹部３を有する半導体ウエハ等からなるシリコン基板（以下、基板ともいう）２に対して金属配線層を形成するものである。
　図１（ａ）（ｂ）（ｃ）（ｄ）（ｅ）（ｆ）（ｇ）に示すように、基板２には底面３ａと側面３ｂとを有する凹部３が形成されている。
　この場合、基板２はＳｉ酸化膜からなり、凹部３の底面３ａには下部電極としてのタングステン（Ｗ）またはタングステン合金が埋め込まれている（図１（ａ）参照）。
　このような構成からなる基板２は、公知の方法により得ることができる。
　まずＳｉ酸化膜からなるシリコン基板２を準備する。次に基板２にエッチングにより凹部３が形成される。
　その後基板２の凹部３の底面３ａにＣＶＤによりタングステン（Ｗ）またはタングステン合金４が埋め込まれる。
　次に上述した凹部３を有する基板２に対して金属配線層を形成する金属配線層形成装置１０について、図３により説明する。
　このような金属配線層形成装置１０は、基板２に触媒を付与する触媒付与部１１と、基板２を予備洗浄して凹部３の底面３ａに設けられたタングステンまたはタングステン合金４に形成された触媒以外の触媒を除去する触媒洗浄部１２と、基板２に対して第１めっき処理を施して少なくともタングステンまたはタングステン合金４上に保護層としての第１めっき層７を形成する第１めっき層形成部１３と、基板２を洗浄して第１めっき層７と同時に形成された基板２の表面に付着する異物めっき層７ａを除去する異物めっき層洗浄部と、基板２に対して第２めっき処理を施すことにより、凹部３内の第１めっき層７上に第２めっき層８を形成する第２めっき層形成部１６とを備えている。
　また第１めっき層形成部１３と異物めっき層洗浄部１５との間に、基板２に対してＵＶ処理または加熱処理を施すことにより、異物めっき層７ａの除去を容易とするＵＶ処理部または加熱処理部１４が設けられている。
　また上述した金属配線層形成装置１０の各構成部材、例えば触媒付与部１１、触媒洗浄部１２、第１めっき層形成部１３、ＵＶ処理部または加熱処理部１４、異物めっき層洗浄部１５、および第２めっき層形成部１６は、いずれも制御装置２０に設けられた記憶媒体２１に記録された各種のプログラムに従って制御装置２０で駆動制御され、これによって基板２に対する様々な処理が行われる。ここで、記憶媒体２１は、各種の設定データや後述する金属配線層形成プログラム等の各種のプログラムを格納している。記憶媒体２１としては、コンピューターで読み取り可能なＲＯＭやＲＡＭなどのメモリーや、ハードディスク、ＣＤ－ＲＯＭ、ＤＶＤ－ＲＯＭやフレキシブルディスクなどのディスク状記憶媒体などの公知のものが使用されうる。
　次にこのような構成からなる本実施の形態の作用について、図１乃至図３により説明する。
　上述のように半導体ウエハ等からなる基板（シリコン基板）２に対して凹部３が形成され、凹部３が形成され凹部３の底面３ａにタングステンまたはタングステン合金４が設けられた基板２が本発明による金属配線層形成装置１０内に搬送される。この場合、基板２には底面３ａを有する凹部３が形成され、この凹部３の底面３ａは、タングステンまたはタングステン合金が設けられている（図１（ａ）参照）。
　ここで基板２に凹部３を形成する方法としては、従来公知の方法から適宜採用することができる。具体的には、例えば、ドライエッチング技術として、弗素系又は塩素系ガス等を用いた汎用的技術を適用できるが、特にアスペクト比（孔の深さ／孔の径）の大きな孔を形成するには、高速な深掘エッチングが可能なＩＣＰ－ＲＩＥ（Inductively Coupled Plasma Reactive Ion Etching：誘導結合プラズマ－反応性イオンエッチング）の技術の採用した方法をより好適に採用でき、特に、六フッ化硫黄（ＳＦ6）を用いたエッチングステップとＣ4Ｆ8などのテフロン（登録商標）系ガスを用いた保護ステップとを繰り返しながら行うボッシュプロセスと称される方法を好適に採用できる。
　次に金属配線層形成装置１０内において、図２および図３に示すように凹部３を有する基板２が触媒付与部１１へ送られ、この触媒付与部１１において基板２に対して触媒が付与される（図１（ｂ）参照）。
　次に触媒付与部１１における触媒付与工程について更に述べる。
　図１（ｂ）に示すように、触媒付与工程においては、例えば、基板２に対して、塩化パラジウムを原料とするPdイオンを含む水溶液をノズルにより吹き付け、触媒となるPdイオンを基板２の表面に吸着させる。Pdイオンは表面の材料に対して、付与しやすい材料と付与しにくい材料があり、底面3aのタングステンまたは、タングステン合金には付与しやすく、シリコン酸化膜には付与しにくいため、その違いを利用して底面3aに多く付与させることが可能である。
　あるいは基板２の凹部３のタングステンまたはタングステン合金４上および凹部３の側面３ｂおよび基板２の表面２ａに触媒５を形成する場合、めっき反応を促進することができる触媒作用を有する触媒、例えばナノ粒子からなる触媒を含む触媒溶液を用いてもよい。ここでナノ粒子とは、触媒作用を有する粒子であって、平均粒径が２０ｎｍ以下、例えば０．５ｎｍ～２０ｎｍの範囲内となっている粒子のことである。ナノ粒子を構成する元素としては、例えば、パラジウム、金、白金などが挙げられる。
　また、ナノ粒子を構成する元素として、ルテニウムが用いられてもよい。
　ナノ粒子の平均粒径を測定する方法が特に限られることはなく、様々な方法が用いられ得る。例えば、触媒溶液内のナノ粒子の平均粒径を測定する場合、動的光散乱法などが用いられ得る。動的光散乱法とは、触媒溶液内に分散しているナノ粒子にレーザー光を照射し、その散乱光を観察することにより、ナノ粒子の平均粒径などを算出する方法である。
　また、基板２の凹部３に吸着したナノ粒子の平均粒径を測定する場合、ＴＥＭやＳＥＭなどを用いて得られた画像から、所定の個数のナノ粒子、例えば２０個のナノ粒子を検出し、これらのナノ粒子の粒径の平均値を算出することもできる。
　次に、ナノ粒子からなる触媒が含まれる触媒溶液について説明する。触媒溶液は、触媒となるナノ粒子を構成する金属のイオンを含有するものである。例えばナノ粒子がパラジウムから構成されている場合、触媒溶液には、パラジウムイオン源として、塩化パラジウムなどのパラジウム化合物が含有されている。
　触媒溶液の具体的な組成は特には限られないが、好ましくは、触媒溶液の粘性係数が０．０１Ｐａ・ｓ以下となるよう触媒溶液の組成が設定されている。触媒溶液の粘性係数を上記範囲内とすることにより、基板２の凹部３の直径が小さい場合であっても、基板２の凹部３の底面３ａにまで触媒溶液を十分に行き渡らせることができる。このことにより、基板２の凹部３の底面３ａにまで触媒をより確実に吸着させることができる。
　好ましくは、触媒溶液中の触媒は、分散剤によって被覆されている。これによって、触媒の界面における界面エネルギーを小さくすることができる。従って、触媒溶液内における触媒の拡散をより促進することができ、このことにより、基板２の凹部３の底面３ａにまで触媒をより短時間で到達させることができると考えられる。また、複数の触媒が凝集してその粒径が大きくなることを防ぐことができ、このことによっても、触媒溶液内における触媒の拡散をより促進することができると考えられる。
　分散剤で被覆された触媒を準備する方法が特に限られることはない。例えば、予め分散剤で被覆された触媒を含む触媒溶液を用いてもよい。
　分散剤としては、具体的には、ポリビニルピロリドン（ＰＶＰ）、ポリアクリル酸（ＰＡＡ）、ポリエチレンイミン（ＰＥＩ）、テトラメチルアンモニウム（ＴＭＡ）、クエン酸等が好ましい。
　その他、特性を調整するための各種薬剤が触媒溶液に添加されていてもよい。
　このようにして触媒付与部１１において、凹部３の底面３ａに形成されたタングステンまたはタングステン合金４、凹部３の側面３ｂおよび基板２の表面２ａ上に触媒５が付与される。
　次に基板２は触媒付与部１１から触媒洗浄部１２に送られ、この触媒洗浄部１２において、例えばＤＨＦのような洗浄液を用いて基板２が予備洗浄される。このときタングステンまたはタングステン合金４上に形成された触媒５以外の触媒、すなわち凹部３の側面３ｂおよび基板２の表面２ａに形成された触媒５が除去される（図１（ｃ）参照）。
　この場合、上述のようにタングステンまたはタングステン合金４に対する触媒５の吸着力は、凹部３の側面３ｂおよび基板２の表面２ａに対する触媒５の吸着力より大きくなっているため、凹部３の側面３ｂおよび基板２の表面２ａに形成された触媒５を選択的に洗浄して除去することができる。
　次に基板２は触媒洗浄部１２から第１めっき層形成部１３に送られ、この第１めっき層形成部１３において、基板２に対してめっき液を供給して第１めっき処理を施すことにより、少なくとも凹部３の底面３ａに設けられたタングステンまたはタングステン合金４上に、保護層としての第１めっき層７が形成される。
　このとき図１（ｄ）に示すように、凹部３の側面３ｂおよび基板２の表面２ａ上に形成された触媒５は前工程で除去されているので、第１めっき処理を施しても凹部３の側面３ｂおよび基板２の表面２ａ上に第１めっき層７が形成されにくくなっている。しかしながら、触媒洗浄部１２で触媒５を除去しても、例えば基板２の表面２ａ上に触媒５が一部残ることも考えられ、この場合は第１めっき処理を施す際に、基板２の表面２ａ上に残る触媒５を介してめっき層７ａが形成される。この基板２の表面２ａ上に残るめっき層７ａは異物めっき層７ａであり、異物欠陥となるため、除去する必要がある。
　なお、第１めっき層７としては、触媒５を介して形成されたＣｏ、ＣｏＢ、ＣｏＰのようなコバルトまたはコバルト合金、あるいはＮｉ、ＮｉＢ、ＮｉＰのようなニッケルまたはニッケル合金製のめっき層が考えられる。
　次に基板２は第１めっき層形成部１３からＵＶ処理部または加熱処理部１４へ送られ、このＵＶ処理部または加熱処理部１４において基板２に対してＵＶ処理または加熱処理が施され、基板２の表面２ａに形成された異物めっき層７ａが加熱され、後述の異物めっき層洗浄部１５において基板２を洗浄することにより異物めっき層７ａを容易に除去することができる（図１（ｅ）参照）。
　次に基板２はＵＶ処理部または加熱処理部１４から異物めっき層洗浄部１５へ送られ、この異物めっき層洗浄部１５において基板２に対して有機酸を含む洗浄液を用いて洗浄処理が施される。この場合、基板２の表面２ａに形成された異物めっき層７ａは予めＵＶ処理または加熱処理されているため、この異物めっき層７ａを容易かつ簡単に除去することができる（図１（ｆ）参照）。
　次に基板２は異物めっき層洗浄部１５から第２めっき層形成部１６に送られ、この第２めっき層形成部１６において、基板２の凹部３内のタングステンまたはタングステン合金４上に形成された第１めっき層７上に、この第１めっき層７を触媒としてボトムアップ状に第２めっき層８を形成する。
　このようにして基板２の凹部３内に第２めっき層８を埋め込むことができる。この場合、第２めっき層８を構成する材料は、第１めっき層７を構成する材料と同一となっている。そして第１めっき層７と、第１めっき層７上に形成された第２めっき層８とによって金属配線層７，８が得られる。
　本実施の形態によれば、基板２の凹部３内に下部電極としてタングステンまたはタングステン合金４を形成し、このタングステンまたはタングステン合金４上に第１めっき層７と第２めっき層８を形成して、これら第１めっき層７と第２めっき層８を凹部３内に埋め込むことができる。また、タングステンまたはタングステン合金４上に第１めっき層７を保護層として形成し、次に第１めっき層７と同時に形成された基板２の表面２ａ上の異物めっき層７ａを除去し、その後凹部３内の第１めっき層７上に第２めっき層８を重ね合わせて形成したので、基板２の表面２ａに形成された異物めっき層７ａが異物欠陥として残ったり成長することはない。
　また基板２の表面２ａに形成された異物めっき層７ａが異常欠陥として残ることを未然に防止することができる。
　さらに基板２の表面２ａに異常欠陥として異物めっき層７ａが残ることはないので、この異常めっき層７ａを化学機械研磨により除去する必要はない。
　なお、上記実施の形態において、第１めっき層形成部１３、異物めっき層洗浄部１５および第２めっき層形成部１６は、同一のスピナーを用いて構成することができる。
　また、上記実施の形態において、ＵＶ処理部または加熱処理部１４は必ずしも用いる必要はない。さらにまた、基板２の凹部３の底面３ａに予めタングステンまたはタングステン合金４を設けた例を示したが、めっき層の材料によってはこのタングステンまたはタングステン合金４を除いてもよい。
２　基板
２ａ　表面
３　凹部
３ａ　底面
３ｂ　側面
４　タングステンまたはタングステン合金
５　触媒
７　第１めっき層
７ａ　異物めっき層
８　第２めっき層
１０　金属配線層形成装置
１１　触媒付与部
１２　触媒洗浄部
１３　第１めっき層形成部
１４　ＵＶ処理部または加熱処理部
１６　第２めっき層形成部
２０　制御装置
２１　記憶媒体

Claims (8)

  1. 　基板に対して金属配線層を形成する金属配線層形成方法において、
    　底面に下部電極が形成された凹部を有する基板を準備する工程と、
    　前記基板に対して第１めっき処理を施すことにより、少なくとも前記凹部の下部電極上に保護層としての第１めっき層を形成する工程と、
    　前記基板を洗浄して前記第１めっき層と同時に形成された基板表面に付着する異物めっき層を除去する工程と、
    　前記基板に対して第２めっき処理を施すことにより、前記凹部内の前記第１めっき層上に第２めっき層を形成する工程と、を備えたことを特徴とする金属配線層形成方法。
  2. 　前記異物めっき層を除去する工程の前に、前記基板に対して触媒を付与する工程と、
    　前記基板を予備洗浄して前記下部電極に形成された触媒以外の触媒を除去する工程とを更に備えたことを特徴とする請求項１記載の金属配線層形成方法。
  3. 　前記第１めっき層を形成する工程と、前記異物めっき層を除去する工程との間に、前記基板に対してＵＶ処理または加熱処理を施して前記異物めっき層の除去を容易とすることを特徴とする請求項１または２記載の金属配線層形成方法。
  4. 　前記下部電極はタングステンまたはタングステン合金を含み、前記第１めっき層および前記第２めっき層はコバルトまたはコバルト合金を含むことを特徴とする請求項１乃至３のいずれか記載の金属配線層形成方法。
  5. 　基板に対して金属配線層を形成する金属配線層形成装置において、
    　底面に下部電極が形成された凹部を有する基板に対して第１めっき処理を施すことにより、少なくとも前記凹部の下部電極上に保護層としての第１めっき層を形成する第１めっき層形成部と、
    　前記基板を洗浄して前記第１めっき層と同時に形成された基板表面に付着する異物めっき層を除去する異物めっき層洗浄部と、
    　前記基板に対して第２めっき処理を施すことにより、前記凹部内の前記第１めっき層上に第２めっき層を形成する第２めっき層形成部と、を備えたことを特徴とする金属配線層形成装置。
  6. 　前記基板に対して触媒を付与する触媒付与部と、
    　前記基板を予備洗浄して前記下部電極に形成された触媒以外の触媒を除去する触媒洗浄部を更に備えたことを特徴とする請求項５記載の金属配線層形成装置。
  7. 　前記基板に対してＵＶ処理または加熱処理を施して前記異物めっき層の除去を容易とするＵＶ処理部または加熱処理部を設けたことを特徴とする請求項５または６記載の金属配線層形成装置。
  8. 　コンピュータに金属配線形成方法を実行させるためのコンピュータプログラムを格納した記憶媒体において、
    　金属配線層形成方法は、
    　基板に対して金属配線層を形成する金属配線層形成方法において、
    　底面に下部電極が形成された凹部を有する基板を準備する工程と、
    　前記基板に対して第１めっき処理を施すことにより、少なくとも前記凹部の下部電極上に保護層としての第１めっき層を形成する工程と、
    　前記基板を洗浄して前記第１めっき層と同時に形成された基板表面に付着する異物めっき層を除去する工程と、
    　前記基板に対して第２めっき処理を施すことにより、前記凹部内の前記第１めっき層上に第２めっき層を形成する工程と、を備えたことを特徴とする記憶媒体。
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