WO2018003269A1 - Dispositif d'inspection de substrat - Google Patents

Dispositif d'inspection de substrat Download PDF

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Publication number
WO2018003269A1
WO2018003269A1 PCT/JP2017/016645 JP2017016645W WO2018003269A1 WO 2018003269 A1 WO2018003269 A1 WO 2018003269A1 JP 2017016645 W JP2017016645 W JP 2017016645W WO 2018003269 A1 WO2018003269 A1 WO 2018003269A1
Authority
WO
WIPO (PCT)
Prior art keywords
test
test program
program
semiconductor device
prober
Prior art date
Application number
PCT/JP2017/016645
Other languages
English (en)
Japanese (ja)
Inventor
克昌 杉山
淳夫 三井
豊 小菅
健一 成川
慎吾 森田
Original Assignee
東京エレクトロン株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 東京エレクトロン株式会社 filed Critical 東京エレクトロン株式会社
Publication of WO2018003269A1 publication Critical patent/WO2018003269A1/fr

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Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
    • G01R31/00—Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
    • G01R31/28—Testing of electronic circuits, e.g. by signal tracer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G06F11/22—Detection or location of defective computer hardware by testing during standby operation or during idle time, e.g. start-up testing
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/44—Arrangements for executing specific programs

Abstract

L'invention concerne un dispositif d'inspection de substrat capable d'empêcher le désagrément d'un utilisateur par rapport au développement d'un programme d'essai. Un dispositif d'essai 10 qui exécute un essai niveau système au niveau tranche comprend un environnement de développement 34 pour un programme d'essai, l'environnement de développement comprenant : une unité d'interface utilisateur 27 permettant à un utilisateur d'éditer le programme d'essai; et un moteur de programme d'essai 28 qui compile, exécute et débogue le programme d'essai.
PCT/JP2017/016645 2016-06-28 2017-04-20 Dispositif d'inspection de substrat WO2018003269A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016127742A JP2018006406A (ja) 2016-06-28 2016-06-28 基板検査装置
JP2016-127742 2016-06-28

Publications (1)

Publication Number Publication Date
WO2018003269A1 true WO2018003269A1 (fr) 2018-01-04

Family

ID=60786534

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2017/016645 WO2018003269A1 (fr) 2016-06-28 2017-04-20 Dispositif d'inspection de substrat

Country Status (3)

Country Link
JP (1) JP2018006406A (fr)
TW (1) TW201810478A (fr)
WO (1) WO2018003269A1 (fr)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102569335B1 (ko) * 2019-01-22 2023-08-22 주식회사 아도반테스토 커맨드 오류 처리를 위해 하나 이상의 테스트 대상 디바이스를 테스트하기 위한 자동 테스트 장비, 하나 이상의 테스트 대상 디바이스의 자동 테스트를 위한 방법 및 컴퓨터 프로그램
TWI822833B (zh) * 2019-08-15 2023-11-21 優顯科技股份有限公司 電子探測板、光電探測模組、與電子探測方法
TWI772189B (zh) * 2021-09-24 2022-07-21 英業達股份有限公司 硬碟模擬裝置及應用該裝置的測試系統及其測試方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090224793A1 (en) * 2008-03-07 2009-09-10 Formfactor, Inc. Method And Apparatus For Designing A Custom Test System
JP2010043993A (ja) * 2008-08-15 2010-02-25 Yokogawa Electric Corp 半導体テスト装置
JP2012181034A (ja) * 2011-02-28 2012-09-20 Yokogawa Electric Corp 半導体試験装置
JP2013531779A (ja) * 2010-05-05 2013-08-08 テラダイン、 インコーポレイテッド 半導体デバイスの同時試験のためのシステム

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20090224793A1 (en) * 2008-03-07 2009-09-10 Formfactor, Inc. Method And Apparatus For Designing A Custom Test System
JP2010043993A (ja) * 2008-08-15 2010-02-25 Yokogawa Electric Corp 半導体テスト装置
JP2013531779A (ja) * 2010-05-05 2013-08-08 テラダイン、 インコーポレイテッド 半導体デバイスの同時試験のためのシステム
JP2012181034A (ja) * 2011-02-28 2012-09-20 Yokogawa Electric Corp 半導体試験装置

Also Published As

Publication number Publication date
JP2018006406A (ja) 2018-01-11
TW201810478A (zh) 2018-03-16

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