WO2017177521A1 - 阵列基板及液晶显示面板 - Google Patents

阵列基板及液晶显示面板 Download PDF

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Publication number
WO2017177521A1
WO2017177521A1 PCT/CN2016/084765 CN2016084765W WO2017177521A1 WO 2017177521 A1 WO2017177521 A1 WO 2017177521A1 CN 2016084765 W CN2016084765 W CN 2016084765W WO 2017177521 A1 WO2017177521 A1 WO 2017177521A1
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Prior art keywords
layer
thin film
disposed
color
substrate
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PCT/CN2016/084765
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English (en)
French (fr)
Inventor
邓竹明
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深圳市华星光电技术有限公司
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Priority to US15/305,187 priority Critical patent/US20180164634A1/en
Publication of WO2017177521A1 publication Critical patent/WO2017177521A1/zh

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Classifications

    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1335—Structural association of cells with optical devices, e.g. polarisers or reflectors
    • G02F1/133509—Filters, e.g. light shielding masks
    • G02F1/133514—Colour filters
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136222—Colour filters incorporated in the active matrix substrate
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/15—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on an electrochromic effect
    • G02F1/163—Operation of electrochromic cells, e.g. electrodeposition cells; Circuit arrangements therefor
    • G02F2001/1635—Operation of electrochromic cells, e.g. electrodeposition cells; Circuit arrangements therefor the pixel comprises active switching elements, e.g. TFT

Definitions

  • the present invention relates to the field of liquid crystal displays, and more particularly to an array substrate and a liquid crystal display panel.
  • the current liquid crystal display device adds a color film on the array substrate, thereby realizing RGB three primary colors on the array substrate, thereby avoiding the alignment of the array substrate and the color film substrate. Operation, so that the liquid crystal display device can perform better full color display.
  • COA Color Filter on array
  • the COA array substrate includes a substrate substrate layer 101.
  • a first metal layer 102 is disposed on the substrate substrate layer 101 for forming scan lines and a thin film field effect. a gate region of the transistor; a gate insulating layer 103 disposed on the first metal layer 102; a semiconductor layer 104 disposed on the gate insulating layer 103 for forming a trench of the thin film field effect transistor a second metal layer 105 disposed on the semiconductor layer 104 for forming a source region of the thin film field effect transistor, a drain region of the thin film field effect transistor, and a data line; a first passivation layer 106, disposed on the second metal layer 105 and the gate insulating layer 103; a color resist layer 107 disposed on the first passivation layer 106 for forming a color filter; A layer 108 is disposed on the color resist layer 107; and a pixel electrode layer 109 is disposed on the second passivation layer
  • the first passivation layer 106, the color resist layer 107 and the second passivation layer 108 are both required to be opened.
  • the first passivation layer 106 After the opening is formed, the color resist layer 107 is formed, and after the color resist layer 107 is opened, the second passivation layer 108 is formed, and then the opening 110 of the second passivation layer 108 is formed, due to the alignment deviation on the process.
  • the holes of the first passivation layer 106 and the second passivation layer 108 and the holes of the color resist layer 107 do not completely coincide with the center of the holes, which will affect the amount of overlap of the first passivation layer 106 and the second passivation layer 108.
  • the lengths of L1 and L2 are indicated by dashed lines, wherein L1 and L2 are the overlap amounts of the first passivation layer 106 and the second passivation layer 108 on both sides of the opening 110, respectively.
  • the holes of the first passivation layer 106 and the second passivation layer 108 are shifted to the right side with respect to the opening of the color resist layer 107, then L2 is smaller than L1, the length of L2, the first passivation layer 106 and the second blunt The layer 108 overlaps less. If the offset of the two holes is too large, the one end of the first passivation layer 106 and the second passivation layer 108 overlaps, and the protection of the color resistance is not good, and the bubbles in the color resistance are easily oozing out, resulting in CF. Opening (CF There are often bubbles in the open), which affect the use of the product.
  • the technical problem to be solved by the present invention is to provide an array substrate and a liquid crystal display panel capable of avoiding generation of air bubbles at the CF opening.
  • the present invention provides an array substrate, comprising: a substrate substrate layer;
  • a thin film transistor disposed on the substrate substrate layer, the thin film transistor comprising: a first metal layer disposed on the substrate substrate layer for forming a scan line and a gate region of the thin film field effect transistor An insulating layer disposed on the first metal layer; a semiconductor layer disposed on the first insulating layer for forming a channel of the thin film field effect transistor; and a second metal layer disposed at the a semiconductor layer for forming a source region of the thin film field effect transistor, a drain region of the thin film field effect transistor, and a data line; a first passivation layer disposed on the thin film transistor, The first passivation layer has a first via hole exposing a drain region of the thin film transistor; a color resist layer disposed on the first passivation layer for forming color filter a coloring layer having a second via hole corresponding to the first via hole to expose a drain region of the thin film transistor, wherein a diameter of the second via hole is larger than The aperture of the first via hole, the color resist layer a plurality
  • the present invention also provides an array substrate comprising: a substrate substrate layer; a thin film transistor disposed on the substrate substrate layer; a first passivation layer disposed on the thin film transistor, the first blunt
  • the layer has a first via hole exposing a drain region of the thin film transistor; a color resist layer disposed on the first passivation layer for forming a color filter,
  • the color resist layer has a second via hole corresponding to the first via hole to expose a drain region of the thin film transistor; a pixel electrode layer disposed on the color resist layer And electrically connecting to the drain region of the thin film transistor through the first via hole and the second via hole for forming a pixel electrode; and a second passivation layer disposed on the pixel electrode layer.
  • the thin film transistor includes: a first metal layer disposed on the substrate substrate layer for forming a scan line and a gate region of the thin film field effect transistor; and a first insulating layer disposed at the first a metal layer disposed on the first insulating layer for forming a channel of the thin film field effect transistor; a second metal layer disposed on the semiconductor layer for forming the semiconductor layer a source region of the thin film field effect transistor, a drain region of the thin film field effect transistor, and a data line.
  • a diameter of the second through hole is larger than an aperture of the first through hole.
  • the color resist layer includes a plurality of color resists, and the second through holes are formed between two adjacent color resists.
  • the color resist layer includes R color resistance, G color resistance, and B color resistance.
  • the present invention also provides a liquid crystal display panel comprising an array substrate and a glass substrate disposed opposite to the array substrate, wherein the array substrate and the glass substrate are filled with liquid crystal, and the array substrate comprises: a substrate a substrate layer; a thin film transistor disposed on the substrate substrate layer; a first passivation layer disposed on the thin film transistor, the first passivation layer having a first via, the first pass a hole exposing a drain region of the thin film transistor; a color resist layer disposed on the first passivation layer for forming a color filter, the color resist layer having a second via hole, the first a second via hole corresponding to the first via hole to expose a drain region of the thin film transistor; a pixel electrode layer disposed on the color resist layer and passing through the first via hole and the second via hole And electrically connected to the drain region of the thin film transistor for forming a pixel electrode; and a second passivation layer disposed on the pixel electrode layer.
  • the thin film transistor includes: a first metal layer disposed on the substrate substrate layer for forming a scan line and a gate region of the thin film field effect transistor; and a first insulating layer disposed at the first a metal layer disposed on the first insulating layer for forming a channel of the thin film field effect transistor; a second metal layer disposed on the semiconductor layer for forming the semiconductor layer a source region of the thin film field effect transistor, a drain region of the thin film field effect transistor, and a data line.
  • a diameter of the second through hole is larger than an aperture of the first through hole.
  • the color resist layer includes a plurality of color resists, and the second through holes are formed between two adjacent color resists.
  • the color resist layer includes R color resistance, G color resistance, and B color resistance.
  • the invention has the advantages that the pixel electrode layer is disposed under the second passivation layer, that is, the pixel electrode layer is completed first, and then the second passivation layer is formed, so that the connection between the pixel electrode layer and the drain region of the thin film transistor does not need to be worn. Passing through the second passivation layer, therefore, in the display region, there is no need to open a hole in the second passivation layer, maintaining the entire surface of the second passivation layer, and having a second passivation layer with a full facet The color resistance is strong and can avoid the generation of air bubbles at the second through hole.
  • 1 is a schematic structural view of a conventional COA array substrate
  • FIG. 2 is a schematic structural view of an array substrate of the present invention
  • FIG. 3 is a schematic structural view of a liquid crystal display panel of the present invention.
  • an array substrate of the present invention includes a substrate substrate layer 201, a thin film transistor 202, a first passivation layer 203, a color resist layer 204, a pixel electrode layer 205, and a second passivation layer 206.
  • the substrate substrate layer 201 may be made of glass for use as a substrate of the thin film transistor 202.
  • the thin film transistor 202 is disposed on the substrate substrate layer 201.
  • the thin film transistor 202 includes a first metal layer 301, a first insulating layer 302, a semiconductor layer 303, and a second metal layer 304.
  • the first metal layer 301 is disposed on the substrate substrate layer 201 for forming a scan line (not shown in the drawing) and a gate region of the thin film transistor 202.
  • the material of the first metal layer 301 may be chromium, molybdenum, aluminum or copper or the like.
  • the first insulating layer 302 is disposed on the first metal layer 301 for use as a gate insulating layer, and the first insulating layer 302 may be a silicon nitride layer or the like.
  • the semiconductor layer 303 is disposed on the first insulating layer 302 for forming a channel of the thin film transistor 202, and the semiconductor layer 303 may be an amorphous silicon layer.
  • the second metal layer 304 is disposed on the semiconductor layer 303 for forming a source region 401 of the thin film transistor, a drain region 402 of the thin film transistor, and a data line (not shown in the drawing).
  • the material of the second metal layer 304 may be chromium, molybdenum, aluminum or copper or the like.
  • the first passivation layer 203 is disposed on the thin film transistor, the first passivation layer 203 has a first via 501, and the first via 501 exposes a drain region of the thin film transistor 202. 402.
  • the color resist layer 204 is disposed on the first passivation layer 203 for forming a color filter, for example, a red-green-blue resist, a black matrix, or the like.
  • the color resist layer 204 has a second via 601 corresponding to the first via 501 to expose the drain region 402 of the thin film transistor.
  • the aperture of the second via hole 601 is larger than the aperture of the first via hole 501, so that the drain region 402 exposed by the first via hole 501 is completely exposed from the second via hole 601 while The alignment between the second through hole 601 and the first through hole 501 may be facilitated to prevent the second through hole 601 from being offset from the center line of the first through hole 501.
  • the color resist layer 204 includes a plurality of color resists, and the second through holes 601 are formed between two adjacent color resists.
  • the color resistance is, for example, R color resistance, G color resistance, B color resistance, and W color resistance.
  • the second via 601 is disposed between R color resistance and G color resistance.
  • the pixel electrode layer 205 is disposed on the color resist layer 204 and electrically connected to the drain region 402 of the thin film transistor through the first via hole 501 and the second via hole 601 for forming a pixel electrode.
  • the material of the pixel electrode layer 205 may be lanthanum tin oxide or lanthanum oxynitride or the like.
  • the pixel electrode layer 205 covers all of the color resist layer 204 and covers the first passivation layer 203 exposed from the second via hole 601 and the drain region exposed from the first via hole 501. 402.
  • the second passivation layer 206 is disposed on the pixel electrode layer 205. In the second via hole 601 region, the second passivation layer 206 also covers the pixel electrode layer 205. The second passivation layer 206 is disposed on the pixel electrode layer 205. When the pixel electrode layer 205 is electrically connected to the drain region 402, it is not necessary to open a hole in the second passivation layer 206.
  • the second passivation layer has a full surface property, and the second passivation layer having a full surface property has strong protection against color resistance, and bubbles are prevented from being generated at the second via hole 601.
  • the present invention further provides a liquid crystal display panel including an array substrate 200 and a glass substrate 300 disposed opposite to the array substrate 200.
  • the array substrate 200 and the glass substrate 300 are filled with liquid crystal. 400.
  • the array substrate 200 includes a substrate substrate layer 201, a thin film transistor 202, a first passivation layer 203, a color resist layer 204, a pixel electrode layer 205, and a second passivation layer 206.
  • the specific structure of the array substrate 200 of the liquid crystal display panel is the same as or similar to that of the array substrate described above. For details, refer to the related description of the array substrate.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Liquid Crystal (AREA)

Abstract

一种阵列基板(200)及液晶显示面板，所述阵列基板(200)包括：基板衬底层(201)；薄膜晶体管(202)，设置在基板衬底层(201)上；第一钝化层(203)，设置在薄膜晶体管(202)上，第一钝化层(203)具有第一通孔(501)，第一通孔(501)暴露出薄膜晶体管(202)的漏极区(402)；色阻层(204)，设置在第一钝化层(203)上，用于形成彩色滤光片，色阻层(204)具有一第二通孔(601)，第二通孔(601)对应第一通孔(501)，以暴露出薄膜晶体管(202)的漏极区(402)；像素电极层(205)，设置在色阻层(204)上，并通过第一通孔(501)及第二通孔(601)与薄膜晶体管(202)的漏极区(402)电连接，用于形成像素电极；第二钝化层(206)，设置在像素电极层(205)上。其优点在于，像素电极层(205)与第二金属层（304）的连接不需要穿过第二钝化层(206)，因此，第二钝化层(206)不用再挖洞，整面性的第二钝化层(206)对色阻的保护能力强，可避免气泡产生。

Description

阵列基板及液晶显示面板 技术领域
本发明涉及液晶显示器领域，尤其涉及一种阵列基板及液晶显示面板。
 背景技术
随着科技的发展，液晶显示装置的应用越来越多。为了实现液晶显示装置较好的彩色显示，现在的液晶显示装置在阵列基板上增加了一层彩膜，从而在阵列基板上就实现了RGB三基色，避免了阵列基板和彩膜基板的对位操作，以便液晶显示装置更好的进行全彩显示。上述技术被称为COA(Color Filter on array)技术。
参见图1，现有的COA阵列基板的结构如下，所述COA阵列基板包括基板衬底层101；第一金属层102，设置在所述基板衬底层101上，用于形成扫描线以及薄膜场效应晶体管的栅极区；栅极绝缘层103，设置在所述第一金属层上102上；半导体层104，设置在所述栅极绝缘层103上，用于形成所述薄膜场效应晶体管的沟道；第二金属层105，设置在所述半导体层104上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线；第一钝化层106，设置在所述第二金属层105和所述栅极绝缘层103上；色阻层107，设置在所述第一钝化层106上，用于形成彩色滤光片；第二钝化层108，设置在所述色阻层107上；以及像素电极层109，设置在所述第二钝化层108上。
为实现像素电极层109与第二金属层105的电性连接，第一钝化层106、色阻层107及第二钝化层108均需开孔，一般情况下，第一钝化层106制作开孔后，制作色阻层107，色阻层107开孔后，再制作第二钝化层108，然后在制作第二钝化层108的开孔110，而由于制程上的对位偏差，第一钝化层106和第二钝化层108的孔与色阻层107的孔并不能孔中心完全重合，将影响第一钝化层106和第二钝化层108的重叠量。如图1中L1及L2所标示，采用虚线标示出L1及L2的长度，其中L1及L2分别为在开孔110两侧第一钝化层106和第二钝化层108的重叠量，所述第一钝化层106和第二钝化层108的孔相对于色阻层107的开孔向右侧偏移，则L2小于L1，L2长度处，第一钝化层106和第二钝化层108重叠较少。若两孔的偏移过大，所述第一钝化层106和第二钝化层108重叠较少的一端对色阻的保护作用不佳，色阻内的气泡易渗出，造成在CF开孔（CF open）处常有气泡（bubble）产生，影响产品使用。
 技术问题
本发明所要解决的技术问题是，提供一种阵列基板及液晶显示面板，其能够避免在CF开孔处产生气泡。
 技术解决方案
为了解决上述问题，本发明提供了一种阵列基板，其中，包括：一基板衬底层；
一薄膜晶体管，设置在所述基板衬底层上，所述薄膜晶体管包括：一第一金属层，设置在所述基板衬底层上，用于形成扫描线以及薄膜场效应晶体管的栅极区一第一绝缘层，设置在所述第一金属层上；一半导体层，设置在所述第一绝缘层上，用于形成所述薄膜场效应晶体管的沟道；一第二金属层，设置在所述半导体层上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线；一第一钝化层，设置在所述薄膜晶体管上，所述第一钝化层具有一第一通孔，所述第一通孔暴露出所述薄膜晶体管的漏极区；一色阻层，设置在所述第一钝化层上，用于形成彩色滤光片，所述色阻层具有一第二通孔，所述第二通孔对应所述第一通孔，以暴露出所述薄膜晶体管的漏极区，所述第二通孔的孔径大于所述第一通孔的孔径，所述色阻层包括多个色阻，相邻的两个色阻之间形成所述第二通孔；一像素电极层，设置在所述色阻层上，并通过所述第一通孔及第二通孔与所述薄膜晶体管的漏极区电连接，用于形成像素电极；一第二钝化层，设置在所述像素电极层上
本发明还提供了一种阵列基板，包括：一基板衬底层；一薄膜晶体管，设置在所述基板衬底层上；一第一钝化层，设置在所述薄膜晶体管上，所述第一钝化层具有一第一通孔，所述第一通孔暴露出所述薄膜晶体管的漏极区；一色阻层，设置在所述第一钝化层上，用于形成彩色滤光片，所述色阻层具有一第二通孔，所述第二通孔对应所述第一通孔，以暴露出所述薄膜晶体管的漏极区；一像素电极层，设置在所述色阻层上，并通过所述第一通孔及第二通孔与所述薄膜晶体管的漏极区电连接，用于形成像素电极；一第二钝化层，设置在所述像素电极层上。
进一步，所述薄膜晶体管包括：一第一金属层，设置在所述基板衬底层上，用于形成扫描线以及薄膜场效应晶体管的栅极区；一第一绝缘层，设置在所述第一金属层上；一半导体层，设置在所述第一绝缘层上，用于形成所述薄膜场效应晶体管的沟道；一第二金属层，设置在所述半导体层上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线。
进一步，所述第二通孔的孔径大于所述第一通孔的孔径。
进一步，所述色阻层包括多个色阻，相邻的两个色阻之间形成所述第二通孔。
进一步，所述色阻层包括R色阻、G色阻及B色阻。
本发明还提供一种液晶显示面板，包括一阵列基板及与所述阵列基板相对设置的玻璃基板，在所述阵列基板与所述玻璃基板之间填充有液晶，所述阵列基板包括：一基板衬底层；一薄膜晶体管，设置在所述基板衬底层上；一第一钝化层，设置在所述薄膜晶体管上，所述第一钝化层具有一第一通孔，所述第一通孔暴露出所述薄膜晶体管的漏极区；一色阻层，设置在所述第一钝化层上，用于形成彩色滤光片，所述色阻层具有一第二通孔，所述第二通孔对应所述第一通孔，以暴露出所述薄膜晶体管的漏极区；一像素电极层，设置在所述色阻层上，并通过所述第一通孔及第二通孔与所述薄膜晶体管的漏极区电连接，用于形成像素电极；一第二钝化层，设置在所述像素电极层上。
进一步，所述薄膜晶体管包括：一第一金属层，设置在所述基板衬底层上，用于形成扫描线以及薄膜场效应晶体管的栅极区；一第一绝缘层，设置在所述第一金属层上；一半导体层，设置在所述第一绝缘层上，用于形成所述薄膜场效应晶体管的沟道；一第二金属层，设置在所述半导体层上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线。
进一步，所述第二通孔的孔径大于所述第一通孔的孔径。
进一步，所述色阻层包括多个色阻，相邻的两个色阻之间形成所述第二通孔。
进一步，所述色阻层包括R色阻、G色阻及B色阻。
 有益效果
本发明的优点在于，将像素电极层设置在第二钝化层之下，即先完成像素电极层，再制作第二钝化层，使得像素电极层与薄膜晶体管漏极区的连接不需要穿过第二钝化层，因此，在显示区，不需要在所述第二钝化层上开孔，保持了第二钝化层的整面性，具有整面性的第二钝化层对色阻的保护能力强，可避免在第二通孔处产生气泡。
 附图说明
图1是现有的COA阵列基板的结构示意图；
图2是本发明阵列基板的结构示意图；
图3是本发明液晶显示面板的结构示意图。
 本发明的最佳实施方式
下面结合附图对本发明提供的阵列基板及液晶显示面板的具体实施方式做详细说明。
参见图2，本发明一种阵列基板包括一基板衬底层201、一薄膜晶体管202、一第一钝化层203、一色阻层204、一像素电极层205及一第二钝化层206。
所述基板衬底层201可以采用玻璃制成，用于作为薄膜晶体管202的基板。所述薄膜晶体管202设置在所述基板衬底层201上。
所述薄膜晶体管202包括一第一金属层301、一第一绝缘层302、一半导体层303及一第二金属层304。
所述第一金属层301设置在所述基板衬底层201上，用于形成扫描线（附图中未标示）以及薄膜晶体管202的栅极区。所述第一金属层301的材料可为铬、钥、铝或铜等。所述第一绝缘层302设置在所述第一金属层301上，用于作为栅极绝缘层，所述第一绝缘层302可为氮化硅层等。所述半导体层303设置在所述第一绝缘层302上，用于形成所述薄膜晶体管202的沟道，所述半导体层303可以为非晶硅层。所述第二金属层304设置在所述半导体层303上，用于形成所述薄膜晶体管的源极区401、所述薄膜晶体管的漏极区402以及数据线（附图中未标示），所述第二金属层304的材料可为铬、钥、铝或铜等。
所述第一钝化层203设置在所述薄膜晶体管上，所述第一钝化层203具有一第一通孔501，所述第一通孔501暴露出所述薄膜晶体管202的漏极区402。
所述色阻层204设置在所述第一钝化层203上，用于形成彩色滤光片，例如，红绿蓝色阻以及黑色矩阵等。所述色阻层204具有一第二通孔601，所述第二通孔601对应所述第一通孔501，以暴露出所述薄膜晶体管的漏极区402。优选地，所述第二通孔601的孔径大于所述第一通孔501的孔径，以使得第一通孔501暴露出的漏极区402从所述第二通孔601中完全暴露，同时，也可有利于所述第二通孔601与所述第一通孔501制程上的对位，防止所述第二通孔601与所述第一通孔501中心线偏移。
进一步，所述色阻层204包括多个色阻，相邻的两个色阻之间形成所述第二通孔601。所述色阻例如为R色阻、G色阻、B色阻及W色阻。例如，所述第二通孔601设置在R色阻与G色阻之间。
所述像素电极层205设置在所述色阻层204上，并通过所述第一通孔501及第二通孔601与所述薄膜晶体管的漏极区402电连接，用于形成像素电极，像素电极层205的材料可为氧化锢锡或氧化锢锌等。所述像素电极层205覆盖全部的色阻层204，并覆盖从所述第二通孔601中裸露出的第一钝化层203及从所述第一通孔501中裸露出的漏极区402。
所述第二钝化层206设置在所述像素电极层205上，在所述第二通孔601区域，所述第二钝化层206也覆盖所述像素电极层205上，因此，将所述第二钝化层206设置在所述像素电极层205之上，则所述像素电极层205与漏极区402电连接时，不需要在所述第二钝化层206上开孔，保持了第二钝化层的整面性，具有整面性的第二钝化层对色阻的保护能力强，可避免在第二通孔601处产生气泡。
参见图3，本发明还提供一种液晶显示面板，其包括阵列基板200及与所述阵列基板200相对设置的玻璃基板300，在所述阵列基板200与所述玻璃基板300之间填充有液晶400。参见图2，所述阵列基板200包括一基板衬底层201、一薄膜晶体管202、一第一钝化层203、一色阻层204、一像素电极层205及一第二钝化层206。所述液晶显示面板的阵列基板200的具体结构与上述的阵列基板的描述相同或相似，具体请参见上述阵列基板的相关描述。
以上所述仅是本发明的优选实施方式，应当指出，对于本技术领域的普通技术人员，在不脱离本发明原理的前提下，还可以做出若干改进和润饰，这些改进和润饰也应视为本发明的保护范围。

Claims (12)

  1. 一种阵列基板，其中，包括：
    一基板衬底层；
    一薄膜晶体管，设置在所述基板衬底层上，所述薄膜晶体管包括：
    一第一金属层，设置在所述基板衬底层上，用于形成扫描线以及薄膜场效应晶体管的栅极区；
    一第一绝缘层，设置在所述第一金属层上；
    一半导体层，设置在所述第一绝缘层上，用于形成所述薄膜场效应晶体管的沟道；
    一第二金属层，设置在所述半导体层上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线；
    一第一钝化层，设置在所述薄膜晶体管上，所述第一钝化层具有一第一通孔，所述第一通孔暴露出所述薄膜晶体管的漏极区；
    一色阻层，设置在所述第一钝化层上，用于形成彩色滤光片，所述色阻层具有一第二通孔，所述第二通孔对应所述第一通孔，以暴露出所述薄膜晶体管的漏极区，所述第二通孔的孔径大于所述第一通孔的孔径，所述色阻层包括多个色阻，相邻的两个色阻之间形成所述第二通孔；
    一像素电极层，设置在所述色阻层上，并通过所述第一通孔及第二通孔与所述薄膜晶体管的漏极区电连接，用于形成像素电极；
    一第二钝化层，设置在所述像素电极层上。
  2. 根据权利要求1所述的阵列基板，其中，所述色阻层包括R色阻、G色阻及B色阻。
  3. 一种阵列基板，其中，包括：
    一基板衬底层；
    一薄膜晶体管，设置在所述基板衬底层上；
    一第一钝化层，设置在所述薄膜晶体管上，所述第一钝化层具有一第一通孔，所述第一通孔暴露出所述薄膜晶体管的漏极区；
    一色阻层，设置在所述第一钝化层上，用于形成彩色滤光片，所述色阻层具有一第二通孔，所述第二通孔对应所述第一通孔，以暴露出所述薄膜晶体管的漏极区；
    一像素电极层，设置在所述色阻层上，并通过所述第一通孔及第二通孔与所述薄膜晶体管的漏极区电连接，用于形成像素电极；
    一第二钝化层，设置在所述像素电极层上。
  4. 根据权利要求3所述的阵列基板，其中，所述薄膜晶体管包括：
    一第一金属层，设置在所述基板衬底层上，用于形成扫描线以及薄膜场效应晶体管的栅极区；
    一第一绝缘层，设置在所述第一金属层上；
    一半导体层，设置在所述第一绝缘层上，用于形成所述薄膜场效应晶体管的沟道；
    一第二金属层，设置在所述半导体层上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线。
  5. 根据权利要求3所述的阵列基板，其中，所述第二通孔的孔径大于所述第一通孔的孔径。
  6. 根据权利要求3所述的阵列基板，其中，所述色阻层包括多个色阻，相邻的两个色阻之间形成所述第二通孔。
  7. 根据权利要求3所述的阵列基板，其中，所述色阻层包括R色阻、G色阻及B色阻。
  8. 一种液晶显示面板，包括一阵列基板及与所述阵列基板相对设置的玻璃基板，在所述阵列基板与所述玻璃基板之间填充有液晶，其中，所述阵列基板包括：一基板衬底层；
    一薄膜晶体管，设置在所述基板衬底层上；
    一第一钝化层，设置在所述薄膜晶体管上，所述第一钝化层具有一第一通孔，所述第一通孔暴露出所述薄膜晶体管的漏极区；
    一色阻层，设置在所述第一钝化层上，用于形成彩色滤光片，所述色阻层具有一第二通孔，所述第二通孔对应所述第一通孔，以暴露出所述薄膜晶体管的漏极区；
    一像素电极层，设置在所述色阻层上，并通过所述第一通孔及第二通孔与所述薄膜晶体管的漏极区电连接，用于形成像素电极；
    一第二钝化层，设置在所述像素电极层上。
  9. 根据权利要求8所述的阵列基板，其中，所述薄膜晶体管包括：
    一第一金属层，设置在所述基板衬底层上，用于形成扫描线以及薄膜场效应晶体管的栅极区；
    一第一绝缘层，设置在所述第一金属层上；
    一半导体层，设置在所述第一绝缘层上，用于形成所述薄膜场效应晶体管的沟道；
    一第二金属层，设置在所述半导体层上，用于形成所述薄膜场效应晶体管的源极区、所述薄膜场效应晶体管的漏极区以及数据线。
  10. 根据权利要求8所述的阵列基板，其中，所述第二通孔的孔径大于所述第一通孔的孔径。
  11. 根据权利要求8所述的阵列基板，其中，所述色阻层包括多个色阻，相邻的两个色阻之间形成所述第二通孔。
  12. 根据权利要求8所述的阵列基板，其中，所述色阻层包括R色阻、G色阻及B色阻。
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