WO2017142034A1 - Boîte à bornes pour panneau solaire photovoltaïque - Google Patents

Boîte à bornes pour panneau solaire photovoltaïque Download PDF

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Publication number
WO2017142034A1
WO2017142034A1 PCT/JP2017/005760 JP2017005760W WO2017142034A1 WO 2017142034 A1 WO2017142034 A1 WO 2017142034A1 JP 2017005760 W JP2017005760 W JP 2017005760W WO 2017142034 A1 WO2017142034 A1 WO 2017142034A1
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WO
WIPO (PCT)
Prior art keywords
terminal
bypass diode
solar cell
terminal box
slit
Prior art date
Application number
PCT/JP2017/005760
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English (en)
Japanese (ja)
Inventor
誠一郎 牧
久和 松井
嘉勲 朱
石田　淳
Original Assignee
オーナンバ株式会社
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Publication of WO2017142034A1 publication Critical patent/WO2017142034A1/fr

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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02S—GENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
    • H02S40/00—Components or accessories in combination with PV modules, not provided for in groups H02S10/00 - H02S30/00
    • H02S40/30—Electrical components
    • H02S40/34—Electrical components comprising specially adapted electrical connection means to be structurally associated with the PV module, e.g. junction boxes
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy

Definitions

  • the present invention relates to a solar cell panel terminal box having a built-in bypass diode module including a terminal plate and a bypass diode.
  • the present invention relates to a module built-in type solar cell panel terminal box in which the adhesion between the sealing resin filling the module and the terminal plate is improved.
  • a terminal box for taking out electric power from the solar cell panel is attached to the back surface of the solar cell panel.
  • a terminal box B is attached to the back surface of each solar cell panel P, and the terminal boxes B of the adjacent solar cell panels P are connected to the external connection cable 7. It is electrically connected via.
  • a module built-in type has been conventionally used.
  • a typical example thereof is a terminal box (solar cell module connector) as shown in Patent Document 1.
  • FIG. 1 shows the inside of a module built-in type terminal box of Patent Document 1
  • FIG. 2 shows the inside of the bypass diode module of FIG. 1 and 2
  • reference numeral 1 denotes a resin terminal box
  • reference numeral 2 denotes a bypass diode module built in the terminal box 1.
  • Reference numeral 3 denotes a terminal board, which is composed of at least a pair.
  • Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG.
  • Reference numeral 5 denotes a resin cover, which is configured to cover and seal the terminal plate 3 and the bypass diode 4 in the bypass diode module 2.
  • the cover 5 is formed by a transfer molding method, and the terminal plate 3 and the bypass diode 4 and the sealing resin forming the cover 5 are in close contact with each other.
  • 6 is a lead, which is a power take-out line from the solar cell panel.
  • 7 is an external connection cable for electrical connection between adjacent solar cell panels.
  • Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
  • a part of the terminal plate 3 protrudes from the bypass diode module 2 and is connected to the lead 6 and the external connection cable 7. Therefore, as can be seen from FIG. 1, the terminal plate 3 connected to the lead 6 is arranged to extend above the opening 8 for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1. Has been.
  • the lead 6 from the solar cell panel and the terminal plate 3 are connected by inserting the lead 6 into the opening 8 from the back side of the solar cell panel.
  • the lead 6 is superimposed on the wide surface of the terminal plate 3 facing the solar cell panel, and the overlapped portion is soldered from the back surface side of the solar cell panel.
  • the resin of the terminal box at the periphery of the opening 8 is not softened by the heat of the soldering iron to be deformed or generate a strange odor. It was necessary to make the area sufficiently large and to make the distance between the soldering iron and the periphery of the opening 8 sufficiently large.
  • the area of the opening of the terminal box is increased in this way, there is a problem that the size of the terminal box is necessarily increased accordingly.
  • Patent Document 2 In order to solve the problems of the conventional module built-in type terminal box including Patent Document 1, the applicant has already proposed a module built-in type terminal box as shown in Patent Document 2.
  • FIG. 3 shows the inside of the terminal box of Patent Document 2
  • FIG. 4 shows the inside of the bypass diode module of FIG. 3 and 4
  • 1 is a resin-made terminal box
  • 2 is a bypass diode module built in the terminal box 1.
  • Reference numeral 3 denotes a terminal board, which is composed of at least a pair.
  • the terminal board 3 is composed of portions 3A and 3A ′ protruding outside the bypass diode module, and a portion 3B located inside the bypass diode module.
  • the portion 3A is connected to the lead 6,
  • the portion 3A ′ is connected to the external connection cable 7.
  • Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG.
  • the bypass diode 4 includes a chip 9 and a lead leg portion 10.
  • Reference numeral 5 ′ denotes a resin-sealed package formed by, for example, a transfer molding method, and seals the terminal board 3 ⁇ / b> B and the bypass diode 4 in the bypass diode module 2 to insulate them.
  • 6 is a lead, which is a power take-out line from the solar cell panel.
  • 7 is an external connection cable for electrical connection between adjacent solar cell panels.
  • Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
  • the terminal box of Patent Document 2 shown in FIGS. 3 and 4 has a smaller area of the lead lead-in opening 8 than the terminal box of Patent Document 1 shown in FIGS. All of the terminal plate 3 is disposed at a location in the terminal box 1, and the lead 6 is connected to the wide surface of the terminal plate 3 on the side not facing the solar cell panel.
  • the present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is a module built-in type that does not deteriorate the electrical characteristics of the bypass diode even when subjected to a severe thermal shock test and has excellent durability over time. It is providing the terminal box for solar cell panels.
  • the present inventors have sought the cause of deterioration of the electrical characteristics of the bypass diode in the thermal shock test.
  • the interface between the sealing resin and the terminal plate in the bypass diode module was observed with an ultrasonic microscope. It has been found that there is a region where the sealing resin is peeled off from a part of the terminal board due to poor adhesion between the two and the terminal plate. Although this exfoliation area was very small, moisture around the bypass diode module entered the bypass diode module due to capillary action through the exfoliation area, and the chip part of the bypass diode was ion-contaminated by the intrusion moisture.
  • the present inventors further improve the adhesion between the sealing resin and the terminal plate, and further a means for preventing the separation between the sealing resin and the terminal plate leading to the capillary phenomenon.
  • a slit is formed in the terminal board so as to penetrate the terminal board, and when the bypass diode module filled with the sealing resin up to the periphery of the internal bypass diode chip is formed from the sealing resin by the transfer molding method, Allow the sealing resin to penetrate, further make the shape and orientation of the slits specific, further roughen the surface of the terminal board around the slit, and further constrict or slit in a specific part of the terminal board
  • the adhesion between the sealing resin and the terminal plate can be improved, and the separation between the sealing resin and the terminal plate leading to capillary action can be prevented. Heading was. As a result, even when subjected to severe thermal shock tests, the electrical characteristics of the bypass diode did not deteriorate, and long-term durability was achieved
  • a solar cell panel terminal box including a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the bypass diode module is filled with a sealing resin.
  • a solar cell panel terminal box including a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the bypass diode module is filled with a sealing resin.
  • a slit that penetrates the terminal plate is formed, the sealing resin passes through the slit, and the shape of the slit is elliptical or rectangular Alternatively, the rectangular diode is rounded, the bypass diode module has a substantially rectangular parallelepiped shape, and the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module.
  • the terminal box for solar cell panels in any one of.
  • a Schottky barrier diode structure including a Schottky barrier metal having a barrier height of 0.70 eV or less when the bypass diode is measured at a temperature of 300 K, a trench MOS diode structure having a trench, and a planar MOS diode structure Or a terminal box for a solar cell panel according to any one of (1) to (7), wherein the chip is combined into one chip by a combination thereof.
  • An opening for drawing the lead from the solar cell panel into the terminal box is provided on the side of the terminal box facing the solar cell panel, and the terminal plate is located at a location in the terminal box other than the position facing the opening.
  • the terminal box for a solar cell panel according to any one of (1) to (8), which is configured to be connected to a wide surface on the side.
  • the module built-in type terminal box of the present invention forms a slit penetrating through the terminal board, makes the shape of the slit specific, further roughens the surface of the terminal board, and further makes a specific part of the terminal board
  • the adhesion between the sealing resin and the terminal plate is greatly improved, so that the sealing resin does not peel from the terminal plate even when subjected to a severe thermal shock test. Accordingly, moisture does not enter due to capillary action, and ion contamination of the chip portion of the bypass diode can be prevented.
  • it is not affected by volumetric expansion due to vaporization of moisture that has entered the bypass diode or stress distortion due to differences in thermal expansion coefficients between the materials. Therefore, according to the present invention, it is possible to provide a terminal box for a solar cell panel in which the electrical characteristics of the bypass diode do not deteriorate for a long time.
  • FIG. 9 schematically shows the inside of still another form of bypass diode module used in the terminal box of the present invention.
  • FIG. 10 is a side view of the bypass diode module of FIG.
  • FIG. 11 is a perspective view of the bypass diode module of FIG.
  • FIG. 12 schematically shows a chip portion of a bypass diode including a MOS diode having a trench structure.
  • FIG. 13 is a schematic diagram showing the back surface of the solar cell panel.
  • FIG. 5 schematically shows the inside of the bypass diode module used in the terminal box of the present invention.
  • the terminal box of the present invention is attached to individual solar cell panels and used to safely insulate and take out electric power from the individual solar cell panels.
  • the inside of the terminal box of the present invention is the same as FIG. 3 showing the conventional terminal box unless the inside of the bypass diode module is exposed and shown as shown in FIG. FIG. 5 is drawn in contrast to FIG. 4 showing the inside of the bypass diode module of the terminal box of Patent Document 2, but the module built-in type terminal box of the present invention is shown in FIG.
  • the terminal box is not limited to a shape, and any terminal box of a type into which a pre-formed bypass diode module is fitted is included.
  • 1 is a resin terminal box, and 2 is a bypass diode module built in the terminal box 1.
  • Reference numeral 3 denotes a terminal board, which is composed of at least a pair.
  • the terminal board 3 is composed of portions 3A and 3A ′ projecting outside the bypass diode module and a portion 3B positioned inside the bypass diode module.
  • the portion 3A is connected to the lead 6 and 3A.
  • the portion ' is connected to the external connection cable 7.
  • the terminal board means a terminal board used for finally leading the current from the solar cell panel to the cable for external connection, by surface mounting, by lead or pin insertion, or The terminal board fixed to the printed circuit board by self-standing mounting is not included.
  • Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG.
  • the bypass diode 4 includes a chip 9 and a lead leg portion 10.
  • Reference numeral 5 ′ denotes a resin-sealed package formed by, for example, a transfer molding method, and seals the terminal board 3 ⁇ / b> B and the bypass diode 4 in the bypass diode module 2 to insulate them.
  • 6 is a lead, which is a power take-out line from the solar cell panel.
  • 7 is an external connection cable for electrical connection between adjacent solar cell panels.
  • Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
  • a slit 11 is formed in the plane of the terminal plate 3B positioned in the bypass diode module.
  • the shape of the slit is an elongated shape having a longitudinal direction and a short direction, such as an ellipse, a rectangle, or a rounded corner of the rectangle, it is preferable to consider the orientation of the slit on the terminal board 3B.
  • the longitudinal direction of the slit 11 is preferably substantially perpendicular to the longitudinal direction of the lead leg portion 10 of the bypass diode.
  • the shape of the bypass diode module is a substantially rectangular parallelepiped as shown in FIGS. 1 to 5, it is preferable that the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module.
  • the maximum width of a slit is 1/2 or less of the width
  • the maximum width of the slit refers to the maximum width among the widths of the slit viewed in the width direction of the terminal board in which the slit exists.
  • the maximum width of the slits indicates the maximum of the total widths of the respective slits. The greater the maximum width of the slit, the better the effect of improving the adhesion between the sealing resin and the terminal board.
  • the maximum width of the slit conversely, reduces the effective width of the terminal plate and places an upper limit on the amount of current that can flow through the terminal plate.
  • the maximum width of the slit is 1 ⁇ 2 or less of the width of the terminal plate in which the slit exists.
  • the difference between the height of the highest point of the peak portion on the roughened surface of the terminal board and the height of the lowest point of the valley portion adjacent to the peak portion is 10 ⁇ m or more. More preferably, it is 50 ⁇ m or more.
  • the difference in height is less than the above lower limit, the effect of improving the adhesion between the sealing resin and the terminal board may be inferior.
  • the upper limit of the difference in height is not particularly limited. For example, it is desirable that the difference in height is 1/3 or less of the thickness of the terminal board because of mechanical strength.
  • FIG. 10 is a side view of the bypass diode module of FIG. 6 as viewed from the direction A, and it can be understood that the portion 3A ′ has a U-shaped cross section.
  • 11 is a perspective view of the bypass diode module of FIG. As shown in FIG. 11, the U-shaped cross-section 3A ′ is provided with a narrow portion 3 ′′ and a wide portion 3 ′′ following the end of the terminal plate 3, and the narrow portion 3 ′′ is bent downward to widen the U-shaped cross section It can be formed by folding the part 3 "" horizontally from there and bending both sides of the wide part 3 "" upward from it.
  • the metal material constituting the U-shaped cross section 3A ′ (and the terminal plate 3) is not particularly limited as long as it has good electrical conductivity. For example, copper, iron, or an alloy of these metals and other metals Can be.
  • the U-shaped cross-section portion 3A ′ On the inner surface side of the U-shaped cross-section portion 3A ′, the outer peripheral surface at the tip of the external connection cable 7 is received in a state where the outer insulating coating is removed and the inner core wire 7 ′ is exposed. Thereafter, the U-shaped cross-section portion 3A ′ is caulked from the left and right so as to crush the U-shaped cross section, whereby the core wire 7 ′, which is the internal conductor of the external connection cable 7, is connected to the terminal plate.
  • the present inventors further examined from the viewpoint of preventing the deterioration of the electrical characteristics of the bypass diode.
  • the U-shaped cross-sectional portion 3A ′ is crushed in the operation of connecting the external connection cable 7 to the terminal plate. It has been found that mechanical stress is generated during the caulking, and when this mechanical stress is transmitted to the chip portion of the bypass diode through the terminal plate, the electrical characteristics of the chip portion may be deteriorated.
  • the terminal plate located in the bypass diode module adjacent to the U-shaped cross-section portion 3A ' It has been found that by forming the constriction 3C that reduces the width of the terminal plate plane, the mechanical stress can be relieved in the constriction 3C and the transmission of the mechanical stress to the chip portion can be effectively prevented.
  • the shape and size of the constriction are not particularly limited as long as the shape and size can effectively relieve the mechanical stress generated by crushing the U-shaped cross section.
  • the constriction can be formed not only on the left and right sides of the terminal board as shown in FIG. 6, but also on the right side of the terminal board as shown in the lower left circled part of FIG. 8 can also be formed only on the left side of the terminal board as shown in the circled portion at the lower left of FIG.
  • a horizontally long slit as shown in a circled portion in FIG. 9 is formed instead of the constriction, the mechanical stress can be relieved similarly to the constriction.
  • a Schottky barrier diode having a low forward voltage VF is preferably used from the viewpoint of efficiently suppressing heat generation of the diode chip when the bypass diode is activated.
  • a Schottky barrier diode including a Schottky barrier metal having a barrier height of 0.70 eV or less when measured at a temperature of 300K is preferable to use.
  • a chip in a form in which one chip is combined by using a MOS diode having a MOS structure in combination with a Schottky barrier diode chip may be used.
  • a trench MOS diode structure in which a trench is formed in the MOS diode instead of a planar structure may be used.
  • the diode chip can be downsized by changing the MOS structure from the planar to the trench.
  • the above-described barrier height is a barrier height ( ⁇ Bn ) of a Schottky barrier metal with respect to N-type silicon, and is a parameter generally used to express contact characteristics between an N-type semiconductor and a metal in the semiconductor field.
  • the barrier height is defined by the following equation. In the formula, k means Boltzmann constant, T means absolute temperature, q means unit charge, A ** means Richardson coefficient, Js means Schottky barrier area S Means the saturation current. Note that the Richardson coefficient is 120 A / cm 2 / k 2 in the case of N-type silicon.
  • the barrier height of the Schottky barrier metal in the Schottky barrier diode included therein is 0.70 eV or less when measured at a temperature of 300K. It is necessary to be 0.50 to 0.70 eV. It is known that the barrier height is proportional to the forward voltage drop VF of the diode when the Schottky barrier area S is constant. Therefore, the low barrier height of the diode chip means that the forward voltage drop of the diode is low, which means that the amount of heat generated during operation of the bypass diode is small.
  • FIG. 12 is a schematic view showing a cross-section of a chip in a form in which one chip is combined using a MOS diode having a MOS structure in combination with a Schottky barrier diode chip.
  • 12 is an N + type substrate
  • 13 is an N ⁇ type epitaxial layer
  • 14 is a Schottky barrier metal having a barrier height of 0.70 eV or less when measured at a temperature of 300K.
  • 15 is a surface electrode serving as an anode electrode
  • 16 is a MOS structure
  • 17 is a trench dug in the N ⁇ -type epitaxial layer 13
  • 18 is a multi-layer electrode.
  • a gate made of crystalline silicon, and 19 is a gate oxide film forming a MOS structure.
  • the Schottky electrode 14 and the gate 18 are in electrical contact with the surface electrode 15 serving as a common anode electrode for one-chip combination.
  • a cathode electrode common to a Schottky barrier diode and a MOS diode having an ohmic contact is disposed in a lower layer portion of the N + type silicon substrate 12.
  • a chip having a MOS chip combined with a Schottky barrier diode chip to form a single chip is characterized in that a trench 17 is formed from the N ⁇ type epitaxial layer 13 to the Schottky electrode 14, A gate 18 made of polycrystalline silicon is buried therein, and an oxide film 19 is formed between the trench 17 and the gate 18.
  • a trench gate structure By having such a trench gate structure, the unit cell area can be reduced, and as a result, the diode chip can be miniaturized. Further, by having such a MOS structure, the reverse current in the high temperature region of the diode chip can be reduced.
  • a Schottky barrier diode chip is used depending on the required characteristics of the bypass diode determined by the type and size of the solar cell panel in which the terminal box of the present invention is arranged, the number of cells, etc.
  • a chip having a single chip composite using a MOS diode having a MOS structure may be used.
  • a form of a trench MOS diode structure in which the gate is formed after the trench is dug in the silicon surface as shown in FIG. It can be appropriately selected in consideration of the presence or absence, electrical characteristics, and the like.
  • an ultrasonic microscope is a device that examines a structure in a non-destructive manner by analyzing reflected waves and transmitted waves by utilizing the characteristic that ultrasonic waves are reflected at material interfaces having different acoustic characteristics.
  • Example 2 In Example 1, the difference between the height of the highest point of the peak portion and the height of the lowest point of the valley portion adjacent to the peak portion was 150 ⁇ m (the thickness of the terminal board was 600 ⁇ m. Except that it is changed to use a terminal board having a roughened surface that is stretched by an embossing roller that is embossed so as to be 1/4 of the thickness of the terminal board) In the same manner as in Example 1, 100 bypass diode modules were prepared and subjected to a thermal shock test and evaluation. The evaluation results are shown in Table 1.
  • Example 3 In Example 1, except that the shape of the bypass diode module was changed to one having a constriction in the terminal board shown in FIG. 6, 100 bypass diode modules were prepared in the same manner as in Example 1, and the thermal shock test and Evaluation was performed. The evaluation results are shown in Table 1.
  • Example 1 In Example 1, except that it changed so that the terminal board in which the slit was not formed at all was used, 100 bypass diode modules were produced similarly to Example 1, and the thermal shock test and evaluation were performed. The evaluation results are shown in Table 1.
  • the terminal box for a solar cell panel of the present invention does not peel off the sealing resin from the terminal plate even when subjected to a severe thermal shock test. Therefore, the electrical characteristics of the bypass diode are not deteriorated for a long period of time. Therefore, this invention is very useful as a terminal box for solar cell panels exposed to a severe environment.

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  • Photovoltaic Devices (AREA)

Abstract

L'invention concerne une boîte à bornes qui est destinée à des panneaux solaires photovoltaïques et qui présente une excellente durabilité temporelle et dans laquelle les caractéristiques électriques d'une diode de dérivation ne sont pas détériorées même quand la boîte à bornes est soumise à un essai de choc thermique sévère. La boîte à bornes pour panneaux solaires photovoltaïques comprend un module de diode de dérivation, qui comprend au moins une paire de plaques à bornes (3) et des diodes de dérivation (4) connectant les plaques à bornes les unes avec les autres, la boîte à bornes étant caractérisée en ce que : l'intérieur du module de diode de dérivation est rempli d'une résine d'étanchéité ; des fentes (11) traversant les plaques à bornes sont formées dans le plan des plaques à bornes situées dans le module de diode de dérivation ; et la résine d'étanchéité traverse les fentes, les fentes ayant une forme elliptique, une forme rectangulaire, ou une forme rectangulaire dotée de coins arrondis, et les directions longitudinales des fentes étant approximativement perpendiculaires aux parties de branche de fil (10) des diodes de dérivation ou à la direction longitudinale du module de diode de dérivation.
PCT/JP2017/005760 2016-02-19 2017-02-16 Boîte à bornes pour panneau solaire photovoltaïque WO2017142034A1 (fr)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2016029867 2016-02-19
JP2016-029867 2016-02-19

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019213287A (ja) * 2018-05-31 2019-12-12 日本ゼオン株式会社 電子モジュール及び電子モジュール群の収納方法

Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04107922U (ja) * 1991-02-28 1992-09-17 日本特殊陶業株式会社 梯子型電気濾波器
WO2007060787A1 (fr) * 2005-11-28 2007-05-31 Onamba Co., Ltd. Boîte de bornes pour un panneau de piles solaires
JP2009049150A (ja) * 2007-08-20 2009-03-05 Oonanba Kk ダイオードを端子板に取り付ける方法
WO2010134572A1 (fr) * 2009-05-20 2010-11-25 行田電線株式会社 Borne de connexion, structure de connexion de bornes et boîte à bornes
JP2012069593A (ja) * 2010-09-21 2012-04-05 Mitsubishi Electric Corp 太陽電池モジュール用端子ボックスおよび太陽電池モジュール
JP2013045963A (ja) * 2011-08-25 2013-03-04 Sharp Corp 端子ボックス、及びその端子ボックスを備えた太陽電池モジュール、並びにその端子ボックスを備えた太陽電池モジュールの製造方法
US20130146118A1 (en) * 2011-12-12 2013-06-13 Dow Corning Corporation Silicone Junction Box and Assemblies
JP2015029409A (ja) * 2013-06-27 2015-02-12 京セラ株式会社 太陽電池モジュール

Patent Citations (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04107922U (ja) * 1991-02-28 1992-09-17 日本特殊陶業株式会社 梯子型電気濾波器
WO2007060787A1 (fr) * 2005-11-28 2007-05-31 Onamba Co., Ltd. Boîte de bornes pour un panneau de piles solaires
JP2009049150A (ja) * 2007-08-20 2009-03-05 Oonanba Kk ダイオードを端子板に取り付ける方法
WO2010134572A1 (fr) * 2009-05-20 2010-11-25 行田電線株式会社 Borne de connexion, structure de connexion de bornes et boîte à bornes
JP2012069593A (ja) * 2010-09-21 2012-04-05 Mitsubishi Electric Corp 太陽電池モジュール用端子ボックスおよび太陽電池モジュール
JP2013045963A (ja) * 2011-08-25 2013-03-04 Sharp Corp 端子ボックス、及びその端子ボックスを備えた太陽電池モジュール、並びにその端子ボックスを備えた太陽電池モジュールの製造方法
US20130146118A1 (en) * 2011-12-12 2013-06-13 Dow Corning Corporation Silicone Junction Box and Assemblies
JP2015029409A (ja) * 2013-06-27 2015-02-12 京セラ株式会社 太陽電池モジュール

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2019213287A (ja) * 2018-05-31 2019-12-12 日本ゼオン株式会社 電子モジュール及び電子モジュール群の収納方法
JP7119591B2 (ja) 2018-05-31 2022-08-17 日本ゼオン株式会社 電子モジュール及び電子モジュール群の収納方法

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