WO2017142034A1 - Terminal box for solar cell panel - Google Patents

Terminal box for solar cell panel Download PDF

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Publication number
WO2017142034A1
WO2017142034A1 PCT/JP2017/005760 JP2017005760W WO2017142034A1 WO 2017142034 A1 WO2017142034 A1 WO 2017142034A1 JP 2017005760 W JP2017005760 W JP 2017005760W WO 2017142034 A1 WO2017142034 A1 WO 2017142034A1
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WO
WIPO (PCT)
Prior art keywords
terminal
bypass diode
solar cell
terminal box
slit
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Application number
PCT/JP2017/005760
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French (fr)
Japanese (ja)
Inventor
誠一郎 牧
久和 松井
嘉勲 朱
石田 淳
Original Assignee
オーナンバ株式会社
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Publication of WO2017142034A1 publication Critical patent/WO2017142034A1/en

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    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02SGENERATION OF ELECTRIC POWER BY CONVERSION OF INFRARED RADIATION, VISIBLE LIGHT OR ULTRAVIOLET LIGHT, e.g. USING PHOTOVOLTAIC [PV] MODULES
    • H02S40/00Components or accessories in combination with PV modules, not provided for in groups H02S10/00 - H02S30/00
    • H02S40/30Electrical components
    • H02S40/34Electrical components comprising specially adapted electrical connection means to be structurally associated with the PV module, e.g. junction boxes
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02EREDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00Energy generation through renewable energy sources
    • Y02E10/50Photovoltaic [PV] energy

Definitions

  • the present invention relates to a solar cell panel terminal box having a built-in bypass diode module including a terminal plate and a bypass diode.
  • the present invention relates to a module built-in type solar cell panel terminal box in which the adhesion between the sealing resin filling the module and the terminal plate is improved.
  • a terminal box for taking out electric power from the solar cell panel is attached to the back surface of the solar cell panel.
  • a terminal box B is attached to the back surface of each solar cell panel P, and the terminal boxes B of the adjacent solar cell panels P are connected to the external connection cable 7. It is electrically connected via.
  • a module built-in type has been conventionally used.
  • a typical example thereof is a terminal box (solar cell module connector) as shown in Patent Document 1.
  • FIG. 1 shows the inside of a module built-in type terminal box of Patent Document 1
  • FIG. 2 shows the inside of the bypass diode module of FIG. 1 and 2
  • reference numeral 1 denotes a resin terminal box
  • reference numeral 2 denotes a bypass diode module built in the terminal box 1.
  • Reference numeral 3 denotes a terminal board, which is composed of at least a pair.
  • Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG.
  • Reference numeral 5 denotes a resin cover, which is configured to cover and seal the terminal plate 3 and the bypass diode 4 in the bypass diode module 2.
  • the cover 5 is formed by a transfer molding method, and the terminal plate 3 and the bypass diode 4 and the sealing resin forming the cover 5 are in close contact with each other.
  • 6 is a lead, which is a power take-out line from the solar cell panel.
  • 7 is an external connection cable for electrical connection between adjacent solar cell panels.
  • Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
  • a part of the terminal plate 3 protrudes from the bypass diode module 2 and is connected to the lead 6 and the external connection cable 7. Therefore, as can be seen from FIG. 1, the terminal plate 3 connected to the lead 6 is arranged to extend above the opening 8 for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1. Has been.
  • the lead 6 from the solar cell panel and the terminal plate 3 are connected by inserting the lead 6 into the opening 8 from the back side of the solar cell panel.
  • the lead 6 is superimposed on the wide surface of the terminal plate 3 facing the solar cell panel, and the overlapped portion is soldered from the back surface side of the solar cell panel.
  • the resin of the terminal box at the periphery of the opening 8 is not softened by the heat of the soldering iron to be deformed or generate a strange odor. It was necessary to make the area sufficiently large and to make the distance between the soldering iron and the periphery of the opening 8 sufficiently large.
  • the area of the opening of the terminal box is increased in this way, there is a problem that the size of the terminal box is necessarily increased accordingly.
  • Patent Document 2 In order to solve the problems of the conventional module built-in type terminal box including Patent Document 1, the applicant has already proposed a module built-in type terminal box as shown in Patent Document 2.
  • FIG. 3 shows the inside of the terminal box of Patent Document 2
  • FIG. 4 shows the inside of the bypass diode module of FIG. 3 and 4
  • 1 is a resin-made terminal box
  • 2 is a bypass diode module built in the terminal box 1.
  • Reference numeral 3 denotes a terminal board, which is composed of at least a pair.
  • the terminal board 3 is composed of portions 3A and 3A ′ protruding outside the bypass diode module, and a portion 3B located inside the bypass diode module.
  • the portion 3A is connected to the lead 6,
  • the portion 3A ′ is connected to the external connection cable 7.
  • Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG.
  • the bypass diode 4 includes a chip 9 and a lead leg portion 10.
  • Reference numeral 5 ′ denotes a resin-sealed package formed by, for example, a transfer molding method, and seals the terminal board 3 ⁇ / b> B and the bypass diode 4 in the bypass diode module 2 to insulate them.
  • 6 is a lead, which is a power take-out line from the solar cell panel.
  • 7 is an external connection cable for electrical connection between adjacent solar cell panels.
  • Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
  • the terminal box of Patent Document 2 shown in FIGS. 3 and 4 has a smaller area of the lead lead-in opening 8 than the terminal box of Patent Document 1 shown in FIGS. All of the terminal plate 3 is disposed at a location in the terminal box 1, and the lead 6 is connected to the wide surface of the terminal plate 3 on the side not facing the solar cell panel.
  • the present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is a module built-in type that does not deteriorate the electrical characteristics of the bypass diode even when subjected to a severe thermal shock test and has excellent durability over time. It is providing the terminal box for solar cell panels.
  • the present inventors have sought the cause of deterioration of the electrical characteristics of the bypass diode in the thermal shock test.
  • the interface between the sealing resin and the terminal plate in the bypass diode module was observed with an ultrasonic microscope. It has been found that there is a region where the sealing resin is peeled off from a part of the terminal board due to poor adhesion between the two and the terminal plate. Although this exfoliation area was very small, moisture around the bypass diode module entered the bypass diode module due to capillary action through the exfoliation area, and the chip part of the bypass diode was ion-contaminated by the intrusion moisture.
  • the present inventors further improve the adhesion between the sealing resin and the terminal plate, and further a means for preventing the separation between the sealing resin and the terminal plate leading to the capillary phenomenon.
  • a slit is formed in the terminal board so as to penetrate the terminal board, and when the bypass diode module filled with the sealing resin up to the periphery of the internal bypass diode chip is formed from the sealing resin by the transfer molding method, Allow the sealing resin to penetrate, further make the shape and orientation of the slits specific, further roughen the surface of the terminal board around the slit, and further constrict or slit in a specific part of the terminal board
  • the adhesion between the sealing resin and the terminal plate can be improved, and the separation between the sealing resin and the terminal plate leading to capillary action can be prevented. Heading was. As a result, even when subjected to severe thermal shock tests, the electrical characteristics of the bypass diode did not deteriorate, and long-term durability was achieved
  • a solar cell panel terminal box including a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the bypass diode module is filled with a sealing resin.
  • a solar cell panel terminal box including a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the bypass diode module is filled with a sealing resin.
  • a slit that penetrates the terminal plate is formed, the sealing resin passes through the slit, and the shape of the slit is elliptical or rectangular Alternatively, the rectangular diode is rounded, the bypass diode module has a substantially rectangular parallelepiped shape, and the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module.
  • the terminal box for solar cell panels in any one of.
  • a Schottky barrier diode structure including a Schottky barrier metal having a barrier height of 0.70 eV or less when the bypass diode is measured at a temperature of 300 K, a trench MOS diode structure having a trench, and a planar MOS diode structure Or a terminal box for a solar cell panel according to any one of (1) to (7), wherein the chip is combined into one chip by a combination thereof.
  • An opening for drawing the lead from the solar cell panel into the terminal box is provided on the side of the terminal box facing the solar cell panel, and the terminal plate is located at a location in the terminal box other than the position facing the opening.
  • the terminal box for a solar cell panel according to any one of (1) to (8), which is configured to be connected to a wide surface on the side.
  • the module built-in type terminal box of the present invention forms a slit penetrating through the terminal board, makes the shape of the slit specific, further roughens the surface of the terminal board, and further makes a specific part of the terminal board
  • the adhesion between the sealing resin and the terminal plate is greatly improved, so that the sealing resin does not peel from the terminal plate even when subjected to a severe thermal shock test. Accordingly, moisture does not enter due to capillary action, and ion contamination of the chip portion of the bypass diode can be prevented.
  • it is not affected by volumetric expansion due to vaporization of moisture that has entered the bypass diode or stress distortion due to differences in thermal expansion coefficients between the materials. Therefore, according to the present invention, it is possible to provide a terminal box for a solar cell panel in which the electrical characteristics of the bypass diode do not deteriorate for a long time.
  • FIG. 9 schematically shows the inside of still another form of bypass diode module used in the terminal box of the present invention.
  • FIG. 10 is a side view of the bypass diode module of FIG.
  • FIG. 11 is a perspective view of the bypass diode module of FIG.
  • FIG. 12 schematically shows a chip portion of a bypass diode including a MOS diode having a trench structure.
  • FIG. 13 is a schematic diagram showing the back surface of the solar cell panel.
  • FIG. 5 schematically shows the inside of the bypass diode module used in the terminal box of the present invention.
  • the terminal box of the present invention is attached to individual solar cell panels and used to safely insulate and take out electric power from the individual solar cell panels.
  • the inside of the terminal box of the present invention is the same as FIG. 3 showing the conventional terminal box unless the inside of the bypass diode module is exposed and shown as shown in FIG. FIG. 5 is drawn in contrast to FIG. 4 showing the inside of the bypass diode module of the terminal box of Patent Document 2, but the module built-in type terminal box of the present invention is shown in FIG.
  • the terminal box is not limited to a shape, and any terminal box of a type into which a pre-formed bypass diode module is fitted is included.
  • 1 is a resin terminal box, and 2 is a bypass diode module built in the terminal box 1.
  • Reference numeral 3 denotes a terminal board, which is composed of at least a pair.
  • the terminal board 3 is composed of portions 3A and 3A ′ projecting outside the bypass diode module and a portion 3B positioned inside the bypass diode module.
  • the portion 3A is connected to the lead 6 and 3A.
  • the portion ' is connected to the external connection cable 7.
  • the terminal board means a terminal board used for finally leading the current from the solar cell panel to the cable for external connection, by surface mounting, by lead or pin insertion, or The terminal board fixed to the printed circuit board by self-standing mounting is not included.
  • Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG.
  • the bypass diode 4 includes a chip 9 and a lead leg portion 10.
  • Reference numeral 5 ′ denotes a resin-sealed package formed by, for example, a transfer molding method, and seals the terminal board 3 ⁇ / b> B and the bypass diode 4 in the bypass diode module 2 to insulate them.
  • 6 is a lead, which is a power take-out line from the solar cell panel.
  • 7 is an external connection cable for electrical connection between adjacent solar cell panels.
  • Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
  • a slit 11 is formed in the plane of the terminal plate 3B positioned in the bypass diode module.
  • the shape of the slit is an elongated shape having a longitudinal direction and a short direction, such as an ellipse, a rectangle, or a rounded corner of the rectangle, it is preferable to consider the orientation of the slit on the terminal board 3B.
  • the longitudinal direction of the slit 11 is preferably substantially perpendicular to the longitudinal direction of the lead leg portion 10 of the bypass diode.
  • the shape of the bypass diode module is a substantially rectangular parallelepiped as shown in FIGS. 1 to 5, it is preferable that the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module.
  • the maximum width of a slit is 1/2 or less of the width
  • the maximum width of the slit refers to the maximum width among the widths of the slit viewed in the width direction of the terminal board in which the slit exists.
  • the maximum width of the slits indicates the maximum of the total widths of the respective slits. The greater the maximum width of the slit, the better the effect of improving the adhesion between the sealing resin and the terminal board.
  • the maximum width of the slit conversely, reduces the effective width of the terminal plate and places an upper limit on the amount of current that can flow through the terminal plate.
  • the maximum width of the slit is 1 ⁇ 2 or less of the width of the terminal plate in which the slit exists.
  • the difference between the height of the highest point of the peak portion on the roughened surface of the terminal board and the height of the lowest point of the valley portion adjacent to the peak portion is 10 ⁇ m or more. More preferably, it is 50 ⁇ m or more.
  • the difference in height is less than the above lower limit, the effect of improving the adhesion between the sealing resin and the terminal board may be inferior.
  • the upper limit of the difference in height is not particularly limited. For example, it is desirable that the difference in height is 1/3 or less of the thickness of the terminal board because of mechanical strength.
  • FIG. 10 is a side view of the bypass diode module of FIG. 6 as viewed from the direction A, and it can be understood that the portion 3A ′ has a U-shaped cross section.
  • 11 is a perspective view of the bypass diode module of FIG. As shown in FIG. 11, the U-shaped cross-section 3A ′ is provided with a narrow portion 3 ′′ and a wide portion 3 ′′ following the end of the terminal plate 3, and the narrow portion 3 ′′ is bent downward to widen the U-shaped cross section It can be formed by folding the part 3 "" horizontally from there and bending both sides of the wide part 3 "" upward from it.
  • the metal material constituting the U-shaped cross section 3A ′ (and the terminal plate 3) is not particularly limited as long as it has good electrical conductivity. For example, copper, iron, or an alloy of these metals and other metals Can be.
  • the U-shaped cross-section portion 3A ′ On the inner surface side of the U-shaped cross-section portion 3A ′, the outer peripheral surface at the tip of the external connection cable 7 is received in a state where the outer insulating coating is removed and the inner core wire 7 ′ is exposed. Thereafter, the U-shaped cross-section portion 3A ′ is caulked from the left and right so as to crush the U-shaped cross section, whereby the core wire 7 ′, which is the internal conductor of the external connection cable 7, is connected to the terminal plate.
  • the present inventors further examined from the viewpoint of preventing the deterioration of the electrical characteristics of the bypass diode.
  • the U-shaped cross-sectional portion 3A ′ is crushed in the operation of connecting the external connection cable 7 to the terminal plate. It has been found that mechanical stress is generated during the caulking, and when this mechanical stress is transmitted to the chip portion of the bypass diode through the terminal plate, the electrical characteristics of the chip portion may be deteriorated.
  • the terminal plate located in the bypass diode module adjacent to the U-shaped cross-section portion 3A ' It has been found that by forming the constriction 3C that reduces the width of the terminal plate plane, the mechanical stress can be relieved in the constriction 3C and the transmission of the mechanical stress to the chip portion can be effectively prevented.
  • the shape and size of the constriction are not particularly limited as long as the shape and size can effectively relieve the mechanical stress generated by crushing the U-shaped cross section.
  • the constriction can be formed not only on the left and right sides of the terminal board as shown in FIG. 6, but also on the right side of the terminal board as shown in the lower left circled part of FIG. 8 can also be formed only on the left side of the terminal board as shown in the circled portion at the lower left of FIG.
  • a horizontally long slit as shown in a circled portion in FIG. 9 is formed instead of the constriction, the mechanical stress can be relieved similarly to the constriction.
  • a Schottky barrier diode having a low forward voltage VF is preferably used from the viewpoint of efficiently suppressing heat generation of the diode chip when the bypass diode is activated.
  • a Schottky barrier diode including a Schottky barrier metal having a barrier height of 0.70 eV or less when measured at a temperature of 300K is preferable to use.
  • a chip in a form in which one chip is combined by using a MOS diode having a MOS structure in combination with a Schottky barrier diode chip may be used.
  • a trench MOS diode structure in which a trench is formed in the MOS diode instead of a planar structure may be used.
  • the diode chip can be downsized by changing the MOS structure from the planar to the trench.
  • the above-described barrier height is a barrier height ( ⁇ Bn ) of a Schottky barrier metal with respect to N-type silicon, and is a parameter generally used to express contact characteristics between an N-type semiconductor and a metal in the semiconductor field.
  • the barrier height is defined by the following equation. In the formula, k means Boltzmann constant, T means absolute temperature, q means unit charge, A ** means Richardson coefficient, Js means Schottky barrier area S Means the saturation current. Note that the Richardson coefficient is 120 A / cm 2 / k 2 in the case of N-type silicon.
  • the barrier height of the Schottky barrier metal in the Schottky barrier diode included therein is 0.70 eV or less when measured at a temperature of 300K. It is necessary to be 0.50 to 0.70 eV. It is known that the barrier height is proportional to the forward voltage drop VF of the diode when the Schottky barrier area S is constant. Therefore, the low barrier height of the diode chip means that the forward voltage drop of the diode is low, which means that the amount of heat generated during operation of the bypass diode is small.
  • FIG. 12 is a schematic view showing a cross-section of a chip in a form in which one chip is combined using a MOS diode having a MOS structure in combination with a Schottky barrier diode chip.
  • 12 is an N + type substrate
  • 13 is an N ⁇ type epitaxial layer
  • 14 is a Schottky barrier metal having a barrier height of 0.70 eV or less when measured at a temperature of 300K.
  • 15 is a surface electrode serving as an anode electrode
  • 16 is a MOS structure
  • 17 is a trench dug in the N ⁇ -type epitaxial layer 13
  • 18 is a multi-layer electrode.
  • a gate made of crystalline silicon, and 19 is a gate oxide film forming a MOS structure.
  • the Schottky electrode 14 and the gate 18 are in electrical contact with the surface electrode 15 serving as a common anode electrode for one-chip combination.
  • a cathode electrode common to a Schottky barrier diode and a MOS diode having an ohmic contact is disposed in a lower layer portion of the N + type silicon substrate 12.
  • a chip having a MOS chip combined with a Schottky barrier diode chip to form a single chip is characterized in that a trench 17 is formed from the N ⁇ type epitaxial layer 13 to the Schottky electrode 14, A gate 18 made of polycrystalline silicon is buried therein, and an oxide film 19 is formed between the trench 17 and the gate 18.
  • a trench gate structure By having such a trench gate structure, the unit cell area can be reduced, and as a result, the diode chip can be miniaturized. Further, by having such a MOS structure, the reverse current in the high temperature region of the diode chip can be reduced.
  • a Schottky barrier diode chip is used depending on the required characteristics of the bypass diode determined by the type and size of the solar cell panel in which the terminal box of the present invention is arranged, the number of cells, etc.
  • a chip having a single chip composite using a MOS diode having a MOS structure may be used.
  • a form of a trench MOS diode structure in which the gate is formed after the trench is dug in the silicon surface as shown in FIG. It can be appropriately selected in consideration of the presence or absence, electrical characteristics, and the like.
  • an ultrasonic microscope is a device that examines a structure in a non-destructive manner by analyzing reflected waves and transmitted waves by utilizing the characteristic that ultrasonic waves are reflected at material interfaces having different acoustic characteristics.
  • Example 2 In Example 1, the difference between the height of the highest point of the peak portion and the height of the lowest point of the valley portion adjacent to the peak portion was 150 ⁇ m (the thickness of the terminal board was 600 ⁇ m. Except that it is changed to use a terminal board having a roughened surface that is stretched by an embossing roller that is embossed so as to be 1/4 of the thickness of the terminal board) In the same manner as in Example 1, 100 bypass diode modules were prepared and subjected to a thermal shock test and evaluation. The evaluation results are shown in Table 1.
  • Example 3 In Example 1, except that the shape of the bypass diode module was changed to one having a constriction in the terminal board shown in FIG. 6, 100 bypass diode modules were prepared in the same manner as in Example 1, and the thermal shock test and Evaluation was performed. The evaluation results are shown in Table 1.
  • Example 1 In Example 1, except that it changed so that the terminal board in which the slit was not formed at all was used, 100 bypass diode modules were produced similarly to Example 1, and the thermal shock test and evaluation were performed. The evaluation results are shown in Table 1.
  • the terminal box for a solar cell panel of the present invention does not peel off the sealing resin from the terminal plate even when subjected to a severe thermal shock test. Therefore, the electrical characteristics of the bypass diode are not deteriorated for a long period of time. Therefore, this invention is very useful as a terminal box for solar cell panels exposed to a severe environment.

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Abstract

Provided is a terminal box which is for solar cell panels and has excellent temporal durability and in which the electrical characteristics of a bypass diode are not deteriorated even when the terminal box is subjected to a severe thermal shock test. The terminal box for solar cell panels incorporates a bypass diode module, which includes at least one pair of terminal plates (3) and bypass diodes (4) connecting the terminal plates with each other, the terminal box being characterized in that: the inside of the bypass diode module is filled with a sealing resin; slits (11) passing through the terminal plates are formed in the plane of the terminal plates located in the bypass diode module; and the sealing resin passes through the slits, wherein the slits have an elliptical shape, a rectangular shape, or a rectangular shape with rounded corners, and the longitudinal directions of the slits are approximately perpendicular to the lead leg portions (10) of the bypass diodes or the longitudinal direction of the bypass diode module.

Description

太陽電池パネル用端子ボックスTerminal box for solar panel
 本発明は、端子板とバイパスダイオードとを含むバイパスダイオードモジュールを内蔵した太陽電池パネル用端子ボックスに関する。特に、本発明は、かかるモジュール内蔵タイプの太陽電池パネル用端子ボックスにおいて、モジュール内を満たす封止樹脂と端子板との間の密着性を改善したものに関する。 The present invention relates to a solar cell panel terminal box having a built-in bypass diode module including a terminal plate and a bypass diode. In particular, the present invention relates to a module built-in type solar cell panel terminal box in which the adhesion between the sealing resin filling the module and the terminal plate is improved.
 太陽電池パネルの裏面には、太陽電池パネルからの電力を取り出すための端子ボックスが取り付けられている。具体的には、図13に示すように、個々の太陽電池パネルPの裏面には、端子ボックスBが取り付けられており、隣接する太陽電池パネルPの端子ボックスB同士は、外部接続用ケーブル7を介して電気的に接続されている。かかる端子ボックスとしては、従来からモジュール内蔵タイプのものが使用されている。その典型例としては、特許文献1に示されるような端子ボックス(太陽電池モジュール用接続具)が挙げられる。 A terminal box for taking out electric power from the solar cell panel is attached to the back surface of the solar cell panel. Specifically, as shown in FIG. 13, a terminal box B is attached to the back surface of each solar cell panel P, and the terminal boxes B of the adjacent solar cell panels P are connected to the external connection cable 7. It is electrically connected via. As such a terminal box, a module built-in type has been conventionally used. A typical example thereof is a terminal box (solar cell module connector) as shown in Patent Document 1.
 図1は、特許文献1のモジュール内蔵タイプの端子ボックスの内部を示し、図2は、図1のバイパスダイオードモジュールの内部を示す。図1及び2において、1は、樹脂製の端子ボックスであり、2は、端子ボックス1に内蔵されたバイパスダイオードモジュールである。3は、端子板であり、少なくとも一対で構成される。4は、端子板3を相互に接続するバイパスダイオードであり、図2では三個存在する。5は、樹脂製のカバーであり、バイパスダイオードモジュール2内の端子板3及びバイパスダイオード4を絶縁及び封止するためにこれらを覆うように構成される。このカバー5は、トランスファーモールド法によって形成されており、その内部において、端子板3及びバイパスダイオード4とカバー5を形成する封止樹脂とが密着するように構成されている。6はリードであり、太陽電池パネルからの電力取り出し線である。7は、隣接する太陽電池パネル間の電気的接続のための外部接続用ケーブルである。8は、太陽電池パネルの裏面から取り出されたリード6を端子ボックス1内に引き込むための開口部であり、端子ボックス1の太陽電池パネル(図示せず)に面する側に設けられている。なお、バイパスダイオードモジュール2からは、端子板3の一部が突出しており、リード6及び外部接続用ケーブル7と接続される。そのため、リード6に接続される端子板3は、図1からわかるように、太陽電池パネルの裏面から取り出されたリード6を端子ボックス1内に引き込むための開口部8の上に延びるように配置されている。 FIG. 1 shows the inside of a module built-in type terminal box of Patent Document 1, and FIG. 2 shows the inside of the bypass diode module of FIG. 1 and 2, reference numeral 1 denotes a resin terminal box, and reference numeral 2 denotes a bypass diode module built in the terminal box 1. Reference numeral 3 denotes a terminal board, which is composed of at least a pair. Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG. Reference numeral 5 denotes a resin cover, which is configured to cover and seal the terminal plate 3 and the bypass diode 4 in the bypass diode module 2. The cover 5 is formed by a transfer molding method, and the terminal plate 3 and the bypass diode 4 and the sealing resin forming the cover 5 are in close contact with each other. 6 is a lead, which is a power take-out line from the solar cell panel. 7 is an external connection cable for electrical connection between adjacent solar cell panels. Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown). A part of the terminal plate 3 protrudes from the bypass diode module 2 and is connected to the lead 6 and the external connection cable 7. Therefore, as can be seen from FIG. 1, the terminal plate 3 connected to the lead 6 is arranged to extend above the opening 8 for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1. Has been.
 特許文献1を始めとする従来のモジュール内蔵タイプの端子ボックスでは、太陽電池パネルからのリード6と端子板3との接続は、リード6を太陽電池パネルの裏面側から開口部8内に挿入し、端子板3の太陽電池パネルに向けられている側の幅広面にリード6を重ね合わせて、その重ね合わせ部を太陽電池パネルの裏面側から半田付けすることによって行なわれる。この際、高温の半田ごてを使用するため、半田ごての熱で開口部8の周縁の端子ボックスの構成樹脂が軟化して変形したり異臭を発生したりしないように、開口部8の面積を十分大きくとって、半田ごてと開口部8の周縁との距離を十分大きくすることが必要であった。しかしながら、このように端子ボックスの開口部の面積を大きくすると、それに伴って端子ボックスの寸法が必然的に大きくなるという問題があった。 In the conventional terminal box with a built-in module including Patent Document 1, the lead 6 from the solar cell panel and the terminal plate 3 are connected by inserting the lead 6 into the opening 8 from the back side of the solar cell panel. The lead 6 is superimposed on the wide surface of the terminal plate 3 facing the solar cell panel, and the overlapped portion is soldered from the back surface side of the solar cell panel. At this time, since the high-temperature soldering iron is used, the resin of the terminal box at the periphery of the opening 8 is not softened by the heat of the soldering iron to be deformed or generate a strange odor. It was necessary to make the area sufficiently large and to make the distance between the soldering iron and the periphery of the opening 8 sufficiently large. However, when the area of the opening of the terminal box is increased in this way, there is a problem that the size of the terminal box is necessarily increased accordingly.
 特許文献1を始めとする従来のモジュール内蔵タイプの端子ボックスの問題を解消するため、出願人は、特許文献2に示されるようなモジュール内蔵タイプの端子ボックスを既に提案している。 In order to solve the problems of the conventional module built-in type terminal box including Patent Document 1, the applicant has already proposed a module built-in type terminal box as shown in Patent Document 2.
 図3は、特許文献2の端子ボックスの内部を示し、図4は、図3のバイパスダイオードモジュールの内部を示す。図3及び4において、1は、樹脂製の端子ボックスであり、2は、端子ボックス1に内蔵されたバイパスダイオードモジュールである。3は、端子板であり、少なくとも一対で構成される。端子板3は、バイパスダイオードモジュールの外側に突出している部分3A,3A′、及びバイパスダイオードモジュールの内側に位置されている部分3Bから構成されており、3Aの部分は、リード6に接続され、3A′の部分は、外部接続用ケーブル7と接続される。4は、端子板3を相互に接続するバイパスダイオードであり、図4では三個存在する。バイパスダイオード4は、チップ9とリード足部分10からなる。5′は、例えばトランスファーモールド法により形成された、樹脂封止されたパッケージであり、バイパスダイオードモジュール2内の端子板3B及びバイパスダイオード4を絶縁するためにこれらを封止している。6はリードであり、太陽電池パネルからの電力取り出し線である。7は、隣接する太陽電池パネル間の電気的接続のための外部接続用ケーブルである。8は、太陽電池パネルの裏面から取り出されたリード6を端子ボックス1内に引き込むための開口部であり、端子ボックス1の太陽電池パネル(図示せず)に面する側に設けられている。 FIG. 3 shows the inside of the terminal box of Patent Document 2, and FIG. 4 shows the inside of the bypass diode module of FIG. 3 and 4, 1 is a resin-made terminal box, and 2 is a bypass diode module built in the terminal box 1. Reference numeral 3 denotes a terminal board, which is composed of at least a pair. The terminal board 3 is composed of portions 3A and 3A ′ protruding outside the bypass diode module, and a portion 3B located inside the bypass diode module. The portion 3A is connected to the lead 6, The portion 3A ′ is connected to the external connection cable 7. Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG. The bypass diode 4 includes a chip 9 and a lead leg portion 10. Reference numeral 5 ′ denotes a resin-sealed package formed by, for example, a transfer molding method, and seals the terminal board 3 </ b> B and the bypass diode 4 in the bypass diode module 2 to insulate them. 6 is a lead, which is a power take-out line from the solar cell panel. 7 is an external connection cable for electrical connection between adjacent solar cell panels. Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
 図3及び4に示される特許文献2の端子ボックスは、図1及び2に示される特許文献1の端子ボックスと比較すると、リード引き込み開口部8の面積が小さく、開口部8に面する位置以外の端子ボックス1内の場所に端子板3の全てが配置され、リード6が、端子板3の太陽電池パネルに向けられていない側の幅広面に接続されることを特徴とする。 The terminal box of Patent Document 2 shown in FIGS. 3 and 4 has a smaller area of the lead lead-in opening 8 than the terminal box of Patent Document 1 shown in FIGS. All of the terminal plate 3 is disposed at a location in the terminal box 1, and the lead 6 is connected to the wide surface of the terminal plate 3 on the side not facing the solar cell panel.
 この端子ボックスは、リード引き込み開口部に面する位置以外の端子ボックス内の場所に端子板の全てを配置し、さらに、リードと端子板の接続面を従来とは逆にして半田ごての熱の影響を小さくしているので、開口部の面積を小さくすることができ、結果として端子ボックスの寸法を小型化する効果を有する。 In this terminal box, all of the terminal board is placed in a location inside the terminal box other than the position facing the lead lead-in opening, and the connection surface between the lead and the terminal board is opposite to the conventional one and the heat of the soldering iron Therefore, the area of the opening can be reduced, and as a result, the size of the terminal box can be reduced.
 しかしながら、出願人が、特許文献2のモジュール内蔵タイプの端子ボックスを熱衝撃試験(低温度環境と高温度環境に交互に製品を暴露して、温度変化による製品の劣化を調べる加速試験)に供したところ、端子ボックス中のバイパスダイオードの電気的特性が劣化する場合があった。従って、厳しい熱衝撃試験に供しても電気的特性が劣化しない、経時的な耐久性に優れるモジュール内蔵タイプの端子ボックスの開発が求められていた。 However, the applicant used the module built-in type terminal box of Patent Document 2 for a thermal shock test (accelerated test to examine product deterioration due to temperature change by exposing the product alternately to a low temperature environment and a high temperature environment). As a result, the electrical characteristics of the bypass diode in the terminal box sometimes deteriorated. Accordingly, there has been a demand for the development of a terminal box with a built-in module that has excellent durability over time and does not deteriorate in electrical characteristics even when subjected to severe thermal shock tests.
WO2006/057342号WO2006 / 057342 特願2015-128417Japanese Patent Application No. 2015-128417
 本発明は、上述の従来技術の問題に鑑みなされたものであり、その目的は、厳しい熱衝撃試験に供してもバイパスダイオードの電気的特性が劣化しない、経時的な耐久性に優れるモジュール内蔵タイプの太陽電池パネル用端子ボックスを提供することにある。 The present invention has been made in view of the above-mentioned problems of the prior art, and its purpose is a module built-in type that does not deteriorate the electrical characteristics of the bypass diode even when subjected to a severe thermal shock test and has excellent durability over time. It is providing the terminal box for solar cell panels.
 本発明者らは、上記の目的を達成するために、熱衝撃試験においてバイパスダイオードの電気的特性が劣化する原因を探求した。まず、熱衝撃試験においてバイパスダイオードの電気的特性の劣化を示した端子ボックスについて、バイパスダイオードモジュール内の封止樹脂と端子板との界面を超音波顕微鏡で観察したところ、封止樹脂と端子板との間の密着状態が悪く、封止樹脂が端子板の一部から剥離している領域があることが判明した。この剥離領域は、微小であったが、この剥離領域を通した毛細管現象によってバイパスダイオードモジュール周辺の湿気がバイパスダイオードモジュール内に侵入し、侵入した湿気によってバイパスダイオードのチップ部分がイオン汚染され、結果として、バイパスダイオードの電気的特性を劣化させていることを見出した。また、熱衝撃試験における急激な温度変化に伴って、毛細管現象によってバイパスダイオードモジュール内に侵入した湿気が気化することによってもたらされる体積膨張、あるいは、封止樹脂と、端子板を構成する金属と、バイパスダイオードのチップを構成する材料(例えば、シリコン)との間の熱膨張係数の差によってもたらされる応力歪みが、封止樹脂と端子板との間の密着性を低下させていることを見出した。 In order to achieve the above object, the present inventors have sought the cause of deterioration of the electrical characteristics of the bypass diode in the thermal shock test. First, for the terminal box that showed deterioration of the electrical characteristics of the bypass diode in the thermal shock test, the interface between the sealing resin and the terminal plate in the bypass diode module was observed with an ultrasonic microscope. It has been found that there is a region where the sealing resin is peeled off from a part of the terminal board due to poor adhesion between the two and the terminal plate. Although this exfoliation area was very small, moisture around the bypass diode module entered the bypass diode module due to capillary action through the exfoliation area, and the chip part of the bypass diode was ion-contaminated by the intrusion moisture. It has been found that the electrical characteristics of the bypass diode are deteriorated. Further, along with a rapid temperature change in the thermal shock test, volume expansion caused by vaporization of moisture that has entered the bypass diode module by capillary action, or a sealing resin, and a metal constituting the terminal board, It was found that the stress strain caused by the difference in thermal expansion coefficient with the material constituting the chip of the bypass diode (for example, silicon) reduces the adhesion between the sealing resin and the terminal board. .
 本発明者らは、かかる知見に基づいて、封止樹脂と端子板との間の密着性を向上させて、毛細管現象に繋がる封止樹脂と端子板との剥離を防止するための手段についてさらに検討した結果、端子板にそれを貫通するスリットを形成し、内部のバイパスダイオードチップの周囲まで封止樹脂で満たされたバイパスダイオードモジュールをトランスファーモールド法によって封止樹脂から形成する際にこのスリットに封止樹脂を貫通させること、さらにはスリットの形状や配向を特定のものにすること、さらにはスリットの周囲の端子板の面を粗面化し、さらには端子板の特定の部分にくびれ又はスリットを形成することによって、封止樹脂と端子板との間の密着性を向上させ、毛細管現象に繋がる封止樹脂と端子板との剥離を防止できることを見出した。その結果、厳しい熱衝撃試験を受けてもバイパスダイオードの電気的特性の劣化が生じず、モジュール内蔵タイプの端子ボックスにおいて長期の使用耐久性を達成することができた。 Based on such knowledge, the present inventors further improve the adhesion between the sealing resin and the terminal plate, and further a means for preventing the separation between the sealing resin and the terminal plate leading to the capillary phenomenon. As a result of the study, a slit is formed in the terminal board so as to penetrate the terminal board, and when the bypass diode module filled with the sealing resin up to the periphery of the internal bypass diode chip is formed from the sealing resin by the transfer molding method, Allow the sealing resin to penetrate, further make the shape and orientation of the slits specific, further roughen the surface of the terminal board around the slit, and further constrict or slit in a specific part of the terminal board By forming the film, the adhesion between the sealing resin and the terminal plate can be improved, and the separation between the sealing resin and the terminal plate leading to capillary action can be prevented. Heading was. As a result, even when subjected to severe thermal shock tests, the electrical characteristics of the bypass diode did not deteriorate, and long-term durability was achieved in a module built-in type terminal box.
 本発明は、上述の本発明者の独自の検討の結果に基づいて完成されたものであり、以下の(1)~(9)の構成を有するものである。
(1)少なくとも一対の端子板と、前記端子板を相互に接続するバイパスダイオードとを含むバイパスダイオードモジュールを内蔵した太陽電池パネル用端子ボックスであって、バイパスダイオードモジュール内が封止樹脂で満たされており、バイパスダイオードモジュール内に位置される端子板の平面に、端子板を貫通するスリットが形成されており、封止樹脂が前記スリットを貫通しており、スリットの形状が、楕円形又は矩形又は矩形の角を丸めたものであり、スリットの長手方向が、バイパスダイオードのリード足部分の長手方向に対して略直角であることを特徴とする太陽電池パネル用端子ボックス。
(2)少なくとも一対の端子板と、前記端子板を相互に接続するバイパスダイオードとを含むバイパスダイオードモジュールを内蔵した太陽電池パネル用端子ボックスであって、バイパスダイオードモジュール内が封止樹脂で満たされており、バイパスダイオードモジュール内に位置される端子板の平面に、端子板を貫通するスリットが形成されており、封止樹脂が前記スリットを貫通しており、スリットの形状が、楕円形又は矩形又は矩形の角を丸めたものであり、バイパスダイオードモジュールの形状が略直方体であり、スリットの長手方向が、バイパスダイオードモジュールの長手方向に対して略直角であることを特徴とする太陽電池パネル用端子ボックス。
(3)スリットの最大幅は、そのスリットが存在する端子板の幅の1/2以下であることを特徴とする(1)又は(2)に記載の太陽電池パネル用端子ボックス。
(4)端子板の表面の少なくとも一部が、粗面化されていることを特徴とする(1)~(3)のいずれかに記載の太陽電池パネル用端子ボックス。
(5)封止樹脂で満たされた端子板のスリット形成面の周囲が、粗面化されていることを特徴とする(4)に記載の太陽電池パネル用端子ボックス。
(6)端子板の粗面化されている表面における山部分の最高点の高さと山部分に隣接する谷部分の最低点の高さの差が1μm以上であることを特徴とする(4)又は(5)に記載の太陽電池パネル用端子ボックス。
(7)外部接続用ケーブルに接続される端子板の末端に、外部接続用ケーブルの内部導体である芯線を受容し、その状態でかしめるためのU字形断面部分が形成されていること、及びU字形断面部分に隣接する、バイパスダイオードモジュール内に位置される部分の端子板に、端子板平面の幅を減少するくびれ又はスリットが形成されていることを特徴とする(1)~(6)のいずれかに記載の太陽電池パネル用端子ボックス。
(8)バイパスダイオードが、300Kの温度で測定したときに0.70eV以下のバリアハイトを有するショットキーバリア金属を含むショットキーバリアダイオード構造、トレンチを形成されたトレンチMOSダイオード構造、プレーナ型MOSダイオード構造、又はそれらの組み合わせによって1チップ複合化されたものであることを特徴とする(1)~(7)のいずれかに記載の太陽電池パネル用端子ボックス。
(9)端子ボックスの太陽電池パネルに面する側に太陽電池パネルからのリードを端子ボックス内に引き込むための開口部が設けられ、開口部に面する位置以外の端子ボックス内の場所に端子板の全てが配置され、端子板の幅広面が太陽電池パネルと略平行に向けられるように構成され、開口部から端子ボックス内に引き込まれたリードが、端子板の太陽電池パネルに向けられていない側の幅広面に接続されるように構成されていることを特徴とする(1)~(8)のいずれかに記載の太陽電池パネル用端子ボックス。
The present invention has been completed on the basis of the results of the above-mentioned original study by the present inventors, and has the following configurations (1) to (9).
(1) A solar cell panel terminal box including a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the bypass diode module is filled with a sealing resin. In the plane of the terminal plate located in the bypass diode module, a slit that penetrates the terminal plate is formed, the sealing resin passes through the slit, and the shape of the slit is elliptical or rectangular Alternatively, the terminal box for a solar cell panel is obtained by rounding the corners of a rectangle, and the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the lead leg portion of the bypass diode.
(2) A solar cell panel terminal box including a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the bypass diode module is filled with a sealing resin. In the plane of the terminal plate located in the bypass diode module, a slit that penetrates the terminal plate is formed, the sealing resin passes through the slit, and the shape of the slit is elliptical or rectangular Alternatively, the rectangular diode is rounded, the bypass diode module has a substantially rectangular parallelepiped shape, and the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module. Terminal box.
(3) The maximum width of a slit is 1/2 or less of the width of the terminal board in which the slit exists, The terminal box for solar cell panels as described in (1) or (2) characterized by the above-mentioned.
(4) The terminal box for a solar cell panel according to any one of (1) to (3), wherein at least part of the surface of the terminal plate is roughened.
(5) The terminal box for a solar cell panel according to (4), wherein the periphery of the slit forming surface of the terminal board filled with the sealing resin is roughened.
(6) The difference between the height of the highest point of the peak portion on the roughened surface of the terminal board and the height of the lowest point of the valley portion adjacent to the peak portion is 1 μm or more (4) Or the terminal box for solar cell panels as described in (5).
(7) A U-shaped cross section for receiving and caulking the core wire, which is the inner conductor of the external connection cable, is formed at the end of the terminal plate connected to the external connection cable; and (1) to (6) characterized in that a constriction or a slit for reducing the width of the terminal plate plane is formed in the terminal plate located in the bypass diode module adjacent to the U-shaped cross section. The terminal box for solar cell panels in any one of.
(8) A Schottky barrier diode structure including a Schottky barrier metal having a barrier height of 0.70 eV or less when the bypass diode is measured at a temperature of 300 K, a trench MOS diode structure having a trench, and a planar MOS diode structure Or a terminal box for a solar cell panel according to any one of (1) to (7), wherein the chip is combined into one chip by a combination thereof.
(9) An opening for drawing the lead from the solar cell panel into the terminal box is provided on the side of the terminal box facing the solar cell panel, and the terminal plate is located at a location in the terminal box other than the position facing the opening. Are arranged such that the wide surface of the terminal plate is directed substantially parallel to the solar cell panel, and the lead drawn into the terminal box from the opening is not directed to the solar cell panel of the terminal plate The terminal box for a solar cell panel according to any one of (1) to (8), which is configured to be connected to a wide surface on the side.
 本発明のモジュール内蔵タイプの端子ボックスは、端子板にそれを貫通するスリットを形成し、さらにスリットの形状を特定のものにし、さらに端子板の表面を粗面化し、さらに端子板の特定の部分にくびれ又はスリットを形成することによって、封止樹脂と端子板との間の密着性を大幅に向上しているので、厳しい熱衝撃試験に供しても封止樹脂が端子板から剥離しない。従って、毛細管現象による湿気の侵入は起こらず、バイパスダイオードのチップ部分のイオン汚染が防止できる。また、バイパスダイオード内に侵入した湿気の気化による体積膨張や各材料間の熱膨張係数の差による応力歪みの影響を受けない。従って、本発明によれば、バイパスダイオードの電気的特性が長期間劣化しない太陽電池パネル用端子ボックスを提供することができる。 The module built-in type terminal box of the present invention forms a slit penetrating through the terminal board, makes the shape of the slit specific, further roughens the surface of the terminal board, and further makes a specific part of the terminal board By forming the constriction or slit, the adhesion between the sealing resin and the terminal plate is greatly improved, so that the sealing resin does not peel from the terminal plate even when subjected to a severe thermal shock test. Accordingly, moisture does not enter due to capillary action, and ion contamination of the chip portion of the bypass diode can be prevented. In addition, it is not affected by volumetric expansion due to vaporization of moisture that has entered the bypass diode or stress distortion due to differences in thermal expansion coefficients between the materials. Therefore, according to the present invention, it is possible to provide a terminal box for a solar cell panel in which the electrical characteristics of the bypass diode do not deteriorate for a long time.
図1は、従来技術の特許文献1の端子ボックスの内部を概略的に示す。FIG. 1 schematically shows the inside of a terminal box of Patent Document 1 of the prior art. 図2は、図1のバイパスダイオードモジュールの内部を概略的に示す。FIG. 2 schematically shows the inside of the bypass diode module of FIG. 図3は、従来技術の特許文献2の端子ボックスの内部を概略的に示す。FIG. 3 schematically shows the inside of the terminal box of Patent Document 2 of the prior art. 図4は、図3のバイパスダイオードモジュールの内部を概略的に示す。FIG. 4 schematically shows the inside of the bypass diode module of FIG. 図5は、本発明の端子ボックスに使用されるバイパスダイオードモジュールの内部を概略的に示す。FIG. 5 schematically shows the inside of a bypass diode module used in the terminal box of the present invention. 図6は、本発明の端子ボックスに使用される別の形態のバイパスダイオードモジュールの内部を概略的に示す。FIG. 6 schematically shows the inside of another form of bypass diode module used in the terminal box of the present invention. 図7は、本発明の端子ボックスに使用されるさらに別の形態のバイパスダイオードモジュールの内部を概略的に示す。FIG. 7 schematically shows the inside of still another form of bypass diode module used in the terminal box of the present invention. 図8は、本発明の端子ボックスに使用されるさらになお別の形態のバイパスダイオードモジュールの内部を概略的に示す。FIG. 8 schematically shows the inside of still another form of bypass diode module used in the terminal box of the present invention. 図9は、本発明の端子ボックスに使用されるさらになお別の形態のバイパスダイオードモジュールの内部を概略的に示す。FIG. 9 schematically shows the inside of still another form of bypass diode module used in the terminal box of the present invention. 図10は、図6のバイパスダイオードモジュールをAの方向から見た側面図を示す。FIG. 10 is a side view of the bypass diode module of FIG. 図11は、図6のバイパスダイオードモジュールをBの方向から見た透視図を示す。FIG. 11 is a perspective view of the bypass diode module of FIG. 図12は、トレンチ構造を有するMOSダイオードを含むバイパスダイオードのチップ部を概略的に示す。FIG. 12 schematically shows a chip portion of a bypass diode including a MOS diode having a trench structure. 図13は、太陽電池パネルの裏面を示す模式図である。FIG. 13 is a schematic diagram showing the back surface of the solar cell panel.
 以下、本発明の実施形態について、図面を参照して従来技術と適宜比較しながら詳述するが、本発明はこれらに限定されるものではない。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings as appropriate compared with the prior art, but the present invention is not limited thereto.
 図5は、本発明の端子ボックスに使用されるバイパスダイオードモジュールの内部を概略的に示したものである。本発明の端子ボックスは、個々の太陽電池パネルに取り付けられて、個々の太陽電池パネルから安全に絶縁して電力を取り出すために使用されるものである。本発明の端子ボックスの内部は、図5のようにバイパスダイオードモジュールの内部を露出して示さない限り、従来の端子ボックスを示す図3と外観は同じである。なお、図5は、特許文献2の端子ボックスのバイパスダイオードモジュールの内部を示す図4と対比して描かれているが、本発明の対象とするモジュール内蔵タイプの端子ボックスは、図5に示す形状のものに限定されず、予め形成されたバイパスダイオードモジュールを嵌め込むタイプの端子ボックスであればいずれも包含される。 FIG. 5 schematically shows the inside of the bypass diode module used in the terminal box of the present invention. The terminal box of the present invention is attached to individual solar cell panels and used to safely insulate and take out electric power from the individual solar cell panels. The inside of the terminal box of the present invention is the same as FIG. 3 showing the conventional terminal box unless the inside of the bypass diode module is exposed and shown as shown in FIG. FIG. 5 is drawn in contrast to FIG. 4 showing the inside of the bypass diode module of the terminal box of Patent Document 2, but the module built-in type terminal box of the present invention is shown in FIG. The terminal box is not limited to a shape, and any terminal box of a type into which a pre-formed bypass diode module is fitted is included.
 図3及び5において、1は、樹脂製の端子ボックスであり、2は、端子ボックス1に内蔵されたバイパスダイオードモジュールである。3は、端子板であり、少なくとも一対で構成される。端子板3は、バイパスダイオードモジュールの外側に突出している部分3A,3A′及びバイパスダイオードモジュールの内側に位置されている部分3Bから構成されており、3Aの部分は、リード6に接続され、3A′の部分は、外部接続用ケーブル7と接続される。なお、本発明において、端子板とは、太陽電池パネルからの電流を最終的に外部接続用ケーブルに導くために使用される端子板を意味し、面実装により、又はリードもしくはピン挿入により、又は自立型実装によりプリント基板に固着される端子板は含まない。4は、端子板3を相互に接続するバイパスダイオードであり、図5では三個存在する。バイパスダイオード4は、チップ9とリード足部分10からなる。5′は、例えばトランスファーモールド法により形成された、樹脂封止されたパッケージであり、バイパスダイオードモジュール2内の端子板3B及びバイパスダイオード4を絶縁するためにこれらを封止している。6はリードであり、太陽電池パネルからの電力取り出し線である。7は、隣接する太陽電池パネル間の電気的接続のための外部接続用ケーブルである。8は、太陽電池パネルの裏面から取り出されたリード6を端子ボックス1内に引き込むための開口部であり、端子ボックス1の太陽電池パネル(図示せず)に面する側に設けられている。 3 and 5, 1 is a resin terminal box, and 2 is a bypass diode module built in the terminal box 1. Reference numeral 3 denotes a terminal board, which is composed of at least a pair. The terminal board 3 is composed of portions 3A and 3A ′ projecting outside the bypass diode module and a portion 3B positioned inside the bypass diode module. The portion 3A is connected to the lead 6 and 3A. The portion 'is connected to the external connection cable 7. In the present invention, the terminal board means a terminal board used for finally leading the current from the solar cell panel to the cable for external connection, by surface mounting, by lead or pin insertion, or The terminal board fixed to the printed circuit board by self-standing mounting is not included. Reference numeral 4 denotes a bypass diode for connecting the terminal boards 3 to each other, and there are three bypass diodes in FIG. The bypass diode 4 includes a chip 9 and a lead leg portion 10. Reference numeral 5 ′ denotes a resin-sealed package formed by, for example, a transfer molding method, and seals the terminal board 3 </ b> B and the bypass diode 4 in the bypass diode module 2 to insulate them. 6 is a lead, which is a power take-out line from the solar cell panel. 7 is an external connection cable for electrical connection between adjacent solar cell panels. Reference numeral 8 denotes an opening for drawing the lead 6 taken out from the back surface of the solar cell panel into the terminal box 1 and is provided on the side of the terminal box 1 facing the solar cell panel (not shown).
 本発明の端子ボックスの最大の特徴は、バイパスダイオードモジュール内に位置される端子板3Bの平面にそれを貫通するスリット11が形成されていることにある。このようなスリットが形成されている端子板の周囲及び端子板を相互に接続するバイパスダイオードの周囲にトランスファーモールド法によって封止樹脂を流し込んでバイパスダイオードモジュールを形成すると、封止樹脂はスリットを貫通して固化し、形成されたバイパスダイオードモジュールにおいて、封止樹脂とバイパスダイオードモジュール内に位置される端子板との間の密着性が向上される。 The greatest feature of the terminal box of the present invention is that a slit 11 is formed in the plane of the terminal plate 3B positioned in the bypass diode module. When a bypass resin module is formed by injecting a sealing resin by a transfer molding method around the terminal board where such slits are formed and around the bypass diode connecting the terminal boards to each other, the sealing resin penetrates the slits. In the bypass diode module thus solidified, the adhesion between the sealing resin and the terminal plate located in the bypass diode module is improved.
 本発明の端子ボックスにおいて、スリットが形成される端子板の平面は、バイパスダイオードモジュールの内部に位置される部分の平面(つまり、図5において、点線で囲まれた部分の平面)であれば特に限定されない。スリットの形成位置は、特に限定されないが、外部からのモジュール内への湿分の侵入、及び侵入した湿分によるダイオードのチップ部分の変性を効率的に防止するためには、外部からの湿分の侵入口となりうるモジュールの外壁(図5において点線で示される)の近くの位置や、湿分により変性されやすいバイパスダイオードのチップ9の近くの位置にスリットを形成することが好ましい。 In the terminal box of the present invention, the plane of the terminal plate in which the slit is formed is particularly a plane of a portion located inside the bypass diode module (that is, a plane of a portion surrounded by a dotted line in FIG. 5). It is not limited. The slit formation position is not particularly limited, but in order to efficiently prevent moisture from entering the module from the outside and the chip portion of the diode from being denatured by the penetrated moisture, moisture from the outside can be effectively prevented. It is preferable to form a slit at a position near the outer wall of the module (indicated by a dotted line in FIG. 5) that can be an intrusion hole, or a position near the bypass diode chip 9 that is easily denatured by moisture.
 スリットの形状が、楕円形や矩形や矩形の角を丸めたものなどの長手方向と短手方向を有する細長い形状である場合、端子板3B上のスリットの配向を考慮することが好ましい。具体的には、この場合、スリット11の長手方向が、バイパスダイオードのリード足部分10の長手方向に対して略直角であることが好ましい。あるいは、バイパスダイオードモジュールの形状が図1~5に示すような略直方体である場合、スリットの長手方向が、バイパスダイオードモジュールの長手方向に対して略直角であることが好ましい。これにより、封止樹脂と、端子板を構成する金属と、バイパスダイオードのチップを構成する材料(例えば、シリコン)との間の熱膨張係数の差によってもたらされる応力歪みを効率的に防止することができる。逆に、スリットの長手方向が、バイパスダイオードのリード足部分の長手方向及び/又はバイパスダイオードモジュールの長手方向に対して平行であると(つまり、図5において、スリット11の配向を90°回転させると)、発生しうる応力歪みの方向とスリットの長手方向とが一致してしまい、応力歪みを防止する効果に劣るおそれがある。 When the shape of the slit is an elongated shape having a longitudinal direction and a short direction, such as an ellipse, a rectangle, or a rounded corner of the rectangle, it is preferable to consider the orientation of the slit on the terminal board 3B. Specifically, in this case, the longitudinal direction of the slit 11 is preferably substantially perpendicular to the longitudinal direction of the lead leg portion 10 of the bypass diode. Alternatively, when the shape of the bypass diode module is a substantially rectangular parallelepiped as shown in FIGS. 1 to 5, it is preferable that the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module. This effectively prevents stress distortion caused by the difference in thermal expansion coefficient between the sealing resin, the metal constituting the terminal board, and the material constituting the bypass diode chip (for example, silicon). Can do. Conversely, when the longitudinal direction of the slit is parallel to the longitudinal direction of the lead leg portion of the bypass diode and / or the longitudinal direction of the bypass diode module (that is, in FIG. 5, the orientation of the slit 11 is rotated by 90 °. And the direction of the stress strain that can occur and the longitudinal direction of the slit coincide with each other, and there is a possibility that the effect of preventing the stress strain is inferior.
 スリットの寸法は、端子板の強度を維持できる限り特に限定されないが、スリットの最大幅は、そのスリットが存在する端子板の幅の1/2以下であることが好ましい。ここで、スリットの最大幅とは、そのスリットが存在する端子板の幅方向に見たスリットの幅のうち、最大のものを指す。なお、端子板の幅方向に見た場合に複数のスリットが存在する場合、スリットの最大幅は、各スリットの幅の合計のうち最大のものを指す。スリットの最大幅が大きいほど、封止樹脂と端子板との間の密着性向上効果に優れる。しかし、スリットの最大幅を大きくすると、逆に、端子板の有効幅が小さくなり、端子板を通って流れることができる電流の量に上限が出てきてしまう。もちろん、許容量以上の電流を無理矢理流すことも可能であるが、この場合、バイパスダイオードの順方向電圧Vが増大したり、バイパスダイオードが発熱するおそれがある。このような端子板の許容通電電流量との兼ね合いから、スリットの最大幅は、そのスリットが存在する端子板の幅の1/2以下であることが好ましい。 Although the dimension of a slit is not specifically limited as long as the intensity | strength of a terminal board can be maintained, It is preferable that the maximum width of a slit is 1/2 or less of the width | variety of the terminal board in which the slit exists. Here, the maximum width of the slit refers to the maximum width among the widths of the slit viewed in the width direction of the terminal board in which the slit exists. When there are a plurality of slits when viewed in the width direction of the terminal board, the maximum width of the slits indicates the maximum of the total widths of the respective slits. The greater the maximum width of the slit, the better the effect of improving the adhesion between the sealing resin and the terminal board. However, increasing the maximum width of the slit, conversely, reduces the effective width of the terminal plate and places an upper limit on the amount of current that can flow through the terminal plate. Of course, it is also possible to flow above the allowable level current forced, in this case, or the forward voltage V F is increased bypass diodes, the bypass diode is likely to generate heat. In view of such a balance with the allowable energization current amount of the terminal plate, it is preferable that the maximum width of the slit is ½ or less of the width of the terminal plate in which the slit exists.
 本発明の端子ボックスにおいては、上述のスリットの形成に加えて、端子板の表面の少なくとも一部が、粗面化されていることが好ましい。粗面化によって端子板の表面に微細な凹凸(山部分及び谷部分)が形成される。この凹凸に封止樹脂が入り込むことによって、封止樹脂と端子板との間の密着性を一層向上させることができる。 In the terminal box of the present invention, it is preferable that at least a part of the surface of the terminal plate is roughened in addition to the formation of the slits described above. By roughening, fine irregularities (peaks and valleys) are formed on the surface of the terminal board. When the sealing resin enters the irregularities, the adhesion between the sealing resin and the terminal board can be further improved.
 粗面化は、バイパスダイオードモジュール内に位置される端子板の表面の全ての部分に施してもよいが、特に、端子板のスリット形成部分の周囲に、具体的には、スリット形成部分の周囲の幅5mm~10mm程度の領域に粗面化を施すことが、封止樹脂と端子板との間の密着性を効率的に向上させるために好ましい。 The roughening may be applied to all parts of the surface of the terminal board located in the bypass diode module, but in particular, around the slit forming part of the terminal board, specifically around the slit forming part. It is preferable to roughen the region having a width of about 5 mm to 10 mm in order to efficiently improve the adhesion between the sealing resin and the terminal board.
 粗面化の方法は、特に限定されず、端子板を構成する金属板をエンボスローラーで引き延ばす方法、化学薬品を使用したエッチング法、物理的に表面を叩くサンドブラスト法やプレス金型によるパンチング法などの従来周知の方法を採用することができる。 The surface roughening method is not particularly limited, such as a method of stretching a metal plate constituting a terminal plate with an embossing roller, an etching method using chemicals, a sandblasting method of physically hitting the surface, a punching method using a press die, etc. The conventionally well-known method can be adopted.
 粗面化のレベルについては、端子板の粗面化されている表面における山部分の最高点の高さと山部分に隣接する谷部分の最低点の高さの差が10μm以上であることが好ましく、50μm以上であることがさらに好ましい。この高さの差が上記下限未満である場合、封止樹脂と端子板との間の密着性を向上させる効果に劣るおそれがある。この高さの差の上限は、特に限定されないが、例えば、機械的強度の関係より、端子板の厚さの1/3以下であることが望ましい。 Regarding the level of roughening, it is preferable that the difference between the height of the highest point of the peak portion on the roughened surface of the terminal board and the height of the lowest point of the valley portion adjacent to the peak portion is 10 μm or more. More preferably, it is 50 μm or more. When the difference in height is less than the above lower limit, the effect of improving the adhesion between the sealing resin and the terminal board may be inferior. The upper limit of the difference in height is not particularly limited. For example, it is desirable that the difference in height is 1/3 or less of the thickness of the terminal board because of mechanical strength.
 本発明の端子ボックスにおいては、図6に示すように、外部接続用ケーブルに接続される端子板の末端に、外部接続用ケーブルの内部導体である芯線を受容し、その状態でかしめるためのU字形断面部分3A′が形成されている場合、U字形断面部分3A′に隣接する、バイパスダイオードモジュール内に位置される部分の端子板に、端子板平面の幅を減少するくびれ3Cが形成されていることが好ましい。 In the terminal box of the present invention, as shown in FIG. 6, the core wire, which is the internal conductor of the external connection cable, is received at the end of the terminal plate connected to the external connection cable and caulked in that state. When the U-shaped cross-section portion 3A ′ is formed, a constriction 3C for reducing the width of the terminal plate plane is formed on the terminal plate located in the bypass diode module adjacent to the U-shaped cross-section portion 3A ′. It is preferable.
 まず、U字形断面部分3A′の詳細な構造について、図10及び図11を使用して説明する。図10は、図6のバイパスダイオードモジュールをAの方向から見た側面図であり、部分3A′がU字形断面を有することが理解できる。図11は、図6のバイパスダイオードモジュールをBの方向から見た透視図である。U字形断面部分3A′は、図11に示すように端子板3の先端に幅狭部分3′′とそれに続く幅広部分3′′′を設け、幅狭部分3′′を下方に折り曲げ、幅広部分3′′′をそこから水平に折り曲げ、幅広部分3′′′の両側をそこから上方に折り曲げることによって形成することができる。U字形断面部分3A′(及び端子板3)を構成する金属材料は、良好な電気伝導性を有するものなら特に限定されず、例えば、銅、鉄、又はこれらの金属と他の金属の合金などであることができる。U字形断面部分3A′の内面側には、外部接続用ケーブル7の先端の外周面が、外部の絶縁被覆を除去されて内部の芯線7′を露出された状態で受容される。その後、U字形断面部分3A′は、U字形断面を押しつぶすように左右からかしめられ、これによって外部接続用ケーブル7の内部導体である芯線7′が端子板に接続される。端子板と外部接続用ケーブルの間の接続強度は、このかしめだけでも十分であるが、所望により、かしめられた部分を半田付けすることで、接続強度をさらに向上することができる。本発明者らは、特許文献2において、このようなU字形断面部分を利用した端子板と外部接続用ケーブルの接続方法は、従来の端子板と外部接続用ケーブルの重ね合わせからの半田付けによる接続方法と比較して簡便かつ容易であることを見出している。 First, the detailed structure of the U-shaped cross section 3A ′ will be described with reference to FIGS. FIG. 10 is a side view of the bypass diode module of FIG. 6 as viewed from the direction A, and it can be understood that the portion 3A ′ has a U-shaped cross section. 11 is a perspective view of the bypass diode module of FIG. As shown in FIG. 11, the U-shaped cross-section 3A ′ is provided with a narrow portion 3 ″ and a wide portion 3 ″ following the end of the terminal plate 3, and the narrow portion 3 ″ is bent downward to widen the U-shaped cross section It can be formed by folding the part 3 "" horizontally from there and bending both sides of the wide part 3 "" upward from it. The metal material constituting the U-shaped cross section 3A ′ (and the terminal plate 3) is not particularly limited as long as it has good electrical conductivity. For example, copper, iron, or an alloy of these metals and other metals Can be. On the inner surface side of the U-shaped cross-section portion 3A ′, the outer peripheral surface at the tip of the external connection cable 7 is received in a state where the outer insulating coating is removed and the inner core wire 7 ′ is exposed. Thereafter, the U-shaped cross-section portion 3A ′ is caulked from the left and right so as to crush the U-shaped cross section, whereby the core wire 7 ′, which is the internal conductor of the external connection cable 7, is connected to the terminal plate. The connection strength between the terminal board and the external connection cable is sufficient only by this caulking, but the connection strength can be further improved by soldering the caulked portion if desired. In Patent Document 2, the present inventors have disclosed a method of connecting a terminal plate and an external connection cable using such a U-shaped cross-section by soldering from a conventional overlap of the terminal plate and the external connection cable. It has been found that it is simple and easy compared to the connection method.
 今回、本発明者らは、バイパスダイオードの電気的特性の劣化の防止の観点からさらに検討したところ、外部接続用ケーブル7の端子板への接続作業においてU字形断面部分3A′を押しつぶすように左右からかしめる際に、機械的応力が発生し、この機械的応力が端子板を通じてバイパスダイオードのチップ部分に伝達されると、チップ部分の電気的特性の劣化をもたらすおそれがあることを見出した。そして、この機械的応力のチップ部分への伝達を防止するための好適な方法について鋭意検討した結果、U字形断面部分3A′に隣接する、バイパスダイオードモジュール内に位置される部分の端子板に、端子板平面の幅を減少するくびれ3Cを形成することによって、このくびれ3Cにおいて機械的応力を緩和して、チップ部分への機械的応力の伝達を効果的に防止できることを見出した。 This time, the present inventors further examined from the viewpoint of preventing the deterioration of the electrical characteristics of the bypass diode. As a result, the U-shaped cross-sectional portion 3A ′ is crushed in the operation of connecting the external connection cable 7 to the terminal plate. It has been found that mechanical stress is generated during the caulking, and when this mechanical stress is transmitted to the chip portion of the bypass diode through the terminal plate, the electrical characteristics of the chip portion may be deteriorated. As a result of intensive studies on a suitable method for preventing the transmission of the mechanical stress to the chip portion, the terminal plate located in the bypass diode module adjacent to the U-shaped cross-section portion 3A ' It has been found that by forming the constriction 3C that reduces the width of the terminal plate plane, the mechanical stress can be relieved in the constriction 3C and the transmission of the mechanical stress to the chip portion can be effectively prevented.
 くびれの形状や寸法は、U字形断面部分の押しつぶしによって発生する機械的応力を効果的に緩和できる形状及び寸法である限り、特に限定されない。例えば、くびれは、図6に示すように端子板の左右両側に形成するだけでなく、図7の左下の丸で囲んだ部分に示されるように端子板の右側のみに形成することもできるし、図8の左下の丸で囲んだ部分に示されるように端子板の左側のみに形成することもできる。また、くびれの代わりに、図9の丸で囲んだ部分に示されるような横長のスリットを形成しても、くびれと同様に、機械的応力を緩和することができる。 The shape and size of the constriction are not particularly limited as long as the shape and size can effectively relieve the mechanical stress generated by crushing the U-shaped cross section. For example, the constriction can be formed not only on the left and right sides of the terminal board as shown in FIG. 6, but also on the right side of the terminal board as shown in the lower left circled part of FIG. 8 can also be formed only on the left side of the terminal board as shown in the circled portion at the lower left of FIG. Further, if a horizontally long slit as shown in a circled portion in FIG. 9 is formed instead of the constriction, the mechanical stress can be relieved similarly to the constriction.
 本発明の端子ボックスにおいて使用するバイパスダイオードとしては、バイパスダイオードの作動時のダイオードチップの発熱を効率的に抑制する点からは、順方向電圧VFが低いショットキーバリアダイオードを使用することが好ましい。具体的には、300Kの温度で測定したときに0.70eV以下のバリアハイトを有するショットキーバリア金属を含むショットキーバリアダイオードを使用することが好ましい。また、ショットキーバリアダイオード以外に、ショットキーバリアダイオードチップにMOS構造からなるMOSダイオードを併用して1チップ複合化した形態のチップを使用してもよい。特に、MOSダイオードにプレーナ構造ではなくトレンチを形成したトレンチMOSダイオード構造を使用してもよい。この場合、MOS構造をプレーナからトレンチに変更することで、ダイオードチップの小型化が図れる等の好ましい場合がある。 As the bypass diode used in the terminal box of the present invention, a Schottky barrier diode having a low forward voltage VF is preferably used from the viewpoint of efficiently suppressing heat generation of the diode chip when the bypass diode is activated. Specifically, it is preferable to use a Schottky barrier diode including a Schottky barrier metal having a barrier height of 0.70 eV or less when measured at a temperature of 300K. Further, in addition to the Schottky barrier diode, a chip in a form in which one chip is combined by using a MOS diode having a MOS structure in combination with a Schottky barrier diode chip may be used. In particular, a trench MOS diode structure in which a trench is formed in the MOS diode instead of a planar structure may be used. In this case, there is a case that the diode chip can be downsized by changing the MOS structure from the planar to the trench.
 上述のバリアハイトとは、N型シリコンに対するショットキーバリア金属のバリアハイト(φBn)であり、半導体の分野でN型半導体と金属との接触特性を表わすために一般的に使用されるパラメータである。
 なお、バリアハイトは、下記の式によって定義される。
Figure JPOXMLDOC01-appb-I000001
 式中、kは、ボルツマン定数を意味し、Tは、絶対温度を意味し、qは、単位電荷を意味し、A**は、リチャードソン係数を意味し、Jsは、ショットキーバリア面積S当たりの飽和電流を意味する。なお、リチャードソン係数は、N型シリコンの場合120A/cm/kである。
The above-described barrier height is a barrier height (φ Bn ) of a Schottky barrier metal with respect to N-type silicon, and is a parameter generally used to express contact characteristics between an N-type semiconductor and a metal in the semiconductor field.
The barrier height is defined by the following equation.
Figure JPOXMLDOC01-appb-I000001
In the formula, k means Boltzmann constant, T means absolute temperature, q means unit charge, A ** means Richardson coefficient, Js means Schottky barrier area S Means the saturation current. Note that the Richardson coefficient is 120 A / cm 2 / k 2 in the case of N-type silicon.
 本発明の端子ボックスのバイパスダイオードがショットキーバリアダイオード構造を有する場合、その中に含まれるショットキーバリアダイオード中のショットキーバリア金属のバリアハイトは、300Kの温度で測定したときに0.70eV以下であることが必要であり、好ましくは0.50~0.70eVである。バリアハイトは、ショットキーバリア面積Sが一定の場合、ダイオードの順方向電圧降下VFに比例することが知られている。従って、ダイオードのチップのバリアハイトが低いということは、ダイオードの順方向電圧降下が低いということであり、これは、バイパスダイオードの動作時の発熱量が小さいということを意味する。ただし、バリアハイトが0.50eVよりも低い場合、順方向電圧降下VFはより低くなるが、その反面、(相反関係にある)漏れ電流IRが急上昇して、ダイオードの発熱による熱暴走破壊のおそれがある。そのため、バリアハイトは0.50eVよりも高いことが望ましい。 When the bypass diode of the terminal box of the present invention has a Schottky barrier diode structure, the barrier height of the Schottky barrier metal in the Schottky barrier diode included therein is 0.70 eV or less when measured at a temperature of 300K. It is necessary to be 0.50 to 0.70 eV. It is known that the barrier height is proportional to the forward voltage drop VF of the diode when the Schottky barrier area S is constant. Therefore, the low barrier height of the diode chip means that the forward voltage drop of the diode is low, which means that the amount of heat generated during operation of the bypass diode is small. However, when the barrier height is lower than 0.50 eV, the forward voltage drop VF is lower, but on the other hand, the leakage current IR (which has a reciprocal relationship) increases rapidly, and there is a risk of thermal runaway destruction due to heat generation of the diode. is there. Therefore, it is desirable that the barrier height is higher than 0.50 eV.
 ショットキーバリアダイオードチップにMOS構造からなるMOSダイオードを併用して、1チップ複合化した形態のチップの構造について、図12を参照して説明する。図12は、ショットキーバリアダイオードチップにMOS構造からなるMOSダイオードを併用して1チップ複合化した形態のチップの横断面を示す概略図である。図12において、12は、N型基板であり、13は、N型のエピタキシャル層であり、14は、300Kの温度で測定したときに0.70eV以下のバリアハイトを有するショットキーバリア金属を含むショットキー電極であり、15は、アノード電極となる表面電極であり、16は、MOS構造であり、17は、N型のエピタキシャル層13内に掘られたトレンチであり、18は、多結晶シリコンからなるゲートであり、19は、MOS構造を形成するゲート酸化膜である。
 なお、1チップ複合化のためにショットキー電極14とゲート18とは、共通のアノード電極となる表面電極15と電気的にコンタクトされている。また、図示していないが、N型シリコン基板12の下層部には、オーミックを有する、ショットキーバリアダイオードとMOSダイオードの共通のカソード電極が配置されているものとする。
With reference to FIG. 12, the structure of a chip in which a Schottky barrier diode chip is combined with a MOS diode having a MOS structure to form a single chip will be described. FIG. 12 is a schematic view showing a cross-section of a chip in a form in which one chip is combined using a MOS diode having a MOS structure in combination with a Schottky barrier diode chip. In FIG. 12, 12 is an N + type substrate, 13 is an N type epitaxial layer, and 14 is a Schottky barrier metal having a barrier height of 0.70 eV or less when measured at a temperature of 300K. 15 is a surface electrode serving as an anode electrode, 16 is a MOS structure, 17 is a trench dug in the N - type epitaxial layer 13, and 18 is a multi-layer electrode. A gate made of crystalline silicon, and 19 is a gate oxide film forming a MOS structure.
Note that the Schottky electrode 14 and the gate 18 are in electrical contact with the surface electrode 15 serving as a common anode electrode for one-chip combination. Although not shown, it is assumed that a cathode electrode common to a Schottky barrier diode and a MOS diode having an ohmic contact is disposed in a lower layer portion of the N + type silicon substrate 12.
 ショットキーバリアダイオードチップにMOS構造からなるMOSダイオードを併用して、1チップ複合化した形態のチップの特徴は、N型のエピタキシャル層13からショットキー電極14にわたってトレンチ17が形成されており、その中に多結晶シリコンからなるゲート18が埋め込まれており、トレンチ17とゲート18の間に、酸化膜19が形成されていることにある。このようなトレンチゲート構造を有することにより、単位セル面積を縮小することができ、結果としてダイオードチップの小型化を図ることができる。また、このようなMOS構造を有することにより、ダイオードチップの高温領域での逆電流を低減させることができる。 A chip having a MOS chip combined with a Schottky barrier diode chip to form a single chip is characterized in that a trench 17 is formed from the N type epitaxial layer 13 to the Schottky electrode 14, A gate 18 made of polycrystalline silicon is buried therein, and an oxide film 19 is formed between the trench 17 and the gate 18. By having such a trench gate structure, the unit cell area can be reduced, and as a result, the diode chip can be miniaturized. Further, by having such a MOS structure, the reverse current in the high temperature region of the diode chip can be reduced.
 なお、本発明の端子ボックスが配置される太陽電池パネルの種類や大きさ、セルの数などによって決定されるバイパスダイオードの要求特性に応じて、ショットキーバリアダイオード構造以外に、ショットキーバリアダイオードチップにMOS構造からなるMOSダイオードを併用して1チップ複合化した形態のチップを使用してもよい。特に、プレーナ構造でゲートを形成した形態の他に、図12に示すようなシリコン表面にトレンチを掘った後にゲートを形成したトレンチMOSダイオード構造の形態でもよく、チップサイズや、トレンチを掘る製造装置の有無、電気的特性等を考慮して適宜選択することができる。 In addition to the Schottky barrier diode structure, a Schottky barrier diode chip is used depending on the required characteristics of the bypass diode determined by the type and size of the solar cell panel in which the terminal box of the present invention is arranged, the number of cells, etc. Alternatively, a chip having a single chip composite using a MOS diode having a MOS structure may be used. In particular, in addition to the form in which the gate is formed in the planar structure, a form of a trench MOS diode structure in which the gate is formed after the trench is dug in the silicon surface as shown in FIG. It can be appropriately selected in consideration of the presence or absence, electrical characteristics, and the like.
 以下、実施例により本発明の効果をさらに詳細に示すが、本発明は、これらの実施例に限定されるものではない。なお、実施例中の特性値の評価は、以下の方法に従った。 Hereinafter, the effects of the present invention will be described in more detail by way of examples. However, the present invention is not limited to these examples. In addition, evaluation of the characteristic value in an Example followed the following method.
(1)封止樹脂の剥離
 熱衝撃試験後のバイパスダイオードモジュールについて、バイパスダイオードモジュール内の封止樹脂と端子板との界面を超音波顕微鏡で観察し、封止樹脂が端子板から剥離しているかどうかを確認した。なお、超音波顕微鏡は、音響特性の異なる材料界面で超音波が反射される特徴を活かし、その反射波や透過波を解析することで、非破壊で構造を調べる装置である。
(1) Separation of sealing resin Regarding the bypass diode module after the thermal shock test, the interface between the sealing resin and the terminal board in the bypass diode module was observed with an ultrasonic microscope, and the sealing resin was peeled off from the terminal board. Checked whether or not. Note that an ultrasonic microscope is a device that examines a structure in a non-destructive manner by analyzing reflected waves and transmitted waves by utilizing the characteristic that ultrasonic waves are reflected at material interfaces having different acoustic characteristics.
(2)バイパスダイオードの電気的特性の劣化
 熱衝撃試験前後のバイパスダイオードモジュールについて、バイパスダイオードの逆方向電圧を測定し、熱衝撃試験前と比べて熱衝撃試験後に、逆方向電圧が、規定した値以上低下している場合、バイパスダイオードの電気的特性が劣化していると判断した。
(2) Degradation of the electrical characteristics of the bypass diode For the bypass diode module before and after the thermal shock test, the reverse voltage of the bypass diode was measured, and the reverse voltage was specified after the thermal shock test compared to before the thermal shock test. When the value was lower than the value, it was judged that the electrical characteristics of the bypass diode were deteriorated.
実施例1
 粗面化されていない端子板を使用して、図5に示す形状のバイパスダイオードモジュールを100個作成し、熱衝撃試験に供した。熱衝撃試験は、バイパスダイオードモジュールを175℃の高温条件下に2時間暴露し、続いて-55℃の低温条件下に2時間暴露するサイクルを30回繰り返すことにより行なった。
 そして、(1)封止樹脂の剥離、及び(2)バイパスダイオードの電気的特性の劣化を上述の方法で評価した。評価結果を表1に示す。
Example 1
Using a non-roughened terminal plate, 100 bypass diode modules having the shape shown in FIG. 5 were prepared and subjected to a thermal shock test. The thermal shock test was performed by repeating a cycle in which the bypass diode module was exposed to a high temperature condition of 175 ° C. for 2 hours and subsequently exposed to a low temperature condition of −55 ° C. for 2 hours.
Then, (1) peeling of the sealing resin and (2) deterioration of the electrical characteristics of the bypass diode were evaluated by the above-described methods. The evaluation results are shown in Table 1.
実施例2
 実施例1において、山部分の最高点の高さと前記山部分に隣接する谷部分の最低点の高さの差が150μm(端子板の厚さは600μmであったので、この高さの差は、端子板の厚さの1/4に相当する)になるようにエンボスを付与されたエンボスローラーで引き延ばされて粗面化された表面を有する端子板を使用するように変更した以外は、実施例1と同様にして、バイパスダイオードモジュールを100個作成し、熱衝撃試験及び評価を行なった。評価結果を表1に示す。
Example 2
In Example 1, the difference between the height of the highest point of the peak portion and the height of the lowest point of the valley portion adjacent to the peak portion was 150 μm (the thickness of the terminal board was 600 μm. Except that it is changed to use a terminal board having a roughened surface that is stretched by an embossing roller that is embossed so as to be 1/4 of the thickness of the terminal board) In the same manner as in Example 1, 100 bypass diode modules were prepared and subjected to a thermal shock test and evaluation. The evaluation results are shown in Table 1.
実施例3
 実施例1において、バイパスダイオードモジュールの形状を、図6に示す端子板にくびれ有りのものに変更した以外は、実施例1と同様にして、バイパスダイオードモジュールを100個作成し、熱衝撃試験及び評価を行なった。評価結果を表1に示す。
Example 3
In Example 1, except that the shape of the bypass diode module was changed to one having a constriction in the terminal board shown in FIG. 6, 100 bypass diode modules were prepared in the same manner as in Example 1, and the thermal shock test and Evaluation was performed. The evaluation results are shown in Table 1.
比較例1
 実施例1において、スリットが全く形成されていない端子板を使用するように変更した以外は、実施例1と同様にして、バイパスダイオードモジュールを100個作成し、熱衝撃試験及び評価を行なった。評価結果を表1に示す。
Comparative Example 1
In Example 1, except that it changed so that the terminal board in which the slit was not formed at all was used, 100 bypass diode modules were produced similarly to Example 1, and the thermal shock test and evaluation were performed. The evaluation results are shown in Table 1.
比較例2
 実施例1において、スリット11の配向を90°回転させて、スリット11の長手方向が、バイパスダイオードのリード足部分10の長手方向及びバイパスダイオードモジュールの長手方向に対して平行になるように変更した以外は、実施例1と同様にして、バイパスダイオードモジュールを100個作成し、熱衝撃試験及び評価を行なった。評価結果を表1に示す。
Comparative Example 2
In Example 1, the orientation of the slit 11 was rotated 90 °, and the longitudinal direction of the slit 11 was changed to be parallel to the longitudinal direction of the lead foot portion 10 of the bypass diode and the longitudinal direction of the bypass diode module. Except for the above, 100 bypass diode modules were prepared in the same manner as in Example 1, and the thermal shock test and evaluation were performed. The evaluation results are shown in Table 1.
Figure JPOXMLDOC01-appb-T000002
Figure JPOXMLDOC01-appb-T000002
 表1からわかるように、本発明の条件を満足する実施例1~3の端子ボックスはいずれも、封止樹脂の剥離がほとんどなく、バイパスダイオードの電気的特性の劣化もほとんど認められない。特に、実施例2,3は、封止樹脂の剥離の形成が全くなく、バイパスダイオードの電気的特性の劣化も全く認められない。これに対して、端子板にスリットが全く形成されていない比較例1は、封止樹脂の剥離の形成がかなりの個数に認められ、それに伴ないバイパスダイオードの電気的特性の劣化も認められる。また、端子板にスリットが形成されていても、スリットの長手方向がバイパスダイオードのリード足部分又はバイパスダイオードモジュールの長手方向に対して平行である比較例2は、封止樹脂の剥離を生じた割合が実施例1~3と比べて増大し、それに伴ないバイパスダイオードの電気的特性の劣化の割合も実施例1~3と比べて増大していることが認められる。 As can be seen from Table 1, in all of the terminal boxes of Examples 1 to 3 that satisfy the conditions of the present invention, there is almost no peeling of the sealing resin, and almost no deterioration of the electrical characteristics of the bypass diode is observed. In particular, in Examples 2 and 3, there was no formation of peeling of the sealing resin, and no deterioration of the electrical characteristics of the bypass diode was observed. On the other hand, in Comparative Example 1 in which no slits are formed on the terminal board, a considerable number of sealing resin peelings are observed, and the electrical characteristics of the bypass diode are also deteriorated accordingly. Moreover, even if the terminal board has a slit, Comparative Example 2 in which the longitudinal direction of the slit is parallel to the lead foot portion of the bypass diode or the longitudinal direction of the bypass diode module caused the sealing resin to peel off. It can be seen that the ratio increases compared to Examples 1 to 3, and the accompanying deterioration rate of the electrical characteristics of the bypass diode also increases compared to Examples 1 to 3.
 本発明の太陽電池パネル用端子ボックスは、厳しい熱衝撃試験に供しても封止樹脂が端子板から剥離することはなく、また、バイパスダイオード内に侵入した湿気の気化による体積膨張や各材料間の熱樹脂係数の差による応力歪みの影響を受けないため、バイパスダイオードの電気的特性が長期間劣化しない。従って、本発明は、厳しい環境にさらされる太陽電池パネル用端子ボックスとして極めて有用である。 The terminal box for a solar cell panel of the present invention does not peel off the sealing resin from the terminal plate even when subjected to a severe thermal shock test. Therefore, the electrical characteristics of the bypass diode are not deteriorated for a long period of time. Therefore, this invention is very useful as a terminal box for solar cell panels exposed to a severe environment.

Claims (9)

  1.  少なくとも一対の端子板と、前記端子板を相互に接続するバイパスダイオードとを含むバイパスダイオードモジュールを内蔵した太陽電池パネル用端子ボックスであって、バイパスダイオードモジュール内が封止樹脂で満たされており、バイパスダイオードモジュール内に位置される端子板の平面に、端子板を貫通するスリットが形成されており、封止樹脂が前記スリットを貫通しており、スリットの形状が、楕円形又は矩形又は矩形の角を丸めたものであり、スリットの長手方向が、バイパスダイオードのリード足部分の長手方向に対して略直角であることを特徴とする太陽電池パネル用端子ボックス。 A solar cell panel terminal box containing a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the inside of the bypass diode module is filled with a sealing resin, A slit penetrating the terminal plate is formed on the plane of the terminal plate located in the bypass diode module, the sealing resin passes through the slit, and the shape of the slit is elliptical, rectangular or rectangular. A terminal box for a solar cell panel having rounded corners, wherein the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the lead leg portion of the bypass diode.
  2.  少なくとも一対の端子板と、前記端子板を相互に接続するバイパスダイオードとを含むバイパスダイオードモジュールを内蔵した太陽電池パネル用端子ボックスであって、バイパスダイオードモジュール内が封止樹脂で満たされており、バイパスダイオードモジュール内に位置される端子板の平面に、端子板を貫通するスリットが形成されており、封止樹脂が前記スリットを貫通しており、スリットの形状が、楕円形又は矩形又は矩形の角を丸めたものであり、バイパスダイオードモジュールの形状が略直方体であり、スリットの長手方向が、バイパスダイオードモジュールの長手方向に対して略直角であることを特徴とする太陽電池パネル用端子ボックス。 A solar cell panel terminal box containing a bypass diode module including at least a pair of terminal plates and a bypass diode connecting the terminal plates to each other, and the inside of the bypass diode module is filled with a sealing resin, A slit penetrating the terminal plate is formed on the plane of the terminal plate located in the bypass diode module, the sealing resin passes through the slit, and the shape of the slit is elliptical, rectangular or rectangular. A terminal box for a solar cell panel, which has rounded corners, the shape of the bypass diode module is a substantially rectangular parallelepiped, and the longitudinal direction of the slit is substantially perpendicular to the longitudinal direction of the bypass diode module.
  3.  スリットの最大幅は、そのスリットが存在する端子板の幅の1/2以下であることを特徴とする請求項1又は2に記載の太陽電池パネル用端子ボックス。 3. The solar cell panel terminal box according to claim 1 or 2, wherein the maximum width of the slit is ½ or less of the width of the terminal plate in which the slit exists.
  4.  端子板の表面の少なくとも一部が、粗面化されていることを特徴とする請求項1~3のいずれかに記載の太陽電池パネル用端子ボックス。 The solar cell panel terminal box according to any one of claims 1 to 3, wherein at least a part of the surface of the terminal plate is roughened.
  5.  封止樹脂で満たされた端子板のスリット形成面の周囲が、粗面化されていることを特徴とする請求項4に記載の太陽電池パネル用端子ボックス。 The terminal box for a solar cell panel according to claim 4, wherein the periphery of the slit forming surface of the terminal plate filled with the sealing resin is roughened.
  6.  端子板の粗面化されている表面における山部分の最高点の高さと山部分に隣接する谷部分の最低点の高さの差が1μm以上であることを特徴とする請求項4又は5に記載の太陽電池パネル用端子ボックス。 6. The difference between the height of the highest point of the peak portion on the roughened surface of the terminal board and the height of the lowest point of the valley portion adjacent to the peak portion is 1 μm or more. The terminal box for solar cell panels of description.
  7.  外部接続用ケーブルに接続される端子板の末端に、外部接続用ケーブルの内部導体である芯線を受容し、その状態でかしめるためのU字形断面部分が形成されていること、及びU字形断面部分に隣接する、バイパスダイオードモジュール内に位置される部分の端子板に、端子板平面の幅を減少するくびれ又はスリットが形成されていることを特徴とする請求項1~6のいずれかに記載の太陽電池パネル用端子ボックス。 A U-shaped cross section for receiving and caulking the core wire, which is the internal conductor of the external connection cable, is formed at the end of the terminal plate connected to the external connection cable, and the U-shaped cross section 7. A constriction or a slit for reducing a width of a terminal plate plane is formed in a terminal plate of a portion located in the bypass diode module adjacent to the portion. Terminal box for solar panels.
  8.  バイパスダイオードが、300Kの温度で測定したときに0.70eV以下のバリアハイトを有するショットキーバリア金属を含むショットキーバリアダイオード構造、トレンチを形成されたトレンチMOSダイオード構造、プレーナ型MOSダイオード構造、又はそれらの組み合わせによって1チップ複合化されたものであることを特徴とする請求項1~7のいずれかに記載の太陽電池パネル用端子ボックス。 A Schottky barrier diode structure including a Schottky barrier metal having a barrier height of 0.70 eV or less when the bypass diode is measured at a temperature of 300 K, a trench MOS diode structure having a trench, a planar MOS diode structure, or the like The terminal box for a solar cell panel according to any one of claims 1 to 7, wherein the chip box is combined into a single chip by combination.
  9.  端子ボックスの太陽電池パネルに面する側に太陽電池パネルからのリードを端子ボックス内に引き込むための開口部が設けられ、開口部に面する位置以外の端子ボックス内の場所に端子板の全てが配置され、端子板の幅広面が太陽電池パネルと略平行に向けられるように構成され、開口部から端子ボックス内に引き込まれたリードが、端子板の太陽電池パネルに向けられていない側の幅広面に接続されるように構成されていることを特徴とする請求項1~8のいずれかに記載の太陽電池パネル用端子ボックス。 An opening for drawing the lead from the solar cell panel into the terminal box is provided on the side of the terminal box facing the solar cell panel, and all of the terminal plates are located in the terminal box other than the position facing the opening. Arranged so that the wide surface of the terminal plate is oriented substantially parallel to the solar cell panel, and the lead drawn into the terminal box from the opening is wide on the side of the terminal plate not directed to the solar cell panel 9. The terminal box for a solar cell panel according to claim 1, wherein the terminal box is configured to be connected to a surface.
PCT/JP2017/005760 2016-02-19 2017-02-16 Terminal box for solar cell panel WO2017142034A1 (en)

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