WO2017024127A1 - Bolted wafer chuck thermal management systems and methods for wafer processing systems - Google Patents

Bolted wafer chuck thermal management systems and methods for wafer processing systems Download PDF

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Publication number
WO2017024127A1
WO2017024127A1 PCT/US2016/045543 US2016045543W WO2017024127A1 WO 2017024127 A1 WO2017024127 A1 WO 2017024127A1 US 2016045543 W US2016045543 W US 2016045543W WO 2017024127 A1 WO2017024127 A1 WO 2017024127A1
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WO
WIPO (PCT)
Prior art keywords
puck
thermal
sink
thermal sink
workpiece
Prior art date
Application number
PCT/US2016/045543
Other languages
English (en)
French (fr)
Inventor
David Benjaminson
Dmitry Lubomirsky
Ananda Seelavanth MATH
Saravanakumar NATARAJAN
Shubham CHOUREY
Original Assignee
Applied Materials, Inc.
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US14/820,422 external-priority patent/US9691645B2/en
Priority claimed from US14/820,365 external-priority patent/US9741593B2/en
Application filed by Applied Materials, Inc. filed Critical Applied Materials, Inc.
Priority to CN201680021497.2A priority Critical patent/CN107484433B/zh
Priority to KR1020177029599A priority patent/KR102631838B1/ko
Priority to JP2017553881A priority patent/JP6925977B2/ja
Priority to KR1020247003078A priority patent/KR20240015747A/ko
Publication of WO2017024127A1 publication Critical patent/WO2017024127A1/en

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68778Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by supporting substrates others than wafers, e.g. chips
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • H01L21/3247Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering for altering the shape, e.g. smoothing the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67103Apparatus for thermal treatment mainly by conduction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67011Apparatus for manufacture or treatment
    • H01L21/67098Apparatus for thermal treatment
    • H01L21/67109Apparatus for thermal treatment mainly by convection
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67248Temperature monitoring
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/683Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
    • H01L21/687Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
    • H01L21/68714Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
    • H01L21/68785Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by the mechanical construction of the susceptor, stage or support
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions

Definitions

  • the present disclosure applies broadly to the field of processing equipment. More specifically, systems and methods for providing spatially tailored processing on a workpiece are disclosed.
  • Integrated circuits and other semiconductor products are often fabricated on surfaces of substrates called "wafers.” Sometimes processing is performed on groups of wafers held in a carrier, while other times processing and testing are performed on one wafer at a time. When single wafer processing or testing is performed, the wafer may be positioned on a wafer chuck. Other workpieces may also be processed on similar chucks. Chucks can be temperature controlled in order to control temperature of a workpiece for processing.
  • a workpiece holder positions a workpiece for processing.
  • the workpiece holder includes a substantially cylindrical puck, a first heating device disposed in thermal communication with a radially inner portion of the puck, a second heating device disposed in thermal communication with a radially outer portion of the puck, and a thermal sink disposed in thermal communication with the puck.
  • the first and second heating devices are independently controllable with respect to one another, and the first and second heating devices are in greater respective degrees of thermal communication with the puck, than a degree of thermal communication of the thermal sink with the puck.
  • a method of controlling spatial temperature distribution of a workpiece includes providing a reference temperature to a substantially cylindrical puck by flowing a heat exchange fluid at a controlled temperature through channels in a thermal sink that is in thermal communication with the puck, raising a temperature of a radially inner portion of the puck to a first temperature that is greater than the reference temperature, by activating a first heating device disposed in thermal communication with the radially inner portion of the puck, raising a temperature of a radially outer portion of the puck to a second temperature that is greater than the reference temperature, by activating a second heating device disposed in thermal communication with the radially outer portion of the puck, and placing the workpiece on the puck.
  • a workpiece holder that positions a workpiece for processing includes a substantially cylindrical puck that is characterized by a cylindrical axis and a substantially planar top surface.
  • the puck defines two radial thermal breaks.
  • the first one thermal break is characterized as a radial recess that intersects a bottom surface of the puck at a first radius, and extends from the bottom surface through at least one-half of a thickness of the puck.
  • the second thermal break is characterized as a radial recess that intersects the top surface of the puck at a second radius that is greater than the first radius, and extends from the top surface through at least one-half of the thickness of the puck.
  • the first and second thermal breaks define a demarcation between a radially inner portion of the puck and a radially outer portion of the puck.
  • the puck includes a first heating device embedded within the radially inner portion of the puck, and a second heating device embedded within the radially outer portion of the puck.
  • the workpiece holder also includes a thermal sink that extends substantially beneath the bottom surface of the puck, the thermal sink including a metal plate that flows a heat exchange fluid through channels defined therein, to maintain a reference temperature for the puck.
  • the thermal sink mechanically and thermally couples with the puck at attachment points that provide a degree of thermal communication between the thermal sink and the puck that is less than a degree of thermal communication between each of the first and second heating devices and the puck.
  • FIG. 1 schematically illustrates major elements of a processing system having a workpiece holder, according to an embodiment.
  • FIG. 2 is a schematic cross sectional diagram illustrating exemplary construction details of a workpiece holder of FIG. 1.
  • FIG. 3 is a schematic cross sectional diagram illustrating integration of heaters and a thermal sink with inner and outer portions of a puck that forms part of the workpiece holder of FIG. 1, in accord with an embodiment.
  • FIG. 4 is a schematic cross-sectional view that illustrates a portion of a wafer chuck, that illustrates features of a puck, a resistive heater, and a thermal sink, in accord with an embodiment.
  • FIG. 5 schematically illustrates an underside of a puck having cable heaters installed therein as inner and outer resistive heaters, in accord with an embodiment.
  • FIG. 6A is a detailed view of a portion of the puck and optional thermal sink of FIG. 4, in the vicinity of a fastener.
  • FIG. 6B schematically illustrates an embodiment of a wave washer in an uncompressed state, in accord with an embodiment.
  • FIG. 6C provides an upwardly looking, bottom plan view of the puck and optional thermal sink illustrated in FIG. 6A.
  • FIG. 7 schematically illustrates a lift pin mechanism disposed within a thermal break, in accord with an embodiment.
  • FIG. 8 schematically illustrates, in a plan view, a three lift pin arrangement where lift pins are disposed within a thermal break, in accord with an embodiment.
  • FIG. 9 is a flowchart of a method for processing a wafer or other workpiece, in accord with an embodiment.
  • FIG. 10 is a flowchart of a method that includes, but is not limited to, one step of the method of FIG. 9.
  • FIG. 11 is a flowchart of a method that includes, but is not limited to, another step of the method of FIG. 9.
  • FIG. 1 schematically illustrates major elements of a wafer processing system 100.
  • System 100 is depicted as a single wafer, semiconductor wafer plasma processing system, but it will be apparent to one skilled in the art that the techniques and principles herein are applicable to wafer processing systems of any type (e.g., systems that do not necessarily process wafers or semiconductors, and do not necessarily utilize plasmas for the processing).
  • Processing system 100 includes a housing 110 for a wafer interface 115, a user interface 120, a plasma processing unit 130, a controller 140 and one or more power supplies 150.
  • Processing system 100 is supported by various utilities that may include gas(es) 155, external power 170, vacuum 160 and optionally others. Internal plumbing and electrical connections within processing system 100 are not shown, for clarity of illustration.
  • Processing system 100 is shown as a so-called indirect plasma processing system that generates a plasma in a first location and directs the plasma and/or plasma products (e.g., ions, molecular fragments, energized species and the like) to a second location where processing occurs.
  • plasma processing unit 130 includes a plasma source 132 that supplies plasma and/or plasma products for a process chamber 134.
  • Process chamber 134 includes one or more workpiece holders 135, upon which wafer interface 115 places a workpiece 50 (e.g., a semiconductor wafer, but could be a different type of workpiece) to be held for processing.
  • workpiece holder 135 is often referred to as a wafer chuck.
  • gas(es) 155 are introduced into plasma source 132 and a radio frequency generator (RF Gen) 165 supplies power to ignite a plasma within plasma source 132.
  • RF Gen radio frequency generator
  • Plasma and/or plasma products pass from plasma source 132 through a diffuser plate 137 to process chamber 134, where workpiece 50 is processed.
  • a plasma may also be ignited within process chamber 134 for direct plasma processing of workpiece 50.
  • Embodiments herein provide new and useful functionality for plasma processing systems. Semiconductor wafer sizes have increased while feature sizes have decreased significantly over the years, so that more integrated circuits with greater functionality can be harvested per wafer processed. Processing smaller features while wafers grow larger requires significant improvements in processing uniformity. Because chemical reaction rates are often temperature sensitive, temperature control across wafers during processing is often key to uniform processing.
  • some types of processing can have radial effects (e.g., processing that varies from center to edge of a wafer). Some types of process equipment control these effects better than others, that is, some achieve high radial process uniformity while others do not.
  • Embodiments herein recognize that radial effects are advantageously controlled, and it would be further advantageous to be able to provide radial processing that can be tailored to compensate for processing that cannot achieve such control. For example, consider a case in which a layer is deposited on a wafer and then selectively etched off, as is common in semiconductor processing. If the deposition step is known to deposit a thicker layer at the wafer's edge than at its center, a compensating etch step would advantageously provide a higher etch rate at the wafer's edge than at its center, so that the deposited layer would be etched to completion at all parts of the wafer at the same time. Similarly, if an etch process were known to have a center-to-edge variation, a compensating deposition preceding the etch process could be adjusted to provide a
  • a compensating process can be provided by providing explicit center-to-edge temperature variation, because temperature often substantially influences reaction rates of processes.
  • FIG. 2 is a schematic cross section that illustrates exemplary construction details of workpiece holder 135, FIG. 1.
  • workpiece holder 135 includes a puck 200 that is substantially cylindrical, and is characterized in terms of having a puck radius rl in a radial direction R from a cylindrical axis Z.
  • a workpiece 50 e.g., a wafer
  • a bottom surface 204 of puck 200 is taken to be a median bottom surface height of puck 200; that is, a plane that defines the typical bottom surface height of puck 200 in the direction of axis Z exclusive of features such as edge rings or other protrusions 206, or indentations 208, that puck 200 may form as attachment points for other hardware.
  • a top surface 202 is taken to be a planar surface configured to accommodate workpiece 50, irrespective of grooves that may be formed therein (e.g., as vacuum channels, see FIG. 4) and/or other features that retain workpiece 50.
  • Puck 200 may also be characterized in terms of having a thickness t between bottom surface 204 and top surface 202, as shown.
  • puck radius rl is at least four times puck thickness t, but this is not a requirement.
  • Puck 200 defines one or more radial thermal breaks 210, as shown.
  • Thermal breaks 210 are radial recesses defined in puck 200, that intersect at least one of top surface 202 or bottom surface 204 of puck 200.
  • Thermal breaks 210 act as the term implies, that is, they provide thermal resistance, between a radially inner portion 212, and a radially outer portion 214, of puck 200. This facilitates explicit radial (e.g., center-to-edge) thermal control of the radially inner and outer portions of puck 200, which is advantageous in terms of either providing precise thermal matching of the inner and outer portions, or of providing deliberate temperature variation across the inner and outer portions.
  • Thermal breaks 210 can be characterized in terms of having a thermal break depth and a thermal break radius.
  • Depth of thermal breaks 210 can vary among embodiments, but the thermal break depth usually exceeds one-half of thickness t. Radial positioning of thermal breaks 210 can also vary among embodiments, but the thermal break radius r2 is usually at least one-half of puck radius rl, and in other embodiments r2 may be three-fourths, four-fifths, five sixths or more of puck radius rl . Certain embodiments may use a single thermal break 210, while other embodiments may use two thermal breaks 210 (as shown in FIG. 2) or more.
  • a demarcation point between radially inner portion 212 and radially outer portion 214 is illustrated as a radially average position between two thermal breaks 210, but in embodiments having a single thermal break 210, such demarcation point can be considered to be the radial midpoint of the single thermal break 210.
  • FIG. 3 is a schematic cross sectional diagram illustrating integration of heaters and a thermal sink with inner and outer portions of puck 200. Some mechanical details of puck 200 are not shown in FIG. 3, for clarity of illustration.
  • FIG. 3 illustrates a central channel 201 defined by puck 200 and an optional thermal sink 230. Central channel 201 is described in connection with FIG. 4.
  • Inner heaters 220-1 and outer heaters 220-2 are disposed in thermal communication with puck 200; heaters 220 are shown as embedded within puck 200, although this is not required. It may be advantageous for heaters 220 to be placed across large portions of puck 200, but the distribution of heaters 220 across surface 204 can vary in embodiments.
  • Heat provided by heaters 220 will substantially control the temperatures of inner portion 212 and outer portion 214 of puck 200; thermal breaks 210 assist in thermally isolating portions 212 and 214 from one another, to improve the precision of thermal control thereof.
  • Heaters 220 are typically resistive heaters, but other types of heaters (e.g., utilizing forced gas or liquid) may be used.
  • Optional thermal sink 230 may also be provided.
  • Thermal sink 230 may be controlled to present a lower temperature than typical operating temperatures, for example by flowing a heat exchange fluid at a controlled temperature therethrough, or by using a cooling device such as a Peltier cooler.
  • thermal sink 230 provides several advantages. One such advantage is to provide a reference temperature toward which all portions of puck 200 will have, in the absence of heat provided by heaters 220. That is, although heaters 220 can provide heat, such heat would ordinarily propagate, in all directions, throughout puck 200.
  • Thermal sink 230 provides the ability to drive all portions of puck 200 to lower temperatures, such that if a heater 220 is located at a specific portion of puck 200, the heat generated by the heater does not simply diffuse throughout puck 200 in every direction, but heats a portion of puck 200 where the heat from the heater 200 locally exceeds the tendency of thermal sink 230 to remove the heat.
  • thermal sink 230 may be thermally and/or mechanically coupled with puck 200 at a plurality of attachment points 222 (shown schematically in FIG. 3, although attachment points 222 may not resemble what is shown in FIG. 3; see FIGS. 6A, 6B and 6C). Attachment points 222 are advantageously numerous and spread evenly about surface 204 of puck 200.
  • Attachment points 222 provide substantially all of the thermal communication of puck 200 with thermal sink 230, the numerous and evenly spread arrangement of attachment points 222 is provided so that the reference temperature provided is uniformly applied.
  • a puck 200 that is at least ten inches in diameter might have at least twenty attachment points or more, and a puck 200 that is at least twelve inches in diameter might have at least thirty attachment points, or many more.
  • thermal sink 230 can provide rapid thermal sinking capability such that when temperature settings of heaters 220 (e.g., electrical currents passing through resistive wires) decrease, adjacent portions of puck 200 respond with a relatively rapid temperature decrease.
  • heaters 220 e.g., electrical currents passing through resistive wires
  • This provides the benefit of being able, for example, to load workpiece 50 onto puck 200, provide heat through heaters 220, and achieve rapid stabilization of temperatures on workpiece 50 so that processing can begin quickly, to maximize system throughput. Without thermal communication allowing some heat to dissipate to thermal sink 230, temperatures reached by portions of puck 200 would decrease only as fast as other heat dissipation paths would allow.
  • Heaters 220 and thermal sink 230 are typically disposed in differing degrees of thermal communication with puck 200; for example heaters 220 may be said to be in direct thermal communication with puck 200, while thermal sink is in indirect thermal communication with puck 200. That is, heaters 220 are typically positioned for a high degree of thermal coupling with puck 200, with thermal sink 230 being positioned for a lesser degree of thermal coupling with puck 200 (at least, a lesser degree of thermal coupling with puck 200 than heaters 220).
  • heaters 220 have sufficient heat generation capability that heat applied by heaters 220 can overwhelm the thermal coupling of puck 200 with thermal sink 230, so that heaters 220 can raise the temperature of inner portion 212 and outer portion 214 of puck 200, even while some of the heat generated by heaters 200 dissipates through thermal sink 230. Thus, heat provided by heaters 220 can, but does not immediately, dissipate through thermal sink 230.
  • placement and degrees of thermal coupling among puck 200, heaters 220 and thermal sink 230 may be adjusted according to principles herein, in order to balance
  • thermal sink 230 is to confine heat generated by heaters 220 to the vicinity of puck 200. That is, thermal sink 230 can provide a thermal upper limit for adjacent system components to protect such components from high temperatures generated at puck 200. This may improve mechanical stability of the system and/or prevent damage to temperature sensitive components.
  • Heaters 220 and thermal sink 230 may be implemented in various ways.
  • heaters 220 are provided by cable type heating elements that are integrated with a puck 200 and then (optionally) with thermal sink 230 to form a wafer chuck assembly.
  • Embodiments designed, assembled and operated as disclosed herein allow explicit temperature control of workpiece (e.g., wafer) edge regions relative to center regions, and facilitate processing with explicit center to edge temperature control that is typically not achievable with prior art systems.
  • workpiece e.g., wafer
  • FIG. 4 is a schematic cross-sectional view that illustrates a portion of a wafer chuck, that illustrates features of puck 200, a resistive heater acting as heater 220-1, and thermal sink 230.
  • FIG. 4 represents a portion of the wafer chuck that is near a cylindrical axis Z thereof, and is not drawn to scale, for illustrative clarity of smaller features.
  • Puck 200 is typically formed of an aluminum alloy, for example of the well-known "6061" alloy type.
  • Puck 200 is shown as defining surface grooves or channels 205 that connect on upper surface 202 of puck 200, and with central channel 201 that is centered about axis Z.
  • Vacuum may be supplied to central channel 201, reducing pressure within channels 205 so that atmospheric pressure (or gas pressure of relatively high pressure plasmas, or low pressure deposition systems, such as around 10-20 Torr) will urge workpiece 50 (see FIGS. 1, 2) against puck 200, providing good thermal communication between puck 200 and workpiece 50.
  • atmospheric pressure or gas pressure of relatively high pressure plasmas, or low pressure deposition systems, such as around 10-20 Torr
  • Inner resistive heater 220-1 is illustrated in FIG. 4, but it should be understood that the illustration and following description of inner resistive heater 220-1 apply equally to outer resistive heater 220-2.
  • Resistive heater 220-1 includes a cable heater 264 that winds in a spiral or other pattern within puck 200. Cable heater 264 is assembled into puck 200 by placing it within grooves in puck 200 and capping the grooves (see FIG. 5). After assembly of cable heater 264 as inner resistive heater 200-1 (and a second cable heater as outer resistive heater 200- 2) puck 200 is assembled to thermal sink 230 by means of fasteners 270.
  • FIG. 5 schematically illustrates an underside of a puck 200-1 having cable heaters 264-1 and 264-2 installed therein as inner and outer resistive heaters respectively.
  • a thermal break 210 is a recess defined in bottom surface 204 of puck 200-1 and forms a radial
  • Cable heater 264-1 extends from a connector 262-1 along a roughly spiral path that is laid out for uniform heat transfer to all areas of inner portion 212.
  • a heater cap 266-1 is illustrated as a shaded portion of the spiral path; heater cap 266-1 is coupled in place after cable heater 264-1 is put into place.
  • heater cap 266-1 is a fillet that is pre-formed into a shape of the groove in which cable heater 264-1 is installed, and is secured into place. Heater cap 266-1 may for example be welded into place using electron beam welding, but could also be secured with adhesives or fillers (e.g., epoxy).
  • the fillet is preferably welded into place along at least part of an arc length of the cable heater, but need not be welded along its entire arc length (e.g., portions may not be welded in order to avoid damage to overlying structures, such as cable heater 264-2).
  • heater cap 266-1 is welded into place using electron beam welding.
  • a cold-to-hot transition point 265-1 indicates where conductive wires in cable heater
  • Cable heater 264-2 extends from a connector 262- 2, first radially outwards from a central region of puck 200 (where connections are made through a shaft of the wafer chuck), then along a roughly circular path that is laid out for uniform heat transfer to outer portion 214.
  • a heater cap 266-2 is illustrated as a shaded portion of the spiral path; heater cap 266-2 is coupled in place after cable heater 264-2 is put into place.
  • heater cap 266-2 is a fillet that is pre-formed into a shape of the groove in which cable heater 264-2 is installed, and is welded into place using electron beam welding.
  • the fillet forming heater cap 266-2 is preferably welded into place along at least part of its arc length, but need not be welded along its entire arc length.
  • a cold-to-hot transition point 265-2 indicates where conductive wires in cable heater 264-2, extending from connector 262-2 and hidden underneath heater cap 266-2, connect with resistive materials within cable heater 264-2. Thus, little heat is generated between connector 262-2 and transition point
  • FIG. 6A is a detailed view of a portion of puck 200 and optional thermal sink 230 as shown in FIG. 4, in the vicinity of fastener 270.
  • Puck 200 includes cable heater 264 sealed into puck 200 with heater cap 266, as discussed above in connection with FIG. 5.
  • optional thermal sink 230 can provide a reference temperature for puck 200, yet it is desirable that thermal sink 230 and puck 200 be arranged for a lesser degree of thermal communication than between puck 200 and heaters 220. Therefore, attachment points that allow thermal communication between thermal sink 230 and puck 200 are advantageously arranged to manage thermal transfer characteristics therebetween.
  • puck 200 and thermal sink 230 may be fabricated such that a lateral gap 276 exists between protrusion 268 and thermal sink 230, as shown.
  • thermal sink 230 forms an aperture for fastener 270 to pass through, and protrusion 268 defines an internal void 275, a portion of which may be internally threaded for fastener 270 to couple thereto.
  • void 275 may be longer than a length of fastener 270, for example as shown in FIG. 6A, to limit thermal transfer from puck 200 through protrusion 268.
  • the physical point of attachment of puck 200 to thermal sink 230 includes protrusion 268, fastener 270, and a pair of washers 272.
  • Major heat transfer paths in the vicinity of fastener 270 are shown in FIGS. 6A and 6B as solid, wavy arrows 278, while minor (e.g., radiative) heat transfer paths are shown as broken, wavy arrows 279.
  • a void 231 is discussed below in connection with FIG. 6C.
  • FIG. 6B schematically illustrates an embodiment of a wave washer 272 in an uncompressed state. While it is possible to utilize flat washers in certain embodiments, wave washers are advantageous in other embodiments.
  • the azimuthally wavy form of washer 272 is advantageous in that puck 200 can couple with thermal sink 230 at a plurality of points without overconstraining either puck 200 or thermal sink 230 relative to one other. That is, given that only three points form a plane in a mathematical sense, more than three attachment points between puck 200 and thermal sink 230 forms an overconstrained system that imposes very strict mechanical tolerances on the planarity of attachment points between thermal sink 230 and protrusions 268 of puck 200.
  • Use of a wave washer 272 allows for looser planarity tolerances in such features because washer 272 will provide mechanical coupling throughout a range of compression, rather than requiring attachment points of the respective components to lie along a perfectly planar surface.
  • wave washer 272' s range of compression allows for local thermal expansion effects in puck 200 and/or thermal sink 230.
  • wave washer 272 has an uncompressed thickness 273 that is at least double a compressed thickness 274; in other embodiments wave washer 272 has an uncompressed thickness 273 that is at least five times compressed thickness 274.
  • washer 272 is shown in flat cross-sectional profile in FIG. 6A for illustrative clarity, it will be appreciated upon reading and understanding the present disclosure that fastener 270 may not be tightened to the point of flattening wave washer 272 completely, such that some waviness will exist in many, if not all, instances of wave washer 272 as installed.
  • wave washer 272 reduces thermal communication between protrusion 268 and thermal sink 230 by forcing heat to pass from protrusion 268 to a local peak where washer 272 contacts protrusion 268, then laterally within washer 272 to a local trough where washer 272 contacts thermal sink 230.
  • Washers 272 may be formed, for example, of beryllium copper. Certain embodiments utilize two washers 272, one on either side of thermal sink 230, as shown, while other embodiments utilize only a single washer 272, typically between protrusion 268 and thermal sink 230.
  • FIG. 6C provides an upwardly looking, bottom plan view in the vicinity of fastener 270. In FIG. 6C, a broken line 6A-6A indicates the cross-sectional plane shown in FIG.
  • Thermal sink 230 forms one or more voids 231 within thinned region 235 near fastener 270. Voids 231 further reduce thermal communication between puck 200 and thermal sink 230.
  • the number and arrangement of voids 231 in thermal sink 230 that are shown in FIG. 6C are not required; it will be appreciated upon reading and understanding the present disclosure that voids 231 can be modified in size, number and arrangement to adjust thermal coupling characteristics between thermal sink 230 and puck 200. For example, thermal coupling between thermal sink 230 and puck 200 could be reduced further still be providing a second set of voids 231, radially outward from voids 231 as shown in FIG.
  • FIG. 6C shows an outer edge of thinned region 235 as being coincident with outer edges of voids 231, this is not always necessarily the case. Certain embodiments may have voids 231 that are well within edges of thinned region 235, or that extend partially into thermal sink 230 outside of thinned region 235. Similarly, the number, placement and wall thicknesses of protrusions 268 can be modified to achieve higher or lower thermal conduction between puck 200 and thermal sink 230.
  • a further advantage of providing at least one thermal break 210 that intersects a top surface of puck 200 is that certain mechanical features may be disposed at least partially within the thermal break such that the mechanical features do not generate a thermal anomaly on the surface of puck 200.
  • a wafer chuck commonly provides lift pins that can be used to raise a wafer to a small distance off of the chuck to facilitate access by wafer handling tools (typically using a paddle or other device that, after the wafer is raised, is inserted between the wafer and the chuck).
  • the lift pins typically retract into holes in the chuck, and such holes and lift pin structure can locally affect wafer temperature during processing.
  • FIG. 7 schematically illustrates a portion of a wafer chuck that has a lift pin mechanism 300 that controls a lift pin 310, disposed within a thermal break 210. Portions of heaters 220 and optional thermal sink 230 are also shown.
  • the cross-sectional plane illustrated in FIG. 7 passes through a center of mechanism 300 such that the components thereof are within a lower portion of one thermal break 210.
  • puck 200, thermal break 210 and thermal sink 230 may have profiles like those shown in FIGS. 3 and 4, so that the thermal break 210 in which mechanism 300 is disposed will continue along its arc through puck 200 (see FIG. 8).
  • lift pin mechanism 300 is limited to a fairly small azimuthal angle relative to the central axis of puck 200 (again, see FIG. 8). That is, if a cross sectional plane were taken at a distance into or out of the plane shown in FIG. 7, the bottom surface of puck 200 would be continuous along the same plane where bottom surface 204 is indicated in FIG. 7, and thermal sink 230 would be continuous under puck 200.
  • the small size of lift pin mechanism 300 limits thermal deviation of puck 200 in the area of lift pin mechanism 300.
  • FIG. 7 shows lift pin 310 in a retracted position, wherein it will not create a thermal anomaly on the surface of puck 200.
  • FIG. 8 schematically illustrates, in a plan view, a three lift pin arrangement where lift pins 310 are disposed within a thermal break 210.
  • FIG. 8 is not drawn to scale, in particular, thermal break 210 is exaggerated so as to show lift pin mechanisms 300 and lift pins 310 clearly. Because lift pins 310 retract well below the average surface of puck 200 into thermal break 210, lift pins 310 do not generate a spatial thermal anomaly during processing, such that portions of a workpiece being processed at the locations of lift pins 310 (e.g., specific integrated circuits located at the corresponding locations of a semiconductor wafer) experience processing that is consistent with processing elsewhere on the workpiece.
  • portions of a workpiece being processed at the locations of lift pins 310 e.g., specific integrated circuits located at the corresponding locations of a semiconductor wafer
  • FIG. 9 is a flowchart of a method 400 for processing a wafer or other workpiece (simply called a "product wafer” hereinafter for convenience, understanding that the concepts may apply to workpieces other than wafers).
  • Method 400 may be uniquely enabled by the thermal management apparatus described in connection with FIGS. 2-8 that can be used to provide explicit center-to-edge thermal control, which in turn enables explicit center-to-edge process control.
  • a first step 420 of method 400 processes the product wafer with a first center- to-edge process variation.
  • a second step 440 of method 400 processes the product wafer with a second center-to-edge process variation that compensates for the first center-to-edge variation.
  • one or the other of 420 or 440 will be carried out in equipment or in a process environment that unintentionally or uncontrollably generates the associated center-to-edge process variation (the "uncontrolled variation” hereinafter) but this is not required.
  • the other is carried out in equipment such as that described herein, such that another center-to-edge process variation (the "controlled variation” hereinafter) is introduced through thermal management techniques that allow the center and edge portions of the product wafer to be explicitly controlled to provide a corresponding, inverse process variation.
  • the uncontrolled variation and the controlled variation can occur in either order. That is, 420 may introduce either the uncontrolled or the controlled variation, and 440 may introduce the other of the uncontrolled and the controlled variation.
  • FIGS. 10 and 11 provide additional guidance to those skilled in the art to enable useful exercise of method 400.
  • FIG. 10 is a flowchart of a method 401 that includes, but is not limited to, step 420 of method 400. All of 410-418 and 422 shown in FIG. 10 are considered optional, but in embodiments may be helpful, in execution of method 400 to achieve useful wafer processing results.
  • Step 410 sets up equipment characteristics that are related to the first center-to- edge process variation, which will be produced at 420.
  • 410 may involve providing equipment parameters such as heater settings that will provide a controlled center-to-edge temperature variation.
  • Equipment such as described in FIGS. 2-8 herein is useful in providing a controlled center-to-edge temperature variation.
  • Step 412 measures equipment characteristics that are related to the first center-to-edge process variation. Process knowledge may be acquired over time about what equipment settings, or measured equipment characteristics, are successful in generating a known center-to-edge process variation (or at least providing a process variation that is stable, albeit unintentional).
  • method 401 may optionally return from 412 to 410 to adjust equipment characteristics, if the equipment characteristics measured in 412 can likely be improved.
  • Step 414 processes one or more test wafers that receive the first center-to-edge process variation.
  • Step 416 measures one or more characteristics of the first center-to-edge process variation on the test wafer(s) processed in step 414.
  • Method 401 may optionally return from 416 to 410 to adjust equipment characteristics in light of the center-to- edge process characteristics measured in 416.
  • Any test wafers processed in 414 may optionally be saved in 418, for testing in the second process (e.g., the process to be executed later, in 440). Also, 414 may be performed in parallel with 420.
  • test wafers may be processed at the same time as product wafers (for example, if the first process is a so-called "batch” process like dipping a cassette of wafers into a liquid bath, processing a set of wafers together in an ampoule, diffusion furnace or deposition chamber, or the like).
  • the first process is a so-called "batch” process like dipping a cassette of wafers into a liquid bath, processing a set of wafers together in an ampoule, diffusion furnace or deposition chamber, or the like).
  • Step 420 processes a product wafer with the first center-to-edge process variation.
  • Step 422 measures one or more first center-to-edge characteristics on the product wafer, to generate data for equipment process control purposes, for correlation to yield or performance of the product wafer, and/or for use in correlating to information surrounding step 440, as described further below.
  • FIG. 11 is a flowchart of a method 402 that includes, but is not limited to, step 440 of method 400. All of 430-436 and 442 shown in FIG. 11 are considered optional, but in embodiments may be helpful, in execution of method 400 to achieve useful wafer processing results.
  • Step 430 sets up equipment characteristics that are related to the second center-to- edge process variation, which will be produced at step 440.
  • 430 may involve providing equipment parameters such as heater settings that will provide a controlled center-to-edge temperature variation.
  • Equipment such as described in FIGS. 2-8 herein is useful in providing a controlled center-to-edge temperature variation.
  • Step 432 measures equipment characteristics that are related to the second center-to-edge process variation. In consideration of process knowledge, as discussed above, method 402 may optionally return from 432 to 430 to adjust equipment characteristics in light of the equipment characteristics measured in 432.
  • Step 434 processes one or more test wafers that receive the second center-to-edge process variation; the test wafer(s) processed in 434 may include one or more test wafers saved from the first process step in 418, above.
  • Step 436 measures one or more characteristics of the second center-to-edge process variation on the test wafer(s) processed in 434. In consideration of previously acquired process knowledge, method 402 may optionally return from 436 to 430 to adjust equipment characteristics in light of the center-to-edge process characteristics measured in 436.
  • Step 440 processes a product wafer with the second center-to-edge process variation. Also, although not shown in method 402, additional test wafers could certainly be processed in parallel with the product wafer.
  • Step 442 measures one or more first center-to-edge characteristics on the product wafer, to generate data for equipment process control purposes, for correlation to yield or performance of the product wafer, and/or for use in correlating to information surrounding 420, as described above. Such measurements could also be performed on any test wafer that was processed in parallel with the product wafer, but in any case 442 will generally not further alter any condition present on the product wafer. That is, the results of 420 and 440 will be fixed in the product wafer at the conclusion of 440 irrespective of any further testing done.
  • Plasma processing of workpieces other than wafers may also benefit from improved processing uniformity, and are considered within the scope of the present disclosure.
  • characterization of the chucks herein as "wafer chucks" for holding “wafers” should be understood as equivalent to chucks for holding workpieces of any sort, and "wafer processing systems” as similarly equivalent to processing systems.

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Drying Of Semiconductors (AREA)
  • Resistance Heating (AREA)
  • Grinding Of Cylindrical And Plane Surfaces (AREA)
PCT/US2016/045543 2015-08-06 2016-08-04 Bolted wafer chuck thermal management systems and methods for wafer processing systems WO2017024127A1 (en)

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CN201680021497.2A CN107484433B (zh) 2015-08-06 2016-08-04 螺接式晶片夹具热管理系统及用于晶片处理系统的方法
KR1020177029599A KR102631838B1 (ko) 2015-08-06 2016-08-04 웨이퍼 프로세싱 시스템들을 위한 볼트 결합된 웨이퍼 척 열 관리 시스템들 및 방법들
JP2017553881A JP6925977B2 (ja) 2015-08-06 2016-08-04 ウエハ処理システム向けの、ボルト留めされたウエハチャックの熱管理のシステム及び方法
KR1020247003078A KR20240015747A (ko) 2015-08-06 2016-08-04 웨이퍼 프로세싱 시스템들을 위한 볼트 결합된 웨이퍼 척 열 관리 시스템들 및 방법들

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US14/820,365 US9741593B2 (en) 2015-08-06 2015-08-06 Thermal management systems and methods for wafer processing systems
US14/820,422 2015-08-06
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