WO2017016008A1 - 在栅极表面生长石墨烯的方法及在源漏极表面生长石墨烯的方法 - Google Patents

在栅极表面生长石墨烯的方法及在源漏极表面生长石墨烯的方法 Download PDF

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WO2017016008A1
WO2017016008A1 PCT/CN2015/087728 CN2015087728W WO2017016008A1 WO 2017016008 A1 WO2017016008 A1 WO 2017016008A1 CN 2015087728 W CN2015087728 W CN 2015087728W WO 2017016008 A1 WO2017016008 A1 WO 2017016008A1
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gate
graphene
source
gas
pecvd
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胡韬
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深圳市华星光电技术有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic System
    • H01L29/1606—Graphene
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H01L21/28506—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation of conductive layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28247—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon passivation or protection of the electrode, e.g. using re-oxidation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/417—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions carrying the current to be rectified, amplified or switched
    • H01L29/41725—Source or drain electrodes for field effect devices
    • H01L29/41733—Source or drain electrodes for field effect devices for thin film transistors with insulated gate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/41—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions
    • H01L29/423—Electrodes ; Multistep manufacturing processes therefor characterised by their shape, relative sizes or dispositions not carrying the current to be rectified, amplified or switched
    • H01L29/42312—Gate electrodes for field effect devices
    • H01L29/42316—Gate electrodes for field effect devices for field-effect transistors
    • H01L29/4232—Gate electrodes for field effect devices for field-effect transistors with insulated gate
    • H01L29/42384—Gate electrodes for field effect devices for field-effect transistors with insulated gate for thin film field effect transistors, e.g. characterised by the thickness or the shape of the insulator or the dimensions, the shape or the lay-out of the conductor
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/45—Ohmic electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/40—Electrodes ; Multistep manufacturing processes therefor
    • H01L29/43—Electrodes ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/49—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET
    • H01L29/4908—Metal-insulator-semiconductor electrodes, e.g. gates of MOSFET for thin film semiconductor, e.g. gate of TFT

Definitions

  • the present invention relates to the field of display technologies, and in particular, to a method for growing graphene on a surface of a gate and a method for growing graphene on a surface of a source and a drain.
  • LCDs liquid crystal displays
  • OLEDs organic light emitting diodes
  • the display panel is an important part of LCD and OLED. Both the display panel of the LCD and the display panel of the OLED usually have a Thin Film Transistor (TFT) array substrate.
  • TFT Thin Film Transistor
  • a display panel of an LCD it mainly comprises a TFT array substrate, a color filter substrate (Color Filter, CF), and a liquid crystal layer (LC) disposed between the two substrates.
  • the working principle is to control the rotation of the liquid crystal molecules in the liquid crystal layer by applying a driving voltage on the TFT array substrate and the CF substrate, and refract the light of the backlight module to generate a picture.
  • the display panel has higher and higher requirements on the electrical conductivity of the electrode lines on the thin film transistor array substrate and the electrodes of the thin film transistor.
  • the line width of the electrode lines on the basis of ensuring the conductivity; in large-size products, in order to ensure the refresh rate of the picture, it is necessary to reduce the resistance of the electrode lines.
  • Due to the better conductivity of copper (Cu) materials the current production of large-size TFT-LCDs is gradually introduced into the Cu process, that is, the gate, and the source/drain are made of Cu material. In the existing copper process, copper is used as the gate and source and drain, and is often exposed for subsequent processes.
  • the isolation layer affects the electrical performance of the entire TFT device. Therefore, it is especially important to cover the surface of the copper with a layer of highly conductive isolation layer to avoid the above problems.
  • Graphene is a single layer of carbon atoms having high conductivity and has excellent mechanical properties. It has been shown that a uniform and dense graphene layer can be formed on the copper surface by vapor deposition. Because single-layer graphene has excellent gas-water barrier capability, it can be used to prevent contact between water, oxygen and copper, and to avoid oxidation of copper. problem.
  • Chemical Vapor Deposition (CVD) Plasma Enhanced Chemical Vapor Deposition (PECVD) is a method of ionizing a gas containing a film-constituting atom by means of microwave or radio frequency, and forming a plasma locally. The plasma chemical activity is strong and it is easy to occur. The reaction deposits the desired film on the substrate. In order to allow the chemical reaction to proceed at a lower temperature, the activity of the plasma is utilized to promote the reaction, and thus the chemical vapor deposition method is called plasma enhanced chemical vapor deposition.
  • PECVD plasma enhanced vapor deposition
  • the risk of oxidation is extremely low.
  • the preparation temperature of graphene is low, and the structure of the thin film transistor can be minimized.
  • the carbon source for forming the graphene film is widely available, the price is low, and the manufacturing method is simple.
  • Another object of the present invention is to provide another method for growing graphene on the surface of a gate, which uses a solid carbon source to grow a graphene film with a controlled thickness on the surface of the gate by a low temperature PECVD process to reduce the oxidation of the gate.
  • a solid carbon source to grow a graphene film with a controlled thickness on the surface of the gate by a low temperature PECVD process to reduce the oxidation of the gate.
  • the risk of graphene is low, and the structure of the thin film transistor can be minimized.
  • the carbon source for forming the graphene film is widely available, the price is low, and the manufacturing method is simple.
  • the present invention provides a method of growing graphene on a surface of a gate, comprising the steps of:
  • Step 1 providing a substrate having a gate, the gate containing metal copper;
  • Step 2 placing the substrate with the gate into the PECVD reaction chamber, flushing with H 2 gas, raising the temperature in the PECVD reaction chamber to 300 ° C - 700 ° C, the gas flow rate of the H 2 gas 10SCCM to 200SCCM, maintaining the overall pressure in the PECVD reaction chamber is 1 to 10Pa, and the RF power is 100-800W;
  • Step 3 Continue to inject H 2 gas into the PECVD reaction chamber while injecting hydrocarbon gas to grow graphene on the surface of the gate.
  • the flow ratio of the hydrocarbon gas to the H 2 gas is 10:1 to 1:50.
  • the growth time of the graphene is controlled to be 1-10 min, and the PECVD equipment is turned off. After the apparatus is slowly warmed to room temperature, a graphene film covering the surface of the gate is obtained.
  • the gas flow rate of the H 2 gas is 80 SCCM; the overall pressure in the PECVD reaction chamber is maintained at 3 Pa; the RF power in the PECVD reaction chamber is 500 W; and the temperature in the PECVD reaction chamber is Increase to 500 ° C.
  • the hydrocarbon gas is methane, ethylene, or acetylene; the pattern of the graphene film prepared in the step 3 completely overlaps with the pattern of the gate.
  • Step 1 providing a substrate having a gate, the gate containing metal copper;
  • Step 2 providing a solid carbon source and a solvent, dissolving the solid carbon source in a solvent to form a mixed solution, uniformly coating the mixed solution on the substrate having the gate to form the gate and
  • the organic film of the substrate is vacuum-baked at 50 ° C - 100 ° C for 1-4 h to remove the solvent in the organic film;
  • Step 3 the organic thin film covering the substrate is placed in the PECVD chamber, into H 2 gas, H 2 gas flow rate of gas is 10-200 and the reaction temperature PECVD chamber was raised to 400 °C -700 °C , maintaining the overall pressure in the PECVD reaction chamber is 23 Torr, the solid carbon source in the organic film is converted into graphene in the PECVD reaction chamber, the reaction time is 5-60 min, the H 2 gas is stopped, and the PECVD device is turned off, waiting for After the device was slowly warmed to room temperature, a graphene film covering the substrate on the surface of the gate was obtained.
  • the solid carbon source is polymethyl methacrylate, polystyrene, polyacrylonitrile, or polydimethylsiloxane; the solvent is toluene; the coating in the step 2
  • the method is spin coating, slit coating, or spraying.
  • the temperature in the PECVD reaction chamber is raised to 600 ° C; the gas flow rate of the H 2 gas is 100 SCCM; the reaction time of the organic thin film in the PECVD reaction chamber is 20 min; The pattern of the obtained graphene film completely overlaps the pattern of the gate electrode.
  • the present invention also provides a method of growing graphene on a source drain surface, comprising the steps of:
  • Step 1 Providing a substrate having a source and a drain, wherein the source and drain electrodes comprise metal copper;
  • Step 2 The substrate having the source and drain electrodes is placed in a PECVD reaction chamber, and H 2 gas is introduced for cleaning, and the temperature in the PECVD reaction chamber is raised to 300° C.-400° C., the gas of the H 2 gas.
  • the flow rate is from 10SCCM to 200SCCM, and the overall pressure in the PECVD reaction chamber is maintained at 1 to 10 Pa, and the RF power is 100-800 W;
  • Step 3 Continue to inject H 2 gas into the PECVD reaction chamber while injecting hydrocarbon gas to grow graphene on the surface of the source and drain electrodes.
  • the flow ratio of the hydrocarbon gas to the H 2 gas is 10:1 to 1: 50, controlling the growth time of graphene is 1-10 min, the PECVD equipment is turned off, and after the apparatus is slowly warmed to room temperature, a graphene film covering the surface of the source and drain is obtained.
  • the substrate having a source and a drain includes a substrate and is disposed on the substrate. a gate, a gate insulating layer disposed on the gate and covering the gate, a semiconductor layer disposed on the gate insulating layer, and a source drain provided on the semiconductor layer.
  • the substrate having a source and a drain further includes a graphene film provided on the gate and covering the gate.
  • the hydrocarbon gas is methane, ethylene, or acetylene; the pattern of the graphene film prepared in the step 3 completely overlaps with the pattern of the source and the drain.
  • the present invention provides a method of growing graphene on a surface of a gate electrode and a method of growing graphene on a surface of a source and a drain, using a low temperature plasma enhanced vapor deposition process on a gate or source drain containing copper
  • a graphene film having a controllable film thickness and overlapping with the pattern of the gate or source and drain is formed on the electrode.
  • the graphene is prepared at a lower temperature, and the structure of the thin film transistor can be minimized, and the carbon source is widely used.
  • the price is low, the production method is simple, and the thin film transistor can be used to fabricate the existing PECVD equipment in the production line without increasing the cost; the gate or source and drain of the graphene coated, due to the protection of graphene, avoids water
  • the contact with oxygen solves the problem that the gate or source and drain of the metal-containing copper in the conventional TFT process is easily oxidized, and the high-conductivity graphene does not affect the electrical performance of the entire device.
  • FIG. 1 is a schematic flow chart of a method for growing graphene on a gate surface of the present invention
  • step 1 is a schematic diagram of step 1 of the method of growing graphene on the surface of the gate of FIG. 1;
  • step 4 is a schematic diagram of step 4 of the method of growing graphene on the surface of the gate of FIG. 1;
  • FIG. 4 is a schematic flow chart of another method for growing graphene on a gate surface of the present invention.
  • FIG. 5 is a schematic flow chart of a method for growing graphene on a source drain surface according to the present invention.
  • 6-7 are schematic views of step 1 of the method of growing graphene on the source and drain surfaces of FIG. 5;
  • the present invention takes into consideration the temperature requirements of the TFT-LCD fabrication process, and uses a low temperature plasma enhanced vapor deposition (PECVD) method to form a film on the gate or source and drain surface of the metal copper.
  • PECVD plasma enhanced vapor deposition
  • Thick and controllable graphene film, and graphene can grow according to the pattern of gate or source and drain.
  • the copper in the gate or source and drain plays the role of catalyst during the whole reaction process, including
  • the carbon precursor decomposes on the copper surface and nucleates crystallizes, while in other copper-free regions, there is no such reaction, which also avoids the contamination of other parts by graphene, the gate or source drain after coating the graphene. Due to the protection of graphene, the contact of the gate or source and drain with water and oxygen can be avoided, and the highly conductive graphene does not affect the electrical performance of the entire device.
  • the present invention first provides a method for growing graphene on a surface of a gate, comprising the following steps:
  • Step 1 Provide a substrate having a gate 12 containing metal copper.
  • the substrate having the gate 12 includes a substrate 11 and a gate 12 disposed on the substrate 11 .
  • the gate 12 may be a single layer structure or a double layer structure; the single layer structure is a single copper layer or a copper alloy layer; and the double layer structure is a double layer composite structure composed of an aluminum layer and a copper layer. a two-layer composite structure composed of a molybdenum layer and a copper layer, or a two-layer composite structure composed of a titanium layer and a copper layer.
  • Step 2 The substrate having the gate electrode 12 is placed in a PECVD (plasma enhanced chemical vapor deposition) reaction chamber, and is purged with H 2 (hydrogen) gas to raise the temperature in the PECVD reaction chamber to 300 ° C.
  • H 2 gas has a gas flow rate of 10 SCCM to 200 SCCM, maintaining an overall pressure in the PECVD reaction chamber of 1 to 10 Pa and a radio frequency (RF) power of 100-800 W.
  • the H 2 gas is ionized into an H plasma in a PECVD reaction chamber, thereby achieving an effect of cleaning the substrate;
  • the gas flow rate of the H 2 gas is 80 SCCM.
  • the overall pressure within the PECVD reaction chamber is maintained at 3 Pa.
  • the RF power in the PECVD reaction chamber is 500W.
  • the temperature in the PECVD reaction chamber is raised to 500 °C.
  • the PECVD device used in the present invention may be a common PECVD device or an improved PECVD device such as a microwave reinforced PECVD device, a surface wave enhanced PECVD device, or the like.
  • Step 3 as shown in FIG. 2, injecting H 2 gas into the PECVD reaction chamber while injecting hydrocarbon gas, and growing graphene on the surface of the gate electrode 12, the flow rate ratio of the hydrocarbon gas to the H 2 gas is From 10:1 to 1:50, the growth time of the graphene is controlled to be 1-10 min, the PECVD apparatus is turned off, and after the apparatus is slowly warmed to room temperature, the graphene film 121 covering the surface of the gate electrode 12 is obtained.
  • the hydrocarbon gas is methane, ethylene, or acetylene.
  • the flow ratio of the hydrocarbon gas to the H 2 gas is 3:1.
  • the growth time of the graphene is controlled to be 3 min.
  • the metal copper in the gate electrode 12 functions as a catalyst, and the hydrocarbon gas decomposes on the copper surface to form a nucleation crystal to form a graphene film, and at the gate electrode 12 In the other areas, since there is no metal copper, there is no such reaction, which can also avoid the contamination of other parts by the graphene, so that the graphene can grow according to the pattern of the gate electrode 12, and the finally obtained graphene film 121 The pattern completely overlaps the pattern of the gate 12.
  • the present invention provides another method for growing graphene on a surface of a gate, comprising the following steps:
  • Step 1 Providing a substrate having a gate containing metal copper.
  • the substrate having a gate includes a substrate and a gate disposed on the substrate.
  • the gate may be a single layer structure or a double layer structure; the single layer structure is a single copper layer or a copper alloy layer; the double layer structure is a double layer composite structure composed of an aluminum layer and a copper layer, A two-layer composite structure composed of a molybdenum layer and a copper layer, or a two-layer composite structure composed of a titanium layer and a copper layer.
  • Step 2 providing a solid carbon source and a solvent, dissolving the solid carbon source in a solvent to form a mixed solution, uniformly coating the mixed solution on the substrate having the gate to form the gate and
  • the organic film of the substrate is vacuum-baked at 50 ° C - 100 ° C for 1-4 h to remove the solvent in the organic film.
  • the solid carbon source is a carbonaceous organic substance such as polymethyl methacrylate (PMMA), polystyrene (PS), polyacrylonitrile (PAN), or polydimethylsiloxane (PDMS);
  • the solvent is an organic solvent such as toluene.
  • the coating method in the step 2 is a wet coating method such as spin coating, slit coating, or spray coating.
  • Step 3 the organic thin film covering the substrate is placed in the PECVD chamber, into H 2 gas, H 2 gas flow rate of gas is 10-200 and the reaction temperature PECVD chamber was raised to 400 °C -700 °C , maintaining the overall pressure in the PECVD reaction chamber is 23 Torr, the solid carbon source in the organic film is converted into graphene in the PECVD reaction chamber, the reaction time is 5-60 min, the H 2 gas is stopped, and the PECVD device is turned off, waiting for After the device was slowly warmed to room temperature, a graphene film covering the substrate on the surface of the gate was obtained.
  • the temperature in the PECVD reaction chamber is raised to 600 °C.
  • the gas flow rate of the H 2 gas is 100 SCCM.
  • the reaction time of the organic film in the PECVD reaction chamber is 20 min.
  • the PECVD device used in the present invention may be a common PECVD device or an improved PECVD device such as a microwave reinforced PECVD device, a surface wave enhanced PECVD device, or the like.
  • the metal copper in the gate functions as a catalyst, and the solid carbon source in the organic film decomposes on the copper surface to form a nucleation crystal to form a graphene film.
  • the metal copper in the gate functions as a catalyst, and the solid carbon source in the organic film decomposes on the copper surface to form a nucleation crystal to form a graphene film.
  • the graphene film completely overlaps the pattern of the gate.
  • the present invention also provides a method for growing graphene on a source and a drain surface, comprising the following steps:
  • Step 1 As shown in FIG. 6-7, a substrate having a source and a drain 15 is provided, and the source and drain electrodes 15 contain metal copper.
  • the substrate having the source and drain electrodes 15 includes a substrate 11 , a gate electrode 12 disposed on the substrate 11 , and a gate electrode disposed on the gate electrode 12 and covering the gate electrode 12 .
  • the substrate having the source and drain electrodes 15 may further include a graphene film 121 disposed on the gate electrode 12 and covering the gate electrode 12 .
  • the graphene film 121 is produced by any one of the two methods of growing graphene on the gate as described above.
  • the source and drain electrodes 15 may be a single layer structure or a double layer structure; the single layer structure is a single copper layer or a copper alloy layer; and the double layer structure is a double layer composite composed of an aluminum layer and a copper layer.
  • Step 2 the substrate 15 having the source and drain into the PECVD chamber, into H 2 gas purge, the temperature was raised to the PECVD chamber 300 °C -400 °C, the H 2 gas
  • the gas flow rate is from 10 SCCM to 200 SCCM, maintaining the overall pressure in the PECVD reaction chamber at 1 to 10 Pa and the radio frequency (RF) power at 100-800 W.
  • a lower temperature 300 ° C - 400 ° C, is employed to avoid the formation of the TFT structure as much as possible. damage.
  • the gas flow rate of the H 2 gas is 80 SCCM.
  • the overall pressure within the PECVD reaction chamber is maintained at 3 Pa.
  • the RF power in the PECVD reaction chamber is 500W.
  • the PECVD device used in the present invention may be a common PECVD device or an improved PECVD device such as a microwave reinforced PECVD device, a surface wave enhanced PECVD device, or the like.
  • Step 3 Continue to inject H 2 gas into the PECVD reaction chamber while injecting hydrocarbon gas to grow graphene on the surface of the source and drain electrodes 15 .
  • the flow ratio of the hydrocarbon gas to the H 2 gas is 10:1 to 1 : 50, controlling the growth time of graphene is 1-10 min, the PECVD device is turned off, and after the device is slowly warmed to room temperature, as shown in FIG. 8 and FIG. 9, a graphene film 151 covering the surface of the source and drain electrodes 15 is obtained.
  • the H 2 gas is ionized into an H plasma in a PECVD reaction chamber, thereby achieving an effect of cleaning the substrate;
  • the hydrocarbon gas is methane, ethylene, or acetylene.
  • the flow ratio of the hydrocarbon gas to the H 2 gas is 3:1.
  • the growth time of the graphene is controlled to be 3 min.
  • the metal copper in the source and drain 15 functions as a catalyst, and the hydrocarbon gas decomposes on the copper surface to form a nucleation crystal to form a graphene film, and the source and the drain are formed.
  • the hydrocarbon gas decomposes on the copper surface to form a nucleation crystal to form a graphene film, and the source and the drain are formed.
  • the metal copper in the source and drain 15 since there is no metal copper, there is no such reaction, which can also avoid contamination of other portions of the graphene, so that the graphene can grow according to the pattern of the source and drain electrodes 15, and the finally produced graphite.
  • the pattern of the olefin film 151 completely overlaps the pattern of the source and drain electrodes 15.
  • the present invention provides a method for growing graphene on a surface of a gate electrode and a method for growing graphene on a source/drain surface, using a low temperature plasma enhanced vapor deposition process on a gate or source drain containing copper.
  • a graphene film having a controllable film thickness and overlapping with the pattern of the gate or source and drain is formed.
  • the graphene has a low preparation temperature, and the structure of the thin film transistor can be minimized, and the carbon source is widely used.
  • the price is low, the production method is simple, and the existing PECVD equipment in the production line can be fabricated by using a thin film transistor without increasing the cost; the gate or source and drain of the graphene coated, due to the protection of graphene, avoids water and The contact of oxygen solves the problem that the gate or source and drain of the metal copper in the conventional TFT process is easily oxidized, and the high conductivity of the graphene does not affect the electrical performance of the entire device.

Abstract

本发明提供一种在栅极表面生长石墨烯的方法及在源漏极表面生长石墨烯的方法，采用低温的等离子体增强气相沉积制程在含有铜的栅极或源漏极上生成膜厚可控且与所述栅极或源漏极的图案重叠的石墨烯薄膜，石墨烯的制备温度较低，可以最大限度地不破坏薄膜晶体管的结构，采用的碳源来源广泛，价格低廉，制作方法简单，可以使用薄膜晶体管制作产线中已有的PECVD设备，无需增加成本；包覆石墨烯后的栅极或源漏极，由于石墨烯的保护作用，避免了与水和氧的接触，解决了传统的TFT制程中含有金属铜的栅极或源漏极易被氧化的问题，另外高导电性的石墨烯也不会影响整个器件的电性表现。

Description

在栅极表面生长石墨烯的方法及在源漏极表面生长石墨烯的方法 技术领域
本发明涉及显示技术领域，尤其涉及一种在栅极表面生长石墨烯的方法及一种在源漏极表面生长石墨烯的方法。
背景技术
在显示技术领域，液晶显示器(Liquid Crystal Display，LCD)与有机发光二极管显示器(Organic Light Emitting Diode，OLED)等平板显示器已经逐步取代CRT显示器，广泛的应用于液晶电视、手机、个人数字助理、数字相机、计算机屏幕或笔记本电脑屏幕等。
显示面板是LCD、OLED的重要组成部分。不论是LCD的显示面板，还是OLED的显示面板，通常都具有一薄膜晶体管(Thin Film Transistor，TFT)阵列基板。以LCD的显示面板为例，其主要是由一TFT阵列基板、一彩色滤光片基板(Color Filter，CF)、以及配置于两基板间的液晶层(Liquid Crystal Layer，LC)所构成，其工作原理是通过在TFT阵列基板与CF基板上施加驱动电压来控制液晶层中液晶分子的旋转，将背光模组的光线折射出来产生画面。
随着半导体显示技术的不断发展，显示面板对薄膜晶体管阵列基板上的电极线以及薄膜晶体管的电极的导电性能的要求越来越高。特别是在高分辨率产品中，为了增加开口率，需要在保证导电性能的基础上减小电极线的线宽；在大尺寸产品中，为了保证画面的刷新频率，需要降低电极线的电阻。由于铜(Cu)材料导电率较佳，目前大尺寸TFT-LCD的制作逐渐导入Cu制程，即栅极，源/漏极均采用Cu材料制作。而现有的铜制程中，铜作为栅极和源漏极，经常会裸露着进行后续制程，在后续高温高湿的制程中易产生被氧化的风险，在铜表面容易形成一层不导电的隔离层，从而影响整个TFT器件的电性表现。所以在铜的表面覆盖上一层高导电性的隔离层，以避免以上问题的产生显得尤其重要。
石墨烯是具有高导电性的单层碳原子，其具有优异的机械性能。已有研究表明通过气相沉积法可以在铜表面生成均匀致密的石墨烯层，由于单层石墨烯具有优异气水隔绝能力，因此可以用于阻止水、氧气与铜的接触，避免铜被氧化的问题。在气相沉积法(Chemical Vapor Deposition，CVD) 中，等离子体增强化学气相沉积法(Plasma Enhanced Chemical Vapor Deposition，PECVD)是借助微波或射频等使含有薄膜组成原子的气体电离，在局部形成等离子体，而等离子体化学活性很强，很容易发生反应，在基片上沉积出所期望的薄膜。为了使化学反应能在较低的温度下进行，利用了等离子体的活性来促进反应，因而这种化学气相沉积法称为等离子体增强化学气相沉积。
发明内容
本发明的目的在于提供一种在栅极表面生长石墨烯的方法，采用气态碳源通过低温的等离子体增强气相沉积(PECVD)制程在栅极表面生成膜厚可控的石墨烯薄膜以降低栅极被氧化的风险，石墨烯的制备温度较低，可以最大限度地不破坏薄膜晶体管的结构，形成石墨烯薄膜的碳源来源广泛，价格低廉，制作方法简单。
本发明的目的还在于提供另一种在栅极表面生长石墨烯的方法，采用固态碳源通过通过低温的PECVD制程在栅极表面生长膜厚可控的石墨烯薄膜以降低栅极被氧化的风险，石墨烯的制备温度较低，可以最大限度地不破坏薄膜晶体管的结构，形成石墨烯薄膜的碳源来源广泛，价格低廉，制作方法简单。
本发明的目的还在于提供一种在源漏极表面生长石墨烯的方法，采用气态碳源通过低温的PECVD制程在源漏极表面生长膜厚可控的石墨烯薄膜以降低源漏极被氧化的风险，石墨烯的制备温度较低，可以最大限度地不破坏薄膜晶体管的结构，形成石墨烯薄膜的碳源来源广泛，价格低廉，制作方法简单。
为实现上述目的，本发明提供一种在栅极表面生长石墨烯的方法，包括如下步骤：
步骤1、提供一具有栅极的基板，所述栅极中含有金属铜；
步骤2、将所述具有栅极的基板放入PECVD反应腔内，通入H2气体进行清洗，将PECVD反应腔内的温度升高至300℃-700℃，所述H2气体的气体流量为10SCCM至200SCCM，保持PECVD反应腔内的整体压强在1至10Pa，射频功率为100-800W；
步骤3、在所述PECVD反应腔内继续注入H2气体，同时注入碳氢气体，在栅极表面生长石墨烯，所述碳氢气体和H2气体的流速比为10：1至1:50，控制石墨烯的生长时间为1-10min，关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于栅极表面的石墨烯薄膜。
所述步骤2中，所述H2气体的气体流量为80SCCM；将PECVD反应腔内的整体压强保持在3Pa；所述PECVD反应腔内的射频功率为500W；将所述PECVD反应腔内的温度升高至500℃。
所述步骤3中，所述碳氢气体为甲烷、乙烯、或乙炔；所述步骤3制得的石墨烯薄膜的图案与栅极的图案完全重叠。
本还提供另一种在栅极表面生长石墨烯的方法，包括如下步骤：
步骤1、提供一具有栅极的基板，所述栅极中含有金属铜；
步骤2、提供固体碳源和溶剂，将所述固体碳源溶解于溶剂中，形成混合溶液，将所述混合溶液均匀涂布在所述具有栅极的基板上，形成覆盖所述栅极和基板的有机薄膜，在50℃-100℃下真空烘烤1-4h，以去除有机薄膜内的溶剂；
步骤3、将所述覆盖有机薄膜的基板置于PECVD反应腔中，通入H2气体，H2气体的气体流量为10-200SCCM，将PECVD反应腔内的温度升高至400℃-700℃，保持PECVD反应腔内的整体压强为23Torr，所述有机薄膜中的固体碳源在PECVD反应腔内转化为石墨烯，反应时间为5-60min，停止通入H2气体并关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于栅极表面的基板的石墨烯薄膜。
所述步骤2中，所述固体碳源为聚甲基丙烯酸甲酯、聚苯乙烯、聚丙烯腈、或聚二甲基硅氧烷；所述溶剂为甲苯；所述步骤2中的涂布方式为旋转涂布、狭缝涂布、或喷涂。
所述步骤3中，将PECVD反应腔内的温度升高至600℃；所述H2气体的气体流量为100SCCM；所述有机薄膜在PECVD反应腔内的反应时间为20min；所述步骤3制得的石墨烯薄膜的图案与栅极的图案完全重叠。
本发明还提供一种在源漏极表面生长石墨烯的方法，包括如下步骤：
步骤1、提供一具有源漏极的基板，所述源漏极中含有金属铜；
步骤2、将所述具有源漏极的基板放入PECVD反应腔内，通入H2气体进行清洗，将PECVD反应腔内的温度升高至300℃-400℃，所述H2气体的气体流量为10SCCM至200SCCM，保持PECVD反应腔内的整体压强在1至10Pa，射频功率为100-800W；
步骤3、在所述PECVD反应腔内继续注入H2气体，同时注入碳氢气体，在源漏极表面生长石墨烯，所述碳氢气体和H2气体的流速比为10：1至1:50，控制石墨烯的生长时间为1-10min，关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于源漏极表面的石墨烯薄膜。
所述步骤1中，所述具有源漏极的基板包括基板、设于所述基板上的 栅极、设于所述栅极上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上的半导体层、及设于所述半导体层上的源漏极。
所述具有源漏极的基板还包括设于所述栅极上且覆盖所述栅极的石墨烯薄膜。
所述步骤3中，所述碳氢气体为甲烷、乙烯、或乙炔；所述步骤3制得的石墨烯薄膜的图案与源漏极的图案完全重叠。
本发明的有益效果：本发明提供一种在栅极表面生长石墨烯的方法及在源漏极表面生长石墨烯的方法，采用低温的等离子体增强气相沉积制程在含有铜的栅极或源漏极上生成膜厚可控且与所述栅极或源漏极的图案重叠的石墨烯薄膜，石墨烯的制备温度较低，可以最大限度地不破坏薄膜晶体管的结构，采用的碳源来源广泛，价格低廉，制作方法简单，可以使用薄膜晶体管制作产线中已有的PECVD设备，无需增加成本；包覆石墨烯后的栅极或源漏极，由于石墨烯的保护作用，避免了与水和氧的接触，解决了传统的TFT制程中含有金属铜的栅极或源漏极易被氧化的问题，另外高导电性的石墨烯也不会影响整个器件的电性表现。
附图说明
为了能更进一步了解本发明的特征以及技术内容，请参阅以下有关本发明的详细说明与附图，然而附图仅提供参考与说明用，并非用来对本发明加以限制。
附图中，
图1为本发明的一种在栅极表面生长石墨烯的方法的示意流程图；
图2为图1的在栅极表面生长石墨烯的方法的步骤1的示意图；
图3为图1的在栅极表面生长石墨烯的方法的步骤4的示意图；
图4为本发明的另一种在栅极表面生长石墨烯的方法的示意流程图；
图5为本发明的一种在源漏极表面生长石墨烯的方法的示意流程图；
图6-7为图5的在源漏极表面生长石墨烯的方法的步骤1的示意图；
图8-9为图5的在源漏极表面生长石墨烯的方法的步骤2的示意图。
具体实施方式
为更进一步阐述本发明所采取的技术手段及其效果，以下结合本发明的优选实施例及其附图进行详细描述。
本发明考虑到TFT-LCD制备工艺对温度的要求，采用了低温的等离子体增强气相沉积(PECVD)方法在含有金属铜的栅极或源漏极表面生成膜 厚可控的石墨烯薄膜，而且石墨烯能够按着栅极或源漏极的图案生长，具体而言，整个反应过程中，栅极或源漏极中的铜扮演的是催化剂的角色，含碳前驱体在铜表面分解，成核结晶，而在其他无铜区域，则不会有此反应，这也可以避免石墨烯对其他部分的污染，包覆石墨烯后的栅极或源漏极，由于石墨烯的保护作用，可避免了栅极或源漏极与水和氧的接触，另外高导电性的石墨烯也不会影响整个器件的电性表现。
根据以上原理，请参阅图1，本发明首先提供一种在栅极表面生长石墨烯的方法，包括如下步骤：
步骤1、提供一具有栅极12的基板，所述栅极12中含有金属铜。
具体的，如图2所示，所述具有栅极12的基板包括一基板11、及设于所述基板11上的栅极12。
具体的，所述栅极12可以为单层结构或双层结构；所述单层结构为单一的铜层或铜合金层；所述双层结构为铝层与铜层构成的双层复合结构、钼层与铜层构成的双层复合结构、或钛层与铜层构成的双层复合结构。
步骤2、将所述具有栅极12的基板放入PECVD(等离子体增强化学气相沉积)反应腔内，通入H2(氢气)气体进行清洗，将PECVD反应腔内的温度升高至300℃-700℃，所述H2气体的气体流量为10SCCM至200SCCM，保持PECVD反应腔内的整体压强在1至10Pa，射频(RF)功率为100-800W。
具体的，所述H2气体在PECVD反应腔内被电离成H等离子体，从而实现对基板进行清洗的效果；
优选的，所述H2气体的气体流量为80SCCM。
优选的，将PECVD反应腔内的整体压强保持在3Pa。
优选的，所述PECVD反应腔内的射频功率为500W。
优选的，将所述PECVD反应腔内的温度升高至500℃。
具体的，本发明采用的PECVD设备可以为普通PECVD设备，也可以为改良的PECVD设备，如微波加强PECVD设备，表面波增强PECVD设备等。
步骤3、如图2所示，在所述PECVD反应腔内继续注入H2气体，同时注入碳氢气体，在栅极12表面生长石墨烯，所述碳氢气体和H2气体的流速比为10：1至1:50，控制石墨烯的生长时间为1-10min，关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于栅极12表面的石墨烯薄膜121。
具体的，所述碳氢气体为甲烷、乙烯、或乙炔等。
优选的，所述碳氢气体和H2气体的流速比为3：1。
优选的，控制石墨烯的生长时间为3min。
具体的，在所述步骤3的反应过程中，所述栅极12中的金属铜起到催化剂的作用，碳氢气体在铜表面分解，成核结晶，形成石墨烯薄膜，而在栅极12以外的区域，由于不存在金属铜，则不会有此反应，这也可以避免石墨烯对其他部分的污染，从而使得石墨烯能够按照栅极12的图案生长，最终制得的石墨烯薄膜121的图案与栅极12的图案完全重叠。
请参阅图4，本发明提供另一种在栅极表面生长石墨烯的方法，包括如下步骤：
步骤1、提供一具有栅极的基板，所述栅极中含有金属铜。
具体的，所述具有栅极的基板包括一基板、及设于所述基板上的栅极。
具体的，所述栅极可以为单层结构或双层结构；所述单层结构为单一的铜层或铜合金层；所述双层结构为铝层与铜层构成的双层复合结构、钼层与铜层构成的双层复合结构、或钛层与铜层构成的双层复合结构。
步骤2、提供固体碳源和溶剂，将所述固体碳源溶解于溶剂中，形成混合溶液，将所述混合溶液均匀涂布在所述具有栅极的基板上，形成覆盖所述栅极和基板的有机薄膜，在50℃-100℃下真空烘烤1-4h，以去除有机薄膜内的溶剂。
具体的，所述固体碳源为聚甲基丙烯酸甲酯(PMMA)、聚苯乙烯(PS)、聚丙烯腈(PAN)、或聚二甲基硅氧烷(PDMS)等含碳有机物；所述溶剂为甲苯等有机溶剂。
具体的，所述步骤2中的涂布方式为旋转涂布、狭缝涂布、或喷涂等湿法涂布方式。
步骤3、将所述覆盖有机薄膜的基板置于PECVD反应腔中，通入H2气体，H2气体的气体流量为10-200SCCM，将PECVD反应腔内的温度升高至400℃-700℃，保持PECVD反应腔内的整体压强为23Torr，所述有机薄膜中的固体碳源在PECVD反应腔内转化为石墨烯，反应时间为5-60min，停止通入H2气体并关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于栅极表面的基板的石墨烯薄膜。
优选的，所述步骤3中，将PECVD反应腔内的温度升高至600℃。
优选的，所述H2气体的气体流量为100SCCM。
优选的，所述有机薄膜在PECVD反应腔内的反应时间为20min。
具体的，本发明采用的PECVD设备可以为普通PECVD设备，也可以为改良的PECVD设备，如微波加强PECVD设备，表面波增强PECVD设备等。
具体的，在所述步骤3的反应过程中，所述栅极中的金属铜起到催化剂的作用，所述有机薄膜中的固体碳源在铜表面分解，成核结晶，形成石墨烯薄膜，而在栅极以外的区域，由于不存在金属铜，则不会有此反应，这也可以避免石墨烯对其他部分的污染，从而使得石墨烯能够按照栅极的图案生长，最终制得的石墨烯薄膜的图案与栅极的图案完全重叠。
请参阅图5，本发明还提供一种在源、漏极表面生长石墨烯的方法，包括如下步骤：
步骤1、如图6-7所示，提供一具有源漏极15的基板，所述源漏极15中含有金属铜。
具体的，如图6所示，所述具有源漏极15的基板包括基板11、设于所述基板11上的栅极12、设于所述栅极12上且覆盖栅极12的栅极绝缘层13、设于所述栅极绝缘层13上的半导体层14、及设于所述半导体层14上的源漏极15。
进一步的，如图7所示，所述具有源漏极15的基板还可以包括设于所述栅极12上且覆盖所述栅极12的石墨烯薄膜121。具体的，所述石墨烯薄膜121采用如前所述的两种在栅极上生长石墨烯的方法中的任意一种制得。
具体的，所述源漏极15可以为单层结构或双层结构；所述单层结构为单一的铜层或铜合金层；所述双层结构为铝层与铜层构成的双层复合结构、钼层与铜层构成的双层复合结构、或钛层与铜层构成的双层复合结构。
步骤2、将所述具有源漏极15的基板放入PECVD反应腔内，通入H2气体进行清洗，将PECVD反应腔内的温度升高至300℃-400℃，所述H2气体的气体流量为10SCCM至200SCCM，保持PECVD反应腔内的整体压强在1至10Pa，射频(RF)功率为100-800W。
由于在源漏极15上生成石墨烯前，已经形成TFT结构，因此在采用PECVD制程制备石墨烯薄膜时，采用较低的温度，300℃-400℃，以尽量避免对已形成的TFT结构的破坏。
优选的，所述H2气体的气体流量为80SCCM。
优选的，将PECVD反应腔内的整体压强保持在3Pa。
优选的，所述PECVD反应腔内的射频功率为500W。
具体的，本发明采用的PECVD设备可以为普通PECVD设备，也可以为改良的PECVD设备，如微波加强PECVD设备，表面波增强PECVD设备等。
步骤3、在所述PECVD反应腔内继续注入H2气体，同时注入碳氢气体，在源漏极15表面生长石墨烯，所述碳氢气体和H2气体的流速比为10： 1至1:50，控制石墨烯的生长时间为1-10min，关闭PECVD设备，待设备缓慢回温至室温后，如图8和图9所示，得到覆盖于源漏极15表面的石墨烯薄膜151。
具体的，所述H2气体在PECVD反应腔内被电离成H等离子体，从而实现对基板进行清洗的效果；
具体的，所述碳氢气体为甲烷、乙烯、或乙炔等。
优选的，所述碳氢气体和H2气体的流速比为3：1。
优选的，控制石墨烯的生长时间为3min。
具体的，在所述步骤3的反应过程中，所述源漏极15中的金属铜起到催化剂的作用，碳氢气体在铜表面分解，成核结晶，形成石墨烯薄膜，而在源漏极15以外的区域，由于不存在金属铜，则不会有此反应，这也可以避免石墨烯对其他部分的污染，从而使得石墨烯能够按照源漏极15的图案生长，最终制得的石墨烯薄膜151的图案与源漏极15的图案完全重叠。
综上所述，本发明提供一种在栅极表面生长石墨烯的方法及在源漏极表面生长石墨烯的方法，采用低温的等离子体增强气相沉积制程在含有铜的栅极或源漏极上生成膜厚可控且与所述栅极或源漏极的图案重叠的石墨烯薄膜，石墨烯的制备温度较低，可以最大限度地不破坏薄膜晶体管的结构，采用的碳源来源广泛，价格低廉，制作方法简单，可以使用薄膜晶体管制作产线中已有的PECVD设备，无需增加成本；包覆石墨烯后的栅极或源漏极，由于石墨烯的保护作用，避免了与水和氧的接触，解决了传统的TFT制程中含有金属铜的栅极或源漏极易被氧化的问题，另外高导电性的石墨烯也不会影响整个器件的电性表现。
以上所述，对于本领域的普通技术人员来说，可以根据本发明的技术方案和技术构思作出其他各种相应的改变和变形，而所有这些改变和变形都应属于本发明后附的权利要求的保护范围。

Claims (10)

  1. 一种在栅极表面生长石墨烯的方法，包括如下步骤：
    步骤1、提供一具有栅极的基板，所述栅极中含有金属铜；
    步骤2、将所述具有栅极的基板放入PECVD反应腔内，通入H2气体进行清洗，将PECVD反应腔内的温度升高至300℃-700℃，所述H2气体的气体流量为10SCCM至200SCCM，保持PECVD反应腔内的整体压强在1至10Pa，射频功率为100-800W；
    步骤3、在所述PECVD反应腔内继续注入H2气体，同时注入碳氢气体，在栅极表面生长石墨烯，所述碳氢气体和H2气体的流速比为10：1至1:50，控制石墨烯的生长时间为1-10min，关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于栅极表面的石墨烯薄膜。
  2. 如权利要求1所述的在栅极表面生长石墨烯的方法，其中，所述步骤2中，所述H2气体的气体流量为80SCCM；将PECVD反应腔内的整体压强保持在3Pa；所述PECVD反应腔内的射频功率为500W；将所述PECVD反应腔内的温度升高至500℃。
  3. 如权利要求1所述的在栅极表面生长石墨烯的方法，其中，所述步骤3中，所述碳氢气体为甲烷、乙烯、或乙炔；所述步骤3制得的石墨烯薄膜的图案与栅极的图案完全重叠。
  4. 一种在栅极表面生长石墨烯的方法，包括如下步骤：
    步骤1、提供一具有栅极的基板，所述栅极中含有金属铜；
    步骤2、提供固体碳源和溶剂，将所述固体碳源溶解于溶剂中，形成混合溶液，将所述混合溶液均匀涂布在所述具有栅极的基板上，形成覆盖所述栅极和基板的有机薄膜，在50℃-100℃下真空烘烤1-4h，以去除有机薄膜内的溶剂；
    步骤3、将所述覆盖有机薄膜的基板置于PECVD反应腔中，通入H2气体，H2气体的气体流量为10-200SCCM，将PECVD反应腔内的温度升高至400℃-700℃，保持PECVD反应腔内的整体压强为23Torr，所述有机薄膜中的固体碳源在PECVD反应腔内转化为石墨烯，反应时间为5-60min，停止通入H2气体并关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于栅极表面的基板的石墨烯薄膜。
  5. 如权利要求4所述的在栅极表面生长石墨烯的方法，其中，所述步骤2中，所述固体碳源为聚甲基丙烯酸甲酯、聚苯乙烯、聚丙烯腈、或聚 二甲基硅氧烷；所述溶剂为甲苯；所述步骤2中的涂布方式为旋转涂布、狭缝涂布、或喷涂。
  6. 如权利要求4所述的在栅极表面生长石墨烯的方法，其中，所述步骤3中，将PECVD反应腔内的温度升高至600℃；所述H2气体的气体流量为100SCCM；所述有机薄膜在PECVD反应腔内的反应时间为20min；所述步骤3制得的石墨烯薄膜的图案与栅极的图案完全重叠。
  7. 一种在源漏极表面生长石墨烯的方法，包括如下步骤：
    步骤1、提供一具有源漏极的基板，所述源漏极中含有金属铜；
    步骤2、将所述具有源漏极的基板放入PECVD反应腔内，通入H2气体，将PECVD反应腔内的温度升高至300℃-400℃，所述H2气体的气体流量为10SCCM至200SCCM，保持PECVD反应腔内的整体压强在1至10Pa，射频功率为100-800W；
    步骤3、在所述PECVD反应腔内继续注入H2气体，同时注入碳氢气体，在源漏极表面生长石墨烯，所述碳氢气体和H2气体的流速比为10：1至1:50，控制石墨烯的生长时间为1-10min，关闭PECVD设备，待设备缓慢回温至室温后，得到覆盖于源漏极表面的石墨烯薄膜。
  8. 如权利要求7所述的在源漏极表面生长石墨烯的方法，其中，所述步骤1中，所述具有源漏极的基板包括基板、设于所述基板上的栅极、设于所述栅极上且覆盖栅极的栅极绝缘层、设于所述栅极绝缘层上的半导体层、及设于所述半导体层上的源漏极。
  9. 如权利要求8所述的在源漏极表面生长石墨烯的方法，其中，所述具有源漏极的基板还包括设于所述栅极上且覆盖所述栅极的石墨烯薄膜。
  10. 如权利要求7所述的在源漏极表面生长石墨烯的方法，其中，所述步骤3中，所述碳氢气体为甲烷、乙烯、或乙炔；所述步骤3制得的石墨烯薄膜的图案与源漏极的图案完全重叠。
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110676169A (zh) * 2019-09-05 2020-01-10 中国电子科技集团公司第十三研究所 石墨烯胶囊封装晶体管制备方法

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104966722A (zh) * 2015-07-24 2015-10-07 深圳市华星光电技术有限公司 Tft基板结构及其制作方法
CN105867018B (zh) * 2016-03-28 2019-08-02 深圳市华星光电技术有限公司 石墨烯液晶显示装置、石墨烯发光元件及其制作方法
CN107887262B (zh) * 2016-09-30 2020-01-14 中芯国际集成电路制造(北京)有限公司 半导体装置及其制造方法
CN106298546A (zh) * 2016-10-31 2017-01-04 京东方科技集团股份有限公司 一种薄膜晶体管、其制作方法、阵列基板及显示面板
CN106876539B (zh) * 2017-02-17 2019-04-05 深圳市华星光电技术有限公司 石墨烯发光晶体管及其制作方法、主动石墨烯发光显示器
KR102422422B1 (ko) * 2017-06-01 2022-07-19 삼성전자주식회사 그래핀을 포함하는 반도체 소자 및 그 제조방법
CN109786391B (zh) * 2017-11-10 2021-08-03 京东方科技集团股份有限公司 阵列基板及其制作方法、显示装置
US11180373B2 (en) 2017-11-29 2021-11-23 Samsung Electronics Co., Ltd. Nanocrystalline graphene and method of forming nanocrystalline graphene
US10604844B2 (en) 2018-05-14 2020-03-31 Purdue Research Foundation Graphene production using plasma-enhanced chemical vapor deposition
US11217531B2 (en) 2018-07-24 2022-01-04 Samsung Electronics Co., Ltd. Interconnect structure having nanocrystalline graphene cap layer and electronic device including the interconnect structure
KR102532605B1 (ko) 2018-07-24 2023-05-15 삼성전자주식회사 나노결정질 그래핀 캡층을 포함하는 인터커넥트 구조체 및 이 인터커넥트 구조체를 포함하는 전자 소자
KR20200011821A (ko) 2018-07-25 2020-02-04 삼성전자주식회사 탄소물 직접 성장방법
KR102601607B1 (ko) * 2018-10-01 2023-11-13 삼성전자주식회사 그래핀의 형성방법
CN109860209A (zh) * 2019-02-28 2019-06-07 深圳市华星光电半导体显示技术有限公司 Tft基板的制作方法及tft基板
KR20200126721A (ko) 2019-04-30 2020-11-09 삼성전자주식회사 그래핀 구조체 및 그래핀 구조체의 형성방법

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102011100A (zh) * 2010-12-01 2011-04-13 中国科学院化学研究所 一种在铁基衬底上制备大面积高质量石墨烯的方法
CN102260858A (zh) * 2010-05-26 2011-11-30 中国科学院物理研究所 一种在各种基底上直接生长石墨烯的方法
CN103072333A (zh) * 2013-01-05 2013-05-01 郑州航空工业管理学院 一种带有抗氧化防护层的铜材及其制造方法
CN103208685A (zh) * 2013-04-12 2013-07-17 北京大学 一种耐腐蚀电极及其制备方法和应用
CN103579631A (zh) * 2012-07-18 2014-02-12 海洋王照明科技股份有限公司 一种铜箔集流体的制备方法及应用
CN103928305A (zh) * 2014-04-19 2014-07-16 复旦大学 一种通过控制衬底上的石墨烯成核位点生长石墨烯的方法
CN104030277A (zh) * 2014-06-11 2014-09-10 苏州斯迪克新材料科技股份有限公司 化学气相沉积法制备石墨烯
CN104108706A (zh) * 2014-07-15 2014-10-22 中国科学院化学研究所 一种大面积优质氮掺杂石墨烯及其制备方法与应用
CN104386675A (zh) * 2014-11-03 2015-03-04 黄德欢 一种用固态碳源制备石墨烯的方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20140067600A (ko) * 2012-11-27 2014-06-05 삼성디스플레이 주식회사 스위칭 소자, 이를 포함하는 표시 기판 및 이의 제조 방법
TWI485290B (zh) * 2012-12-19 2015-05-21 Univ Nat Taiwan 轉印石墨烯層之方法
CN103745829B (zh) * 2013-12-30 2015-05-20 深圳市华星光电技术有限公司 石墨烯复合电极材料的制备方法
KR102037855B1 (ko) * 2014-01-09 2019-10-31 한국전자통신연구원 Ｃｕ／Ｎｉ 다층 메탈 촉매를 이용한 고품질 단일층 그래핀 성장 방법 및 이를 활용한 그래핀 소자

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102260858A (zh) * 2010-05-26 2011-11-30 中国科学院物理研究所 一种在各种基底上直接生长石墨烯的方法
CN102011100A (zh) * 2010-12-01 2011-04-13 中国科学院化学研究所 一种在铁基衬底上制备大面积高质量石墨烯的方法
CN103579631A (zh) * 2012-07-18 2014-02-12 海洋王照明科技股份有限公司 一种铜箔集流体的制备方法及应用
CN103072333A (zh) * 2013-01-05 2013-05-01 郑州航空工业管理学院 一种带有抗氧化防护层的铜材及其制造方法
CN103208685A (zh) * 2013-04-12 2013-07-17 北京大学 一种耐腐蚀电极及其制备方法和应用
CN103928305A (zh) * 2014-04-19 2014-07-16 复旦大学 一种通过控制衬底上的石墨烯成核位点生长石墨烯的方法
CN104030277A (zh) * 2014-06-11 2014-09-10 苏州斯迪克新材料科技股份有限公司 化学气相沉积法制备石墨烯
CN104108706A (zh) * 2014-07-15 2014-10-22 中国科学院化学研究所 一种大面积优质氮掺杂石墨烯及其制备方法与应用
CN104386675A (zh) * 2014-11-03 2015-03-04 黄德欢 一种用固态碳源制备石墨烯的方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN110676169A (zh) * 2019-09-05 2020-01-10 中国电子科技集团公司第十三研究所 石墨烯胶囊封装晶体管制备方法

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