WO2017002390A1 - Module de circuit - Google Patents

Module de circuit Download PDF

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Publication number
WO2017002390A1
WO2017002390A1 PCT/JP2016/054875 JP2016054875W WO2017002390A1 WO 2017002390 A1 WO2017002390 A1 WO 2017002390A1 JP 2016054875 W JP2016054875 W JP 2016054875W WO 2017002390 A1 WO2017002390 A1 WO 2017002390A1
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WO
WIPO (PCT)
Prior art keywords
power supply
bridge circuit
pattern
circuit module
full bridge
Prior art date
Application number
PCT/JP2016/054875
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English (en)
Japanese (ja)
Inventor
知稔 佐藤
研一 田中
佐藤　浩哉
清美 谷口
Original Assignee
シャープ株式会社
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Publication of WO2017002390A1 publication Critical patent/WO2017002390A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present invention relates to a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate.
  • FIG. 22 is a perspective view showing the structure of the full bridge circuit module 100 in Patent Document 1. As shown in FIG. As shown in FIG. 22, the full bridge circuit module 100 has two half bridge circuits arranged in a plane.
  • the positive power supply pattern 131-1, the positive power supply pattern 131-2, the negative power supply pattern 132-1 and the negative power supply are supplied to the module substrate 110.
  • a pattern 132-2, an output pattern 133-1, and an output pattern 133-1 are formed.
  • the positive power supply pattern 131-1 and the positive power supply pattern 131-2 are each connected to the positive power supply, and the negative power supply pattern 132-1 and the negative power supply pattern 132-2 are grounded.
  • the positive power supply pattern 131-1 and the output pattern 133-1 are connected via the switching element 121-1 and the conductive wire 161-1.
  • 132-1 and the output pattern 133-1 are connected via the switching element 122-1 and the conductive wire 162-1.
  • the positive power supply pattern 131-2 and the output pattern 133-2 are connected via the switching element 121-2 and the conductive wire 161-2, and the negative power supply pattern 132-2 and the output pattern are connected.
  • 133-2 is connected via a switching element 122-2 and a conductive wire 162-2.
  • the full bridge circuit module 100 will be described by taking as an example the case where the output of the output pattern 133-1 is positive and the output of the output pattern 133-2 is negative.
  • the switching element 121-1 connected to the positive power supply pattern 131-1 is ON, and the switching element 122 connected to the negative power supply pattern 132-1 is used. -1 is OFF. That is, a current I-101 flows through the full bridge circuit module 100.
  • FIG. 23 is a perspective view showing the structure of the power semiconductor module 101 in Patent Document 2.
  • the module substrate 110 is omitted for easy understanding of the structure.
  • the power semiconductor module 101 has one half-bridge circuit arranged in a plane.
  • a positive power supply pattern 131 a negative power supply pattern 132, an output pattern 133, and a negative power supply pattern 134 are formed as the first conductive layer.
  • the positive power supply pattern 131 is connected to the positive power supply
  • the negative power supply pattern 132 is connected to the negative power supply.
  • the positive power supply pattern 131 and the output pattern 133 are connected via the switching element 121 and the conductive wire 161.
  • the negative power supply pattern 134 and the output pattern 133 are connected via the switching element 122 and the conductive wire 162.
  • a path 111 is formed as a second conductive layer in a region facing the first conductive layer on a main surface different from the main surface on which the half bridge circuit is disposed. Furthermore, a connection electrode 141 and a connection electrode 142 are provided to connect the path 111, the negative power supply pattern 132, and the negative power supply pattern 134.
  • the power semiconductor module 101 will be described by taking the case where the output of the output pattern 133 is positive as an example.
  • the switching element 121 connected to the positive power supply pattern 131 is ON, and the switching element 122 connected to the negative power supply pattern 134 is OFF. That is, a current I-111 flows through the power semiconductor module 101.
  • FIG. 24 is a perspective view showing the structure of the full bridge circuit module 102 using the power semiconductor module in Patent Document 2. As shown in FIG. In FIG. 24, the module substrate 110 is omitted for easy understanding of the structure.
  • the negative power supply pattern 132 is shared. Moreover, since the wide conductor part corresponding to each of the two half-bridge circuits is also connected to the negative power supply pattern 132, the wide conductor part 111 is also commonly used. By sharing the negative power supply pattern 132, it is possible to function as a more stable power source.
  • FIG. 25 is a perspective view showing a current flow of the full bridge circuit module 102 using the power semiconductor module in Patent Document 2.
  • the currents flowing through the full bridge circuit module 102 are the current I-121, the current I-123, and the current I-124. is there.
  • a current I-122 flows as a regenerative current for the current I-121
  • a current I105 flows as a regenerative current for the currents I-123 and I-124.
  • the current I-123 and the current I-124 cancel each other out of the magnetic field and continuously change from the current I-124 to the current I-125, so that the current I-123, the current I-124, and the current I-124 The parasitic inductance due to I-125 is suppressed.
  • the full bridge circuit module 102 has a problem that noise increases.
  • the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a technique for increasing the effect of suppressing parasitic inductance in a circuit module in which a full bridge circuit is mounted on a substrate. .
  • a circuit module is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate, and the two half bridge circuits are formed on the substrate.
  • a power supply pattern that functions as a positive power source or a negative power source for the half bridge circuit is formed on one main surface of the substrate for each of the two half bridge circuits mounted on one main surface.
  • a conductive pattern is formed in a region corresponding to the half-bridge circuit, and the conductive pattern is connected to the power supply pattern.
  • a circuit module is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate, and the two half bridge circuits are A power supply pattern that is mounted on one main surface of the substrate and functions as a positive power source or a negative power source for the two half bridge circuits is provided on the one main surface of the substrate.
  • a conductive pattern is formed in a region corresponding to the full bridge circuit, and the conductive pattern is connected to the power supply pattern.
  • the power supply pattern passes through a region corresponding to each of the half-bridge circuits in the conductive pattern region. Power is supplied.
  • the effect of suppressing parasitic inductance can be enhanced in a circuit module in which a full bridge circuit is mounted on a substrate.
  • FIG. 1 It is a perspective view which shows the structure of the full bridge circuit module which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 1 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. It is a circuit diagram of the full bridge circuit in Embodiment 1 of this invention. In Embodiment 1 of this invention, it is a graph which shows the relationship between the width
  • FIG. 5 It is a circuit diagram of the full bridge circuit in Embodiment 5 of this invention. It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 5 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 6 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is.
  • FIG. 11 shows the structure of the full bridge circuit module which concerns on Embodiment 11 of this invention
  • (a) is a top view of the mounting surface in a full bridge circuit module
  • (b) is sectional drawing of a full bridge circuit module.
  • It is. It is a perspective view which shows the structure of the full bridge circuit module in patent document 1.
  • FIG. It is a perspective view which shows the structure of the power semiconductor module in patent document 2.
  • FIG. It is a perspective view which shows the structure of the full bridge circuit module using the power semiconductor module in patent document 2.
  • FIG. It is a perspective view which shows the flow of the electric current of the full bridge circuit module using the power semiconductor module in patent document 2.
  • Embodiment 1 An embodiment (Embodiment 1) of the present invention will be described with reference to FIGS.
  • FIG. 1 is a perspective view showing a structure of a full bridge circuit module 1 according to Embodiment 1 of the present invention.
  • FIG. 2 is a view showing the structure of the full bridge circuit module 1 according to Embodiment 1 of the present invention.
  • FIG. 2A is a top view of the mounting surface of the full bridge circuit module 1
  • FIG. 2 is a cross-sectional view of the full bridge circuit module 1.
  • FIG. 1 the module substrate (substrate) 10 is omitted so that the structure can be easily understood.
  • the full bridge circuit module (circuit module) 1 includes a half bridge circuit including a switching element 21-1 and a switching element 22-1; a switching element 21-2 and a switching element 22-2; A half-bridge circuit.
  • the full-bridge circuit module 1 has two half-bridge circuits mounted on one main surface of the module substrate 10 (hereinafter, a surface on which circuit elements are mounted is referred to as a “mounting surface”).
  • a surface on which circuit elements are mounted is referred to as a “mounting surface”.
  • the other main surface opposite to the mounting surface is referred to as “back surface” is opposed to each half bridge circuit.
  • a wide conductor portion (conductive pattern) 11-1 and a wide conductor portion (conductive pattern) 11-2 are formed in the region.
  • a positive power supply pattern 31-1 and a positive power supply pattern 31-2 that are connected to the positive power supply and serve as the positive power supply of each half bridge Negative power supply pattern 32-1 and negative power supply pattern 32-2 connected to the negative power supply Output pattern 33-1 and output pattern 33-2 that are output patterns of each half bridge
  • a negative power supply pattern (power supply pattern) 34-1 and a negative power supply pattern (power supply pattern) 34-2 that serve as the negative power supply for each half bridge (Switching element)
  • the positive power supply pattern 31-1 and the output pattern 33-1 are connected via the switching element 21-1 and the conductive wire 61-1
  • the negative power supply pattern 34 is connected.
  • -1 and the output pattern 33-1 are connected via the switching element 22-1 and the conductive wire 62-1.
  • the switching element 21-1 is a high-side switching element
  • the switching element 22-1 is a high-side switching element
  • the positive power supply pattern 31-2 and the output pattern 33-2 are connected via the switching element 21-2 and the conductive wire 61-2, and the negative power supply pattern 34-2 and the output pattern 33 are connected.
  • -2 is connected via a switching element 22-2 and a conductive wire 62-2.
  • the switching element 21-2 is a high-side switching element
  • the switching element 22-2 is a low-side switching element.
  • Each switching element uses a vertical element such as a power MOS transistor.
  • a vertical element such as a power MOS transistor.
  • the drain on the back surface is connected to the positive power supply pattern 31-1 by die bonding, and the source on the surface Are connected to the output pattern 33-1 by wire bonding.
  • illustration of the gate electrode is omitted.
  • the module substrate 10 is provided with a through hole in the negative power supply pattern 32-1, and the negative power supply pattern 32-1 and the wide conductor portion 11-1 are electrically connected to the through hole.
  • a connection electrode 41-1 is provided.
  • a connection electrode 42-1 is provided in the negative power supply pattern 34-1;
  • a connection electrode 41-2 is provided in the negative power supply pattern 32-2, and
  • a connection electrode 42-2 is provided in the negative power supply pattern 34-2.
  • the negative power supply pattern 32-1 and the negative power supply pattern 34-1 are connected via the connection electrode 42-1, the wide conductor portion 11-1, and the connection electrode 42-1.
  • the negative power supply pattern 32-2 and the negative power supply pattern 34-2 are connected through the connection electrode 42-2, the wide conductor portion 11-2, and the connection electrode 42-2.
  • FIG. 3 is a circuit diagram of the full bridge circuit according to the first embodiment of the present invention.
  • the interaction of parasitic inductance generated between the pattern formed on the mounting surface and the wide conductor portion 11-1 and the wide conductor portion 11-2 formed on the back surface This is expressed as mutual inductance M.
  • the points A and B in FIG. 3 are not connected, and the wide conductor portion 11-1 and the wide conductor portion 11-2 are separated.
  • width of wide conductor the widths of the patterns (positive power supply pattern 31-1, negative power supply pattern 32-1, etc.) formed on the mounting surface, and the widths of the wide conductor portion 11-1 and the wide conductor portion 11-2, The relationship will be described with reference to FIG.
  • the “width” represents the length of the module substrate 10 in the short direction.
  • FIG. 4 is a graph showing the relationship between the width of the pattern formed on the mounting surface and the width of the wide conductor portion in the first embodiment of the present invention.
  • the horizontal axis of the graph of FIG. 4 is a value obtained by normalizing the width of the wide conductor portion with the width of the pattern formed on the mounting surface.
  • the vertical axis of the graph of FIG. 4 indicates the ratio of the inductance value when there is no wide conductor part on the back surface and the inductance value when the wide conductor part is provided to reduce the inductance, that is, the wide conductor part is provided. This is a value representing how much the inductance is reduced.
  • the width of the wide conductor portion becomes narrower than the width of the pattern formed on the mounting surface.
  • the value on the horizontal axis becomes smaller than “1” and the inductance is not reduced. This indicates that the magnetic field generated by the current flowing through the pattern formed on the mounting surface cannot be canceled out by the magnetic field generated by the current flowing through the wide conductor portion.
  • the width of the wide conductor portion is 80% or more of the width of the pattern formed on the mounting surface, the value on the vertical axis is “0.3” or less, that is, the inductance is 0.3. Therefore, the influence of the parasitic inductance is reduced on the circuit operation. Furthermore, when the width of the wide conductor portion is wider than the width of the pattern formed on the mounting surface, the influence of the parasitic inductance can be sufficiently reduced.
  • the wide conductor portion 11-1 and the wide conductor portion 11-2 are formed so as to overlap the circuit pattern on the mounting surface. Further wiring or the like cannot be provided on the surface to be formed and the surface to form the wide conductor portion. In other words, the degree of freedom of pattern formation on the module substrate is limited. Therefore, the width of the wide conductor portion is preferably up to twice the length in the width direction of the switching element. More preferably, if it is within 1.5 times, a sufficient magnetic field canceling effect can be obtained.
  • the currents flowing through the full bridge circuit module 1 are current I-1, current I-4, and current I-5. is there.
  • current I-2 and current I-3 flow as regenerative current for current I-1
  • current I-6 flows as regenerative current for current I-4 and current I-5.
  • the currents I-2 and I-3 flow in opposite directions, the magnetic field generated by the current I-2 and the magnetic field generated by the current I-3 cancel each other.
  • the current I-1 and the current I-3 have the same flowing direction, and the current I-1 to the current I-3 continuously change. Therefore, the current I-1 and the current I-3 are changed from the magnetic field generated by the current I-1. There is no significant change in the magnetic field generated by the current I-3, and the disturbance of the magnetic field is small.
  • the currents I-4 and I-5 flow in opposite directions, the magnetic field generated by the current I-4 and the magnetic field generated by the current I-5 cancel each other. Further, the current I-5 and the current I-6 have the same flowing direction and continuously change from the current I-5 to the current I-6. Therefore, from the magnetic field generated by the current I-5, There is no significant change in the magnetic field generated by the current I-6, and the disturbance of the magnetic field is small.
  • the full bridge circuit module 1 is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on the module substrate 10, and the two half bridge circuits are mounted on the module substrate 10. Mounted on the surface. Further, the full bridge circuit module 1 has a wide conductor portion 11-1 and a wide conductor portion 11-1 formed in a region corresponding to the half bridge circuit on the back surface. The wide conductor portion 11-1 It functions as a negative power supply to the circuit and is connected to the negative power supply pattern 34-1 via the connection electrode 42-1. Therefore, since the wide conductor portion corresponding to each half bridge circuit included in the full bridge circuit module 1 is formed, it is not affected by the regenerative current generated in each half bridge circuit, and the parasitic inductance can be suppressed. Can be high.
  • the full bridge circuit module 1 power is supplied to the negative power supply pattern 34-1 through a region corresponding to the half bridge circuit of the wide conductor portion 11-1. Similarly, power is supplied to the negative power supply pattern 34-2 through a region corresponding to the half-bridge circuit of the wide conductor portion 11-2.
  • the magnetic field can be prevented from changing due to the regenerative current generated when the switching element performs the switching operation, so that the parasitic inductance suppression effect can be increased.
  • the wide conductor portion 11-1 and the wide conductor portion 11-2 respectively corresponding to each half bridge circuit are formed.
  • the wide conductor portion 11-2 can be connected to patterns having different potentials.
  • the area of the grounded pattern is widened by grounding the negative power supply pattern 32-1. Therefore, the circuit can be stably operated.
  • FIG. 5 is a circuit diagram of a full bridge circuit according to the second embodiment of the present invention.
  • a bypass capacitor 23-1 and a bypass capacitor 23-2 are arranged respectively.
  • FIG. 6A and 6B are diagrams showing the structure of the full bridge circuit module 1a according to the second embodiment of the present invention.
  • FIG. 6A is a top view of the mounting surface of the full bridge circuit module 1a, and
  • FIG. It is sectional drawing of the bridge circuit module 1a.
  • bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively disposed between the negative power supply pattern 32-2.
  • Each of the bypass capacitor 23-1 and the bypass capacitor 23-2 can be connected to each conductive pattern using a conventional technique such as solder.
  • the full bridge circuit module 1a includes the negative power supply pattern 34-1 and the negative power supply pattern 34-2 that function as the negative power supply to the half bridge circuit, and the negative power supply pattern 34-.
  • the positive power supply pattern 31-1 and the positive power supply pattern 31-2 that function as a power supply having a polarity different from that of the first power supply pattern 34-2 and the negative power supply pattern 34-2 are capacitively connected. Therefore, high frequency noise when the switching element performs a switching operation can be suitably reduced. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
  • FIG. 7 is a circuit diagram of a full bridge circuit according to Embodiment 3 of the present invention.
  • the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged so that their positions are close to each other.
  • FIG. 8A and 8B are diagrams showing the structure of the full bridge circuit module 1b according to the third embodiment of the present invention.
  • FIG. 8A is a top view of the mounting surface of the full bridge circuit module 1b, and
  • FIG. It is sectional drawing of the bridge circuit module 1b.
  • the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged so that their positions are close to each other. Therefore, on the half bridge circuit side including the switching element 21-1 and the switching element 22-2, the conductive pattern in the portion closest to the center of the module substrate 10 is the positive power supply pattern 31-1.
  • the positive power supply pattern 31-1 one electrode of the bypass capacitor 23-1 is soldered and a connection electrode 41-1 is formed. Therefore, the portion of the conductive pattern closest to the end of the module substrate 10 is connected to the positive power supply pattern 31-1 via the connection electrode 41-1, the wide conductor portion 11-1, and the connection electrode 42-1. Therefore, the power supply pattern 35-1 is the positive side. Furthermore, the potentials of the wide conductor portion 11-1 and the wide conductor portion 11-2 are different.
  • the drain of the switching element 21-1 is connected by die bonding, and the source of the switching element 21-1 is connected to the output pattern 33-1 by wire bonding.
  • the source of the switching element 22-1 is connected by wire bonding, and the other electrode of the bypass capacitor 23-1 is soldered.
  • the wide conductor portion 11-1 and the wide conductor portion 11-2 are connected to have different potentials.
  • the wide conductor portion can be connected to a power supply pattern that functions as a positive power source or a negative power source.
  • FIG. 9 is a perspective view showing the structure of a full bridge circuit module 1c according to Embodiment 4 of the present invention.
  • the wide conductor portion is formed in the region facing each of the half-bridge circuits.
  • the wide conductor portion 12 is formed in the region facing the full-bridge circuit.
  • the negative power supply pattern 32 is provided so as to be common to the half bridge circuits.
  • a positive power supply pattern 31-1, an output pattern 33-1 and a negative power supply pattern 34-1 are formed as shown in FIG. Therefore, the switching element 21-1 and the switching element 22-1 and the switching element 21-2 and the switching element 22-2 are in the form of mirror inversion.
  • a connection between a plurality of switching elements mounted on one half bridge circuit of two half bridge circuits and a connection between a plurality of switching elements mounted on the other half bridge circuit are: There is a mirror image relationship with the virtual axis passing through the negative power supply pattern 32.
  • the module substrate 10 is omitted so that the structure can be easily understood.
  • the current flowing through the full bridge circuit module 1c is the current I-1c, the current I-4c, and the current I-5c. is there.
  • current I-2c and current I-3c flow as regenerative current for current I-1c
  • current I-6c flows as regenerative current for current I-4c and current I-5c.
  • the current I-4c and the current I-5c flow in opposite directions, the magnetic field generated by the current I-4c and the magnetic field generated by the current I-5c cancel each other. Further, the current I-5c and the current I-6c flow in the same direction and continuously change from the current I-5c to the current I-6c. Therefore, from the magnetic field generated by the current I-5c, There is no significant change in the magnetic field generated by the current I-6c, and the disturbance of the magnetic field is small.
  • the full bridge circuit module 1c has the negative power supply pattern 32 that functions as a negative power supply to the two half bridge circuits as a common pattern in the two half bridge circuits. Yes. Further, the wide conductor portion 12 is formed on the back surface in a region corresponding to the full bridge circuit, and the wide conductor portion 12 is connected to the negative power supply pattern 32 via the connection electrode 41. In addition, power is supplied to the negative power supply pattern 32 through a region corresponding to each of the half bridge circuits in the region of the wide conductor portion 12. Therefore, the full bridge circuit module 1c can suppress the change of the magnetic field due to the regenerative current generated when the switching element performs the switching operation, and thus can increase the parasitic inductance suppression effect.
  • the negative power supply pattern 32 is a common pattern in the two half-bridge circuits.
  • the arrangement of the switching element and the pattern on the mounting surface is changed, and the positive power supply pattern is the common pattern. It is good.
  • the circuit can be stably operated.
  • FIG. 10 is a circuit diagram of a full bridge circuit according to the fifth embodiment of the present invention.
  • FIG. 10 between the positive power supply pattern 31-1 and the negative power supply pattern 32, and between the positive power supply pattern 31-2 and the negative power supply pattern 32. Further, a bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively arranged.
  • FIG. 11A and 11B are diagrams showing the structure of a full bridge circuit module 1d according to Embodiment 5 of the present invention.
  • FIG. 11A is a top view of the mounting surface of the full bridge circuit module 1d, and FIG. It is sectional drawing of the bridge circuit module 1d.
  • the wide conductor portion 12 is given a negative power supply potential from the negative power supply pattern 32 via the connection electrode 41. Since the full bridge circuit module 1d is symmetrically arranged, the switching element 21-1, the switching element 21-2, the switching element 22-1 and the switching element 22-2 each use a mirror-symmetric chip. To do.
  • the regenerative current flowing by the switching operation of the switching element 21-1 and the switching element 22-1 is connected to the connection electrode 41 in the region of the wide conductor portion 12. It is limited to the electrode 42-1.
  • the regenerative current flowing by the switching operation of the switching element 21-2 and the switching element 22-2 is limited between the connection electrode 41 and the connection electrode 42-2 in the region of the wide conductor portion 12. Therefore, even in the configuration in which the wide conductor portion 12 is not separated corresponding to each half bridge circuit, the magnetic field is changed by the regenerative current generated when the switching element performs the switching operation in each half bridge circuit. Therefore, the effect of suppressing parasitic inductance can be increased.
  • bypass capacitor 23-1 and the bypass capacitor 23-2 Furthermore, high-frequency noise during switching operation can be reduced by the bypass capacitor 23-1 and the bypass capacitor 23-2.
  • FIG. 12A and 12B are diagrams showing the structure of a full bridge circuit module 1e according to Embodiment 6 of the present invention.
  • FIG. 12A is a top view of the mounting surface of the full bridge circuit module 1e
  • FIG. It is sectional drawing of the bridge circuit module 1e.
  • each switching element is changed from a vertical type to a lateral type, and the connection method of each switching element is changed to a die bond and a wire. This is a change from bond to flip chip connection.
  • Switching element 21-1a and switching element 22-1a are high-side switching elements, and switching element 21-2a and switching element 22-2a are low-side switching elements.
  • Each switching element is a lateral type element such as GaN HEMT, and a source electrode, a drain electrode, and a gate electrode are formed on the surface.
  • Each switching element is provided with a protruding electrode so as to be suitable for flip chip connection.
  • the drain electrode is connected to the positive power supply pattern 35-1
  • the source electrode is connected to the output pattern 33-1. Note that illustration of the gate electrode of each switching element is omitted.
  • the lateral distribution range is limited to the vicinity of the surface of the module substrate 10 by flip-chip connecting the lateral type switching elements. Magnetic field cancellation can be generated more efficiently.
  • FIG. 13A and 13B are diagrams showing the structure of a full bridge circuit module 1f according to Embodiment 7 of the present invention.
  • FIG. 13A is a top view of the mounting surface of the full bridge circuit module 1f
  • FIG. It is sectional drawing of the bridge circuit module 1f.
  • each switching element is changed from a vertical type to a lateral type, and the connection method of each switching element is changed to a die bond and a wire. This is a change from bond to flip chip connection.
  • the full bridge circuit module 1f is arranged symmetrically, the switching element 21-1a, the switching element 21-2a, the switching element 22-1a, and the switching element 22-2a are mirror symmetrical. Use a tip.
  • the negative power supply pattern 32 is common to each half bridge circuit, and the wide conductor portion 12 corresponding to the region of the full bridge circuit is formed on the back surface. Even in the case where the lateral type switching element is flip-chip connected, the current distribution range during operation is limited to the vicinity of the surface of the module substrate 10, so that magnetic field cancellation is generated more efficiently. be able to.
  • FIG. 14 is a circuit diagram of a full bridge circuit according to the eighth embodiment of the present invention.
  • FIG. 15 is a view showing the structure of the full bridge circuit module 1g according to the eighth embodiment of the present invention.
  • FIG. 15A is a top view of the mounting surface of the full bridge circuit module 1g
  • FIG. FIG. 2 is a cross-sectional view of a full bridge circuit module 1g.
  • each switching element in the full bridge circuit module 1e in the sixth embodiment is cascode-connected.
  • the full bridge circuit can be operated as an enhancement type by cascode connection of enhancement type MOS transistors.
  • the switching elements 21-1M and 21-2M are high-side enhancement type switching elements, and use MOS transistors or the like.
  • the switching element 21-1S and the switching element 21-2S are high-side depletion type switching elements, and GaN HEMTs or the like are used.
  • the switching elements 22-1M and 22-2M are low-side enhancement type switching elements, and use MOS transistors or the like.
  • the switching element 22-1S and the switching element 22-2S are low-side depletion type switching elements, and GaN HEMTs or the like are used.
  • Each switching element has source, drain, and gate electrodes formed on the surface. Each switching element is provided with a protruding electrode so as to be suitable for flip chip connection.
  • One electrode of the bypass capacitor 23-1 is connected to the positive power supply pattern 31-1, and a positive power supply potential is applied to the wide conductor portion 11-1 through the connection electrode 41-1.
  • the positive power supply pattern 35-1 is supplied with a positive power supply potential from the wide conductor portion 11-1 via the connection electrode 42-1, and further connected to the drain of the switching element 21-1S.
  • the source of the switching element 21-1S is connected to the drain of the cascode-connected switching element 21-1M via the pattern 36-1.
  • the source of the switching element 21-1M is connected to the output pattern 33-1, and the drain of the switching element 22-1S is also connected to the output pattern 33-1.
  • the source of the switching element 22-1S is connected to the drain of the cascode-connected switching element 22-1M through the pattern 37-1.
  • the source of the switching element 22-1M is connected to the negative power supply pattern 32-1, and the other electrode of the bypass capacitor 23-1 is connected to the negative power supply pattern 32-1.
  • One electrode of the bypass capacitor 23-2 is connected to the negative power supply pattern 32-2, and a negative power supply potential is applied to the wide conductor portion 11-2 through the connection electrode 41-2.
  • the negative power supply pattern 34-2 is supplied with a negative power supply potential from the wide conductor portion 11-2 via the connection electrode 42-2, and is connected to the source of the switching element 22-2M.
  • the drain of the switching element 22-2M is connected to the source of the cascode-connected switching element 22-2S through the pattern 37-2.
  • the drain of the switching element 22-2S is connected to the output pattern 33-2, and the source of the switching element 21-2M is also connected to the output pattern 33-2.
  • the drain of the switching element 21-2M is connected to the source of the cascode-connected switching element 21-2S through the pattern 36-2.
  • the drain of the switching element 21-2S is connected to the positive power supply pattern 31-2, and the other electrode of the bypass capacitor 23-2 is connected to the positive power supply pattern 31-2.
  • the full bridge circuit module 1g according to the present embodiment can increase the parasitic inductance suppression effect by cascode connection even when the number of elements is increased or the wiring length is increased. it can.
  • FIG. 16 is a circuit diagram of a full bridge circuit according to the ninth embodiment of the present invention.
  • FIG. 17 is a view showing the structure of the full bridge circuit module 1h according to the ninth embodiment of the present invention.
  • FIG. 17A is a top view of the mounting surface of the full bridge circuit module 1h.
  • FIG. FIG. 3 is a cross-sectional view of the full bridge circuit module 1h.
  • the switching element is the switching element that can be flip-chip connected as described in the above-described embodiment.
  • a positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface.
  • Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively.
  • a negative power distribution pattern 11-3 connecting the wide conductor portion 11-1 and the wide conductor portion 11-2 is formed on the back surface.
  • the negative power distribution pattern 11-3 is connected to the wide conductor portion 11-1 and the wide conductor portion 11-2 in the vicinity of the connection electrode 41-1 and the connection electrode 41-2, respectively.
  • the width of the wide conductor portion is illustrated to be thick, but the present embodiment is not limited to increasing the width of the wide conductor portion.
  • the positive power distribution pattern 31-3 and the negative power distribution pattern 11-3 include a positive power supply pattern 51 and a negative power supply pattern 52 that are branched at arbitrary positions, respectively.
  • the positive-side power distribution pattern 31-3 and the negative-side power distribution pattern 11-3 are formed on the mounting surface and the back surface, respectively, so that the regions overlap each other in the top view of the mounting surface as shown in FIG. Is formed. Further, the positive power supply pattern 51 and the negative power supply pattern 52 are similarly formed so that their regions overlap each other in the top view of the mounting surface. That is, the arrangement of the full bridge circuit module 1h is an arrangement called a stacked pair structure.
  • the conductive pattern is formed in the region corresponding to each of the half bridge circuits. It is formed on the back. Therefore, it is easy to form a stacked pair structure, and by forming the stacked pair structure, it is possible to more suitably suppress the change of the magnetic field due to the regenerative current generated when the switching element performs a switching operation. .
  • FIG. 18 is a circuit diagram of a full bridge circuit according to the tenth embodiment of the present invention.
  • FIG. 19 is a view showing the structure of the full bridge circuit module 1i according to the tenth embodiment of the present invention.
  • FIG. 19 (a) is a top view of the mounting surface of the full bridge circuit module 1i.
  • FIG. 3 is a cross-sectional view of the full bridge circuit module 1i.
  • the magnetic field canceling effect is enhanced for the pattern for supplying power.
  • the positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface.
  • Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively. Since both the positive power supply pattern 31-1 and the positive power supply pattern 31-2 are patterns formed on the mounting surface, they can be easily connected.
  • a negative power distribution pattern 11-3 for connecting the connection electrode 43 and the wide conductor portion 11-2 is formed.
  • the wide conductor portion 11-2 is connected to the connection electrode 43 and the wide conductor portion 11-2 in the vicinity of the bypass capacitor 23-1 and the connection electrode 41-2, respectively.
  • the width of the wide conductor portion is shown thick, but the present embodiment is not limited to increasing the width of the wide conductor portion.
  • each of the positive power distribution pattern 31-3 and the negative power distribution pattern 11-3 has a positive power supply pattern 51 and a negative power in a region overlapping each other in the top view of the mounting surface. Branches to the supply source pattern 52.
  • the arrangement of the full bridge circuit module 1i also has a stacked pair structure.
  • the full bridge circuit module 1i according to the present embodiment is easy to form a stacked pair structure as well as the full bridge circuit module 1h according to the ninth embodiment described above, and the mounting surface is the positive side. Since the power supply potential and the back surface are negative power supply potentials and the elements are to be arranged, the mounting surface can be easily set to the negative power supply potential and the back surface can be set to the positive power supply potential.
  • FIG. 20 is a circuit diagram of a full bridge circuit according to the eleventh embodiment of the present invention.
  • FIG. 21 is a diagram showing the structure of the full bridge circuit module 1j according to the eleventh embodiment of the present invention.
  • FIG. 21A is a top view of the mounting surface of the full bridge circuit module 1j.
  • FIG. 3 is a cross-sectional view of the full bridge circuit module 1j.
  • the magnetic field canceling effect is enhanced for the pattern for supplying power.
  • the positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface.
  • Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively.
  • a negative power supply pattern 52 branched from the wide conductor portion 12 is formed in the vicinity of the connection electrode 41. Since the wide conductor portion 12 is common to the two half-bridge circuits, the negative power distribution pattern is omitted.
  • This connection is a connection method called single-point grounding. This connection can limit the direction of regenerative current flowing in each half-bridge circuit.
  • the negative power supply pattern 52 and the positive power distribution pattern 31-3 branch from the positive power distribution pattern 31-3 to a region where they overlap each other.
  • a positive power supply pattern 51 is formed.
  • the arrangement of the full bridge circuit module 1j also has a stacked pair structure.
  • the negative power supply pattern 32 is common to each half bridge circuit, and the wide conductor portion 12 corresponding to the region of the full bridge circuit is formed on the back surface. Even in such a case, a stacked pair structure can be easily formed.
  • the present invention is not limited to this, and a multilayer wiring substrate may be used for the module substrate 10.
  • a multilayer wiring substrate may be used for the module substrate 10.
  • the same effects as those of the present application can be obtained even when a four-layer substrate is used for the module substrate 10 and a pattern is formed on the surface layer of the four-layer substrate and the layer below the surface layer.
  • the circuit module (full bridge circuit module 1, 1a, 1b, 1e, 1g, 1h, 1i) according to aspect 1 of the present invention has a full bridge circuit including two half bridge circuits mounted on a substrate (module substrate 10).
  • the two half-bridge circuits are mounted on one main surface (mounting surface) of the substrate, and each of the two half-bridge circuits has the half-bridge on the one main surface of the substrate.
  • Power supply patterns negative power supply patterns 34-1 and 34-2, positive power supply pattern 35-1) functioning as a positive power source or a negative power source for the circuit are formed.
  • conductive patterns (wide conductor portions 11-1 and 11-2) are formed in a region corresponding to the half-bridge circuit. Down it is connected to the power supply pattern.
  • the wide conductor part corresponding to each half bridge circuit with which a circuit module is provided is formed in the circuit module which concerns on this aspect, it receives to the influence of the regenerative current which generate
  • power may be supplied to the power supply pattern through a region corresponding to each of the half bridge circuits of the conductive pattern.
  • the circuit module which concerns on this aspect can suppress that a magnetic field changes with the regenerative current which generate
  • a circuit module according to aspect 3 of the present invention is the circuit module according to aspect 1 or 2, wherein the power supply pattern and a pattern functioning as a power source having a polarity different from the polarity of the power supply pattern (positive power supply pattern 31- 1 and 31-2 and negative power supply patterns 32-1 and 32-2) may be capacitively connected.
  • the circuit module according to this aspect can suitably reduce high-frequency noise when the switching element performs a switching operation. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
  • the circuit module (full bridge circuit modules 1c, 1d, 1f, 1j) according to aspect 4 of the present invention is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate (module substrate 10). Two half-bridge circuits are mounted on one main surface (mounting surface) of the substrate, and a power source that functions as a positive power source or a negative power source for the two half-bridge circuits is mounted on one main surface of the substrate.
  • a supply pattern (negative power supply pattern 32) is provided as a common pattern in the two half-bridge circuits, and a region corresponding to the full-bridge circuit is provided on the other main surface (back surface) of the substrate. Is formed with a conductive pattern (wide conductor portion 12), and the conductive pattern is connected to the power supply pattern. The power supply pattern, in the region of the conductive pattern, the power is supplied through a region corresponding to each of the half-bridge circuit.
  • the switching element performs a switching operation in each half bridge circuit. Since it is possible to suppress the magnetic field from being changed by the regenerative current generated at, the parasitic inductance suppression effect can be enhanced.
  • the circuit module according to Aspect 5 of the present invention is the circuit module according to Aspect 4, wherein the power supply pattern and a pattern functioning as a power source having a polarity different from the polarity of the power supply pattern (positive power supply pattern 31-1, 31-2) may be capacitively connected.
  • the circuit module according to this aspect is suitable for high-frequency noise when the switching element performs a switching operation, even when the conductive pattern is not separated corresponding to each half-bridge circuit. Can be reduced. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
  • the conductive pattern may be grounded.
  • the circuit module according to this aspect since the circuit module according to this aspect has a large area of the grounded pattern, the circuit can be stably operated.
  • a circuit module according to Aspect 7 of the present invention is the circuit module according to any one of Aspects 4 to 6, wherein a plurality of switching elements mounted on one half bridge circuit of the two half bridge circuits are connected to each other and the other half bridge circuit is connected.
  • a plurality of switching elements mounted on the bridge circuit may be connected to each other in a mirror image with respect to a virtual axis passing through the power supply pattern.
  • the switching element performs a switching operation in each half bridge circuit. Since it is possible to suppress the magnetic field from being changed by the regenerative current generated at, the parasitic inductance suppression effect can be enhanced.
  • the power supply pattern may have a stacked pair structure.
  • the circuit module according to this aspect has a stacked pair structure, and thus can more suitably suppress the change of the magnetic field due to the regenerative current generated when the switching element performs the switching operation.

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

L'invention vise à proposer une technologie d'accroissement des effets de limitation d'une inductance parasite dans un module de circuit, un circuit en pont complet étant monté sur un substrat. L'invention concerne un module (1) de circuit en pont complet caractérisé en ce que: deux circuits en demi-pont sont montés sur une surface principale d'un substrat (10) de module; des unités (11-1, 11-2) à conducteurs larges sont formées dans des régions correspondant aux circuits en demi-pont, lesdites régions étant des parties de l'autre surface principale du substrat de module; et les unités à conducteurs larges sont reliées à des motifs sources (34-1, 34-2) de puissance côté négatif via des électrodes (42-1, 42-2) de connexion, lesdits motifs sources de puissance côté négatif fonctionnant comme des sources de puissance côté négatif.
PCT/JP2016/054875 2015-06-30 2016-02-19 Module de circuit WO2017002390A1 (fr)

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JP2015132062 2015-06-30
JP2015-132062 2015-06-30

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Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3644360A4 (fr) * 2017-06-19 2020-04-29 Shindengen Electric Manufacturing Co., Ltd. Dispositif à semi-conducteur
EP3644361A4 (fr) * 2017-06-19 2020-06-17 Shindengen Electric Manufacturing Co., Ltd. Dispositif à semi-conducteur
EP3809458A1 (fr) * 2019-10-15 2021-04-21 Nexperia B.V. Dispositif semiconducteur à demi-pont
US11159092B2 (en) 2017-08-09 2021-10-26 Mitsubishi Electric Corporation Power conversion device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002112559A (ja) * 2000-09-28 2002-04-12 Kyocera Corp インバータ制御モジュール
JP2002373971A (ja) * 2001-03-30 2002-12-26 Hitachi Ltd 半導体装置
JP2013033812A (ja) * 2011-08-01 2013-02-14 Fuji Electric Co Ltd パワー半導体モジュール
JP2013045974A (ja) * 2011-08-25 2013-03-04 Nissan Motor Co Ltd 半導体モジュール

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2002112559A (ja) * 2000-09-28 2002-04-12 Kyocera Corp インバータ制御モジュール
JP2002373971A (ja) * 2001-03-30 2002-12-26 Hitachi Ltd 半導体装置
JP2013033812A (ja) * 2011-08-01 2013-02-14 Fuji Electric Co Ltd パワー半導体モジュール
JP2013045974A (ja) * 2011-08-25 2013-03-04 Nissan Motor Co Ltd 半導体モジュール

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3644360A4 (fr) * 2017-06-19 2020-04-29 Shindengen Electric Manufacturing Co., Ltd. Dispositif à semi-conducteur
EP3644361A4 (fr) * 2017-06-19 2020-06-17 Shindengen Electric Manufacturing Co., Ltd. Dispositif à semi-conducteur
US11159092B2 (en) 2017-08-09 2021-10-26 Mitsubishi Electric Corporation Power conversion device
EP3809458A1 (fr) * 2019-10-15 2021-04-21 Nexperia B.V. Dispositif semiconducteur à demi-pont
US11942401B2 (en) 2019-10-15 2024-03-26 Nexperia B.V. Half-bridge semiconductor device

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