WO2017002390A1 - Circuit module - Google Patents

Circuit module Download PDF

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Publication number
WO2017002390A1
WO2017002390A1 PCT/JP2016/054875 JP2016054875W WO2017002390A1 WO 2017002390 A1 WO2017002390 A1 WO 2017002390A1 JP 2016054875 W JP2016054875 W JP 2016054875W WO 2017002390 A1 WO2017002390 A1 WO 2017002390A1
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WO
WIPO (PCT)
Prior art keywords
power supply
bridge circuit
pattern
circuit module
full bridge
Prior art date
Application number
PCT/JP2016/054875
Other languages
French (fr)
Japanese (ja)
Inventor
知稔 佐藤
研一 田中
佐藤　浩哉
清美 谷口
Original Assignee
シャープ株式会社
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Publication of WO2017002390A1 publication Critical patent/WO2017002390A1/en

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/18—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00—Conversion of ac power input into dc power output; Conversion of dc power input into ac power output
    • H02M7/42—Conversion of dc power input into ac power output without possibility of reversal
    • H02M7/44—Conversion of dc power input into ac power output without possibility of reversal by static converters
    • H02M7/48—Conversion of dc power input into ac power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/4912—Layout
    • H01L2224/49175—Parallel arrangements
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

Definitions

  • the present invention relates to a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate.
  • FIG. 22 is a perspective view showing the structure of the full bridge circuit module 100 in Patent Document 1. As shown in FIG. As shown in FIG. 22, the full bridge circuit module 100 has two half bridge circuits arranged in a plane.
  • the positive power supply pattern 131-1, the positive power supply pattern 131-2, the negative power supply pattern 132-1 and the negative power supply are supplied to the module substrate 110.
  • a pattern 132-2, an output pattern 133-1, and an output pattern 133-1 are formed.
  • the positive power supply pattern 131-1 and the positive power supply pattern 131-2 are each connected to the positive power supply, and the negative power supply pattern 132-1 and the negative power supply pattern 132-2 are grounded.
  • the positive power supply pattern 131-1 and the output pattern 133-1 are connected via the switching element 121-1 and the conductive wire 161-1.
  • 132-1 and the output pattern 133-1 are connected via the switching element 122-1 and the conductive wire 162-1.
  • the positive power supply pattern 131-2 and the output pattern 133-2 are connected via the switching element 121-2 and the conductive wire 161-2, and the negative power supply pattern 132-2 and the output pattern are connected.
  • 133-2 is connected via a switching element 122-2 and a conductive wire 162-2.
  • the full bridge circuit module 100 will be described by taking as an example the case where the output of the output pattern 133-1 is positive and the output of the output pattern 133-2 is negative.
  • the switching element 121-1 connected to the positive power supply pattern 131-1 is ON, and the switching element 122 connected to the negative power supply pattern 132-1 is used. -1 is OFF. That is, a current I-101 flows through the full bridge circuit module 100.
  • FIG. 23 is a perspective view showing the structure of the power semiconductor module 101 in Patent Document 2.
  • the module substrate 110 is omitted for easy understanding of the structure.
  • the power semiconductor module 101 has one half-bridge circuit arranged in a plane.
  • a positive power supply pattern 131 a negative power supply pattern 132, an output pattern 133, and a negative power supply pattern 134 are formed as the first conductive layer.
  • the positive power supply pattern 131 is connected to the positive power supply
  • the negative power supply pattern 132 is connected to the negative power supply.
  • the positive power supply pattern 131 and the output pattern 133 are connected via the switching element 121 and the conductive wire 161.
  • the negative power supply pattern 134 and the output pattern 133 are connected via the switching element 122 and the conductive wire 162.
  • a path 111 is formed as a second conductive layer in a region facing the first conductive layer on a main surface different from the main surface on which the half bridge circuit is disposed. Furthermore, a connection electrode 141 and a connection electrode 142 are provided to connect the path 111, the negative power supply pattern 132, and the negative power supply pattern 134.
  • the power semiconductor module 101 will be described by taking the case where the output of the output pattern 133 is positive as an example.
  • the switching element 121 connected to the positive power supply pattern 131 is ON, and the switching element 122 connected to the negative power supply pattern 134 is OFF. That is, a current I-111 flows through the power semiconductor module 101.
  • FIG. 24 is a perspective view showing the structure of the full bridge circuit module 102 using the power semiconductor module in Patent Document 2. As shown in FIG. In FIG. 24, the module substrate 110 is omitted for easy understanding of the structure.
  • the negative power supply pattern 132 is shared. Moreover, since the wide conductor part corresponding to each of the two half-bridge circuits is also connected to the negative power supply pattern 132, the wide conductor part 111 is also commonly used. By sharing the negative power supply pattern 132, it is possible to function as a more stable power source.
  • FIG. 25 is a perspective view showing a current flow of the full bridge circuit module 102 using the power semiconductor module in Patent Document 2.
  • the currents flowing through the full bridge circuit module 102 are the current I-121, the current I-123, and the current I-124. is there.
  • a current I-122 flows as a regenerative current for the current I-121
  • a current I105 flows as a regenerative current for the currents I-123 and I-124.
  • the current I-123 and the current I-124 cancel each other out of the magnetic field and continuously change from the current I-124 to the current I-125, so that the current I-123, the current I-124, and the current I-124 The parasitic inductance due to I-125 is suppressed.
  • the full bridge circuit module 102 has a problem that noise increases.
  • the present invention has been made to solve the above-described problems, and an object of the present invention is to provide a technique for increasing the effect of suppressing parasitic inductance in a circuit module in which a full bridge circuit is mounted on a substrate. .
  • a circuit module is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate, and the two half bridge circuits are formed on the substrate.
  • a power supply pattern that functions as a positive power source or a negative power source for the half bridge circuit is formed on one main surface of the substrate for each of the two half bridge circuits mounted on one main surface.
  • a conductive pattern is formed in a region corresponding to the half-bridge circuit, and the conductive pattern is connected to the power supply pattern.
  • a circuit module is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate, and the two half bridge circuits are A power supply pattern that is mounted on one main surface of the substrate and functions as a positive power source or a negative power source for the two half bridge circuits is provided on the one main surface of the substrate.
  • a conductive pattern is formed in a region corresponding to the full bridge circuit, and the conductive pattern is connected to the power supply pattern.
  • the power supply pattern passes through a region corresponding to each of the half-bridge circuits in the conductive pattern region. Power is supplied.
  • the effect of suppressing parasitic inductance can be enhanced in a circuit module in which a full bridge circuit is mounted on a substrate.
  • FIG. 1 It is a perspective view which shows the structure of the full bridge circuit module which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 1 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. It is a circuit diagram of the full bridge circuit in Embodiment 1 of this invention. In Embodiment 1 of this invention, it is a graph which shows the relationship between the width
  • FIG. 5 It is a circuit diagram of the full bridge circuit in Embodiment 5 of this invention. It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 5 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 6 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is.
  • FIG. 11 shows the structure of the full bridge circuit module which concerns on Embodiment 11 of this invention
  • (a) is a top view of the mounting surface in a full bridge circuit module
  • (b) is sectional drawing of a full bridge circuit module.
  • It is. It is a perspective view which shows the structure of the full bridge circuit module in patent document 1.
  • FIG. It is a perspective view which shows the structure of the power semiconductor module in patent document 2.
  • FIG. It is a perspective view which shows the structure of the full bridge circuit module using the power semiconductor module in patent document 2.
  • FIG. It is a perspective view which shows the flow of the electric current of the full bridge circuit module using the power semiconductor module in patent document 2.
  • Embodiment 1 An embodiment (Embodiment 1) of the present invention will be described with reference to FIGS.
  • FIG. 1 is a perspective view showing a structure of a full bridge circuit module 1 according to Embodiment 1 of the present invention.
  • FIG. 2 is a view showing the structure of the full bridge circuit module 1 according to Embodiment 1 of the present invention.
  • FIG. 2A is a top view of the mounting surface of the full bridge circuit module 1
  • FIG. 2 is a cross-sectional view of the full bridge circuit module 1.
  • FIG. 1 the module substrate (substrate) 10 is omitted so that the structure can be easily understood.
  • the full bridge circuit module (circuit module) 1 includes a half bridge circuit including a switching element 21-1 and a switching element 22-1; a switching element 21-2 and a switching element 22-2; A half-bridge circuit.
  • the full-bridge circuit module 1 has two half-bridge circuits mounted on one main surface of the module substrate 10 (hereinafter, a surface on which circuit elements are mounted is referred to as a “mounting surface”).
  • a surface on which circuit elements are mounted is referred to as a “mounting surface”.
  • the other main surface opposite to the mounting surface is referred to as “back surface” is opposed to each half bridge circuit.
  • a wide conductor portion (conductive pattern) 11-1 and a wide conductor portion (conductive pattern) 11-2 are formed in the region.
  • a positive power supply pattern 31-1 and a positive power supply pattern 31-2 that are connected to the positive power supply and serve as the positive power supply of each half bridge Negative power supply pattern 32-1 and negative power supply pattern 32-2 connected to the negative power supply Output pattern 33-1 and output pattern 33-2 that are output patterns of each half bridge
  • a negative power supply pattern (power supply pattern) 34-1 and a negative power supply pattern (power supply pattern) 34-2 that serve as the negative power supply for each half bridge (Switching element)
  • the positive power supply pattern 31-1 and the output pattern 33-1 are connected via the switching element 21-1 and the conductive wire 61-1
  • the negative power supply pattern 34 is connected.
  • -1 and the output pattern 33-1 are connected via the switching element 22-1 and the conductive wire 62-1.
  • the switching element 21-1 is a high-side switching element
  • the switching element 22-1 is a high-side switching element
  • the positive power supply pattern 31-2 and the output pattern 33-2 are connected via the switching element 21-2 and the conductive wire 61-2, and the negative power supply pattern 34-2 and the output pattern 33 are connected.
  • -2 is connected via a switching element 22-2 and a conductive wire 62-2.
  • the switching element 21-2 is a high-side switching element
  • the switching element 22-2 is a low-side switching element.
  • Each switching element uses a vertical element such as a power MOS transistor.
  • a vertical element such as a power MOS transistor.
  • the drain on the back surface is connected to the positive power supply pattern 31-1 by die bonding, and the source on the surface Are connected to the output pattern 33-1 by wire bonding.
  • illustration of the gate electrode is omitted.
  • the module substrate 10 is provided with a through hole in the negative power supply pattern 32-1, and the negative power supply pattern 32-1 and the wide conductor portion 11-1 are electrically connected to the through hole.
  • a connection electrode 41-1 is provided.
  • a connection electrode 42-1 is provided in the negative power supply pattern 34-1;
  • a connection electrode 41-2 is provided in the negative power supply pattern 32-2, and
  • a connection electrode 42-2 is provided in the negative power supply pattern 34-2.
  • the negative power supply pattern 32-1 and the negative power supply pattern 34-1 are connected via the connection electrode 42-1, the wide conductor portion 11-1, and the connection electrode 42-1.
  • the negative power supply pattern 32-2 and the negative power supply pattern 34-2 are connected through the connection electrode 42-2, the wide conductor portion 11-2, and the connection electrode 42-2.
  • FIG. 3 is a circuit diagram of the full bridge circuit according to the first embodiment of the present invention.
  • the interaction of parasitic inductance generated between the pattern formed on the mounting surface and the wide conductor portion 11-1 and the wide conductor portion 11-2 formed on the back surface This is expressed as mutual inductance M.
  • the points A and B in FIG. 3 are not connected, and the wide conductor portion 11-1 and the wide conductor portion 11-2 are separated.
  • width of wide conductor the widths of the patterns (positive power supply pattern 31-1, negative power supply pattern 32-1, etc.) formed on the mounting surface, and the widths of the wide conductor portion 11-1 and the wide conductor portion 11-2, The relationship will be described with reference to FIG.
  • the “width” represents the length of the module substrate 10 in the short direction.
  • FIG. 4 is a graph showing the relationship between the width of the pattern formed on the mounting surface and the width of the wide conductor portion in the first embodiment of the present invention.
  • the horizontal axis of the graph of FIG. 4 is a value obtained by normalizing the width of the wide conductor portion with the width of the pattern formed on the mounting surface.
  • the vertical axis of the graph of FIG. 4 indicates the ratio of the inductance value when there is no wide conductor part on the back surface and the inductance value when the wide conductor part is provided to reduce the inductance, that is, the wide conductor part is provided. This is a value representing how much the inductance is reduced.
  • the width of the wide conductor portion becomes narrower than the width of the pattern formed on the mounting surface.
  • the value on the horizontal axis becomes smaller than “1” and the inductance is not reduced. This indicates that the magnetic field generated by the current flowing through the pattern formed on the mounting surface cannot be canceled out by the magnetic field generated by the current flowing through the wide conductor portion.
  • the width of the wide conductor portion is 80% or more of the width of the pattern formed on the mounting surface, the value on the vertical axis is “0.3” or less, that is, the inductance is 0.3. Therefore, the influence of the parasitic inductance is reduced on the circuit operation. Furthermore, when the width of the wide conductor portion is wider than the width of the pattern formed on the mounting surface, the influence of the parasitic inductance can be sufficiently reduced.
  • the wide conductor portion 11-1 and the wide conductor portion 11-2 are formed so as to overlap the circuit pattern on the mounting surface. Further wiring or the like cannot be provided on the surface to be formed and the surface to form the wide conductor portion. In other words, the degree of freedom of pattern formation on the module substrate is limited. Therefore, the width of the wide conductor portion is preferably up to twice the length in the width direction of the switching element. More preferably, if it is within 1.5 times, a sufficient magnetic field canceling effect can be obtained.
  • the currents flowing through the full bridge circuit module 1 are current I-1, current I-4, and current I-5. is there.
  • current I-2 and current I-3 flow as regenerative current for current I-1
  • current I-6 flows as regenerative current for current I-4 and current I-5.
  • the currents I-2 and I-3 flow in opposite directions, the magnetic field generated by the current I-2 and the magnetic field generated by the current I-3 cancel each other.
  • the current I-1 and the current I-3 have the same flowing direction, and the current I-1 to the current I-3 continuously change. Therefore, the current I-1 and the current I-3 are changed from the magnetic field generated by the current I-1. There is no significant change in the magnetic field generated by the current I-3, and the disturbance of the magnetic field is small.
  • the currents I-4 and I-5 flow in opposite directions, the magnetic field generated by the current I-4 and the magnetic field generated by the current I-5 cancel each other. Further, the current I-5 and the current I-6 have the same flowing direction and continuously change from the current I-5 to the current I-6. Therefore, from the magnetic field generated by the current I-5, There is no significant change in the magnetic field generated by the current I-6, and the disturbance of the magnetic field is small.
  • the full bridge circuit module 1 is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on the module substrate 10, and the two half bridge circuits are mounted on the module substrate 10. Mounted on the surface. Further, the full bridge circuit module 1 has a wide conductor portion 11-1 and a wide conductor portion 11-1 formed in a region corresponding to the half bridge circuit on the back surface. The wide conductor portion 11-1 It functions as a negative power supply to the circuit and is connected to the negative power supply pattern 34-1 via the connection electrode 42-1. Therefore, since the wide conductor portion corresponding to each half bridge circuit included in the full bridge circuit module 1 is formed, it is not affected by the regenerative current generated in each half bridge circuit, and the parasitic inductance can be suppressed. Can be high.
  • the full bridge circuit module 1 power is supplied to the negative power supply pattern 34-1 through a region corresponding to the half bridge circuit of the wide conductor portion 11-1. Similarly, power is supplied to the negative power supply pattern 34-2 through a region corresponding to the half-bridge circuit of the wide conductor portion 11-2.
  • the magnetic field can be prevented from changing due to the regenerative current generated when the switching element performs the switching operation, so that the parasitic inductance suppression effect can be increased.
  • the wide conductor portion 11-1 and the wide conductor portion 11-2 respectively corresponding to each half bridge circuit are formed.
  • the wide conductor portion 11-2 can be connected to patterns having different potentials.
  • the area of the grounded pattern is widened by grounding the negative power supply pattern 32-1. Therefore, the circuit can be stably operated.
  • FIG. 5 is a circuit diagram of a full bridge circuit according to the second embodiment of the present invention.
  • a bypass capacitor 23-1 and a bypass capacitor 23-2 are arranged respectively.
  • FIG. 6A and 6B are diagrams showing the structure of the full bridge circuit module 1a according to the second embodiment of the present invention.
  • FIG. 6A is a top view of the mounting surface of the full bridge circuit module 1a, and
  • FIG. It is sectional drawing of the bridge circuit module 1a.
  • bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively disposed between the negative power supply pattern 32-2.
  • Each of the bypass capacitor 23-1 and the bypass capacitor 23-2 can be connected to each conductive pattern using a conventional technique such as solder.
  • the full bridge circuit module 1a includes the negative power supply pattern 34-1 and the negative power supply pattern 34-2 that function as the negative power supply to the half bridge circuit, and the negative power supply pattern 34-.
  • the positive power supply pattern 31-1 and the positive power supply pattern 31-2 that function as a power supply having a polarity different from that of the first power supply pattern 34-2 and the negative power supply pattern 34-2 are capacitively connected. Therefore, high frequency noise when the switching element performs a switching operation can be suitably reduced. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
  • FIG. 7 is a circuit diagram of a full bridge circuit according to Embodiment 3 of the present invention.
  • the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged so that their positions are close to each other.
  • FIG. 8A and 8B are diagrams showing the structure of the full bridge circuit module 1b according to the third embodiment of the present invention.
  • FIG. 8A is a top view of the mounting surface of the full bridge circuit module 1b, and
  • FIG. It is sectional drawing of the bridge circuit module 1b.
  • the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged so that their positions are close to each other. Therefore, on the half bridge circuit side including the switching element 21-1 and the switching element 22-2, the conductive pattern in the portion closest to the center of the module substrate 10 is the positive power supply pattern 31-1.
  • the positive power supply pattern 31-1 one electrode of the bypass capacitor 23-1 is soldered and a connection electrode 41-1 is formed. Therefore, the portion of the conductive pattern closest to the end of the module substrate 10 is connected to the positive power supply pattern 31-1 via the connection electrode 41-1, the wide conductor portion 11-1, and the connection electrode 42-1. Therefore, the power supply pattern 35-1 is the positive side. Furthermore, the potentials of the wide conductor portion 11-1 and the wide conductor portion 11-2 are different.
  • the drain of the switching element 21-1 is connected by die bonding, and the source of the switching element 21-1 is connected to the output pattern 33-1 by wire bonding.
  • the source of the switching element 22-1 is connected by wire bonding, and the other electrode of the bypass capacitor 23-1 is soldered.
  • the wide conductor portion 11-1 and the wide conductor portion 11-2 are connected to have different potentials.
  • the wide conductor portion can be connected to a power supply pattern that functions as a positive power source or a negative power source.
  • FIG. 9 is a perspective view showing the structure of a full bridge circuit module 1c according to Embodiment 4 of the present invention.
  • the wide conductor portion is formed in the region facing each of the half-bridge circuits.
  • the wide conductor portion 12 is formed in the region facing the full-bridge circuit.
  • the negative power supply pattern 32 is provided so as to be common to the half bridge circuits.
  • a positive power supply pattern 31-1, an output pattern 33-1 and a negative power supply pattern 34-1 are formed as shown in FIG. Therefore, the switching element 21-1 and the switching element 22-1 and the switching element 21-2 and the switching element 22-2 are in the form of mirror inversion.
  • a connection between a plurality of switching elements mounted on one half bridge circuit of two half bridge circuits and a connection between a plurality of switching elements mounted on the other half bridge circuit are: There is a mirror image relationship with the virtual axis passing through the negative power supply pattern 32.
  • the module substrate 10 is omitted so that the structure can be easily understood.
  • the current flowing through the full bridge circuit module 1c is the current I-1c, the current I-4c, and the current I-5c. is there.
  • current I-2c and current I-3c flow as regenerative current for current I-1c
  • current I-6c flows as regenerative current for current I-4c and current I-5c.
  • the current I-4c and the current I-5c flow in opposite directions, the magnetic field generated by the current I-4c and the magnetic field generated by the current I-5c cancel each other. Further, the current I-5c and the current I-6c flow in the same direction and continuously change from the current I-5c to the current I-6c. Therefore, from the magnetic field generated by the current I-5c, There is no significant change in the magnetic field generated by the current I-6c, and the disturbance of the magnetic field is small.
  • the full bridge circuit module 1c has the negative power supply pattern 32 that functions as a negative power supply to the two half bridge circuits as a common pattern in the two half bridge circuits. Yes. Further, the wide conductor portion 12 is formed on the back surface in a region corresponding to the full bridge circuit, and the wide conductor portion 12 is connected to the negative power supply pattern 32 via the connection electrode 41. In addition, power is supplied to the negative power supply pattern 32 through a region corresponding to each of the half bridge circuits in the region of the wide conductor portion 12. Therefore, the full bridge circuit module 1c can suppress the change of the magnetic field due to the regenerative current generated when the switching element performs the switching operation, and thus can increase the parasitic inductance suppression effect.
  • the negative power supply pattern 32 is a common pattern in the two half-bridge circuits.
  • the arrangement of the switching element and the pattern on the mounting surface is changed, and the positive power supply pattern is the common pattern. It is good.
  • the circuit can be stably operated.
  • FIG. 10 is a circuit diagram of a full bridge circuit according to the fifth embodiment of the present invention.
  • FIG. 10 between the positive power supply pattern 31-1 and the negative power supply pattern 32, and between the positive power supply pattern 31-2 and the negative power supply pattern 32. Further, a bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively arranged.
  • FIG. 11A and 11B are diagrams showing the structure of a full bridge circuit module 1d according to Embodiment 5 of the present invention.
  • FIG. 11A is a top view of the mounting surface of the full bridge circuit module 1d, and FIG. It is sectional drawing of the bridge circuit module 1d.
  • the wide conductor portion 12 is given a negative power supply potential from the negative power supply pattern 32 via the connection electrode 41. Since the full bridge circuit module 1d is symmetrically arranged, the switching element 21-1, the switching element 21-2, the switching element 22-1 and the switching element 22-2 each use a mirror-symmetric chip. To do.
  • the regenerative current flowing by the switching operation of the switching element 21-1 and the switching element 22-1 is connected to the connection electrode 41 in the region of the wide conductor portion 12. It is limited to the electrode 42-1.
  • the regenerative current flowing by the switching operation of the switching element 21-2 and the switching element 22-2 is limited between the connection electrode 41 and the connection electrode 42-2 in the region of the wide conductor portion 12. Therefore, even in the configuration in which the wide conductor portion 12 is not separated corresponding to each half bridge circuit, the magnetic field is changed by the regenerative current generated when the switching element performs the switching operation in each half bridge circuit. Therefore, the effect of suppressing parasitic inductance can be increased.
  • bypass capacitor 23-1 and the bypass capacitor 23-2 Furthermore, high-frequency noise during switching operation can be reduced by the bypass capacitor 23-1 and the bypass capacitor 23-2.
  • FIG. 12A and 12B are diagrams showing the structure of a full bridge circuit module 1e according to Embodiment 6 of the present invention.
  • FIG. 12A is a top view of the mounting surface of the full bridge circuit module 1e
  • FIG. It is sectional drawing of the bridge circuit module 1e.
  • each switching element is changed from a vertical type to a lateral type, and the connection method of each switching element is changed to a die bond and a wire. This is a change from bond to flip chip connection.
  • Switching element 21-1a and switching element 22-1a are high-side switching elements, and switching element 21-2a and switching element 22-2a are low-side switching elements.
  • Each switching element is a lateral type element such as GaN HEMT, and a source electrode, a drain electrode, and a gate electrode are formed on the surface.
  • Each switching element is provided with a protruding electrode so as to be suitable for flip chip connection.
  • the drain electrode is connected to the positive power supply pattern 35-1
  • the source electrode is connected to the output pattern 33-1. Note that illustration of the gate electrode of each switching element is omitted.
  • the lateral distribution range is limited to the vicinity of the surface of the module substrate 10 by flip-chip connecting the lateral type switching elements. Magnetic field cancellation can be generated more efficiently.
  • FIG. 13A and 13B are diagrams showing the structure of a full bridge circuit module 1f according to Embodiment 7 of the present invention.
  • FIG. 13A is a top view of the mounting surface of the full bridge circuit module 1f
  • FIG. It is sectional drawing of the bridge circuit module 1f.
  • each switching element is changed from a vertical type to a lateral type, and the connection method of each switching element is changed to a die bond and a wire. This is a change from bond to flip chip connection.
  • the full bridge circuit module 1f is arranged symmetrically, the switching element 21-1a, the switching element 21-2a, the switching element 22-1a, and the switching element 22-2a are mirror symmetrical. Use a tip.
  • the negative power supply pattern 32 is common to each half bridge circuit, and the wide conductor portion 12 corresponding to the region of the full bridge circuit is formed on the back surface. Even in the case where the lateral type switching element is flip-chip connected, the current distribution range during operation is limited to the vicinity of the surface of the module substrate 10, so that magnetic field cancellation is generated more efficiently. be able to.
  • FIG. 14 is a circuit diagram of a full bridge circuit according to the eighth embodiment of the present invention.
  • FIG. 15 is a view showing the structure of the full bridge circuit module 1g according to the eighth embodiment of the present invention.
  • FIG. 15A is a top view of the mounting surface of the full bridge circuit module 1g
  • FIG. FIG. 2 is a cross-sectional view of a full bridge circuit module 1g.
  • each switching element in the full bridge circuit module 1e in the sixth embodiment is cascode-connected.
  • the full bridge circuit can be operated as an enhancement type by cascode connection of enhancement type MOS transistors.
  • the switching elements 21-1M and 21-2M are high-side enhancement type switching elements, and use MOS transistors or the like.
  • the switching element 21-1S and the switching element 21-2S are high-side depletion type switching elements, and GaN HEMTs or the like are used.
  • the switching elements 22-1M and 22-2M are low-side enhancement type switching elements, and use MOS transistors or the like.
  • the switching element 22-1S and the switching element 22-2S are low-side depletion type switching elements, and GaN HEMTs or the like are used.
  • Each switching element has source, drain, and gate electrodes formed on the surface. Each switching element is provided with a protruding electrode so as to be suitable for flip chip connection.
  • One electrode of the bypass capacitor 23-1 is connected to the positive power supply pattern 31-1, and a positive power supply potential is applied to the wide conductor portion 11-1 through the connection electrode 41-1.
  • the positive power supply pattern 35-1 is supplied with a positive power supply potential from the wide conductor portion 11-1 via the connection electrode 42-1, and further connected to the drain of the switching element 21-1S.
  • the source of the switching element 21-1S is connected to the drain of the cascode-connected switching element 21-1M via the pattern 36-1.
  • the source of the switching element 21-1M is connected to the output pattern 33-1, and the drain of the switching element 22-1S is also connected to the output pattern 33-1.
  • the source of the switching element 22-1S is connected to the drain of the cascode-connected switching element 22-1M through the pattern 37-1.
  • the source of the switching element 22-1M is connected to the negative power supply pattern 32-1, and the other electrode of the bypass capacitor 23-1 is connected to the negative power supply pattern 32-1.
  • One electrode of the bypass capacitor 23-2 is connected to the negative power supply pattern 32-2, and a negative power supply potential is applied to the wide conductor portion 11-2 through the connection electrode 41-2.
  • the negative power supply pattern 34-2 is supplied with a negative power supply potential from the wide conductor portion 11-2 via the connection electrode 42-2, and is connected to the source of the switching element 22-2M.
  • the drain of the switching element 22-2M is connected to the source of the cascode-connected switching element 22-2S through the pattern 37-2.
  • the drain of the switching element 22-2S is connected to the output pattern 33-2, and the source of the switching element 21-2M is also connected to the output pattern 33-2.
  • the drain of the switching element 21-2M is connected to the source of the cascode-connected switching element 21-2S through the pattern 36-2.
  • the drain of the switching element 21-2S is connected to the positive power supply pattern 31-2, and the other electrode of the bypass capacitor 23-2 is connected to the positive power supply pattern 31-2.
  • the full bridge circuit module 1g according to the present embodiment can increase the parasitic inductance suppression effect by cascode connection even when the number of elements is increased or the wiring length is increased. it can.
  • FIG. 16 is a circuit diagram of a full bridge circuit according to the ninth embodiment of the present invention.
  • FIG. 17 is a view showing the structure of the full bridge circuit module 1h according to the ninth embodiment of the present invention.
  • FIG. 17A is a top view of the mounting surface of the full bridge circuit module 1h.
  • FIG. FIG. 3 is a cross-sectional view of the full bridge circuit module 1h.
  • the switching element is the switching element that can be flip-chip connected as described in the above-described embodiment.
  • a positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface.
  • Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively.
  • a negative power distribution pattern 11-3 connecting the wide conductor portion 11-1 and the wide conductor portion 11-2 is formed on the back surface.
  • the negative power distribution pattern 11-3 is connected to the wide conductor portion 11-1 and the wide conductor portion 11-2 in the vicinity of the connection electrode 41-1 and the connection electrode 41-2, respectively.
  • the width of the wide conductor portion is illustrated to be thick, but the present embodiment is not limited to increasing the width of the wide conductor portion.
  • the positive power distribution pattern 31-3 and the negative power distribution pattern 11-3 include a positive power supply pattern 51 and a negative power supply pattern 52 that are branched at arbitrary positions, respectively.
  • the positive-side power distribution pattern 31-3 and the negative-side power distribution pattern 11-3 are formed on the mounting surface and the back surface, respectively, so that the regions overlap each other in the top view of the mounting surface as shown in FIG. Is formed. Further, the positive power supply pattern 51 and the negative power supply pattern 52 are similarly formed so that their regions overlap each other in the top view of the mounting surface. That is, the arrangement of the full bridge circuit module 1h is an arrangement called a stacked pair structure.
  • the conductive pattern is formed in the region corresponding to each of the half bridge circuits. It is formed on the back. Therefore, it is easy to form a stacked pair structure, and by forming the stacked pair structure, it is possible to more suitably suppress the change of the magnetic field due to the regenerative current generated when the switching element performs a switching operation. .
  • FIG. 18 is a circuit diagram of a full bridge circuit according to the tenth embodiment of the present invention.
  • FIG. 19 is a view showing the structure of the full bridge circuit module 1i according to the tenth embodiment of the present invention.
  • FIG. 19 (a) is a top view of the mounting surface of the full bridge circuit module 1i.
  • FIG. 3 is a cross-sectional view of the full bridge circuit module 1i.
  • the magnetic field canceling effect is enhanced for the pattern for supplying power.
  • the positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface.
  • Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively. Since both the positive power supply pattern 31-1 and the positive power supply pattern 31-2 are patterns formed on the mounting surface, they can be easily connected.
  • a negative power distribution pattern 11-3 for connecting the connection electrode 43 and the wide conductor portion 11-2 is formed.
  • the wide conductor portion 11-2 is connected to the connection electrode 43 and the wide conductor portion 11-2 in the vicinity of the bypass capacitor 23-1 and the connection electrode 41-2, respectively.
  • the width of the wide conductor portion is shown thick, but the present embodiment is not limited to increasing the width of the wide conductor portion.
  • each of the positive power distribution pattern 31-3 and the negative power distribution pattern 11-3 has a positive power supply pattern 51 and a negative power in a region overlapping each other in the top view of the mounting surface. Branches to the supply source pattern 52.
  • the arrangement of the full bridge circuit module 1i also has a stacked pair structure.
  • the full bridge circuit module 1i according to the present embodiment is easy to form a stacked pair structure as well as the full bridge circuit module 1h according to the ninth embodiment described above, and the mounting surface is the positive side. Since the power supply potential and the back surface are negative power supply potentials and the elements are to be arranged, the mounting surface can be easily set to the negative power supply potential and the back surface can be set to the positive power supply potential.
  • FIG. 20 is a circuit diagram of a full bridge circuit according to the eleventh embodiment of the present invention.
  • FIG. 21 is a diagram showing the structure of the full bridge circuit module 1j according to the eleventh embodiment of the present invention.
  • FIG. 21A is a top view of the mounting surface of the full bridge circuit module 1j.
  • FIG. 3 is a cross-sectional view of the full bridge circuit module 1j.
  • the magnetic field canceling effect is enhanced for the pattern for supplying power.
  • the positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface.
  • Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively.
  • a negative power supply pattern 52 branched from the wide conductor portion 12 is formed in the vicinity of the connection electrode 41. Since the wide conductor portion 12 is common to the two half-bridge circuits, the negative power distribution pattern is omitted.
  • This connection is a connection method called single-point grounding. This connection can limit the direction of regenerative current flowing in each half-bridge circuit.
  • the negative power supply pattern 52 and the positive power distribution pattern 31-3 branch from the positive power distribution pattern 31-3 to a region where they overlap each other.
  • a positive power supply pattern 51 is formed.
  • the arrangement of the full bridge circuit module 1j also has a stacked pair structure.
  • the negative power supply pattern 32 is common to each half bridge circuit, and the wide conductor portion 12 corresponding to the region of the full bridge circuit is formed on the back surface. Even in such a case, a stacked pair structure can be easily formed.
  • the present invention is not limited to this, and a multilayer wiring substrate may be used for the module substrate 10.
  • a multilayer wiring substrate may be used for the module substrate 10.
  • the same effects as those of the present application can be obtained even when a four-layer substrate is used for the module substrate 10 and a pattern is formed on the surface layer of the four-layer substrate and the layer below the surface layer.
  • the circuit module (full bridge circuit module 1, 1a, 1b, 1e, 1g, 1h, 1i) according to aspect 1 of the present invention has a full bridge circuit including two half bridge circuits mounted on a substrate (module substrate 10).
  • the two half-bridge circuits are mounted on one main surface (mounting surface) of the substrate, and each of the two half-bridge circuits has the half-bridge on the one main surface of the substrate.
  • Power supply patterns negative power supply patterns 34-1 and 34-2, positive power supply pattern 35-1) functioning as a positive power source or a negative power source for the circuit are formed.
  • conductive patterns (wide conductor portions 11-1 and 11-2) are formed in a region corresponding to the half-bridge circuit. Down it is connected to the power supply pattern.
  • the wide conductor part corresponding to each half bridge circuit with which a circuit module is provided is formed in the circuit module which concerns on this aspect, it receives to the influence of the regenerative current which generate
  • power may be supplied to the power supply pattern through a region corresponding to each of the half bridge circuits of the conductive pattern.
  • the circuit module which concerns on this aspect can suppress that a magnetic field changes with the regenerative current which generate
  • a circuit module according to aspect 3 of the present invention is the circuit module according to aspect 1 or 2, wherein the power supply pattern and a pattern functioning as a power source having a polarity different from the polarity of the power supply pattern (positive power supply pattern 31- 1 and 31-2 and negative power supply patterns 32-1 and 32-2) may be capacitively connected.
  • the circuit module according to this aspect can suitably reduce high-frequency noise when the switching element performs a switching operation. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
  • the circuit module (full bridge circuit modules 1c, 1d, 1f, 1j) according to aspect 4 of the present invention is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate (module substrate 10). Two half-bridge circuits are mounted on one main surface (mounting surface) of the substrate, and a power source that functions as a positive power source or a negative power source for the two half-bridge circuits is mounted on one main surface of the substrate.
  • a supply pattern (negative power supply pattern 32) is provided as a common pattern in the two half-bridge circuits, and a region corresponding to the full-bridge circuit is provided on the other main surface (back surface) of the substrate. Is formed with a conductive pattern (wide conductor portion 12), and the conductive pattern is connected to the power supply pattern. The power supply pattern, in the region of the conductive pattern, the power is supplied through a region corresponding to each of the half-bridge circuit.
  • the switching element performs a switching operation in each half bridge circuit. Since it is possible to suppress the magnetic field from being changed by the regenerative current generated at, the parasitic inductance suppression effect can be enhanced.
  • the circuit module according to Aspect 5 of the present invention is the circuit module according to Aspect 4, wherein the power supply pattern and a pattern functioning as a power source having a polarity different from the polarity of the power supply pattern (positive power supply pattern 31-1, 31-2) may be capacitively connected.
  • the circuit module according to this aspect is suitable for high-frequency noise when the switching element performs a switching operation, even when the conductive pattern is not separated corresponding to each half-bridge circuit. Can be reduced. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
  • the conductive pattern may be grounded.
  • the circuit module according to this aspect since the circuit module according to this aspect has a large area of the grounded pattern, the circuit can be stably operated.
  • a circuit module according to Aspect 7 of the present invention is the circuit module according to any one of Aspects 4 to 6, wherein a plurality of switching elements mounted on one half bridge circuit of the two half bridge circuits are connected to each other and the other half bridge circuit is connected.
  • a plurality of switching elements mounted on the bridge circuit may be connected to each other in a mirror image with respect to a virtual axis passing through the power supply pattern.
  • the switching element performs a switching operation in each half bridge circuit. Since it is possible to suppress the magnetic field from being changed by the regenerative current generated at, the parasitic inductance suppression effect can be enhanced.
  • the power supply pattern may have a stacked pair structure.
  • the circuit module according to this aspect has a stacked pair structure, and thus can more suitably suppress the change of the magnetic field due to the regenerative current generated when the switching element performs the switching operation.

Abstract

To provide a technology of increasing effects of suppressing a parasitic inductance in a circuit module wherein a full-bridge circuit is mounted on a substrate. Disclosed is a full-bridge circuit module (1) wherein: two half-bridge circuits are mounted on one main surface of a module substrate (10); wide conductor units (11-1, 11-2) are formed in regions corresponding to the half-bridge circuits, said regions being parts of the other main surface of the module substrate; and the wide conductor units are connected to negative-side power source patterns (34-1, 34-2) via connecting electrodes (42-1, 42-2), said negative-side power source patterns functioning as negative-side power sources.

Description

回路モジュールCircuit module
　本発明は２つのハーフブリッジ回路を備えるフルブリッジ回路を基板に実装した回路モジュールに関する。 The present invention relates to a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate.
　従来から、単相インバータ等を構成するフルブリッジ回路モジュールが開発されている。例えば、特許文献１に記載のフルブリッジ回路モジュールについて、図２２を用いて説明する。図２２は、特許文献１におけるフルブリッジ回路モジュール１００の構造を示す斜視図である。図２２に示すように、フルブリッジ回路モジュール１００には、平面的に２つのハーフブリッジ回路が配置されている。 Conventionally, full-bridge circuit modules constituting single-phase inverters and the like have been developed. For example, a full bridge circuit module described in Patent Document 1 will be described with reference to FIG. FIG. 22 is a perspective view showing the structure of the full bridge circuit module 100 in Patent Document 1. As shown in FIG. As shown in FIG. 22, the full bridge circuit module 100 has two half bridge circuits arranged in a plane.
　より具体的には、フルブリッジ回路モジュール１００には、モジュール基板１１０に、正側電力供給パターン１３１－１、正側電力供給パターン１３１－２、負側電力供給パターン１３２－１、負側電力供給パターン１３２－２、出力パターン１３３－１、および出力パターン１３３－１が形成されている。正側電力供給パターン１３１－１および正側電力供給パターン１３１－２はそれぞれ正側電源に接続され、負側電力供給パターン１３２－１および負側電力供給パターン１３２－２はそれぞれ接地されている。 More specifically, in the full bridge circuit module 100, the positive power supply pattern 131-1, the positive power supply pattern 131-2, the negative power supply pattern 132-1 and the negative power supply are supplied to the module substrate 110. A pattern 132-2, an output pattern 133-1, and an output pattern 133-1 are formed. The positive power supply pattern 131-1 and the positive power supply pattern 131-2 are each connected to the positive power supply, and the negative power supply pattern 132-1 and the negative power supply pattern 132-2 are grounded.
　また、フルブリッジ回路モジュール１００では、正側電力供給パターン１３１－１と出力パターン１３３－１とがスイッチング素子１２１－１および導電性ワイヤ１６１－１を介して接続されており、負側電力供給パターン１３２－１と出力パターン１３３－１とがスイッチング素子１２２－１および導電性ワイヤ１６２－１を介して接続されている。同様に、正側電力供給パターン１３１－２と出力パターン１３３－２とがスイッチング素子１２１－２および導電性ワイヤ１６１－２を介して接続されており、負側電力供給パターン１３２－２と出力パターン１３３－２とがスイッチング素子１２２－２および導電性ワイヤ１６２－２を介して接続されている。 Further, in the full bridge circuit module 100, the positive power supply pattern 131-1 and the output pattern 133-1 are connected via the switching element 121-1 and the conductive wire 161-1. 132-1 and the output pattern 133-1 are connected via the switching element 122-1 and the conductive wire 162-1. Similarly, the positive power supply pattern 131-2 and the output pattern 133-2 are connected via the switching element 121-2 and the conductive wire 161-2, and the negative power supply pattern 132-2 and the output pattern are connected. 133-2 is connected via a switching element 122-2 and a conductive wire 162-2.
　続いて、出力パターン１３３－１の出力が正、出力パターン１３３－２の出力が負の場合を例に挙げて、フルブリッジ回路モジュール１００について説明する。 Subsequently, the full bridge circuit module 100 will be described by taking as an example the case where the output of the output pattern 133-1 is positive and the output of the output pattern 133-2 is negative.
　出力パターン１３３－１の出力は正なので、正側電力供給パターン１３１－１に接続されているスイッチング素子１２１－１はＯＮであり、負側電力供給パターン１３２－１に接続されているスイッチング素子１２２－１はＯＦＦである。すなわち、フルブリッジ回路モジュール１００には、電流Ｉ－１０１が流れている。 Since the output of the output pattern 133-1 is positive, the switching element 121-1 connected to the positive power supply pattern 131-1 is ON, and the switching element 122 connected to the negative power supply pattern 132-1 is used. -1 is OFF. That is, a current I-101 flows through the full bridge circuit module 100.
　一方、出力パターン１３３－２の出力は－なので、正側電力供給パターン１３１－２に接続されているスイッチング素子１２１－２はＯＦＦであり、負側電力供給パターン１３２－２に接続されているスイッチング素子１２２－２はＯＮである。すなわち、フルブリッジ回路モジュール１００では、電流Ｉ－１０３が流れている。 On the other hand, since the output of the output pattern 133-2 is-, the switching element 121-2 connected to the positive power supply pattern 131-2 is OFF, and the switching connected to the negative power supply pattern 132-2 is performed. Element 122-2 is ON. That is, in the full bridge circuit module 100, a current I-103 flows.
　この状態から、スイッチング素子１２１－１およびスイッチング素子１２２－２をＯＦＦにすると、回生電流として、電流Ｉ－１０２および電流Ｉ－１０４が流れる。このとき、電流Ｉ－１０１から電流Ｉ－１０２へは、連続的に変化する。しかしながら、電流Ｉ－１０１によって発生する磁界と、電流Ｉ－１０２によって発生する磁界とは、連続的に変化しない。これは、電流Ｉ－１０３および電流Ｉ－１０４においても同様である。そのため、フルブリッジ回路モジュール１００では、スイッチング動作が起こった場合に磁界の乱れが生じるため、寄生インダクタンスが大きくなってしまう。 From this state, when switching element 121-1 and switching element 122-2 are turned OFF, current I-102 and current I-104 flow as regenerative current. At this time, current I-101 changes to current I-102 continuously. However, the magnetic field generated by current I-101 and the magnetic field generated by current I-102 do not change continuously. The same applies to the currents I-103 and I-104. Therefore, in the full bridge circuit module 100, when the switching operation occurs, the magnetic field is disturbed, so that the parasitic inductance is increased.
　例えば、スイッチング素子としてＩＧＢＴ（Insulated Gate Bipolar Transistor）等、動作速度の遅いスイッチング素子を使用した場合、電流の変化（ｄＩ／ｄｔ）が比較的緩やかであるため、寄生インダクタンスの影響はあまり問題にならなかった。しかしながら、スイッチング素子としてＳｉパワーＭＯＳ（Metal Oxide Semiconductor）トランジスタや化合物半導体を使ったＨＥＭＴ（High Electron Mobility Transistor）を使用した場合、電流の変化が大きくなるため、寄生インダクタンスの影響も大きくなってしまうという問題があった。 For example, when a switching element with a slow operation speed such as an IGBT (Insulated Gate Bipolar Transistor) is used as a switching element, the change in current (dI / dt) is relatively gradual, so the influence of parasitic inductance is not a problem. There wasn't. However, when a HEMT (High Electron Mobility Transistor) using a Si power MOS (Metal Oxide Semiconductor) transistor or a compound semiconductor is used as a switching element, the current change becomes large, and the influence of parasitic inductance also becomes large. There was a problem.
　この問題に対する解決手段として、特許文献２に記載のパワー半導体モジュールが開示されている。特許文献２に記載のパワー半導体モジュールについて、図２３を用いて説明する。図２３は、特許文献２におけるパワー半導体モジュール１０１の構造を示す斜視図である。なお、図２３では、構造が分かりやすくなるよう、モジュール基板１１０は省略している。図２３に示すように、パワー半導体モジュール１０１には、平面的に１つのハーフブリッジ回路が配置されている。 As a means for solving this problem, a power semiconductor module described in Patent Document 2 is disclosed. The power semiconductor module described in Patent Document 2 will be described with reference to FIG. FIG. 23 is a perspective view showing the structure of the power semiconductor module 101 in Patent Document 2. As shown in FIG. In FIG. 23, the module substrate 110 is omitted for easy understanding of the structure. As shown in FIG. 23, the power semiconductor module 101 has one half-bridge circuit arranged in a plane.
　より具体的には、パワー半導体モジュール１０１には、第１導電層として、正側電力供給パターン１３１、負側電力供給パターン１３２、出力パターン１３３、負側電源パターン１３４が形成されている。正側電力供給パターン１３１は正側電源に接続され、負側電力供給パターン１３２は負側電源に接続されている。 More specifically, in the power semiconductor module 101, a positive power supply pattern 131, a negative power supply pattern 132, an output pattern 133, and a negative power supply pattern 134 are formed as the first conductive layer. The positive power supply pattern 131 is connected to the positive power supply, and the negative power supply pattern 132 is connected to the negative power supply.
　また、パワー半導体モジュール１０１では、正側電力供給パターン１３１と出力パターン１３３とがスイッチング素子１２１および導電性ワイヤ１６１を介して接続されている。同様に負側電源パターン１３４と出力パターン１３３とがスイッチング素子１２２および導電性ワイヤ１６２を介して接続されている。 In the power semiconductor module 101, the positive power supply pattern 131 and the output pattern 133 are connected via the switching element 121 and the conductive wire 161. Similarly, the negative power supply pattern 134 and the output pattern 133 are connected via the switching element 122 and the conductive wire 162.
　また、パワー半導体モジュール１０１は、第２導電層として、ハーフブリッジ回路が配置されている主面と異なる主面において、第１導電層と対向する領域に、パス１１１が形成されている。さらに、パス１１１と負側電力供給パターン１３２と負側電源パターン１３４とを接続するため、接続電極１４１および接続電極１４２が設けられている。 Further, in the power semiconductor module 101, a path 111 is formed as a second conductive layer in a region facing the first conductive layer on a main surface different from the main surface on which the half bridge circuit is disposed. Furthermore, a connection electrode 141 and a connection electrode 142 are provided to connect the path 111, the negative power supply pattern 132, and the negative power supply pattern 134.
　続いて、出力パターン１３３の出力が正の場合を例に挙げて、パワー半導体モジュール１０１について説明する。 Subsequently, the power semiconductor module 101 will be described by taking the case where the output of the output pattern 133 is positive as an example.
　出力パターン１３３の出力が正なので、正側電力供給パターン１３１に接続されているスイッチング素子１２１はＯＮであり、負側電源パターン１３４に接続されているスイッチング素子１２２はＯＦＦである。すなわち、パワー半導体モジュール１０１には、電流Ｉ－１１１が流れている。 Since the output of the output pattern 133 is positive, the switching element 121 connected to the positive power supply pattern 131 is ON, and the switching element 122 connected to the negative power supply pattern 134 is OFF. That is, a current I-111 flows through the power semiconductor module 101.
　この状態から、スイッチング素子１２１をＯＦＦにすると、回生電流として電流Ｉ－１１２およびＩ－１１３が流れる。このとき、電流Ｉ－１１２およびＩ－１１３は、流れる向きが逆なので、電流Ｉ－１１２によって発生する磁界と、電流Ｉ－１１３によって発生する磁界とは、互いに打ち消し合う。また、電流Ｉ－１１１と電流Ｉ－１１３とは、流れる向きが同じであり、また、電流Ｉ－１１１から電流Ｉ－１１３へは連続的に変化するため、電流Ｉ－１１１によって発生する磁界から電流Ｉ－１１３によって発生する磁界へは大きな変化がなく、磁界の乱れは小さい。そのため、パワー半導体モジュール１０１では、寄生インダクタンスの影響を最小限に抑えることができるとされている。 From this state, when the switching element 121 is turned OFF, currents I-112 and I-113 flow as regenerative currents. At this time, since the currents I-112 and I-113 flow in opposite directions, the magnetic field generated by the current I-112 and the magnetic field generated by the current I-113 cancel each other. Further, the current I-111 and the current I-113 have the same flowing direction and continuously change from the current I-111 to the current I-113. There is no significant change in the magnetic field generated by the current I-113, and the magnetic field disturbance is small. Therefore, in the power semiconductor module 101, it is said that the influence of parasitic inductance can be minimized.
日本国公開特許公報「特開２０１５－８９３００号公報（２０１５年５月７日公開）」Japanese Patent Publication “JP-A-2015-89300 (published May 7, 2015)” 日本国公開特許公報「特開２０１３－３３８１２号公報（２０１３年２月１４日公開）」Japanese Patent Publication “Japanese Patent Laid-Open No. 2013-33812 (published on February 14, 2013)”
　特許文献２に記載のパワー半導体モジュールをフルブリッジ回路に適用した場合について、図２４を用いて説明する。図２４は、特許文献２におけるパワー半導体モジュールを用いたフルブリッジ回路モジュール１０２の構造を示す斜視図である。なお、図２４では、構造が分かりやすくなるよう、モジュール基板１１０は省略している。 The case where the power semiconductor module described in Patent Document 2 is applied to a full bridge circuit will be described with reference to FIG. FIG. 24 is a perspective view showing the structure of the full bridge circuit module 102 using the power semiconductor module in Patent Document 2. As shown in FIG. In FIG. 24, the module substrate 110 is omitted for easy understanding of the structure.
　図２４に示すように、フルブリッジ回路モジュール１０２では、２つのハーフブリッジ回路のそれぞれの負側電源が隣り合う形になるため、負側電力供給パターン１３２は共通化されている。また、２つのハーフブリッジ回路のそれぞれに対応する幅広導体部も、負側電力供給パターン１３２にそれぞれ接続されるため、幅広導体部１１１も同様に共通化されている。負側電力供給パターン１３２を共通化することにより、より安定した電源として機能することが可能になる。 As shown in FIG. 24, in the full bridge circuit module 102, since the negative power supplies of the two half bridge circuits are adjacent to each other, the negative power supply pattern 132 is shared. Moreover, since the wide conductor part corresponding to each of the two half-bridge circuits is also connected to the negative power supply pattern 132, the wide conductor part 111 is also commonly used. By sharing the negative power supply pattern 132, it is possible to function as a more stable power source.
　しかしながら、図２４に示すフルブリッジ回路モジュール１０２を動作させたところ、ノイズが大きくなってしまった。ノイズが大きくなってしまった原因について、図２５を用いて説明する。図２５は、特許文献２におけるパワー半導体モジュールを用いたフルブリッジ回路モジュール１０２の電流の流れを示す斜視図である。 However, when the full bridge circuit module 102 shown in FIG. 24 was operated, noise increased. The reason why the noise has increased will be described with reference to FIG. FIG. 25 is a perspective view showing a current flow of the full bridge circuit module 102 using the power semiconductor module in Patent Document 2.
　例えば、出力パターン１３３－１の出力が正、出力パターン１３３－２の出力が負の場合、フルブリッジ回路モジュール１０２を流れる電流は、電流Ｉ－１２１、電流Ｉ－１２３、および電流Ｉ－１２４である。この状態から出力が反転すると、電流Ｉ－１２１に対する回生電流として電流Ｉ－１２２が流れ、電流Ｉ－１２３および電流Ｉ－１２４に対する回生電流として電流Ｉ１０５が流れる。 For example, when the output of the output pattern 133-1 is positive and the output of the output pattern 133-2 is negative, the currents flowing through the full bridge circuit module 102 are the current I-121, the current I-123, and the current I-124. is there. When the output is inverted from this state, a current I-122 flows as a regenerative current for the current I-121, and a current I105 flows as a regenerative current for the currents I-123 and I-124.
　このとき、電流Ｉ－１２３および電流Ｉ－１２４は互いに磁界を打ち消し合い、また、電流Ｉ－１２４から電流Ｉ－１２５へ連続的に変化するため、電流Ｉ－１２３、電流Ｉ－１２４、および電流Ｉ－１２５による寄生インダクタンスは抑制される。 At this time, the current I-123 and the current I-124 cancel each other out of the magnetic field and continuously change from the current I-124 to the current I-125, so that the current I-123, the current I-124, and the current I-124 The parasitic inductance due to I-125 is suppressed.
　一方、電流Ｉ－１２１および電流Ｉ－１２２は、互いに発生させる磁界は連続的に変化しないため、寄生インダクタンスの影響が大きくなってしまう。そのため、フルブリッジ回路モジュール１０２では、ノイズが大きくなるという問題がある。 On the other hand, the current I-121 and the current I-122 are not affected by the parasitic inductance because the magnetic fields generated from each other do not change continuously. Therefore, the full bridge circuit module 102 has a problem that noise increases.
　本発明は、上記の問題点を解決するためになされたものであり、その目的は、フルブリッジ回路を基板に実装した回路モジュールにおいて、寄生インダクタンスの抑制効果を高くする技術を提供することである。 The present invention has been made to solve the above-described problems, and an object of the present invention is to provide a technique for increasing the effect of suppressing parasitic inductance in a circuit module in which a full bridge circuit is mounted on a substrate. .
　上記の課題を解決するために、本発明の一態様に係る回路モジュールは、２つのハーフブリッジ回路を備えるフルブリッジ回路を基板に実装した回路モジュールにおいて、上記２つのハーフブリッジ回路は、上記基板の一方の主面に実装され、上記２つのハーフブリッジ回路の各々について、上記基板の一方の主面には、上記ハーフブリッジ回路への正側電源または負側電源として機能する電源供給用パターンが形成されており、上記基板の他の主面には、上記ハーフブリッジ回路に対応する領域に導電パターンが形成されており、上記導電パターンは、上記電源供給用パターンと接続されている。 In order to solve the above problems, a circuit module according to one embodiment of the present invention is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate, and the two half bridge circuits are formed on the substrate. A power supply pattern that functions as a positive power source or a negative power source for the half bridge circuit is formed on one main surface of the substrate for each of the two half bridge circuits mounted on one main surface. On the other main surface of the substrate, a conductive pattern is formed in a region corresponding to the half-bridge circuit, and the conductive pattern is connected to the power supply pattern.
　また、上記の課題を解決するために、本発明の一態様に係る回路モジュールは、２つのハーフブリッジ回路を備えるフルブリッジ回路を基板に実装した回路モジュールにおいて、上記２つのハーフブリッジ回路は、上記基板の一方の主面に実装され、上記基板の一方の主面には、上記２つのハーフブリッジ回路への正側電源または負側電源として機能する電源供給用パターンを、上記２つのハーフブリッジ回路において共通のパターンとして有しており、上記基板の他の主面には、上記フルブリッジ回路に対応する領域に導電パターンが形成されており、上記導電パターンは、上記電源供給用パターンと接続されており、上記電源供給用パターンには、上記導電パターンの領域のうち、上記ハーフブリッジ回路の各々に対応する領域を通って電力が供給される。 In order to solve the above problems, a circuit module according to one embodiment of the present invention is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate, and the two half bridge circuits are A power supply pattern that is mounted on one main surface of the substrate and functions as a positive power source or a negative power source for the two half bridge circuits is provided on the one main surface of the substrate. In the other main surface of the substrate, a conductive pattern is formed in a region corresponding to the full bridge circuit, and the conductive pattern is connected to the power supply pattern. The power supply pattern passes through a region corresponding to each of the half-bridge circuits in the conductive pattern region. Power is supplied.
　本発明の一態様によれば、フルブリッジ回路を基板に実装した回路モジュールにおいて、寄生インダクタンスの抑制効果を高くすることができる。 According to one aspect of the present invention, the effect of suppressing parasitic inductance can be enhanced in a circuit module in which a full bridge circuit is mounted on a substrate.
本発明の実施形態１に係るフルブリッジ回路モジュールの構造を示す斜視図である。It is a perspective view which shows the structure of the full bridge circuit module which concerns on Embodiment 1 of this invention. 本発明の実施形態１に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 1 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態１におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 1 of this invention. 本発明の実施形態１において、実装面に形成されたパターンの幅と幅広導体部の幅との関係を示すグラフである。In Embodiment 1 of this invention, it is a graph which shows the relationship between the width | variety of the pattern formed in the mounting surface, and the width | variety of a wide conductor part. 本発明の実施形態２におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 2 of this invention. 本発明の実施形態２に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 2 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態３におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 3 of this invention. 本発明の実施形態３に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 3 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態４に係るフルブリッジ回路モジュールの構造を示す斜視図である。It is a perspective view which shows the structure of the full bridge circuit module which concerns on Embodiment 4 of this invention. 本発明の実施形態５におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 5 of this invention. 本発明の実施形態５に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 5 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態６に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 6 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態７に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 7 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態８におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 8 of this invention. 本発明の実施形態８に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 8 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態９におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 9 of this invention. 本発明の実施形態９に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 9 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態１０におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 10 of this invention. 本発明の実施形態１０に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 10 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 本発明の実施形態１１におけるフルブリッジ回路の回路図である。It is a circuit diagram of the full bridge circuit in Embodiment 11 of this invention. 本発明の実施形態１１に係るフルブリッジ回路モジュールの構造を示す図であり、（ａ）は、フルブリッジ回路モジュールにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュールの断面図である。It is a figure which shows the structure of the full bridge circuit module which concerns on Embodiment 11 of this invention, (a) is a top view of the mounting surface in a full bridge circuit module, (b) is sectional drawing of a full bridge circuit module. It is. 特許文献１におけるフルブリッジ回路モジュールの構造を示す斜視図である。It is a perspective view which shows the structure of the full bridge circuit module in patent document 1. FIG. 特許文献２におけるパワー半導体モジュールの構造を示す斜視図である。It is a perspective view which shows the structure of the power semiconductor module in patent document 2. FIG. 特許文献２におけるパワー半導体モジュールを用いたフルブリッジ回路モジュールの構造を示す斜視図である。It is a perspective view which shows the structure of the full bridge circuit module using the power semiconductor module in patent document 2. FIG. 特許文献２におけるパワー半導体モジュールを用いたフルブリッジ回路モジュールの電流の流れを示す斜視図である。It is a perspective view which shows the flow of the electric current of the full bridge circuit module using the power semiconductor module in patent document 2. FIG.
　以下、図面に基づいて本発明の実施形態を詳細に説明する。なお、説明の便宜上、前記実施形態にて説明した部材と同じ機能を有する部材については、同じ符号を付記し、その説明を省略する。 Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. For convenience of explanation, members having the same functions as those described in the embodiment are given the same reference numerals, and descriptions thereof are omitted.
　〔実施形態１〕
　本発明の一実施形態（実施形態１）について、図１～図４に基づいて説明する。 Embodiment 1
An embodiment (Embodiment 1) of the present invention will be described with reference to FIGS.
　（フルブリッジ回路モジュール１）
　図１は、本発明の実施形態１に係るフルブリッジ回路モジュール１の構造を示す斜視図である。また、図２は、本発明の実施形態１に係るフルブリッジ回路モジュール１の構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１における実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１の断面図である。なお、図１では、構造が分かりやすくなるよう、モジュール基板（基板）１０は省略している。 (Full bridge circuit module 1)
FIG. 1 is a perspective view showing a structure of a full bridge circuit module 1 according to Embodiment 1 of the present invention. FIG. 2 is a view showing the structure of the full bridge circuit module 1 according to Embodiment 1 of the present invention. FIG. 2A is a top view of the mounting surface of the full bridge circuit module 1, and FIG. 2 is a cross-sectional view of the full bridge circuit module 1. FIG. In FIG. 1, the module substrate (substrate) 10 is omitted so that the structure can be easily understood.
　フルブリッジ回路モジュール（回路モジュール）１は、図１および図２に示すように、スイッチング素子２１－１およびスイッチング素子２２－１を備えるハーフブリッジ回路と、スイッチング素子２１－２およびスイッチング素子２２－２を備えるハーフブリッジ回路とを備えている。 As shown in FIGS. 1 and 2, the full bridge circuit module (circuit module) 1 includes a half bridge circuit including a switching element 21-1 and a switching element 22-1; a switching element 21-2 and a switching element 22-2; A half-bridge circuit.
　フルブリッジ回路モジュール１は、２つのハーフブリッジ回路をモジュール基板１０の一方の主面に実装している（以下、回路素子を実装している面を「実装面」と称する）。また、フルブリッジ回路モジュール１では、実装面の反対側の他の主面（以下、実装面の反対側の他の主面を「裏面」と称する）には、ハーフブリッジ回路のそれぞれに対向する領域に幅広導体部（導電パターン）１１－１および幅広導体部（導電パターン）１１－２がそれぞれ形成されている。 The full-bridge circuit module 1 has two half-bridge circuits mounted on one main surface of the module substrate 10 (hereinafter, a surface on which circuit elements are mounted is referred to as a “mounting surface”). In the full bridge circuit module 1, the other main surface opposite to the mounting surface (hereinafter, the other main surface opposite to the mounting surface is referred to as “back surface”) is opposed to each half bridge circuit. A wide conductor portion (conductive pattern) 11-1 and a wide conductor portion (conductive pattern) 11-2 are formed in the region.
　（実装面に形成されるパターン）
　また、フルブリッジ回路モジュール１のモジュール基板１０の実装面には、図１および図２に示すような配置で、以下のパターンが形成されている。
・正側電源に接続され、各ハーフブリッジの正側電源となる正側電力供給パターン３１－１および正側電力供給パターン３１－２
・負側電源に接続される負側電力供給パターン３２－１および負側電力供給パターン３２－２
・各ハーフブリッジの出力パターンである出力パターン３３－１および出力パターン３３－２
・各ハーフブリッジの負側電源となる負側電源パターン（電源供給用パターン）３４－１および負側電源パターン（電源供給用パターン）３４－２
　（スイッチング素子）
　また、フルブリッジ回路モジュール１では、正側電力供給パターン３１－１と出力パターン３３－１とがスイッチング素子２１－１および導電性ワイヤ６１－１を介して接続されており、負側電源パターン３４－１と出力パターン３３－１とがスイッチング素子２２－１および導電性ワイヤ６２－１を介して接続されている。換言すると、スイッチング素子２１－１がハイサイドのスイッチング素子であり、スイッチング素子２２－１がローサイドのスイッチング素子である。 (Pattern formed on the mounting surface)
Further, the following pattern is formed on the mounting surface of the module substrate 10 of the full bridge circuit module 1 in an arrangement as shown in FIGS.
A positive power supply pattern 31-1 and a positive power supply pattern 31-2 that are connected to the positive power supply and serve as the positive power supply of each half bridge
Negative power supply pattern 32-1 and negative power supply pattern 32-2 connected to the negative power supply
Output pattern 33-1 and output pattern 33-2 that are output patterns of each half bridge
A negative power supply pattern (power supply pattern) 34-1 and a negative power supply pattern (power supply pattern) 34-2 that serve as the negative power supply for each half bridge
(Switching element)
In the full bridge circuit module 1, the positive power supply pattern 31-1 and the output pattern 33-1 are connected via the switching element 21-1 and the conductive wire 61-1, and the negative power supply pattern 34 is connected. -1 and the output pattern 33-1 are connected via the switching element 22-1 and the conductive wire 62-1. In other words, the switching element 21-1 is a high-side switching element, and the switching element 22-1 is a low-side switching element.
　同様に、正側電力供給パターン３１－２と出力パターン３３－２とがスイッチング素子２１－２および導電性ワイヤ６１－２を介して接続されており、負側電源パターン３４－２と出力パターン３３－２とがスイッチング素子２２－２および導電性ワイヤ６２－２を介して接続されている。換言すると、スイッチング素子２１－２がハイサイドのスイッチング素子であり、スイッチング素子２２－２がローサイドのスイッチング素子である。 Similarly, the positive power supply pattern 31-2 and the output pattern 33-2 are connected via the switching element 21-2 and the conductive wire 61-2, and the negative power supply pattern 34-2 and the output pattern 33 are connected. -2 is connected via a switching element 22-2 and a conductive wire 62-2. In other words, the switching element 21-2 is a high-side switching element, and the switching element 22-2 is a low-side switching element.
　各スイッチング素子は、パワーＭＯＳトランジスタなどの縦型素子を用いており、例えばスイッチング素子２１－１であれば、裏面のドレインを、正側電力供給パターン３１－１にダイボンドで接続し、表面のソースを、出力パターン３３－１にワイヤボンドで接続する。なお、本明細書では、ゲート電極については、図示を省略している。 Each switching element uses a vertical element such as a power MOS transistor. For example, in the case of the switching element 21-1, the drain on the back surface is connected to the positive power supply pattern 31-1 by die bonding, and the source on the surface Are connected to the output pattern 33-1 by wire bonding. In the present specification, illustration of the gate electrode is omitted.
　（接続電極）
　また、モジュール基板１０には、負側電力供給パターン３２－１において貫通孔が設けられており、当該貫通孔に負側電力供給パターン３２－１および幅広導体部１１－１を電気的に接続するための接続電極４１－１が設けられている。同様に、負側電源パターン３４－１において接続電極４２－１、負側電力供給パターン３２－２において接続電極４１－２、負側電源パターン３４－２において接続電極４２－２がそれぞれ設けられている。そして、負側電力供給パターン３２－１と負側電源パターン３４－１とが、接続電極４２－１、幅広導体部１１－１、および接続電極４２－１を介して接続されている。同様に、負側電力供給パターン３２－２と負側電源パターン３４－２とが、接続電極４２－２、幅広導体部１１－２、および接続電極４２－２を介して接続されている。 (Connection electrode)
Further, the module substrate 10 is provided with a through hole in the negative power supply pattern 32-1, and the negative power supply pattern 32-1 and the wide conductor portion 11-1 are electrically connected to the through hole. A connection electrode 41-1 is provided. Similarly, a connection electrode 42-1 is provided in the negative power supply pattern 34-1; a connection electrode 41-2 is provided in the negative power supply pattern 32-2, and a connection electrode 42-2 is provided in the negative power supply pattern 34-2. Yes. The negative power supply pattern 32-1 and the negative power supply pattern 34-1 are connected via the connection electrode 42-1, the wide conductor portion 11-1, and the connection electrode 42-1. Similarly, the negative power supply pattern 32-2 and the negative power supply pattern 34-2 are connected through the connection electrode 42-2, the wide conductor portion 11-2, and the connection electrode 42-2.
　（フルブリッジ回路の回路図）
　図３は、本発明の実施形態１におけるフルブリッジ回路の回路図である。図３では、実装面に形成されたパターンと、裏面に形成された幅広導体部１１－１および幅広導体部１１－２との間に発生する寄生インダクタンスの相互作用（磁界キャンセルによる効果）を、相互インダクタンスＭとして表している。図３からも明らかなように、図３におけるＡ点およびＢ点は接続されておらず、幅広導体部１１－１および幅広導体部１１－２とは分離されている。 (Full bridge circuit diagram)
FIG. 3 is a circuit diagram of the full bridge circuit according to the first embodiment of the present invention. In FIG. 3, the interaction of parasitic inductance generated between the pattern formed on the mounting surface and the wide conductor portion 11-1 and the wide conductor portion 11-2 formed on the back surface (effect by magnetic field cancellation) This is expressed as mutual inductance M. As apparent from FIG. 3, the points A and B in FIG. 3 are not connected, and the wide conductor portion 11-1 and the wide conductor portion 11-2 are separated.
　（幅広導体部の幅）
　ここで、実装面に形成されたパターン（正側電力供給パターン３１－１、負側電力供給パターン３２－１など）の幅と、幅広導体部１１－１および幅広導体部１１－２の幅との関係について、図４を用いて説明する。なお、「幅」とは、モジュール基板１０の短手方向における長さを表している。 (Width of wide conductor)
Here, the widths of the patterns (positive power supply pattern 31-1, negative power supply pattern 32-1, etc.) formed on the mounting surface, and the widths of the wide conductor portion 11-1 and the wide conductor portion 11-2, The relationship will be described with reference to FIG. The “width” represents the length of the module substrate 10 in the short direction.
　図４は、本発明の実施形態１において、実装面に形成されたパターンの幅と幅広導体部の幅との関係を示すグラフである。図４のグラフの横軸は、幅広導体部の幅を、実装面に形成されたパターンの幅でノーマライズした値である。また、図４のグラフの縦軸は、裏面の幅広導体部が無い場合のインダクタンス値と、幅広導体部を設けてインダクタンスを低減させたときのインダクタンス値の比、即ち、幅広導体部を設けることによりインダクタンスがどの程度まで減少するのかを表す値である。 FIG. 4 is a graph showing the relationship between the width of the pattern formed on the mounting surface and the width of the wide conductor portion in the first embodiment of the present invention. The horizontal axis of the graph of FIG. 4 is a value obtained by normalizing the width of the wide conductor portion with the width of the pattern formed on the mounting surface. The vertical axis of the graph of FIG. 4 indicates the ratio of the inductance value when there is no wide conductor part on the back surface and the inductance value when the wide conductor part is provided to reduce the inductance, that is, the wide conductor part is provided. This is a value representing how much the inductance is reduced.
　図４に示すグラフから明らかなように、横軸の値が「１」より大きい場合、インダクタンスはより低減される。このことは、実装面に形成されたパターンに流れる電流が作る磁界を、幅広導体部に流れる電流が作る磁界が打ち消し、回路動作上、打ち消すことができない磁界によって発生した寄生インダクタンスのみが見えていることを示している。 As is apparent from the graph shown in FIG. 4, when the value on the horizontal axis is larger than “1”, the inductance is further reduced. This means that the magnetic field generated by the current flowing in the pattern formed on the mounting surface is canceled out by the magnetic field generated by the current flowing in the wide conductor, and only the parasitic inductance generated by the magnetic field that cannot be canceled in the circuit operation is visible. It is shown that.
　また、幅広導体部の幅が実装面に形成されたパターンの幅より狭くなるとともに、換言すると、横軸の値が「１」より小さくなるとともに、インダクタンスは低減されなくなる。このことは、実装面に形成されたパターンに流れる電流が作る磁界を、幅広導体部に流れる電流が作る磁界が打ち消すことができないことを示している。 In addition, the width of the wide conductor portion becomes narrower than the width of the pattern formed on the mounting surface. In other words, the value on the horizontal axis becomes smaller than “1” and the inductance is not reduced. This indicates that the magnetic field generated by the current flowing through the pattern formed on the mounting surface cannot be canceled out by the magnetic field generated by the current flowing through the wide conductor portion.
　より詳細に値を算出すると、幅広導体部の幅が実装面に形成されたパターンの幅の８０％以上であれば、縦軸の値が「０．３」以下、即ち、インダクタンスが０．３倍以下に低減されることになるので、回路動作上、寄生インダクタンスの影響は小さくなる。さらに、幅広導体部の幅が実装面に形成されたパターンの幅より広くなると、十分に寄生インダクタンスの影響を小さくすることができる。 When the value is calculated in more detail, if the width of the wide conductor portion is 80% or more of the width of the pattern formed on the mounting surface, the value on the vertical axis is “0.3” or less, that is, the inductance is 0.3. Therefore, the influence of the parasitic inductance is reduced on the circuit operation. Furthermore, when the width of the wide conductor portion is wider than the width of the pattern formed on the mounting surface, the influence of the parasitic inductance can be sufficiently reduced.
　一方、幅広導体部の幅が広すぎると、幅広導体部１１－１および幅広導体部１１－２を形成することは、実装面の回路パターンに重ねるように形成することになるので、回路パターンを形成する面および幅広導体部を形成する面に、それ以上の配線等を設けることができなくなる。換言すると、モジュール基板のパターン形成の自由度が制約されることになる。そのため、幅広導体部の幅は、スイッチング素子の幅方向の長さの２倍までとすることが好ましい。より好ましくは、１．５倍以内であれば、十分な磁界キャンセル効果が得られる。 On the other hand, if the wide conductor portion is too wide, the wide conductor portion 11-1 and the wide conductor portion 11-2 are formed so as to overlap the circuit pattern on the mounting surface. Further wiring or the like cannot be provided on the surface to be formed and the surface to form the wide conductor portion. In other words, the degree of freedom of pattern formation on the module substrate is limited. Therefore, the width of the wide conductor portion is preferably up to twice the length in the width direction of the switching element. More preferably, if it is within 1.5 times, a sufficient magnetic field canceling effect can be obtained.
　（フルブリッジ回路モジュール１における電流の流れ）
　図１を用いて、フルブリッジ回路モジュール１における電流の流れについて、説明する。 (Current flow in the full bridge circuit module 1)
A current flow in the full bridge circuit module 1 will be described with reference to FIG.
　例えば、出力パターン３３－１の出力が正、出力パターン３３－２の出力が負の場合、フルブリッジ回路モジュール１を流れる電流は、電流Ｉ－１、電流Ｉ－４、および電流Ｉ－５である。この状態から出力が反転すると、電流Ｉ－１に対する回生電流として電流Ｉ－２および電流Ｉ－３が流れ、電流Ｉ－４および電流Ｉ－５に対する回生電流として電流Ｉ－６が流れる。 For example, when the output of the output pattern 33-1 is positive and the output of the output pattern 33-2 is negative, the currents flowing through the full bridge circuit module 1 are current I-1, current I-4, and current I-5. is there. When the output is inverted from this state, current I-2 and current I-3 flow as regenerative current for current I-1, and current I-6 flows as regenerative current for current I-4 and current I-5.
　ここで、電流Ｉ－２と電流Ｉ－３とは、流れる向きが逆なので、電流Ｉ－２によって発生する磁界と、電流Ｉ－３によって発生する磁界とは、互いに打ち消し合う。また、電流Ｉ－１と電流Ｉ－３とは、流れる向きが同じであり、また、電流Ｉ－１から電流Ｉ－３へは連続的に変化するため、電流Ｉ－１によって発生する磁界から電流Ｉ－３によって発生する磁界へは大きな変化がなく、磁界の乱れは小さい。 Here, since the currents I-2 and I-3 flow in opposite directions, the magnetic field generated by the current I-2 and the magnetic field generated by the current I-3 cancel each other. In addition, the current I-1 and the current I-3 have the same flowing direction, and the current I-1 to the current I-3 continuously change. Therefore, the current I-1 and the current I-3 are changed from the magnetic field generated by the current I-1. There is no significant change in the magnetic field generated by the current I-3, and the disturbance of the magnetic field is small.
　また、電流Ｉ－４と電流Ｉ－５とは、流れる向きが逆なので、電流Ｉ－４によって発生する磁界と、電流Ｉ－５によって発生する磁界とは、互いに打ち消し合う。また、電流Ｉ－５と電流Ｉ－６とは、流れる向きが同じであり、また、電流Ｉ－５から電流Ｉ－６へは連続的に変化するため、電流Ｉ－５によって発生する磁界から電流Ｉ－６によって発生する磁界へは大きな変化がなく、磁界の乱れは小さい。 Also, since the currents I-4 and I-5 flow in opposite directions, the magnetic field generated by the current I-4 and the magnetic field generated by the current I-5 cancel each other. Further, the current I-5 and the current I-6 have the same flowing direction and continuously change from the current I-5 to the current I-6. Therefore, from the magnetic field generated by the current I-5, There is no significant change in the magnetic field generated by the current I-6, and the disturbance of the magnetic field is small.
　（実施形態１の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１は、２つのハーフブリッジ回路を備えるフルブリッジ回路をモジュール基板１０に実装した回路モジュールであり、２つのハーフブリッジ回路は、モジュール基板１０の実装面に実装される。また、フルブリッジ回路モジュール１は、裏面には、ハーフブリッジ回路に対応する領域に幅広導体部１１－１および幅広導体部１１－１が形成されており、幅広導体部１１－１は、ハーフブリッジ回路への負側電源として機能し、負側電源パターン３４－１と接続電極４２－１を介して接続されている。そのため、フルブリッジ回路モジュール１が備える各ハーフブリッジ回路に対応する幅広導体部が形成されているため、互いのハーフブリッジ回路に発生する回生電流の影響を受けることがなく、寄生インダクタンスの抑制効果を高くすることができる。 (Advantages of Embodiment 1)
Thus, the full bridge circuit module 1 according to the present embodiment is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on the module substrate 10, and the two half bridge circuits are mounted on the module substrate 10. Mounted on the surface. Further, the full bridge circuit module 1 has a wide conductor portion 11-1 and a wide conductor portion 11-1 formed in a region corresponding to the half bridge circuit on the back surface. The wide conductor portion 11-1 It functions as a negative power supply to the circuit and is connected to the negative power supply pattern 34-1 via the connection electrode 42-1. Therefore, since the wide conductor portion corresponding to each half bridge circuit included in the full bridge circuit module 1 is formed, it is not affected by the regenerative current generated in each half bridge circuit, and the parasitic inductance can be suppressed. Can be high.
　また、フルブリッジ回路モジュール１では、負側電源パターン３４－１には、幅広導体部１１－１のハーフブリッジ回路に対応する領域を通って電力が供給される。同様に、負側電源パターン３４－２には、幅広導体部１１－２のハーフブリッジ回路に対応する領域を通って電力が供給される。そのため、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することを抑制できるので、寄生インダクタンスの抑制効果を高くすることができる。 Further, in the full bridge circuit module 1, power is supplied to the negative power supply pattern 34-1 through a region corresponding to the half bridge circuit of the wide conductor portion 11-1. Similarly, power is supplied to the negative power supply pattern 34-2 through a region corresponding to the half-bridge circuit of the wide conductor portion 11-2. As a result, the magnetic field can be prevented from changing due to the regenerative current generated when the switching element performs the switching operation, so that the parasitic inductance suppression effect can be increased.
　また、フルブリッジ回路モジュール１では、各ハーフブリッジ回路にそれぞれ対応する幅広導体部１１－１および幅広導体部１１－２が形成されているため、実装面の配置によって、幅広導体部１１－１と幅広導体部１１－２とを異なる電位のパターンに接続することができる。 Further, in the full bridge circuit module 1, the wide conductor portion 11-1 and the wide conductor portion 11-2 respectively corresponding to each half bridge circuit are formed. The wide conductor portion 11-2 can be connected to patterns having different potentials.
　また、フルブリッジ回路モジュール１では、負側電力供給パターン３２－１を接地させることにより、接地されているパターンの面積が広くなる。そのため、回路を安定して動作させることができる。 Further, in the full bridge circuit module 1, the area of the grounded pattern is widened by grounding the negative power supply pattern 32-1. Therefore, the circuit can be stably operated.
　〔実施形態２〕
　本発明の他の実施形態（実施形態２）について、図５および図６に基づいて説明する。 [Embodiment 2]
Another embodiment (second embodiment) of the present invention will be described with reference to FIGS. 5 and 6.
　図５は、本発明の実施形態２におけるフルブリッジ回路の回路図である。本実施形態では、図５に示すように、正側電力供給パターン３１－１と負側電力供給パターン３２－１との間、および正側電力供給パターン３１－２と負側電力供給パターン３２－２との間に、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２を配置している。 FIG. 5 is a circuit diagram of a full bridge circuit according to the second embodiment of the present invention. In the present embodiment, as shown in FIG. 5, between the positive power supply pattern 31-1 and the negative power supply pattern 32-1, and between the positive power supply pattern 31-2 and the negative power supply pattern 32-1. 2, a bypass capacitor 23-1 and a bypass capacitor 23-2 are arranged respectively.
　図６は、本発明の実施形態２に係るフルブリッジ回路モジュール１ａの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ａにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ａの断面図である。 6A and 6B are diagrams showing the structure of the full bridge circuit module 1a according to the second embodiment of the present invention. FIG. 6A is a top view of the mounting surface of the full bridge circuit module 1a, and FIG. It is sectional drawing of the bridge circuit module 1a.
　上述したように、フルブリッジ回路モジュール１ａでは、図６に示すように、正側電力供給パターン３１－１と負側電力供給パターン３２－１との間、および正側電力供給パターン３１－２と負側電力供給パターン３２－２との間に、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２を配置している。バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２は、それぞれ、半田等の従来の技術を用いて、各導電パターンに接続可能である。 As described above, in the full bridge circuit module 1a, as shown in FIG. 6, between the positive power supply pattern 31-1 and the negative power supply pattern 32-1, and between the positive power supply pattern 31-2 and A bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively disposed between the negative power supply pattern 32-2. Each of the bypass capacitor 23-1 and the bypass capacitor 23-2 can be connected to each conductive pattern using a conventional technique such as solder.
　（実施形態２の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ａは、ハーフブリッジ回路への負側電源として機能する負側電源パターン３４－１および負側電源パターン３４－２と、負側電源パターン３４－１および負側電源パターン３４－２の極性とは異なる極性の電源として機能する正側電力供給パターン３１－１および正側電力供給パターン３１－２とが、それぞれ、容量接続されている。そのため、スイッチング素子がスイッチング動作をした場合の高周波ノイズを、好適に低減させることができる。また、スイッチング動作時の高周波ノイズを低減させることにより、スイッチング動作時に発生する磁界を打ち消すこともできるため、寄生インダクタンスの抑制効果を高くすることができる。 (Advantages of Embodiment 2)
As described above, the full bridge circuit module 1a according to the present embodiment includes the negative power supply pattern 34-1 and the negative power supply pattern 34-2 that function as the negative power supply to the half bridge circuit, and the negative power supply pattern 34-. The positive power supply pattern 31-1 and the positive power supply pattern 31-2 that function as a power supply having a polarity different from that of the first power supply pattern 34-2 and the negative power supply pattern 34-2 are capacitively connected. Therefore, high frequency noise when the switching element performs a switching operation can be suitably reduced. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
　〔実施形態３〕
　本発明のさらに他の実施形態（実施形態３）について、図７および図８に基づいて説明する。 [Embodiment 3]
Still another embodiment (Embodiment 3) of the present invention will be described with reference to FIGS.
　図７は、本発明の実施形態３におけるフルブリッジ回路の回路図である。本実施形態では、図７に示す回路図のように、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２は、互いの位置が近くなるように配置されている。 FIG. 7 is a circuit diagram of a full bridge circuit according to Embodiment 3 of the present invention. In the present embodiment, as shown in the circuit diagram of FIG. 7, the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged so that their positions are close to each other.
　図８は、本発明の実施形態３に係るフルブリッジ回路モジュール１ｂの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｂにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｂの断面図である。 8A and 8B are diagrams showing the structure of the full bridge circuit module 1b according to the third embodiment of the present invention. FIG. 8A is a top view of the mounting surface of the full bridge circuit module 1b, and FIG. It is sectional drawing of the bridge circuit module 1b.
　上述したように、フルブリッジ回路モジュール１ｂでは、図８に示すように、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２は、互いの位置が近くなるように配置されている。そのため、スイッチング素子２１－１およびスイッチング素子２２－２を備えるハーフブリッジ回路側では、モジュール基板１０の最も中央に近い部分の導電パターンは、正側電力供給パターン３１－１になっている。また、正側電力供給パターン３１－１では、バイパスコンデンサ２３－１の一方の電極が半田付されているとともに、接続電極４１－１が形成されている。そのため、モジュール基板１０の最も端部に近い部分の導電パターンは、接続電極４１－１、幅広導体部１１－１、および接続電極４２－１を介して正側電力供給パターン３１－１に接続されているため、正側電源パターン３５－１になっている。さらに、幅広導体部１１－１と幅広導体部１１－２との電位が異なっている。 As described above, in the full bridge circuit module 1b, as shown in FIG. 8, the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged so that their positions are close to each other. Therefore, on the half bridge circuit side including the switching element 21-1 and the switching element 22-2, the conductive pattern in the portion closest to the center of the module substrate 10 is the positive power supply pattern 31-1. In the positive power supply pattern 31-1, one electrode of the bypass capacitor 23-1 is soldered and a connection electrode 41-1 is formed. Therefore, the portion of the conductive pattern closest to the end of the module substrate 10 is connected to the positive power supply pattern 31-1 via the connection electrode 41-1, the wide conductor portion 11-1, and the connection electrode 42-1. Therefore, the power supply pattern 35-1 is the positive side. Furthermore, the potentials of the wide conductor portion 11-1 and the wide conductor portion 11-2 are different.
　正側電源パターン３５－１では、スイッチング素子２１－１のドレインがダイボンドで接続され、スイッチング素子２１－１のソースがワイヤボンドで出力パターン３３－１に接続されている。また、負側電力供給パターン３２－１では、スイッチング素子２２－１のソースがワイヤボンドで接続され、バイパスコンデンサ２３－１の他方の電極が半田付されている。 In the positive power supply pattern 35-1, the drain of the switching element 21-1 is connected by die bonding, and the source of the switching element 21-1 is connected to the output pattern 33-1 by wire bonding. In the negative power supply pattern 32-1, the source of the switching element 22-1 is connected by wire bonding, and the other electrode of the bypass capacitor 23-1 is soldered.
　（実施形態３の利点）
　このように、本実施形態におけるフルブリッジ回路モジュール１ｂでは、フルブリッジ回路モジュール１ｂの中央付近において、バイパスコンデンサ２３－１とバイパスコンデンサ２３－２と位置が互いに近くなるように配置されている。そのため、上述した実施形態２におけるフルブリッジ回路モジュール１ａと同様、スイッチング動作時の高周波ノイズを低減させることができる上に、容易に配線することができる。 (Advantages of Embodiment 3)
As described above, in the full bridge circuit module 1b according to the present embodiment, the bypass capacitor 23-1 and the bypass capacitor 23-2 are arranged close to each other in the vicinity of the center of the full bridge circuit module 1b. Therefore, similarly to the full bridge circuit module 1a in the second embodiment described above, high-frequency noise during the switching operation can be reduced and wiring can be easily performed.
　また、幅広導体部１１－１および幅広導体部１１－２は、それぞれ異なる電位になるように接続されている。換言すると、幅広導体部は、正側電源または負側電源として機能する電源供給用パターンに接続させることができる。 Further, the wide conductor portion 11-1 and the wide conductor portion 11-2 are connected to have different potentials. In other words, the wide conductor portion can be connected to a power supply pattern that functions as a positive power source or a negative power source.
　〔実施形態４〕
　本発明のさらに他の実施形態（実施形態４）について、図９に基づいて説明する。 [Embodiment 4]
Still another embodiment (Embodiment 4) of the present invention will be described with reference to FIG.
　図９は、本発明の実施形態４に係るフルブリッジ回路モジュール１ｃの構造を示す斜視図である。上述の実施形態では、ハーフブリッジ回路のそれぞれに対向する領域に幅広導体部が形成されていたが、本実施形態では、フルブリッジ回路に対向する領域に幅広導体部１２が形成されている。また、負側電力供給パターン３２が、各ハーフブリッジ回路において共通になるように設けられている。さらに、正側電力供給パターン３１－１、出力パターン３３－１、および負側電源パターン３４－１が、図９に示すように形成されている。そのため、スイッチング素子２１－１およびスイッチング素子２２－１と、スイッチング素子２１－２およびスイッチング素子２２－２とは、ミラー反転の形になっている。より具体的には、２つのハーフブリッジ回路のうち一方のハーフブリッジ回路に実装された複数のスイッチング素子相互の接続と、他方のハーフブリッジ回路に実装された複数のスイッチング素子相互の接続とは、負側電力供給パターン３２を通る仮想軸に対して鏡像的な関係にある。なお、図９では、構造が分かりやすくなるよう、モジュール基板１０は省略している。 FIG. 9 is a perspective view showing the structure of a full bridge circuit module 1c according to Embodiment 4 of the present invention. In the above-described embodiment, the wide conductor portion is formed in the region facing each of the half-bridge circuits. However, in this embodiment, the wide conductor portion 12 is formed in the region facing the full-bridge circuit. Further, the negative power supply pattern 32 is provided so as to be common to the half bridge circuits. Further, a positive power supply pattern 31-1, an output pattern 33-1 and a negative power supply pattern 34-1 are formed as shown in FIG. Therefore, the switching element 21-1 and the switching element 22-1 and the switching element 21-2 and the switching element 22-2 are in the form of mirror inversion. More specifically, a connection between a plurality of switching elements mounted on one half bridge circuit of two half bridge circuits and a connection between a plurality of switching elements mounted on the other half bridge circuit are: There is a mirror image relationship with the virtual axis passing through the negative power supply pattern 32. In FIG. 9, the module substrate 10 is omitted so that the structure can be easily understood.
　（フルブリッジ回路モジュール１ｃにおける電流の流れ）
　図９を用いて、フルブリッジ回路モジュール１ｃにおける電流の流れについて、説明する。 (Current flow in the full bridge circuit module 1c)
The flow of current in the full bridge circuit module 1c will be described with reference to FIG.
　例えば、出力パターン３３－１の出力が正、出力パターン３３－２の出力が負の場合、フルブリッジ回路モジュール１ｃを流れる電流は、電流Ｉ－１ｃ、電流Ｉ－４ｃ、および電流Ｉ－５ｃである。この状態から出力が反転すると、電流Ｉ－１ｃに対する回生電流として電流Ｉ－２ｃおよび電流Ｉ－３ｃ、電流Ｉ－４ｃおよび電流Ｉ－５ｃに対する回生電流として電流Ｉ－６ｃが流れる。 For example, when the output of the output pattern 33-1 is positive and the output of the output pattern 33-2 is negative, the current flowing through the full bridge circuit module 1c is the current I-1c, the current I-4c, and the current I-5c. is there. When the output is inverted from this state, current I-2c and current I-3c flow as regenerative current for current I-1c, and current I-6c flows as regenerative current for current I-4c and current I-5c.
　ここで、電流Ｉ－２ｃと電流Ｉ－３ｃとは、流れる向きが逆なので、電流Ｉ－２ｃによって発生する磁界と、電流Ｉ－３ｃによって発生する磁界とは、互いに打ち消し合う。また、電流は連続的に変化するため、電流Ｉ－１ｃによって発生する磁界から電流Ｉ－３ｃによって発生する磁界へは大きな変化がなく、磁界の乱れは小さい。 Here, since the currents I-2c and I-3c flow in opposite directions, the magnetic field generated by the current I-2c and the magnetic field generated by the current I-3c cancel each other. Further, since the current changes continuously, there is no significant change from the magnetic field generated by the current I-1c to the magnetic field generated by the current I-3c, and the magnetic field disturbance is small.
　また、電流Ｉ－４ｃと電流Ｉ－５ｃとは、流れる向きが逆なので、電流Ｉ－４ｃによって発生する磁界と、電流Ｉ－５ｃによって発生する磁界とは、互いに打ち消し合う。また、電流Ｉ－５ｃと電流Ｉ－６ｃとは、流れる向きが同じであり、また、電流Ｉ－５ｃから電流Ｉ－６ｃへは連続的に変化するため、電流Ｉ－５ｃによって発生する磁界から電流Ｉ－６ｃによって発生する磁界へは大きな変化がなく、磁界の乱れは小さい。 Further, since the current I-4c and the current I-5c flow in opposite directions, the magnetic field generated by the current I-4c and the magnetic field generated by the current I-5c cancel each other. Further, the current I-5c and the current I-6c flow in the same direction and continuously change from the current I-5c to the current I-6c. Therefore, from the magnetic field generated by the current I-5c, There is no significant change in the magnetic field generated by the current I-6c, and the disturbance of the magnetic field is small.
　（実施形態４の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｃは、２つのハーフブリッジ回路への負側電源として機能する負側電力供給パターン３２を、２つのハーフブリッジ回路において共通のパターンとして有している。また、裏面には、フルブリッジ回路に対応する領域に幅広導体部１２が形成されており、幅広導体部１２は、負側電力供給パターン３２と接続電極４１を介して接続されている。また、負側電力供給パターン３２には、幅広導体部１２の領域のうち、ハーフブリッジ回路の各々に対応する領域を通って電源が供給される。そのため、フルブリッジ回路モジュール１ｃは、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することを抑制できるので、寄生インダクタンスの抑制効果を高くすることができる。 (Advantages of Embodiment 4)
As described above, the full bridge circuit module 1c according to the present embodiment has the negative power supply pattern 32 that functions as a negative power supply to the two half bridge circuits as a common pattern in the two half bridge circuits. Yes. Further, the wide conductor portion 12 is formed on the back surface in a region corresponding to the full bridge circuit, and the wide conductor portion 12 is connected to the negative power supply pattern 32 via the connection electrode 41. In addition, power is supplied to the negative power supply pattern 32 through a region corresponding to each of the half bridge circuits in the region of the wide conductor portion 12. Therefore, the full bridge circuit module 1c can suppress the change of the magnetic field due to the regenerative current generated when the switching element performs the switching operation, and thus can increase the parasitic inductance suppression effect.
　また、本実施形態では、負側電力供給パターン３２を、２つのハーフブリッジ回路において共通のパターンとしたが、スイッチング素子および実装面のパターンの配置を変更し、正側電力供給パターンを共通のパターンとしてもよい。 In this embodiment, the negative power supply pattern 32 is a common pattern in the two half-bridge circuits. However, the arrangement of the switching element and the pattern on the mounting surface is changed, and the positive power supply pattern is the common pattern. It is good.
　また、フルブリッジ回路モジュール１ｃでは、負側電力供給パターン３２を接地させることにより、幅広導体部１２が接地され、接地されているパターンの面積が広くなる。そのため、回路を安定して動作させることができる。 Further, in the full bridge circuit module 1c, by grounding the negative power supply pattern 32, the wide conductor portion 12 is grounded, and the area of the grounded pattern is widened. Therefore, the circuit can be stably operated.
　〔実施形態５〕
　本発明のさらに他の実施形態（実施形態５）について、図１０および図１１に基づいて説明する。 [Embodiment 5]
Still another embodiment (Embodiment 5) of the present invention will be described with reference to FIGS.
　図１０は、本発明の実施形態５におけるフルブリッジ回路の回路図である。本実施形態では、図１０に示すように、正側電力供給パターン３１－１と負側電力供給パターン３２との間、および正側電力供給パターン３１－２と負側電力供給パターン３２との間に、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２を配置している。 FIG. 10 is a circuit diagram of a full bridge circuit according to the fifth embodiment of the present invention. In the present embodiment, as shown in FIG. 10, between the positive power supply pattern 31-1 and the negative power supply pattern 32, and between the positive power supply pattern 31-2 and the negative power supply pattern 32. Further, a bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively arranged.
　図１１は、本発明の実施形態５に係るフルブリッジ回路モジュール１ｄの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｄにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｄの断面図である。 11A and 11B are diagrams showing the structure of a full bridge circuit module 1d according to Embodiment 5 of the present invention. FIG. 11A is a top view of the mounting surface of the full bridge circuit module 1d, and FIG. It is sectional drawing of the bridge circuit module 1d.
　上述したように、フルブリッジ回路モジュール１ｄでは、図１１に示すように、正側電力供給パターン３１－１と負側電力供給パターン３２との間、および正側電力供給パターン３１－２と負側電力供給パターン３２との間に、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２を配置している。 As described above, in the full bridge circuit module 1d, as shown in FIG. 11, between the positive power supply pattern 31-1 and the negative power supply pattern 32, and between the positive power supply pattern 31-2 and the negative power supply pattern 32. Between the power supply pattern 32, a bypass capacitor 23-1 and a bypass capacitor 23-2 are respectively arranged.
　本実施形態では、幅広導体部１２は、負側電力供給パターン３２から接続電極４１を介して負側電源電位が与えられる。また、フルブリッジ回路モジュール１ｄは左右対称に配置されているため、スイッチング素子２１－１、スイッチング素子２１－２、スイッチング素子２２－１、およびスイッチング素子２２－２は、それぞれミラー対称のチップを使用する。 In the present embodiment, the wide conductor portion 12 is given a negative power supply potential from the negative power supply pattern 32 via the connection electrode 41. Since the full bridge circuit module 1d is symmetrically arranged, the switching element 21-1, the switching element 21-2, the switching element 22-1 and the switching element 22-2 each use a mirror-symmetric chip. To do.
　（実施形態５の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｄでは、スイッチング素子２１－１およびスイッチング素子２２－１のスイッチング動作によって流れる回生電流は、幅広導体部１２の領域のうち、接続電極４１と接続電極４２－１との間に限定される。同様に、スイッチング素子２１－２およびスイッチング素子２２－２のスイッチング動作によって流れる回生電流は、幅広導体部１２の領域のうち、接続電極４１と接続電極４２－２との間に限定される。そのため、幅広導体部１２が各ハーフブリッジ回路に対応して分離されていない構成であっても、各ハーフブリッジ回路において、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することを抑制できるので、寄生インダクタンスの抑制効果を高くすることができる。 (Advantages of Embodiment 5)
As described above, in the full bridge circuit module 1d according to the present embodiment, the regenerative current flowing by the switching operation of the switching element 21-1 and the switching element 22-1 is connected to the connection electrode 41 in the region of the wide conductor portion 12. It is limited to the electrode 42-1. Similarly, the regenerative current flowing by the switching operation of the switching element 21-2 and the switching element 22-2 is limited between the connection electrode 41 and the connection electrode 42-2 in the region of the wide conductor portion 12. Therefore, even in the configuration in which the wide conductor portion 12 is not separated corresponding to each half bridge circuit, the magnetic field is changed by the regenerative current generated when the switching element performs the switching operation in each half bridge circuit. Therefore, the effect of suppressing parasitic inductance can be increased.
　さらに、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２によって、スイッチング動作時の高周波ノイズを低減させることができる。 Furthermore, high-frequency noise during switching operation can be reduced by the bypass capacitor 23-1 and the bypass capacitor 23-2.
　〔実施形態６〕
　本発明のさらに他の実施形態（実施形態６）について、図１２に基づいて説明する。 [Embodiment 6]
Still another embodiment (Embodiment 6) of the present invention will be described with reference to FIG.
　図１２は、本発明の実施形態６に係るフルブリッジ回路モジュール１ｅの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｅにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｅの断面図である。図１２に示すように、フルブリッジ回路モジュール１ｅは、実施形態３におけるフルブリッジ回路モジュール１ｂの構成において、各スイッチング素子を縦型からラテラル型に変更し、各スイッチング素子の接続方法をダイボンドおよびワイヤボンドからフリップチップ接続に変更したものである。 12A and 12B are diagrams showing the structure of a full bridge circuit module 1e according to Embodiment 6 of the present invention. FIG. 12A is a top view of the mounting surface of the full bridge circuit module 1e, and FIG. It is sectional drawing of the bridge circuit module 1e. As shown in FIG. 12, in the full bridge circuit module 1e in the configuration of the full bridge circuit module 1b in the third embodiment, each switching element is changed from a vertical type to a lateral type, and the connection method of each switching element is changed to a die bond and a wire. This is a change from bond to flip chip connection.
　スイッチング素子２１－１ａおよびスイッチング素子２２－１ａはハイサイドのスイッチング素子であり、スイッチング素子２１－２ａおよびスイッチング素子２２－２ａはローサイドのスイッチング素子である。各スイッチング素子は、ＧａＮ　ＨＥＭＴといったラテラル型の素子であり、表面にソース、ドレイン、およびゲートの電極が形成されている。また、各スイッチング素子は、フリップチップ接続に適するよう、突起電極が形成されている。例えば、スイッチング素子２１－１ａであれば、正側電源パターン３５－１にドレイン電極、出力パターン３３－１にソース電極を接続している。なお、各スイッチング素子のゲート電極については、図示を省略している。 Switching element 21-1a and switching element 22-1a are high-side switching elements, and switching element 21-2a and switching element 22-2a are low-side switching elements. Each switching element is a lateral type element such as GaN HEMT, and a source electrode, a drain electrode, and a gate electrode are formed on the surface. Each switching element is provided with a protruding electrode so as to be suitable for flip chip connection. For example, in the case of the switching element 21-1a, the drain electrode is connected to the positive power supply pattern 35-1, and the source electrode is connected to the output pattern 33-1. Note that illustration of the gate electrode of each switching element is omitted.
　（実施形態６の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｅでは、ラテラル型のスイッチング素子をフリップチップ接続することにより、動作時の電流の分布する範囲がモジュール基板１０の表面付近に限定されるので、磁界キャンセルをより効率的に発生させることができる。 (Advantages of Embodiment 6)
As described above, in the full bridge circuit module 1e according to the present embodiment, the lateral distribution range is limited to the vicinity of the surface of the module substrate 10 by flip-chip connecting the lateral type switching elements. Magnetic field cancellation can be generated more efficiently.
　〔実施形態７〕
　本発明のさらに他の実施形態（実施形態７）について、図１３に基づいて説明する。 [Embodiment 7]
Still another embodiment (Embodiment 7) of the present invention will be described with reference to FIG.
　図１３は、本発明の実施形態７に係るフルブリッジ回路モジュール１ｆの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｆにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｆの断面図である。図１３に示すように、フルブリッジ回路モジュール１ｆは、実施形態５におけるフルブリッジ回路モジュール１ｄの構成において、各スイッチング素子を縦型からラテラル型に変更し、各スイッチング素子の接続方法をダイボンドおよびワイヤボンドからフリップチップ接続に変更したものである。 13A and 13B are diagrams showing the structure of a full bridge circuit module 1f according to Embodiment 7 of the present invention. FIG. 13A is a top view of the mounting surface of the full bridge circuit module 1f, and FIG. It is sectional drawing of the bridge circuit module 1f. As shown in FIG. 13, in the full bridge circuit module 1f of the configuration of the full bridge circuit module 1d in the fifth embodiment, each switching element is changed from a vertical type to a lateral type, and the connection method of each switching element is changed to a die bond and a wire. This is a change from bond to flip chip connection.
　本実施形態では、フルブリッジ回路モジュール１ｆは左右対称に配置されているため、スイッチング素子２１－１ａ、スイッチング素子２１－２ａ、スイッチング素子２２－１ａ、およびスイッチング素子２２－２ａは、それぞれミラー対称のチップを使用する。 In the present embodiment, since the full bridge circuit module 1f is arranged symmetrically, the switching element 21-1a, the switching element 21-2a, the switching element 22-1a, and the switching element 22-2a are mirror symmetrical. Use a tip.
　（実施形態７の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｆでは、負側電力供給パターン３２が各ハーフブリッジ回路において共通であり、裏面にフルブリッジ回路の領域に対応する幅広導体部１２が形成されている場合であっても、ラテラル型のスイッチング素子をフリップチップ接続することにより、動作時の電流の分布する範囲がモジュール基板１０の表面付近に限定されるので、磁界キャンセルをより効率的に発生させることができる。 (Advantages of Embodiment 7)
Thus, in the full bridge circuit module 1f according to the present embodiment, the negative power supply pattern 32 is common to each half bridge circuit, and the wide conductor portion 12 corresponding to the region of the full bridge circuit is formed on the back surface. Even in the case where the lateral type switching element is flip-chip connected, the current distribution range during operation is limited to the vicinity of the surface of the module substrate 10, so that magnetic field cancellation is generated more efficiently. be able to.
　〔実施形態８〕
　本発明のさらに他の実施形態（実施形態８）について、図１４および図１５に基づいて説明する。 [Embodiment 8]
Still another embodiment (Embodiment 8) of the present invention will be described with reference to FIGS.
　図１４は、本発明の実施形態８におけるフルブリッジ回路の回路図である。また、図１５は、本発明の実施形態８に係るフルブリッジ回路モジュール１ｇの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｇにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｇの断面図である。本実施形態では、実施形態６におけるフルブリッジ回路モジュール１ｅにおける各スイッチング素子を、カスコード接続している。例えば、各スイッチング素子がＧａＮ　ＨＥＭＴ等のラテラル型素子がデプレッション型である場合、エンハンスメント型のＭＯＳトランジスタをカスコード接続することによって、フルブリッジ回路をエンハンスメント型として動作させることができる。 FIG. 14 is a circuit diagram of a full bridge circuit according to the eighth embodiment of the present invention. FIG. 15 is a view showing the structure of the full bridge circuit module 1g according to the eighth embodiment of the present invention. FIG. 15A is a top view of the mounting surface of the full bridge circuit module 1g, and FIG. FIG. 2 is a cross-sectional view of a full bridge circuit module 1g. In this embodiment, each switching element in the full bridge circuit module 1e in the sixth embodiment is cascode-connected. For example, when each of the switching elements is a lateral type element such as GaN HEMT, the full bridge circuit can be operated as an enhancement type by cascode connection of enhancement type MOS transistors.
　（スイッチング素子）
　スイッチング素子２１－１Ｍおよびスイッチング素子２１－２Ｍはハイサイドのエンハンスメント型のスイッチング素子であり、ＭＯＳトランジスタなどを用いている。スイッチング素子２１－１Ｓおよびスイッチング素子２１－２Ｓはハイサイドのデプレッション型のスイッチング素子であり、ＧａＮ　ＨＥＭＴなどを用いている。スイッチング素子２２－１Ｍおよびスイッチング素子２２－２Ｍはローサイドのエンハンスメント型のスイッチング素子であり、ＭＯＳトランジスタなどを用いている。スイッチング素子２２－１Ｓおよびスイッチング素子２２－２Ｓはローサイドのデプレッション型のスイッチング素子であり、ＧａＮ　ＨＥＭＴなどを用いている。各スイッチング素子は、表面にソース、ドレイン、およびゲートの電極が形成されている。また、各スイッチング素子は、フリップチップ接続に適するよう、突起電極が形成されている。 (Switching element)
The switching elements 21-1M and 21-2M are high-side enhancement type switching elements, and use MOS transistors or the like. The switching element 21-1S and the switching element 21-2S are high-side depletion type switching elements, and GaN HEMTs or the like are used. The switching elements 22-1M and 22-2M are low-side enhancement type switching elements, and use MOS transistors or the like. The switching element 22-1S and the switching element 22-2S are low-side depletion type switching elements, and GaN HEMTs or the like are used. Each switching element has source, drain, and gate electrodes formed on the surface. Each switching element is provided with a protruding electrode so as to be suitable for flip chip connection.
　（回路の接続）
　フルブリッジ回路モジュール１ｇの一方のハーフブリッジ回路の接続について、以下に説明する。 (Circuit connection)
The connection of one half bridge circuit of the full bridge circuit module 1g will be described below.
　正側電力供給パターン３１－１には、バイパスコンデンサ２３－１の一方の電極が接続されるとともに、接続電極４１－１を介して幅広導体部１１－１に正側電源電位が与えられる。正側電源パターン３５－１には、幅広導体部１１－１から接続電極４２－１を介して正側電源電位が与えられ、さらに、スイッチング素子２１－１Ｓのドレインが接続される。スイッチング素子２１－１Ｓのソースは、パターン３６－１を介して、カスコード接続されるスイッチング素子２１－１Ｍのドレインに接続される。スイッチング素子２１－１Ｍのソースは、出力パターン３３－１に接続され、出力パターン３３－１には、スイッチング素子２２－１Ｓのドレインも接続される。スイッチング素子２２－１Ｓのソースは、パターン３７－１を介して、カスコード接続されるスイッチング素子２２－１Ｍのドレインに接続される。スイッチング素子２２－１Ｍのソースは、負側電力供給パターン３２－１に接続され、負側電力供給パターン３２－１にはバイパスコンデンサ２３－１の他方の電極が接続される。 One electrode of the bypass capacitor 23-1 is connected to the positive power supply pattern 31-1, and a positive power supply potential is applied to the wide conductor portion 11-1 through the connection electrode 41-1. The positive power supply pattern 35-1 is supplied with a positive power supply potential from the wide conductor portion 11-1 via the connection electrode 42-1, and further connected to the drain of the switching element 21-1S. The source of the switching element 21-1S is connected to the drain of the cascode-connected switching element 21-1M via the pattern 36-1. The source of the switching element 21-1M is connected to the output pattern 33-1, and the drain of the switching element 22-1S is also connected to the output pattern 33-1. The source of the switching element 22-1S is connected to the drain of the cascode-connected switching element 22-1M through the pattern 37-1. The source of the switching element 22-1M is connected to the negative power supply pattern 32-1, and the other electrode of the bypass capacitor 23-1 is connected to the negative power supply pattern 32-1.
　続いて、フルブリッジ回路モジュール１ｇの他方のハーフブリッジ回路の接続について、以下に説明する。 Subsequently, the connection of the other half bridge circuit of the full bridge circuit module 1g will be described below.
　負側電力供給パターン３２－２には、バイパスコンデンサ２３－２の一方の電極が接続されるとともに、接続電極４１－２を介して幅広導体部１１－２に負側電源電位が与えられる。負側電源パターン３４－２には、幅広導体部１１－２から接続電極４２－２を介して負側電源電位が与えられ、スイッチング素子２２－２Ｍのソースが接続される。スイッチング素子２２－２Ｍのドレインは、パターン３７ー２を介して、カスコード接続されるスイッチング素子２２－２Ｓのソースに接続される。スイッチング素子２２－２Ｓのドレインは、出力パターン３３－２に接続され、出力パターン３３－２には、スイッチング素子２１－２Ｍのソースも接続される。スイッチング素子２１－２Ｍのドレインは、パターン３６－２を介して、カスコード接続されるスイッチング素子２１－２Ｓのソースに接続される。スイッチング素子２１－２Ｓのドレインは、正側電力供給パターン３１－２に接続され、正側電力供給パターン３１－２にはバイパスコンデンサ２３－２の他方の電極が接続される。 One electrode of the bypass capacitor 23-2 is connected to the negative power supply pattern 32-2, and a negative power supply potential is applied to the wide conductor portion 11-2 through the connection electrode 41-2. The negative power supply pattern 34-2 is supplied with a negative power supply potential from the wide conductor portion 11-2 via the connection electrode 42-2, and is connected to the source of the switching element 22-2M. The drain of the switching element 22-2M is connected to the source of the cascode-connected switching element 22-2S through the pattern 37-2. The drain of the switching element 22-2S is connected to the output pattern 33-2, and the source of the switching element 21-2M is also connected to the output pattern 33-2. The drain of the switching element 21-2M is connected to the source of the cascode-connected switching element 21-2S through the pattern 36-2. The drain of the switching element 21-2S is connected to the positive power supply pattern 31-2, and the other electrode of the bypass capacitor 23-2 is connected to the positive power supply pattern 31-2.
　（実施形態８の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｇは、カスコード接続することによって、素子数が増えたり配線長が長くなったりする場合であっても、寄生インダクタンスの抑制効果を高くすることができる。 (Advantages of Embodiment 8)
As described above, the full bridge circuit module 1g according to the present embodiment can increase the parasitic inductance suppression effect by cascode connection even when the number of elements is increased or the wiring length is increased. it can.
　〔実施形態９〕
　本発明のさらに他の実施形態（実施形態９）について、図１６および図１７に基づいて説明する。 [Embodiment 9]
Still another embodiment (Embodiment 9) of the present invention will be described with reference to FIGS.
　図１６は、本発明の実施形態９におけるフルブリッジ回路の回路図である。また、図１７は、本発明の実施形態９に係るフルブリッジ回路モジュール１ｈの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｈにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｈの断面図である。本実施形態では、実施形態２におけるフルブリッジ回路モジュール１ａの構成に加えて、電力を供給するパターンについても磁界キャンセル効果が高まる構成になっている。また、スイッチング素子は、上述した実施形態において説明した、フリップチップ接続が可能なスイッチング素子を用いている。 FIG. 16 is a circuit diagram of a full bridge circuit according to the ninth embodiment of the present invention. FIG. 17 is a view showing the structure of the full bridge circuit module 1h according to the ninth embodiment of the present invention. FIG. 17A is a top view of the mounting surface of the full bridge circuit module 1h. FIG. FIG. 3 is a cross-sectional view of the full bridge circuit module 1h. In the present embodiment, in addition to the configuration of the full bridge circuit module 1a in the second embodiment, the magnetic field canceling effect is enhanced for the pattern for supplying power. The switching element is the switching element that can be flip-chip connected as described in the above-described embodiment.
　フルブリッジ回路モジュール１ｈでは、実装面に、正側電力供給パターン３１－１および正側電力供給パターン３１－２を接続する正側電力分配パターン３１－３が形成されている。正側電力分配パターン３１－３は、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２の近傍において、正側電力供給パターン３１－１および正側電力供給パターン３１－２に接続される。 In the full bridge circuit module 1h, a positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface. Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively.
　また、フルブリッジ回路モジュール１ｈでは、２つのハーフブリッジ回路に対応する領域に加えて、幅広導体部１１－１および幅広導体部１１－２を接続する負側電力分配パターン１１－３が裏面に形成されている。また、負側電力分配パターン１１－３は、それぞれ、接続電極４１－１および接続電極４１－２の近傍において、幅広導体部１１－１および幅広導体部１１－２に接続される。なお、図１７では、幅広導体部の幅を太く図示しているが、本実施形態は、幅広導体部の幅を太くすることに限定されるものではない。 Further, in the full bridge circuit module 1h, in addition to the regions corresponding to the two half bridge circuits, a negative power distribution pattern 11-3 connecting the wide conductor portion 11-1 and the wide conductor portion 11-2 is formed on the back surface. Has been. The negative power distribution pattern 11-3 is connected to the wide conductor portion 11-1 and the wide conductor portion 11-2 in the vicinity of the connection electrode 41-1 and the connection electrode 41-2, respectively. In FIG. 17, the width of the wide conductor portion is illustrated to be thick, but the present embodiment is not limited to increasing the width of the wide conductor portion.
　正側電力分配パターン３１－３および負側電力分配パターン１１－３には、それぞれ、任意の位置において分岐された正側電力供給源パターン５１および負側電力供給源パターン５２が含まれている。正側電力分配パターン３１－３および負側電力分配パターン１１－３は、それぞれ、実装面および裏面に形成されており、図１７に示すように、実装面の上面図において互いの領域が重なるように形成されている。さらに、正側電力供給源パターン５１および負側電力供給源パターン５２も同様に、実装面の上面図において互いの領域が重なるように形成されている。すなわち、フルブリッジ回路モジュール１ｈの配置は、スタックトペアー構造と呼ばれる配置である。 The positive power distribution pattern 31-3 and the negative power distribution pattern 11-3 include a positive power supply pattern 51 and a negative power supply pattern 52 that are branched at arbitrary positions, respectively. The positive-side power distribution pattern 31-3 and the negative-side power distribution pattern 11-3 are formed on the mounting surface and the back surface, respectively, so that the regions overlap each other in the top view of the mounting surface as shown in FIG. Is formed. Further, the positive power supply pattern 51 and the negative power supply pattern 52 are similarly formed so that their regions overlap each other in the top view of the mounting surface. That is, the arrangement of the full bridge circuit module 1h is an arrangement called a stacked pair structure.
　（実施形態９の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｈでは、ハーフブリッジ回路の各々に対応する領域に導電パターンが形成されているため、実装面のパターンと導電パターンとがモジュール基板１０の表と裏とに形成されている。そのため、スタックトペアー構造を形成することが容易であり、スタックトペアー構造を形成することにより、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することをより好適に抑制できる。 (Advantages of Embodiment 9)
As described above, in the full bridge circuit module 1h according to the present embodiment, the conductive pattern is formed in the region corresponding to each of the half bridge circuits. It is formed on the back. Therefore, it is easy to form a stacked pair structure, and by forming the stacked pair structure, it is possible to more suitably suppress the change of the magnetic field due to the regenerative current generated when the switching element performs a switching operation. .
　〔実施形態１０〕
　本発明のさらに他の実施形態（実施形態１０）について、図１８および図１９に基づいて説明する。 [Embodiment 10]
Still another embodiment (Embodiment 10) of the present invention will be described with reference to FIGS.
　図１８は、本発明の実施形態１０におけるフルブリッジ回路の回路図である。また、図１９は、本発明の実施形態１０に係るフルブリッジ回路モジュール１ｉの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｉにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｉの断面図である。本実施形態では、実施形態６におけるフルブリッジ回路モジュール１ｅの構成に加えて、電力を供給するパターンについても磁界キャンセル効果が高まる構成になっている。 FIG. 18 is a circuit diagram of a full bridge circuit according to the tenth embodiment of the present invention. FIG. 19 is a view showing the structure of the full bridge circuit module 1i according to the tenth embodiment of the present invention. FIG. 19 (a) is a top view of the mounting surface of the full bridge circuit module 1i. FIG. 3 is a cross-sectional view of the full bridge circuit module 1i. In the present embodiment, in addition to the configuration of the full bridge circuit module 1e in the sixth embodiment, the magnetic field canceling effect is enhanced for the pattern for supplying power.
　フルブリッジ回路モジュール１ｉでは、実装面に、正側電力供給パターン３１－１および正側電力供給パターン３１－２を接続する正側電力分配パターン３１－３が形成されている。正側電力分配パターン３１－３は、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２の近傍において、正側電力供給パターン３１－１および正側電力供給パターン３１－２に接続される。正側電力供給パターン３１－１および正側電力供給パターン３１－２は何れも実装面に形成されたパターンであるため、容易に接続することができる。 In the full bridge circuit module 1i, the positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface. Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively. Since both the positive power supply pattern 31-1 and the positive power supply pattern 31-2 are patterns formed on the mounting surface, they can be easily connected.
　また、フルブリッジ回路モジュール１ｉでは、２つのハーフブリッジ回路に対応する領域に加えて、接続電極４３および幅広導体部１１－２を接続する負側電力分配パターン１１－３が形成されている。幅広導体部１１－２は、それぞれ、バイパスコンデンサ２３－１および接続電極４１－２の近傍において、接続電極４３および幅広導体部１１－２に接続される。なお、図１９では、幅広導体部の幅を太く図示しているが、本実施形態は、幅広導体部の幅を太くすることに限定されるものではない。 Further, in the full bridge circuit module 1i, in addition to the regions corresponding to the two half bridge circuits, a negative power distribution pattern 11-3 for connecting the connection electrode 43 and the wide conductor portion 11-2 is formed. The wide conductor portion 11-2 is connected to the connection electrode 43 and the wide conductor portion 11-2 in the vicinity of the bypass capacitor 23-1 and the connection electrode 41-2, respectively. In FIG. 19, the width of the wide conductor portion is shown thick, but the present embodiment is not limited to increasing the width of the wide conductor portion.
　正側電力分配パターン３１－３および負側電力分配パターン１１－３は、それぞれ、図１９に示すように、実装面の上面図において互いに重なる領域において、正側電力供給源パターン５１および負側電力供給源パターン５２に分岐している。このように、フルブリッジ回路モジュール１ｉの配置も、スタックトペアー構造である。 As shown in FIG. 19, each of the positive power distribution pattern 31-3 and the negative power distribution pattern 11-3 has a positive power supply pattern 51 and a negative power in a region overlapping each other in the top view of the mounting surface. Branches to the supply source pattern 52. Thus, the arrangement of the full bridge circuit module 1i also has a stacked pair structure.
　（実施形態１０の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｉは、上述した実施形態９におけるフルブリッジ回路モジュール１ｈと同様、スタックトペアー構造を形成することが容易であるうえに、実装面が正側電源電位、裏面が負側電源電位となっており、さらに素子の配置が対象であるため、容易に実装面を負側電源電位、裏面を正側電源電位にすることができる。 (Advantages of Embodiment 10)
As described above, the full bridge circuit module 1i according to the present embodiment is easy to form a stacked pair structure as well as the full bridge circuit module 1h according to the ninth embodiment described above, and the mounting surface is the positive side. Since the power supply potential and the back surface are negative power supply potentials and the elements are to be arranged, the mounting surface can be easily set to the negative power supply potential and the back surface can be set to the positive power supply potential.
　〔実施形態１１〕
　本発明のさらに他の実施形態（実施形態１１）について、図２０および図２１に基づいて説明する。 [Embodiment 11]
Still another embodiment (Embodiment 11) of the present invention will be described with reference to FIGS.
　図２０は、本発明の実施形態１１におけるフルブリッジ回路の回路図である。また、図２１は、本発明の実施形態１１に係るフルブリッジ回路モジュール１ｊの構造を示す図であり、（ａ）は、フルブリッジ回路モジュール１ｊにおける実装面の上面図であり、（ｂ）は、フルブリッジ回路モジュール１ｊの断面図である。本実施形態では、実施形態７におけるフルブリッジ回路モジュール１ｆの構成に加えて、電力を供給するパターンについても磁界キャンセル効果が高まる構成になっている。 FIG. 20 is a circuit diagram of a full bridge circuit according to the eleventh embodiment of the present invention. FIG. 21 is a diagram showing the structure of the full bridge circuit module 1j according to the eleventh embodiment of the present invention. FIG. 21A is a top view of the mounting surface of the full bridge circuit module 1j. FIG. FIG. 3 is a cross-sectional view of the full bridge circuit module 1j. In the present embodiment, in addition to the configuration of the full bridge circuit module 1f in the seventh embodiment, the magnetic field canceling effect is enhanced for the pattern for supplying power.
　フルブリッジ回路モジュール１ｊでは、実装面に、正側電力供給パターン３１－１および正側電力供給パターン３１－２を接続する正側電力分配パターン３１－３が形成されている。正側電力分配パターン３１－３は、それぞれ、バイパスコンデンサ２３－１およびバイパスコンデンサ２３－２の近傍において、正側電力供給パターン３１－１および正側電力供給パターン３１－２に接続される。 In the full bridge circuit module 1j, the positive power distribution pattern 31-3 that connects the positive power supply pattern 31-1 and the positive power supply pattern 31-2 is formed on the mounting surface. Positive power distribution pattern 31-3 is connected to positive power supply pattern 31-1 and positive power supply pattern 31-2 in the vicinity of bypass capacitor 23-1 and bypass capacitor 23-2, respectively.
　また、フルブリッジ回路モジュール１ｊでは、接続電極４１の近傍において、幅広導体部１２から分岐した負側電力供給源パターン５２が形成されている。幅広導体部１２は、２つのハーフブリッジ回路において共通するため、負側電力分配パターンは省略されている。この接続は一点接地と呼ばれる接続方法である。この接続により、それぞれのハーフブリッジ回路における回生電流の流れる向きを限定させることができる。 In the full bridge circuit module 1j, a negative power supply pattern 52 branched from the wide conductor portion 12 is formed in the vicinity of the connection electrode 41. Since the wide conductor portion 12 is common to the two half-bridge circuits, the negative power distribution pattern is omitted. This connection is a connection method called single-point grounding. This connection can limit the direction of regenerative current flowing in each half-bridge circuit.
　さらに、図２１に示すように、実装面の上面図において、負側電力供給源パターン５２と正側電力分配パターン３１－３とが互いに重なる領域に、正側電力分配パターン３１－３から分岐した正側電力供給源パターン５１が形成されている。このように、フルブリッジ回路モジュール１ｊの配置も、スタックトペアー構造である。 Furthermore, as shown in FIG. 21, in the top view of the mounting surface, the negative power supply pattern 52 and the positive power distribution pattern 31-3 branch from the positive power distribution pattern 31-3 to a region where they overlap each other. A positive power supply pattern 51 is formed. Thus, the arrangement of the full bridge circuit module 1j also has a stacked pair structure.
　（実施形態１１の利点）
　このように、本実施形態に係るフルブリッジ回路モジュール１ｉは、負側電力供給パターン３２が各ハーフブリッジ回路において共通であり、裏面にフルブリッジ回路の領域に対応する幅広導体部１２が形成されている場合であっても、スタックトペアー構造を容易に形成することができる。 (Advantages of Embodiment 11)
Thus, in the full bridge circuit module 1i according to the present embodiment, the negative power supply pattern 32 is common to each half bridge circuit, and the wide conductor portion 12 corresponding to the region of the full bridge circuit is formed on the back surface. Even in such a case, a stacked pair structure can be easily formed.
　上述の実施形態では、モジュール基板１０の両面にパターンを形成した場合について説明したが、本発明はこれに限定されず、モジュール基板１０に多層配線基板を用いてもよい。例えば、モジュール基板１０に４層基板を用い、４層基板の表面層と表面層の下の層とにパターンを形成しても、本願と同様の効果が得られることは明らかである。 In the above-described embodiment, the case where patterns are formed on both surfaces of the module substrate 10 has been described. However, the present invention is not limited to this, and a multilayer wiring substrate may be used for the module substrate 10. For example, it is clear that the same effects as those of the present application can be obtained even when a four-layer substrate is used for the module substrate 10 and a pattern is formed on the surface layer of the four-layer substrate and the layer below the surface layer.
　〔まとめ〕
　本発明の態様１に係る回路モジュール（フルブリッジ回路モジュール１、１ａ、１ｂ、１ｅ、１ｇ、１ｈ、１ｉ）は、２つのハーフブリッジ回路を備えるフルブリッジ回路を基板（モジュール基板１０）に実装した回路モジュールにおいて、上記２つのハーフブリッジ回路は、上記基板の一方の主面（実装面）に実装され、上記２つのハーフブリッジ回路の各々について、上記基板の一方の主面には、上記ハーフブリッジ回路への正側電源または負側電源として機能する電源供給用パターン（負側電源パターン３４－１、３４－２、正側電源パターン３５－１）が形成されており、上記基板の他の主面（裏面）には、上記ハーフブリッジ回路に対応する領域に導電パターン（幅広導体部１１－１、１１－２）が形成されており、上記導電パターンは、上記電源供給用パターンと接続されている。 [Summary]
The circuit module (full bridge circuit module 1, 1a, 1b, 1e, 1g, 1h, 1i) according to aspect 1 of the present invention has a full bridge circuit including two half bridge circuits mounted on a substrate (module substrate 10). In the circuit module, the two half-bridge circuits are mounted on one main surface (mounting surface) of the substrate, and each of the two half-bridge circuits has the half-bridge on the one main surface of the substrate. Power supply patterns (negative power supply patterns 34-1 and 34-2, positive power supply pattern 35-1) functioning as a positive power source or a negative power source for the circuit are formed. On the surface (back surface), conductive patterns (wide conductor portions 11-1 and 11-2) are formed in a region corresponding to the half-bridge circuit. Down it is connected to the power supply pattern.
　上記の構成によれば、本態様に係る回路モジュールは、回路モジュールが備える各ハーフブリッジ回路に対応する幅広導体部が形成されているため、互いのハーフブリッジ回路に発生する回生電流の影響を受けることがなく、寄生インダクタンスの抑制効果を高くすることができる。 According to said structure, since the wide conductor part corresponding to each half bridge circuit with which a circuit module is provided is formed in the circuit module which concerns on this aspect, it receives to the influence of the regenerative current which generate | occur | produces in a mutual half bridge circuit. Therefore, the parasitic inductance suppression effect can be increased.
　本発明の態様２に係る回路モジュールは、上記態様１において、上記電源供給用パターンには、上記導電パターンの上記ハーフブリッジ回路の各々に対応する領域を通って電力が供給されてもよい。 In the circuit module according to aspect 2 of the present invention, in the aspect 1, power may be supplied to the power supply pattern through a region corresponding to each of the half bridge circuits of the conductive pattern.
　上記の構成によれば、本態様に係る回路モジュールは、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することを抑制できるので、寄生インダクタンスの抑制効果を高くすることができる。 According to said structure, since the circuit module which concerns on this aspect can suppress that a magnetic field changes with the regenerative current which generate | occur | produces when a switching element performs switching operation, it can make the suppression effect of parasitic inductance high. .
　本発明の態様３に係る回路モジュールは、上記態様１または２において、上記電源供給用パターンと、上記電源供給用パターンの極性とは異なる極性の電源として機能するパターン（正側電力供給パターン３１－１、３１－２、負側電力供給パターン３２－１、３２－２）とが容量接続されていてもよい。 A circuit module according to aspect 3 of the present invention is the circuit module according to aspect 1 or 2, wherein the power supply pattern and a pattern functioning as a power source having a polarity different from the polarity of the power supply pattern (positive power supply pattern 31- 1 and 31-2 and negative power supply patterns 32-1 and 32-2) may be capacitively connected.
　上記の構成によれば、本態様に係る回路モジュールは、スイッチング素子がスイッチング動作をした場合の高周波ノイズを、好適に低減させることができる。また、スイッチング動作時の高周波ノイズを低減させることにより、スイッチング動作時に発生する磁界を打ち消すこともできるため、寄生インダクタンスの抑制効果を高くすることができる。 According to the above configuration, the circuit module according to this aspect can suitably reduce high-frequency noise when the switching element performs a switching operation. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
　本発明の態様４に係る回路モジュール（フルブリッジ回路モジュール１ｃ、１ｄ、１ｆ、１ｊ）は、２つのハーフブリッジ回路を備えるフルブリッジ回路を基板（モジュール基板１０）に実装した回路モジュールにおいて、上記２つのハーフブリッジ回路は、上記基板の一方の主面（実装面）に実装され、上記基板の一方の主面には、上記２つのハーフブリッジ回路への正側電源または負側電源として機能する電源供給用パターン（負側電力供給パターン３２）を、上記２つのハーフブリッジ回路において共通のパターンとして有しており、上記基板の他の主面（裏面）には、上記フルブリッジ回路に対応する領域に導電パターン（幅広導体部１２）が形成されており、上記導電パターンは、上記電源供給用パターンと接続されており、上記電源供給用パターンには、上記導電パターンの領域のうち、上記ハーフブリッジ回路の各々に対応する領域を通って電力が供給される。 The circuit module (full bridge circuit modules 1c, 1d, 1f, 1j) according to aspect 4 of the present invention is a circuit module in which a full bridge circuit including two half bridge circuits is mounted on a substrate (module substrate 10). Two half-bridge circuits are mounted on one main surface (mounting surface) of the substrate, and a power source that functions as a positive power source or a negative power source for the two half-bridge circuits is mounted on one main surface of the substrate. A supply pattern (negative power supply pattern 32) is provided as a common pattern in the two half-bridge circuits, and a region corresponding to the full-bridge circuit is provided on the other main surface (back surface) of the substrate. Is formed with a conductive pattern (wide conductor portion 12), and the conductive pattern is connected to the power supply pattern. The power supply pattern, in the region of the conductive pattern, the power is supplied through a region corresponding to each of the half-bridge circuit.
　上記の構成によれば、本態様に係る回路モジュールは、導電パターンが各ハーフブリッジ回路に対応して分離されていない構成であっても、各ハーフブリッジ回路において、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することを抑制できるので、寄生インダクタンスの抑制効果を高くすることができる。 According to the above configuration, in the circuit module according to this aspect, even when the conductive pattern is not separated corresponding to each half bridge circuit, the switching element performs a switching operation in each half bridge circuit. Since it is possible to suppress the magnetic field from being changed by the regenerative current generated at, the parasitic inductance suppression effect can be enhanced.
　本発明の態様５に係る回路モジュールは、上記態様４において、上記電源供給用パターンと、上記電源供給用パターンの極性とは異なる極性の電源として機能するパターン（正側電力供給パターン３１－１、３１－２）とが容量接続されていてもよい。 The circuit module according to Aspect 5 of the present invention is the circuit module according to Aspect 4, wherein the power supply pattern and a pattern functioning as a power source having a polarity different from the polarity of the power supply pattern (positive power supply pattern 31-1, 31-2) may be capacitively connected.
　上記の構成によれば、本態様に係る回路モジュールは、導電パターンが各ハーフブリッジ回路に対応して分離されていない構成であっても、スイッチング素子がスイッチング動作をした場合の高周波ノイズを、好適に低減させることができる。また、スイッチング動作時の高周波ノイズを低減させることにより、スイッチング動作時に発生する磁界を打ち消すこともできるため、寄生インダクタンスの抑制効果を高くすることができる。 According to the above configuration, the circuit module according to this aspect is suitable for high-frequency noise when the switching element performs a switching operation, even when the conductive pattern is not separated corresponding to each half-bridge circuit. Can be reduced. Moreover, since the magnetic field generated during the switching operation can be canceled by reducing the high-frequency noise during the switching operation, the effect of suppressing the parasitic inductance can be enhanced.
　本発明の態様６に係る回路モジュールは、上記態様４または５において、上記導電パターンは、接地されていてもよい。 In the circuit module according to aspect 6 of the present invention, in the aspect 4 or 5, the conductive pattern may be grounded.
　上記の構成によれば、本態様に係る回路モジュールは、接地されているパターンの面積が広いため、回路を安定して動作させることができる。 According to the above configuration, since the circuit module according to this aspect has a large area of the grounded pattern, the circuit can be stably operated.
　本発明の態様７に係る回路モジュールは、上記態様４～６の何れかにおいて、上記２つのハーフブリッジ回路のうち一方のハーフブリッジ回路に実装された複数のスイッチング素子相互の接続と、他方のハーフブリッジ回路に実装された複数のスイッチング素子相互の接続とは、上記電源供給用パターンを通る仮想軸に対して鏡像的な関係にあってもよい。 A circuit module according to Aspect 7 of the present invention is the circuit module according to any one of Aspects 4 to 6, wherein a plurality of switching elements mounted on one half bridge circuit of the two half bridge circuits are connected to each other and the other half bridge circuit is connected. A plurality of switching elements mounted on the bridge circuit may be connected to each other in a mirror image with respect to a virtual axis passing through the power supply pattern.
　上記の構成によれば、本態様に係る回路モジュールは、導電パターンが各ハーフブリッジ回路に対応して分離されていない構成であっても、各ハーフブリッジ回路において、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することを抑制できるので、寄生インダクタンスの抑制効果を高くすることができる。 According to the above configuration, in the circuit module according to this aspect, even when the conductive pattern is not separated corresponding to each half bridge circuit, the switching element performs a switching operation in each half bridge circuit. Since it is possible to suppress the magnetic field from being changed by the regenerative current generated at, the parasitic inductance suppression effect can be enhanced.
　本発明の態様８に係る回路モジュールは、上記態様１～７の何れかにおいて、上記電源供給用パターンは、スタックトペアー構造を有していてもよい。 In the circuit module according to aspect 8 of the present invention, in any of the above aspects 1 to 7, the power supply pattern may have a stacked pair structure.
　上記の構成によれば、本態様に係る回路モジュールは、スタックトペアー構造を有することにより、スイッチング素子がスイッチング動作をした場合に発生する回生電流によって磁界が変化することをより好適に抑制できる。 According to the above configuration, the circuit module according to this aspect has a stacked pair structure, and thus can more suitably suppress the change of the magnetic field due to the regenerative current generated when the switching element performs the switching operation.
　本発明は上述した各実施形態に限定されるものではなく、請求項に示した範囲で種々の変更が可能であり、異なる実施形態にそれぞれ開示された技術的手段を適宜組み合わせて得られる実施形態についても本発明の技術的範囲に含まれる。さらに、各実施形態にそれぞれ開示された技術的手段を組み合わせることにより、新しい技術的特徴を形成することができる。 The present invention is not limited to the above-described embodiments, and various modifications are possible within the scope shown in the claims, and embodiments obtained by appropriately combining technical means disclosed in different embodiments. Is also included in the technical scope of the present invention. Furthermore, a new technical feature can be formed by combining the technical means disclosed in each embodiment.
１、１ａ、１ｂ、１ｃ、１ｄ、１ｅ、１ｆ、１ｇ、１ｈ、１ｉ、１ｊ　フルブリッジ回路モジュール
１０　モジュール基板（基板）
１１－１、１１－２、１２　幅広導体部（導電パターン）
１１－３　負側電力分配パターン
２１－１、２１－１ａ、２１－１Ｍ、２１－１Ｓ、２１－２、２１－２ａ、２１－２Ｍ、２１－２Ｓ、２２－１、２２－１ａ、２２－１Ｍ、２２－１Ｓ、２２－２、２２－２ａ、２２－２Ｍ、２２－２Ｓ　スイッチング素子
２３－１、２３－２　バイパスコンデンサ
３１－１、３１－２　正側電力供給パターン
３１－３　正側電力分配パターン
３２、３２－１、３２－２　負側電力供給パターン
３３－１、３３－２　出力パターン
３４－１、３４－２　負側電源パターン（電源供給用パターン）
３５－１　正側電源パターン（電源供給用パターン）
４１、４１－１、４１－２、４２－１、４２－２、４３　接続電極
　　５１　正側電力供給源パターン
　　５２　負側電力供給源パターン 1, 1a, 1b, 1c, 1d, 1e, 1f, 1g, 1h, 1i, 1j Full bridge circuit module 10 Module substrate (substrate)
11-1, 11-2, 12 Wide conductor (conductive pattern)
11-3 Negative power distribution patterns 21-1, 21-1a, 21-1M, 21-1S, 21-2, 21-2a, 21-2M, 21-2S, 22-1, 22-1a, 22-2 1M, 22-1S, 22-2, 22-2a, 22-2M, 22-2S Switching elements 23-1, 23-2 Bypass capacitors 31-1, 31-2 Positive power supply pattern 31-3 Positive power Distribution pattern 32, 32-1, 32-2 Negative power supply pattern 33-1, 33-2 Output pattern 34-1, 34-2 Negative power supply pattern (power supply pattern)
35-1 Positive power supply pattern (Power supply pattern)
41, 41-1, 41-2, 42-1, 42-2, 43 Connecting electrode 51 Positive power supply pattern 52 Negative power supply pattern

Claims (5)

  1. 　２つのハーフブリッジ回路を備えるフルブリッジ回路を基板に実装した回路モジュールにおいて、
    　上記２つのハーフブリッジ回路は、上記基板の一方の主面に実装され、
    　上記２つのハーフブリッジ回路の各々について、
    　上記基板の一方の主面には、上記ハーフブリッジ回路への正側電源または負側電源として機能する電源供給用パターンが形成されており、
    　上記基板の他の主面には、上記ハーフブリッジ回路に対応する領域に導電パターンが形成されており、
    　上記導電パターンは、上記電源供給用パターンと接続されている、
    ことを特徴とする回路モジュール。     In a circuit module in which a full-bridge circuit having two half-bridge circuits is mounted on a substrate,
    The two half-bridge circuits are mounted on one main surface of the substrate,
    For each of the two half-bridge circuits,
    On one main surface of the substrate, a power supply pattern that functions as a positive power source or a negative power source for the half bridge circuit is formed.
    On the other main surface of the substrate, a conductive pattern is formed in a region corresponding to the half-bridge circuit,
    The conductive pattern is connected to the power supply pattern.
    A circuit module characterized by that.
  2. 　上記電源供給用パターンには、上記導電パターンの上記ハーフブリッジ回路の各々に対応する領域を通って電力が供給される、
    ことを特徴とする請求項１に記載の回路モジュール。     Power is supplied to the power supply pattern through a region corresponding to each of the half bridge circuits of the conductive pattern.
    The circuit module according to claim 1.
  3. 　上記電源供給用パターンと、上記電源供給用パターンの極性とは異なる極性の電源として機能するパターンとが容量接続されている、
    ことを特徴とする請求項１または２に記載の回路モジュール。     The power supply pattern and a pattern that functions as a power supply having a polarity different from the polarity of the power supply pattern are capacitively connected.
    The circuit module according to claim 1, wherein the circuit module is a circuit module.
  4. 　２つのハーフブリッジ回路を備えるフルブリッジ回路を基板に実装した回路モジュールにおいて、
    　上記２つのハーフブリッジ回路は、上記基板の一方の主面に実装され、
    　上記基板の一方の主面には、上記２つのハーフブリッジ回路への正側電源または負側電源として機能する電源供給用パターンを、上記２つのハーフブリッジ回路において共通のパターンとして有しており、
    　上記基板の他の主面には、上記フルブリッジ回路に対応する領域に導電パターンが形成されており、
    　上記導電パターンは、上記電源供給用パターンと接続されており、
    　上記電源供給用パターンには、上記導電パターンの領域のうち、上記ハーフブリッジ回路の各々に対応する領域を通って電力が供給される、
    ことを特徴とする回路モジュール。     In a circuit module in which a full-bridge circuit having two half-bridge circuits is mounted on a substrate,
    The two half-bridge circuits are mounted on one main surface of the substrate,
    One main surface of the substrate has a power supply pattern that functions as a positive power source or a negative power source for the two half bridge circuits as a common pattern in the two half bridge circuits.
    On the other main surface of the substrate, a conductive pattern is formed in a region corresponding to the full bridge circuit,
    The conductive pattern is connected to the power supply pattern,
    Power is supplied to the power supply pattern through a region corresponding to each of the half-bridge circuits in the conductive pattern region.
    A circuit module characterized by that.
  5. 　上記電源供給用パターンと、上記電源供給用パターンの極性とは異なる極性の電源として機能するパターンとが容量接続されている、
    ことを特徴とする請求項４に記載の回路モジュール。     The power supply pattern and a pattern that functions as a power supply having a polarity different from the polarity of the power supply pattern are capacitively connected.
    The circuit module according to claim 4.
PCT/JP2016/054875 2015-06-30 2016-02-19 Circuit module WO2017002390A1 (en)

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