WO2016180130A1 - 功放电路及其负载阻抗调制方法 - Google Patents

功放电路及其负载阻抗调制方法 Download PDF

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WO2016180130A1
WO2016180130A1 PCT/CN2016/078974 CN2016078974W WO2016180130A1 WO 2016180130 A1 WO2016180130 A1 WO 2016180130A1 CN 2016078974 W CN2016078974 W CN 2016078974W WO 2016180130 A1 WO2016180130 A1 WO 2016180130A1
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circuit
power
auxiliary
power amplifier
main
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PCT/CN2016/078974
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English (en)
French (fr)
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王晖
余敏德
王富强
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中兴通讯股份有限公司
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/04Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
    • H03F1/06Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
    • H03F1/07Doherty-type amplifiers

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  • the present invention relates to the field of amplifying circuits, and in particular to a power amplifier circuit and a load impedance modulation method thereof.
  • the power amplifier Since the RF signal processed by the power amplifier (hereinafter referred to as the power amplifier) is an envelope change signal having a peak-to-average ratio, in order to ensure the linearity of the RF signal, the power amplifier needs to operate in the back-off power state.
  • Doherty is a widely used high-efficiency power amplifier design technology. Its improved efficiency utilizes the principle of load impedance modulation, that is, when the high-power signal (hereinafter referred to as large signal) and the low-power signal (hereinafter referred to as small signal), the load impedance is different. .
  • the output of the main power amplifier circuit includes a first adjustment line 102 ′, and the output of the auxiliary power amplifier circuit includes a second.
  • the output of the adjustment line 104' and the doherty power amplifier circuit will include an output ⁇ /4 impedance conversion line 106' for a total of three transmission lines. Among them, since the output ⁇ /4 impedance conversion line 106' has a narrow frequency characteristic, the overall wide band of the doherty power amplifier circuit is limited.
  • a transformer-less load-modulated (TLLM) architecture is provided.
  • TLLM transformer-less load-modulated
  • FIG. 2 in order to increase the bandwidth of the doherty power amplifier circuit, the first adjustment line 102', the second adjustment line 104', and the output ⁇ /4 impedance transformation as shown in FIG. 1 are simultaneously deleted in the conventional TLLM architecture.
  • Line 106' In the related art, a transformer-less load-modulated (TLLM) architecture is provided.
  • TLLM transformer-less load-modulated
  • Fig. 1 It can be seen from Fig. 1 that after the two power amplifier tubes are respectively modulated, they need to be combined at point a (ie, the combined output point).
  • the traditional doherty power amplifier circuit sets the combined output point close to the peak road ( The position of the auxiliary road, the main road (main road) modulation circuit is connected to the point a through the first adjustment line 102'.
  • the traditional TLLM architecture can also keep the first adjustment line in the same way as the traditional doherty, the characteristic impedance of the first adjustment line will increase to 2z0 (ie, the impedance of the combined output point will be doubled).
  • the characteristic impedance of the first adjustment line will become 100 ⁇ , taking the RO4350 sheet with a dielectric thickness of 30 mil as an example, and the corresponding line width is only 0.34 mm. Adjusting the line width to a small size results in a reduced flow capacity, which means that the output power capability that can be carried is reduced.
  • the first adjustment line is removed, and there is still a problem in that the main circuit is difficult to debug. Because a modulation circuit needs to simultaneously consider the modulation of two impedance states, the number of times of repeated modulation in practice will be many.
  • the high-power load modulation at the 0dB back-off is performed.
  • the load impedance Zopt corresponding to the maximum power point of the main power amplifier tube is first modulated to 50 ⁇ ; and then the first adjustment line 102' is used to
  • the load impedance corresponding to the low power point at the XdB point is demodulated, and by adjusting the length of the first adjustment line 102', the impedance Zmod corresponding to the optimum efficiency point of the main power amplifier tube is modulated to 25 ⁇ .
  • the load impedance corresponding to point a is used as the characteristic impedance of the first adjustment line 102', so that the modulation state of Zopt is not destroyed in the Zmod modulation process.
  • the first adjustment line 102' is retained, and the traditional doherty main road design idea is followed.
  • the modulation process is: first, Zopt is modulated to 100 ⁇ , and then Zmod to 50 ⁇ is transformed by adjusting the length of the first adjustment line 102' having a characteristic impedance of 100 ⁇ .
  • the characteristic impedance of the first adjustment line 102' is increased, corresponding to a thinning of the line width, which will affect the output power capability of the power amplifier circuit.
  • the conventional TLLM selects the first adjustment line 102', the second adjustment line 104' and the output ⁇ /4 impedance conversion line 106' to be removed together, and uses the matching circuit to simultaneously complete the Zopt and Zmod impedance states.
  • the modulation causes the two matching circuits to be difficult to connect to point a (ie, the combined output point), which is basically not achievable.
  • the embodiment of the invention provides a power amplifier circuit and a load impedance modulation method thereof, so as to at least solve the technical problem that it is difficult to simplify the debugging process of the TLLM power amplifier when the bandwidth of the power amplifier circuit is taken into consideration in the related art.
  • a power amplifier circuit including: a main circuit power amplifying circuit for amplifying a power signal on a main circuit; and an auxiliary circuit power amplifying circuit as an auxiliary circuit of the main circuit power amplifying circuit, And amplifying the power signal on the auxiliary circuit, wherein the main circuit power amplifying circuit is connected to the auxiliary circuit power amplifying circuit to the combined output point through an adjusting line provided in the main circuit power amplifying circuit, and the combined output point For the parallel intersection of the main power amplifier circuit and the auxiliary power amplifier circuit, the adjustment line is used to match the load impedance of the main power amplifier tube in the main power amplifier circuit.
  • the main path power amplifying circuit includes: the main path power amplifier tube, the main path matching circuit, and the adjustment line, wherein an output end of the main path power amplifier tube is connected to an input end of the main path matching circuit, and the main path The output end of the matching circuit is connected to the input end of the adjusting line, and the output end of the adjusting line is connected to the combined output point;
  • the auxiliary circuit power amplifying circuit comprises: an auxiliary power amplifier tube and an auxiliary circuit matching circuit, and an output end of the auxiliary power amplifier tube Connected to the input end of the auxiliary circuit matching circuit, the output of the auxiliary circuit matching circuit is connected to the combined output point.
  • the auxiliary power amplifier circuit further includes: an input k ⁇ impedance conversion line connected to the input end of the auxiliary power amplifier tube for matching the load impedance of the auxiliary power amplifier tube in the auxiliary power amplifier circuit.
  • auxiliary power amplifier circuit is one or more.
  • the adjustment line is a microstrip transmission line.
  • microstrip transmission line includes a coplanar waveguide and a stepped microstrip transmission line.
  • the impedance of the combined output point is 50 ⁇ .
  • the characteristic impedance of the above adjustment line is 50 ⁇ .
  • the power amplifier circuit further includes: a power splitter connected to the main path power amplifying circuit and the auxiliary circuit power amplifying circuit respectively through the shunt input point, and configured to allocate the main path power amplifying circuit and the auxiliary circuit power amplifying circuit Corresponding power signal.
  • a load impedance modulation method for a power amplifier circuit comprising: corresponding to a back power point of a main power amplification circuit and a secondary power amplification circuit in any of the above power amplifier circuits
  • the load impedance is modulated; the load impedance corresponding to the high power point of the main power amplifier circuit and the auxiliary power amplifier circuit in the power amplifier circuit is modulated.
  • the above power amplifier circuit comprises: a TLLM Doherty power amplifier circuit.
  • the main circuit power amplifying circuit is used for amplifying the power signal on the main circuit;
  • the auxiliary circuit power amplifying circuit is used as an auxiliary circuit of the main circuit power amplifying circuit for amplifying the power signal on the auxiliary circuit, wherein
  • the main circuit power amplifying circuit is connected to the combined output point by the adjusting line set in the main circuit power amplifying circuit, and the auxiliary circuit power amplifying circuit is connected to the combined output point, and the combined output point is a parallel intersection of the main road power amplifying circuit and the auxiliary circuit power amplifying circuit.
  • the adjustment line is used to match the load impedance of the main power amplifier tube in the power amplifier circuit of the main circuit, and solves the technical problem that it is difficult to simplify the debugging process of the TLLM power amplifier when the broadband of the power amplifier circuit is taken into consideration in the related art, thereby achieving the maintenance of the original While the architecture has good broadband performance, it can also simplify the technical effect of debugging the TLLM power amplifier.
  • FIG. 1 is a circuit diagram of a power amplifier circuit according to the related art
  • FIG. 2 is a circuit diagram of another power amplifier circuit according to the related art
  • FIG. 3 is a circuit diagram of a power amplifier circuit in accordance with an embodiment of the present invention.
  • FIG. 4 is a flow chart of a load impedance modulation method of a power amplifier circuit in accordance with an embodiment of the present invention.
  • a power amplifier circuit is provided in this embodiment.
  • the circuit includes: a main circuit power amplifying circuit 10 for amplifying a power signal on the main circuit; and an auxiliary circuit power amplifying circuit 20 as a main path.
  • the auxiliary circuit of the power amplifying circuit 10 is for amplifying the power signal on the auxiliary circuit, wherein the main circuit power amplifying circuit 10 is connected to the auxiliary circuit power amplifying circuit 20 through the adjusting line 102 provided in the main circuit power amplifying circuit 10.
  • the circuit output point A, the combined output point A is the parallel intersection of the main circuit power amplifying circuit 10 and the auxiliary circuit power amplifying circuit 20, and the adjusting line 102 is used for matching the load impedance of the main power amplifier tube 104 in the main circuit power amplifying circuit 10. .
  • the auxiliary circuit power amplifying circuit 20 when the input power signal is a small signal, the auxiliary circuit power amplifying circuit 20 is in an open state, and the main circuit power amplifying circuit 10 operates separately; when the input power signal is a large signal, the auxiliary circuit power amplifying circuit 20 is at In the path state, the main path power amplifying circuit 10 and the auxiliary path power amplifying circuit 20 operate simultaneously.
  • the main power amplifier tube 104 in the main power amplifier circuit 10 matches the load impedance, the transmission line length of the adjustment line 102 needs to be adjusted.
  • the present invention only provides the adjustment line 102 in the main path power amplifying circuit 10, the corresponding adjustment line in the auxiliary path power amplifying circuit 20 is omitted, and the output having the frequency characteristic after the combined output point A is omitted.
  • the ⁇ /4 impedance conversion lines therefore, not only eliminate their influence on the bandwidth of the amplifier circuit, but also simplify the debugging process of the power amplifier circuit, achieving the technical effect of high achievability.
  • the key to the invention that the bandwidth is not affected is that there is no output ⁇ /4 impedance conversion line, which is not affected by the frequency characteristics, and the output ⁇ is removed from the TLLM architecture.
  • the output power capability of the power amplifier circuit of the present invention is different from the traditional doherty
  • the output power capability of the power amplifier circuit is the same; and, compared with the conventional TLLM power amplifier circuit, the key to the high achievability of the present invention is that an adjustment line 102 is added.
  • the power amplifier circuit of the present invention is added due to the added adjustment line 102.
  • the main (ie, the main power amplifying circuit 10) and the peak (ie, the auxiliary power amplifying circuit 20) can be easily combined to the combined output point, and therefore, has high achievability.
  • the main circuit power amplifying circuit is used for amplifying the power signal on the main circuit;
  • the auxiliary circuit power amplifying circuit is used as an auxiliary circuit of the main circuit power amplifying circuit for amplifying the power signal on the auxiliary circuit, wherein the main road
  • the power amplifying circuit is connected to the combined output point by the adjusting line set in the main circuit power amplifying circuit, and the auxiliary circuit power amplifying circuit is connected to the combined output point, and the combined output point is the parallel intersection of the main road power amplifying circuit and the auxiliary circuit power amplifying circuit, and the adjusting line
  • It is used to match the load impedance of the main power amplifier tube in the main circuit power amplifier circuit, and solves the technical problem that it is difficult to simplify the debugging process of the TLLM power amplifier when the broadband of the power amplifier circuit is taken into consideration in the related art, thereby achieving the maintenance of the original architecture.
  • the broadband performance is good, and the technical effect of debugging the TLLM power amplifier can be simplified.
  • the main power amplifier circuit 10 may include: a main power amplifier tube 104, a main circuit matching circuit 106, and an adjustment line 102, wherein an output end of the main power amplifier tube 104 is connected to the main road.
  • the output end of the matching circuit 106 is connected to the input end of the adjusting line 102, and the output end of the adjusting line 102 is connected to the combined output point A;
  • the auxiliary circuit power amplifying circuit 20 may include: an auxiliary power amplifier tube 204 and auxiliary path matching circuit 206, auxiliary road work
  • the output of the discharge pipe 204 is connected to the input of the auxiliary circuit matching circuit 206, and the output of the auxiliary circuit matching circuit 206 is connected to the combined output point A.
  • the auxiliary power amplifier circuit 20 may further include: an input k ⁇ impedance conversion line 202 connected to an input end of the auxiliary power amplifier tube 204 for the auxiliary power amplifier tube in the auxiliary power amplifier circuit 20. 204 matches the load impedance. Where k is a proportional coefficient of the ⁇ wavelength, and its value may be 1/4.
  • the input k ⁇ impedance conversion line 202 can be used to turn off the auxiliary path power amplifying circuit 20 when a small signal is input.
  • the input k ⁇ impedance conversion line 202 can also be used to align the phase of the auxiliary path power amplifying circuit 20 with the main path power amplifying circuit 10.
  • the auxiliary circuit power amplifying circuit may be one or more.
  • the present invention is not limited to application in two-way circuits, and can be applied to various two-way or two-way power amplifier circuit architectures.
  • the adjustment line may be a microstrip transmission line.
  • the microstrip transmission line comprises: a coplanar waveguide and a stepped microstrip transmission line.
  • the impedance of the combined output point is 50 ⁇ .
  • the characteristic impedance of the adjustment line is 50 ⁇ .
  • the adjustable range is generally between 25 ⁇ and 50 ⁇ .
  • the power amplifier circuit is suitable for wide bandwidth applications and can be widely used in various Doherty power amplifiers.
  • the power amplifier circuit further includes: a power splitter 30 connected to the main circuit power amplifying circuit 10 and the auxiliary circuit power amplifying circuit 20 through the shunt input points, respectively, for main channel power amplification Circuit 10 and secondary power amplifying circuit 20 assign respective power signals.
  • a power splitter 30 connected to the main circuit power amplifying circuit 10 and the auxiliary circuit power amplifying circuit 20 through the shunt input points, respectively, for main channel power amplification Circuit 10 and secondary power amplifying circuit 20 assign respective power signals.
  • the main and auxiliary circuits can evenly distribute the power signal; in the asymmetric power amplifier circuit, the main and auxiliary circuits can distribute the power signal according to a specific ratio.
  • the implementation manner of the embodiment of the invention is simple, and not only solves the problem that the power amplifier circuit, such as the power amplifier circuit of the traditional TLLM architecture, can be poorly implemented.
  • a load impedance modulation method of a power amplifier circuit is provided.
  • FIG. 4 is a flow chart of a load impedance modulation method of a power amplifier circuit according to an embodiment of the present invention. As shown in FIG. 4, the method includes the following steps:
  • Step S402 modulating the load impedance corresponding to the back-off power point of the main-path power amplifying circuit in the power amplifier circuit. Further, the load impedance corresponding to the back-off power point of the main power amplifier circuit and the auxiliary power amplifier circuit in the power amplifier circuit according to any one of the embodiments of the first embodiment can be modulated.
  • Step S404 modulating the load impedance corresponding to the high power point of the main power amplification circuit and the auxiliary power amplification circuit in the power amplifier circuit.
  • the load impedance modulation step of the embodiment may be performed by using a reverse sequence operation method, that is, step S402 is performed first, and then step S404 is performed.
  • the power amplifier circuit includes: a symmetric or asymmetric TLLM Doherty power amplifier circuit architecture.
  • the characteristic impedance of the adjustment line in the power amplifier circuit may be 50 ⁇ .
  • the matching order of the high power point (@0dB) load impedance Zopt and the matching back power point (@XdB) load impedance Zmod is compared, and the embodiment adopts reverse order matching. That is, first match the back-off power point load impedance Zmod, and then match the high-power point load impedance Zopt.
  • the load impedance modulation process of the traditional doherty power amplifier circuit is as follows:
  • the load impedance modulation process of the power amplifier circuit of the present invention (taking the doherty power amplifier circuit as an example) is as follows:
  • the reverse order matching of the embodiment of the present invention first performing back-off power point impedance matching, and performing impedance matching of Zmod to 50 ⁇ through the output matching circuit of the power amplifier; and further adjusting the line length of the adjusting line 102 to complete the maximum power point impedance. Match to achieve Zopt to 100 ⁇ impedance matching.
  • the load impedance of the back-off power point at the output junction point A is 50 ⁇ , so the characteristic impedance of the adjustment line is guaranteed to be 50 ⁇ .
  • the efficiency index of the doherty power amplifier circuit is closely related to the impedance matching state of the back-off power point.
  • the traditional Zmod impedance matching needs to be realized by adjusting the line length change, and needs to experience a high impedance transformation ratio (as shown in (2)). Limiting efficiency bandwidth.
  • the Zmod impedance matching is directly matched to 50 ⁇ (as shown in (3)), and the impedance transformation ratio is significantly reduced, which is advantageous for achieving a high efficiency design goal.
  • the Zmod and Zopt impedance matching is implemented in steps, and the latter step does not affect the matching process of the previous step, which greatly simplifies the debugging process.
  • the invention Compared with the debugging process of the traditional doherty power amplifier circuit, the invention not only ensures the same power output capability, improves the bandwidth, but also improves the overall efficiency.
  • the present invention can be applied to a variety of two-way or two-way symmetric or asymmetric Doherty power amplifier circuit architectures.
  • the two-way Doherty power amplifier circuit architecture shown in FIG. 3 is taken as an example, and the embodiments of the present invention are described in detail as follows:
  • impedance matching of Zmod to 50 ⁇ is achieved by a matching circuit.
  • the Zmod impedance is converted to 50 ⁇ by a combination of a stepped microstrip transmission line and a shunt capacitor using a smith chart or a simulation tool such as ADS.
  • the characteristic impedance of the adjustment line 102 is 50 ⁇ , and the length of the adjustment line 102 is changed to convert the Zopt impedance to a desired target impedance, such as 100 ⁇ in a symmetric doherty.
  • the implementation of the invention is simple, and not only solves the problem that the traditional TLLM architecture is poorly implementable, but the reverse order matching of the main path impedance matching further broadens the back-off power point matching bandwidth, and is more beneficial to the overall efficiency of the doherty.
  • the present invention inherits the advantage of removing the output ⁇ /4 impedance conversion line to widen the matching bandwidth in the TLLM architecture, and adopts the reverse order operation of the back-off power point and the high-power point impedance matching, so that the adjustment line 102 with the characteristic impedance of 50 ⁇ can be obtained.
  • the added benefit is that while maintaining the traditional TLLM broadband characteristics, it has the achievability that can be fully applied to the actual circuit. While achieving Zmod impedance matching, the impedance conversion ratio is significantly reduced, which helps to further improve the efficiency of the doherty power amplifier circuit.
  • the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, by hardware, but in many cases, the former is A better implementation.
  • the technical solution of the present invention which is essential or contributes to the prior art, may be embodied in the form of a software product stored in a storage medium (such as ROM/RAM, disk,
  • the optical disc includes a number of instructions for causing a terminal device (which may be a cell phone, a computer, a server, or a network device, etc.) to perform the methods described in various embodiments of the present invention.
  • Embodiments of the present invention also provide a storage medium.
  • the foregoing storage medium may be configured to store program code for performing the following steps:
  • the foregoing storage medium may include, but not limited to, a USB flash drive, a Read-Only Memory (ROM), a Random Access Memory (RAM), a mobile hard disk, and a magnetic memory.
  • ROM Read-Only Memory
  • RAM Random Access Memory
  • a mobile hard disk e.g., a hard disk
  • magnetic memory e.g., a hard disk
  • the foregoing embodiments of the present invention can be applied to the field of amplifying circuits, and solve the technical problem that it is difficult to simplify the debugging process of the TLLM power amplifier when the broadband of the power amplifier circuit is taken into consideration in the related art, thereby achieving the good broadband performance while maintaining the original architecture. At the same time, it can also simplify the technical effect of debugging the TLLM power amplifier.

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Abstract

一种功放电路及其负载阻抗调制方法,其中,该功放电路包括:主路功率放大电路(10),用于放大主电路上的功率信号;辅路功率放大电路(20),作为主路功率放大电路(10)的辅助电路,用于放大辅助电路上的功率信号,其中,主路功率放大电路(10)通过设置在主路功率放大电路(10)中的调整线(102),与辅路功率放大电路(20)连接于合路输出点(A),合路输出点(A)为主路功率放大电路(10)和辅路功率放大电路(20)的并联交汇点,调整线(102)用于为主路功率放大电路(10)中的主路功放管(104)匹配负载阻抗,解决了相关技术中在兼顾功放电路的宽带时,难以简化TLLM功放的调试过程的技术问题,进而达到了在保持原有架构宽带性能良好的同时,还可以简化TLLM功放的调试的技术效果。

Description

功放电路及其负载阻抗调制方法 技术领域
本发明涉及放大电路领域,具体而言,涉及一种功放电路及其负载阻抗调制方法。
背景技术
目前,为了提高频谱利用率,通信系统均采用线性调制技术。由于功率放大器(以下简称为功放)处理的射频信号都是具有峰均比的包络变化信号,为了保证射频信号的线性度,功放需要工作在回退功率状态。
目前,Doherty是被广泛采用的高效率功放设计技术,其提升效率利用的是负载阻抗调制原理,即大功率信号(以下简称大信号)和小功率信号(以下简称小信号)时,负载阻抗不同。
如图1所示,在传统TLLM doherty功放电路中,为了实现负载阻抗调制,主路功率放大电路的输出端会包含有第一调整线102’、辅路功率放大电路的输出端会包含有第二调整线104’和doherty功放电路的输出端会包含有输出λ/4阻抗变换线106’,共3段传输线。其中,由于输出λ/4阻抗变换线106’具有较窄的频率特性,限制了doherty功放电路的整体宽带。
在相关技术中,提供了无传输线负载调制(transformer-less load-modulated,简称为TLLM)架构。如图2所示,为了提升doherty功放电路的带宽,在传统的TLLM架构中同时删掉了如图1所示的第一调整线102’、第二调整线104’和输出λ/4阻抗变换线106’。但这种TLLM架构存在可实现性差和调试难度高的缺点。
由图1可以看出,两路功放管分别经过调制网络后,需要在a点(即合路输出点)进行合路,传统的doherty功放电路都是将合路输出点设置在靠近peak路(辅路)的位置,main路(主路)调制电路则通过第一调整线102’来连接到a点的。
然而,由于实际设计PCB时,受器件和匹配电路尺寸限制,两路功放管是间隔一定距离放置的,如图2所示,在TLLM架构的两路调制电路上都没有调整线的情况下,难以同时将两路调制电路连接到a点(即合路输出点)。而若通过Y型连接,则需要付出增大布局空间的代价。显然,在小型化需求越来越高的今天,这种布局不利于产品实现。虽然,传统TLLM架构也可以仿照传统doherty保留第一调整线,但此时第一调整线的特征阻抗将会提高到2z0(即合路输出点阻抗会提高两倍)。以两路对称doherty为例,第一调整线的特征阻抗将会变为100Ω,以介质厚度为30mil的RO4350板材为例,对应的线宽只有0.34mm。调整线线宽变细会导致通流能力降低,也就意味着可承载的输出功率能力降低。而传统TLLM架构中去掉第一调整线还存在main路调试难的问题,因为一个调制电路要同时兼顾两种阻抗状态的调制,实际中需要反复调制的次数将会很多。
另外,传统doherty功放电路的主路设计过程和调试过程如下:
先做0dB回退时的大功率负载调制,如附图1所示,先将主路功放管的最大功率点对应的负载阻抗Zopt调制到50Ω;然后再通过第一调整线102’来对回退XdB点处的低功率点对应的负载阻抗进行调制,通过调节第一调整线102’的长度,将主路功放管最佳效率点对应的阻抗Zmod调制到25Ω。选取最大功率时对应a点的负载阻抗来作为第一调整线102’的特征阻抗,可以保证Zmod调制过程中不会破坏到Zopt的调制状态。
传统TLLM架构中,如果去掉了如附图1所示的具有频率特性的影响带宽的输出λ/4阻抗变换线106’,却仍然保留第一调整线102’,并沿袭传统doherty主路设计思路,其调制过程是:先将Zopt调制到100Ω,然后通过调节特征阻抗为100Ω的第一调整线102’的长度来实现Zmod到50Ω的变换。第一调整线102’的特征阻抗提高,对应的是线宽变细,将会影响功放电路的输出功率能力。为了规避该问题,传统TLLM中选择将第一调整线102’,第二调整线104’和输出λ/4阻抗变换线106’一同去掉,采用依靠匹配电路来同时完成Zopt和Zmod两种阻抗状态的调制,导致两路匹配电路难连接到a点(即合路输出点),基本不具备可实现性。
针对上述的问题,目前尚未提出有效的解决方案。
发明内容
本发明实施例提供了一种功放电路及其负载阻抗调制方法,以至少解决相关技术中在兼顾功放电路的宽带时,难以简化TLLM功放的调试过程的技术问题。
根据本发明实施例的一个方面,提供了一种功放电路,包括:主路功率放大电路,用于放大主电路上的功率信号;辅路功率放大电路,作为上述主路功率放大电路的辅助电路,用于放大辅助电路上的功率信号,其中,上述主路功率放大电路通过设置在上述主路功率放大电路中的调整线,与上述辅路功率放大电路连接于合路输出点,上述合路输出点为上述主路功率放大电路和上述辅路功率放大电路的并联交汇点,上述调整线用于为上述主路功率放大电路中的主路功放管匹配负载阻抗。
进一步地,上述主路功率放大电路包括:上述主路功放管、主路匹配电路和上述调整线,其中,上述主路功放管的输出端连接至上述主路匹配电路的输入端,上述主路匹配电路的输出端连接至上述调整线的输入端,上述调整线的输出端连接至上述合路输出点;上述辅路功率放大电路包括:辅路功放管和辅路匹配电路,上述辅路功放管的输出端连接至上述辅路匹配电路输入端,上述辅路匹配电路输出端连接至上述合路输出点。
进一步地,上述辅路功率放大电路还包括:输入kλ阻抗变换线,连接至上述辅路功放管的输入端,用于为上述辅路功率放大电路中的上述辅路功放管匹配负载阻抗。
进一步地,上述辅路功率放大电路为一条或者多条。
进一步地,上述调整线为微带传输线。
进一步地,上述微带传输线包括:共面波导和阶梯式微带传输线。
进一步地,上述合路输出点的阻抗为50Ω。
进一步地,上述调整线的特征阻抗为50Ω。
进一步地,上述功放电路还包括:功率分配器,通过分路输入点分别连接至上述主路功率放大电路和上述辅路功率放大电路,用于为上述主路功率放大电路和上述辅路功率放大电路分配相应的功率信号。
根据本发明实施例的另一方面,提供了一种功放电路的负载阻抗调制方法,包括:对任一项上述的功放电路中的主路功率放大电路和辅路功率放大电路的回退功率点对应的负载阻抗进行调制;对上述功放电路中的主路功率放大电路和辅路功率放大电路的大功率点对应的负载阻抗进行调制。
进一步地,上述功放电路包括:TLLM Doherty功放电路。
通过本发明实施例,采用主路功率放大电路,用于放大主电路上的功率信号;辅路功率放大电路,作为主路功率放大电路的辅助电路,用于放大辅助电路上的功率信号,其中,主路功率放大电路通过设置在主路功率放大电路中的调整线,与辅路功率放大电路连接于合路输出点,合路输出点为主路功率放大电路和辅路功率放大电路的并联交汇点,调整线用于为主路功率放大电路中的主路功放管匹配负载阻抗,解决了相关技术中在兼顾功放电路的宽带时,难以简化TLLM功放的调试过程的技术问题,进而达到了在保持原有架构宽带性能良好的同时,还可以简化TLLM功放的调试的技术效果。
附图说明
此处所说明的附图用来提供对本发明的进一步理解,构成本申请的一部分,本发明的示意性实施例及其说明用于解释本发明,并不构成对本发明的不当限定。在附图中:
图1是根据相关技术的一种功放电路的电路图;
图2是根据相关技术的另一种功放电路的电路图;
图3是根据本发明实施例的功放电路的电路图;以及
图4是根据本发明实施例的功放电路的负载阻抗调制方法的流程图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。
需要说明的是,本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。
实施例1
在本实施例中提供了一种功放电路。
图3是根据本发明实施例的功放电路的电路图,如图3所示,该电路包括:主路功率放大电路10,用于放大主电路上的功率信号;辅路功率放大电路20,作为主路功率放大电路10的辅助电路,用于放大辅助电路上的功率信号,其中,主路功率放大电路10通过设置在主路功率放大电路10中的调整线102,与辅路功率放大电路20连接于合路输出点A,合路输出点A为主路功率放大电路10和辅路功率放大电路20的并联交汇点,调整线102用于为主路功率放大电路10中的主路功放管104匹配负载阻抗。
其中,实际应用时,当输入的功率信号为小信号时,辅路功率放大电路20处于开路状态,主路功率放大电路10单独工作;当输入的功率信号为大信号时,辅路功率放大电路20处于通路状态,主路功率放大电路10和辅路功率放大电路20同时工作。为主路功率放大电路10中的主路功放管104匹配负载阻抗时,需要调整调整线102的传输线长度。
由于本发明仅仅在主路功率放大电路10中设置了调整线102,而省去了辅路功率放大电路20中的相应的调整线,且省去了合路输出点A之后的具有频率特性的输出λ/4阻抗变换线,因此,不仅消除了它们对放大电路的带宽的影响,而且简化功放电路的调试流程,达到了高可实现性的技术效果。
其中,与如图2所示的传统的doherty功放电路相比,本发明可以保证带宽不受影响的关键在于无输出λ/4阻抗变换线,不受频率特性影响,继承TLLM架构中去掉输出λ/4阻抗变换线以拓宽匹配带宽的优点;而且调整线102的特征阻抗依然保持了50Ω,这与传统doherty功放电路中的特征阻抗一样,因此,本发明中功放电路的输出功率能力与传统doherty功放电路的输出功率能力相同;并且,与传统TLLM功放电路相比,本发明具有高可实现性的关键就在于多了一段调整线102,具体的,由于加入的调整线102,本发明功放电路中的main(即主路功率放大电路10)和peak(即辅路功率放大电路20)两路能很容易结合至合路输出点上,因此,具有高可实现性。
通过本发明,采用主路功率放大电路,用于放大主电路上的功率信号;辅路功率放大电路,作为主路功率放大电路的辅助电路,用于放大辅助电路上的功率信号,其中,主路功率放大电路通过设置在主路功率放大电路中的调整线,与辅路功率放大电路连接于合路输出点,合路输出点为主路功率放大电路和辅路功率放大电路的并联交汇点,调整线用于为主路功率放大电路中的主路功放管匹配负载阻抗,解决了相关技术中在兼顾功放电路的宽带时,难以简化TLLM功放的调试过程的技术问题,进而达到了在保持原有架构宽带性能良好的同时,还可以简化TLLM功放的调试的技术效果。
可选地,如图3所示,上述主路功率放大电路10可以包括:主路功放管104、主路匹配电路106和调整线102,其中,主路功放管104的输出端连接至主路匹配电路106的输入端,主路匹配电路106的输出端连接至调整线102的输入端,调整线102的输出端连接至合路输出点A;上述辅路功率放大电路20可以包括:辅路功放管204和辅路匹配电路206,辅路功 放管204的输出端连接至辅路匹配电路206输入端,辅路匹配电路206输出端连接至合路输出点A。
可选地,如图3所示,上述辅路功率放大电路20还可以包括:输入kλ阻抗变换线202,连接至辅路功放管204的输入端,用于为辅路功率放大电路20中的辅路功放管204匹配负载阻抗。其中,k为λ波长的比例系数,如其值可以为1/4。输入kλ阻抗变换线202可以用于在输入小信号时,关断辅路功率放大电路20。另外,输入kλ阻抗变换线202还可以用于使得辅路功率放大电路20与主路功率放大电路10的相位对齐。
可选地,辅路功率放大电路可以为一条或者多条。换言之,本发明不局限应用在两路电路中,可应用于各种两路或两路以上的功放电路架构中。可选地,上述调整线可以为微带传输线。进一步可选地,微带传输线包括:共面波导和阶梯式微带传输线。可选地,如图3所示,合路输出点的阻抗为50Ω。可选地,如图3所示,调整线的特征阻抗为50Ω。其可调范围一般在25Ω~50Ω之间。该功放电路适于宽带宽应用,可广泛的应用于各种Doherty功率放大器中。
可选地,如图3所示,上述功放电路还可以包括:功率分配器30,通过分路输入点分别连接至主路功率放大电路10和辅路功率放大电路20,用于为主路功率放大电路10和辅路功率放大电路20分配相应的功率信号。在对称功放电路中,主、辅路可以均匀分配功率信号;在非对称功放电路中,主、辅路可以按照特定比例分配功率信号。
本发明实施例的实现方式简单,不但解决了功放电路,如传统TLLM架构的功放电路可实现性差的问题。
实施例2
根据本发明的另一方面,提供了一种功放电路的负载阻抗调制方法。
图4是根据本发明实施例的功放电路的负载阻抗调制方法的流程图,如图4所示,该方法包括以下步骤:
步骤S402,对功放电路中的主路功率放大电路的回退功率点对应的负载阻抗进行调制。进一步地,可以对实施例1中任一项实施方式所述的功放电路中的主路功率放大电路和辅路功率放大电路的回退功率点对应的负载阻抗进行调制。
步骤S404,对功放电路中的主路功率放大电路和辅路功率放大电路的大功率点对应的负载阻抗进行调制。
实施时,可以采用逆序操作法执行本实施例的负载阻抗调制步骤,即先执行步骤S402,再执行步骤S404。
可选地,上述的功放电路包括:对称或非对称TLLM Doherty功放电路架构。其中,功放电路中的调整线的特征阻抗可以为50Ω。
以下结合图3,并通过具体实施例详细阐述本发明实施例:
与传统doherty功放电路在进行负载阻抗调制时,先匹配大功率点(@0dB)负载阻抗Zopt再匹配回退功率点(@XdB)负载阻抗Zmod的匹配顺序相比,发明实施例采用了逆序匹配,即,先匹配回退功率点负载阻抗Zmod,再匹配大功率点负载阻抗Zopt。
其中,传统doherty功放电路的负载阻抗调制过程示意如下:
Figure PCTCN2016078974-appb-000001
Figure PCTCN2016078974-appb-000002
其中,本发明的功放电路(以doherty功放电路为例)的负载阻抗调制过程示意如下:
Figure PCTCN2016078974-appb-000003
Figure PCTCN2016078974-appb-000004
也即,本发明实施例的逆序匹配:先进行回退功率点阻抗匹配,通过功放的输出匹配电路来实现Zmod到50Ω的阻抗匹配;再通过调节调整线102的线长来完成最大功率点阻抗匹配来实现Zopt到100Ω的阻抗匹配。输出合路点A处的回退功率点的负载阻抗为50Ω,因此调整线的特征阻抗就保证了50Ω。
doherty功放电路的效率指标与回退功率点的阻抗匹配状态息息相关,传统的Zmod阻抗匹配由于需要通过调整线长度的改变来实现,需要经历高阻抗变换比(如(2)中所示),因此限制了效率带宽。而本发明实施例中Zmod阻抗匹配是直接匹配到50Ω的(如(3)中所示),阻抗变换比明显降低,有利于达成高效率设计目标。
另外,分步骤实现Zmod和Zopt阻抗匹配,且后一步骤不影响前一步骤的匹配过程,大大简化了调试过程。与传统doherty功放电路的调试过程相比,本发明不仅保证了相同的功率输出能力,提升了带宽,而且有利于提升整体效率。
本发明可应用于各种两路或两路以上的对称或非对称的Doherty功放电路架构中,在此以图3所示的两路Doherty功放电路架构为例,详细描述本发明实施方式如下:
S2,确定Zopt和Zmod的阻抗选点。根据信号的峰值平均功率比PAPR确定出非对称比例,根据非对称比例确定两个阻抗的相对驻波比,最终在等驻波比圆上确定Zopt和Zmod的取值。
S4,通过匹配电路来实现Zmod到50Ω的阻抗匹配。利用smith圆图或者ADS等仿真工具,通过阶梯式微带传输线和并联电容组合将Zmod阻抗变换到50Ω。
S6,实现Zopt的阻抗匹配。调整线102的特征阻抗为50Ω的,改变调整线102的长度,可使Zopt阻抗变换到需要的目标阻抗上,如对称doherty中的100Ω。
S8,最后完成进行其余电路的设计。其余电路与传统doherty设计方法类似,在此不再赘述。
本发明的实现方式简单,不但解决了传统TLLM架构可实现性差的问题,main路阻抗匹配的逆序匹配反而使回退功率点匹配带宽得到拓宽,更有利于doherty整体效率的提升。
另外,本发明继承了TLLM架构中去掉输出λ/4阻抗变换线以拓宽匹配带宽的优点,通过采用回退功率点和大功率点阻抗匹配的逆序操作,使得特征阻抗为50Ω的调整线102得以加入,带来的有益效果是保持传统TLLM宽带特性的同时,具备了能完全应用在实际电路的可实现性。在实现Zmod阻抗匹配的同时,阻抗变换比的显著降低,有助于进一步提升doherty功放电路的效率。
通过以上的实施方式的描述,本领域的技术人员可以清楚地了解到根据上述实施例的方法可借助软件加必需的通用硬件平台的方式来实现,当然也可以通过硬件,但很多情况下前者是更佳的实施方式。基于这样的理解,本发明的技术方案本质上或者说对现有技术做出贡献的部分可以以软件产品的形式体现出来,该计算机软件产品存储在一个存储介质(如ROM/RAM、磁碟、光盘)中,包括若干指令用以使得一台终端设备(可以是手机,计算机,服务器,或者网络设备等)执行本发明各个实施例所述的方法。
本发明的实施例还提供了一种存储介质。可选地,在本实施例中,上述存储介质可以被设置为存储用于执行以下步骤的程序代码:
S10,对功放电路中的主路功率放大电路的回退功率点对应的负载阻抗进行调制;
S12,对功放电路中的主路功率放大电路和辅路功率放大电路的大功率点对应的负载阻抗进行调制。
可选地,在本实施例中,上述存储介质可以包括但不限于:U盘、只读存储器(ROM,Read-Only Memory)、随机存取存储器(RAM,Random Access Memory)、移动硬盘、磁碟或者光盘等各种可以存储程序代码的介质。
可选地,本实施例中的具体示例可以参考上述实施例及可选实施方式中所描述的示例,本实施例在此不再赘述。
以上所述仅为本发明的优选实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
工业实用性
上述的本发明实施例,可以应用于放大电路领域,解决了相关技术中在兼顾功放电路的宽带时,难以简化TLLM功放的调试过程的技术问题,进而达到了在保持原有架构宽带性能良好的同时,还可以简化TLLM功放的调试的技术效果。

Claims (11)

  1. 一种功放电路,包括:
    主路功率放大电路,用于放大主电路上的功率信号;
    辅路功率放大电路,作为所述主路功率放大电路的辅助电路,用于放大辅助电路上的功率信号,
    其中,所述主路功率放大电路通过设置在所述主路功率放大电路中的调整线,与所述辅路功率放大电路连接于合路输出点,所述合路输出点为所述主路功率放大电路和所述辅路功率放大电路的并联交汇点,所述调整线用于为所述主路功率放大电路中的主路功放管匹配负载阻抗。
  2. 根据权利要求1所述的电路,其中,
    所述主路功率放大电路包括:所述主路功放管、主路匹配电路和所述调整线,其中,所述主路功放管的输出端连接至所述主路匹配电路的输入端,所述主路匹配电路的输出端连接至所述调整线的输入端,所述调整线的输出端连接至所述合路输出点;
    所述辅路功率放大电路包括:辅路功放管和辅路匹配电路,所述辅路功放管的输出端连接至所述辅路匹配电路输入端,所述辅路匹配电路输出端连接至所述合路输出点。
  3. 根据权利要求2所述的电路,其中,所述辅路功率放大电路还包括:输入kλ阻抗变换线,连接至所述辅路功放管的输入端,用于为所述辅路功率放大电路中的所述辅路功放管匹配负载阻抗。
  4. 根据权利要求2所述的电路,其中,所述辅路功率放大电路为一条或者多条。
  5. 根据权利要求2所述的电路,其中,所述调整线为微带传输线。
  6. 根据权利要求5所述的电路,其中,所述微带传输线包括:共面波导和阶梯式微带传输线。
  7. 根据权利要求1所述的电路,其中,所述合路输出点的阻抗为50Ω。
  8. 根据权利要求1所述的电路,其中,所述调整线的特征阻抗为50Ω。
  9. 根据权利要求1所述的电路,其中,所述功放电路还包括:功率分配器,通过分路输入点分别连接至所述主路功率放大电路和所述辅路功率放大电路,用于为所述主路功率放大电路和所述辅路功率放大电路分配相应的功率信号。
  10. 一种功放电路的负载阻抗调制方法,包括:
    对权利要求1至9中任一项所述的功放电路中的主路功率放大电路和辅路功率放大电路的回退功率点对应的负载阻抗进行调制;
    对所述功放电路中的主路功率放大电路和辅路功率放大电路的大功率点对应的负载 阻抗进行调制。
  11. 根据权利要求10所述的方法,其中,所述功放电路包括:TLLM Doherty功放电路。
PCT/CN2016/078974 2015-07-17 2016-04-11 功放电路及其负载阻抗调制方法 WO2016180130A1 (zh)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022252875A1 (zh) * 2021-06-02 2022-12-08 中兴通讯股份有限公司 功率放大器、信号处理方法、发射机和基站设备
CN116090385A (zh) * 2023-03-31 2023-05-09 南京米乐为微电子科技有限公司 一种匹配网络设计方法及其装置

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN108336975B (zh) * 2018-01-05 2022-02-22 中兴通讯股份有限公司 异相功率放大器及其实现输出匹配的方法和装置、功放支路
CN114402527A (zh) * 2019-09-16 2022-04-26 华为技术有限公司 功率放大电路、发射器以及网络设备

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070008032A1 (en) * 2005-07-05 2007-01-11 Irei Kyu Power amplifier and transmitter
CN101783652A (zh) * 2010-01-18 2010-07-21 顾晓龙 一种易于实现的多级Doherty功放
CN103178787A (zh) * 2011-12-20 2013-06-26 Nxp股份有限公司 N路多赫尔蒂放大器
CN104393843A (zh) * 2014-12-19 2015-03-04 夏景 采用多级式辅路放大器的Doherty功率放大器
CN104604125A (zh) * 2012-06-21 2015-05-06 爱立信(中国)通信有限公司(中国) Doherty放大器

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6469581B1 (en) * 2001-06-08 2002-10-22 Trw Inc. HEMT-HBT doherty microwave amplifier
KR101066639B1 (ko) * 2009-09-30 2011-09-22 주식회사 피플웍스 바이어스 혼합 전력 증폭 장치
JP2015046795A (ja) * 2013-08-28 2015-03-12 株式会社東芝 電力増幅装置、及び電力増幅装置の制御方法

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070008032A1 (en) * 2005-07-05 2007-01-11 Irei Kyu Power amplifier and transmitter
CN101783652A (zh) * 2010-01-18 2010-07-21 顾晓龙 一种易于实现的多级Doherty功放
CN103178787A (zh) * 2011-12-20 2013-06-26 Nxp股份有限公司 N路多赫尔蒂放大器
CN104604125A (zh) * 2012-06-21 2015-05-06 爱立信(中国)通信有限公司(中国) Doherty放大器
CN104393843A (zh) * 2014-12-19 2015-03-04 夏景 采用多级式辅路放大器的Doherty功率放大器

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2022252875A1 (zh) * 2021-06-02 2022-12-08 中兴通讯股份有限公司 功率放大器、信号处理方法、发射机和基站设备
CN116090385A (zh) * 2023-03-31 2023-05-09 南京米乐为微电子科技有限公司 一种匹配网络设计方法及其装置

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