WO2017008512A1 - Doherty功放电路 - Google Patents

Doherty功放电路 Download PDF

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Publication number
WO2017008512A1
WO2017008512A1 PCT/CN2016/074726 CN2016074726W WO2017008512A1 WO 2017008512 A1 WO2017008512 A1 WO 2017008512A1 CN 2016074726 W CN2016074726 W CN 2016074726W WO 2017008512 A1 WO2017008512 A1 WO 2017008512A1
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Prior art keywords
power amplifier
matching circuit
output
frequency
output matching
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PCT/CN2016/074726
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English (en)
French (fr)
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王鑫
刘璐
秦天银
张晓毅
段斌
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中兴通讯股份有限公司
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Publication of WO2017008512A1 publication Critical patent/WO2017008512A1/zh

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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03FAMPLIFIERS
    • H03F1/00Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
    • H03F1/02Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation
    • H03F1/04Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers
    • H03F1/06Modifications of amplifiers to raise the efficiency, e.g. gliding Class A stages, use of an auxiliary oscillation in discharge-tube amplifiers to raise the efficiency of amplifying modulated radio frequency waves; to raise the efficiency of amplifiers acting also as modulators
    • H03F1/07Doherty-type amplifiers

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  • the present invention relates to the field of communications, and in particular to a Doherty power amplifier circuit.
  • FIG. 1 is a schematic diagram of a Doherty power amplifier circuit according to the related art.
  • a conventional Doherty circuit is composed of two power amplifiers: a main power amplifier, an auxiliary power amplifier, and a main power amplifier working in class B or class AB, and auxiliary power amplifier work.
  • the two amplifiers are matched to 50 ohms by their respective microstrip output matching circuits.
  • a quarter-wavelength 50 ohm microstrip line is connected to realize impedance transformation, and the combined end is in the auxiliary power amplifier.
  • the end of the quarter-wavelength line with the end of the matching structure and the main power amplifier is generally converted to a 25 ohm to 50 ohm impedance conversion using a characteristic impedance of 35 ohm quarter-wave transmission line.
  • the dual-frequency Doherty power amplifier is designed to design a broadband Doherty power amplifier that can contain two operating frequency bands.
  • the power amplifier drain output matching circuit is generally designed as an output matching circuit with broadband characteristics, but due to the power amplifier.
  • the impedance dispersion of the tube itself at different frequency points is large, which makes it difficult to satisfy the good matching of the two frequency band signals in the process of designing the broadband matching circuit, thereby resulting in low efficiency of the dual frequency Doherty power amplifier.
  • the embodiment of the invention provides a Doherty power amplifier circuit to solve at least the problem of low efficiency of the dual-frequency Doherty power amplifier in the related art.
  • a Doherty power amplifier circuit includes a main power amplifier and an auxiliary power amplifier, and further includes: a first adaptive frequency division network, a second adaptive frequency division network, a first output matching circuit, a second output matching circuit and an inter-frequency combiner, wherein an output end of the first adaptive cross-over network is respectively connected to an input end of the first output matching circuit and an input end of the second output matching circuit
  • the first adaptive frequency dividing network is configured to separately separate a signal of a first frequency band and a signal of a second frequency band in an output signal of the main power amplifier and the auxiliary power amplifier, and respectively send the An output matching circuit and the second output matching circuit processing, wherein the first output matching circuit is configured to match the first frequency band, and the second output matching circuit is configured to match the second frequency band;
  • An output end of the second adaptive frequency dividing network is respectively connected to an input end of the first output matching circuit and an input end of the second output matching circuit, and the second self Adapting a frequency division network for the main power amplifier and
  • the first output matching circuit includes: a first matching circuit connected to the main power amplifier, and a second matching circuit connected to the auxiliary power amplifier, wherein the first matching The circuit is combined with the second matching circuit via a quarter-wavelength microstrip line, and the combined end of the first matching circuit and the second matching circuit sequentially passes a quarter wavelength of the first characteristic impedance a microstrip line and a first impedance microstrip transmission line are coupled to the inter-frequency combiner;
  • the second output matching circuit includes: a third matching circuit coupled to the main power amplifier, and the auxiliary power amplifier a fourth matching circuit, wherein the third matching circuit is combined with the fourth matching circuit via a quarter-wavelength microstrip line, and the third matching circuit and the fourth matching circuit are combined The road end is sequentially connected to the inter-frequency combiner through a quarter-wavelength microstrip line of a second characteristic impedance and a microstrip transmission line of a second impedance.
  • the first characteristic impedance is 35 ohms; the first impedance is 50 ohms.
  • the main power amplifier has a power amplifier tube root impedance matched to 50 ohms at the first frequency band; and the auxiliary power amplifier has a power amplifier tube root impedance matched to 50 ohms at the first frequency band.
  • the input impedance of the input of the inter-frequency combiner connected to the output of the first output matching circuit is 50 ohms.
  • the second characteristic impedance is 35 ohms; and the second impedance is 50 ohms.
  • the main power amplifier has a power amplifier tube root impedance matched to 50 ohms in the second frequency band; and the auxiliary power amplifier has a power amplifier tube root impedance matched to 50 ohms in the second frequency band.
  • the input impedance of the input of the inter-frequency combiner coupled to the output of the second output matching circuit is 50 ohms.
  • the first frequency band is 1805 MHz to 1845 MHz; and the second frequency band is 2130 MHz to 2170 MHz.
  • the main power amplifier is biased in a class AB state; the auxiliary power amplifier is biased in a class C state.
  • a first adaptive frequency division network a second adaptive frequency division network, a first output matching circuit, a second output matching circuit, and an inter-frequency combiner are adopted, wherein the first adaptive frequency division network
  • the output ends are respectively connected to the input end of the first output matching circuit and the input end of the second output matching circuit, and the first adaptive frequency dividing network is set to separate the first in the output signals of the main power amplifier and the auxiliary power amplifier respectively.
  • the signal of the frequency band and the signal of the second frequency band are respectively sent to the first output matching circuit and the second output matching circuit, wherein the first output matching circuit is set to match the first frequency band, and the second output matching circuit is set to match the first The second frequency band; the output end of the second adaptive frequency dividing network is respectively connected to the input end of the first output matching circuit and the input end of the second output matching circuit, and the second adaptive frequency dividing network is set to The signals of the first frequency band and the signals of the second frequency band are respectively separated from the output signals of the main power amplifier and the auxiliary power amplifier, and are respectively sent to the first output matching circuit and the second output matching circuit for processing; the input of the different frequency combiner
  • the terminals are respectively connected to the output end of the first output matching circuit and the output end of the second output matching circuit, and are arranged to combine and output the output signals of the first output matching circuit and the second output matching circuit to solve the dual frequency.
  • the low efficiency of Doherty amplifiers improves the efficiency of dual-band Doherty amplifiers
  • 1 is a schematic diagram of a principle of a Doherty power amplifier circuit according to the related art
  • FIG. 2 is a block diagram showing the structure of a Doherty power amplifier circuit according to an embodiment of the present invention
  • FIG. 3 is a block diagram showing a preferred structure of a Doherty power amplifier circuit according to an embodiment of the present invention
  • FIG. 4 is a block diagram showing the structure of a dual frequency high efficiency adaptive Doherty circuit in accordance with a preferred embodiment of the present invention.
  • FIG. 2 is a structural block diagram of a Doherty power amplifier circuit according to an embodiment of the present invention.
  • the circuit includes a main power amplifier 200 and an auxiliary power amplifier 201, and further includes a first adaptive frequency dividing network 202, a second adaptive frequency dividing network 204, a first output matching circuit 206, a second output matching circuit 208, and an inter-frequency combiner 210, wherein
  • the output of the first adaptive frequency dividing network 202 is respectively connected to the input end of the first output matching circuit 206 and the input end of the second output matching circuit 208, and the first adaptive frequency dividing network 202 is used in the main power amplifier 200 and The signal of the first frequency band and the signal of the second frequency band are respectively separated from the output signals of the auxiliary power amplifier 201, and are respectively sent to the first output matching circuit 206 and the second output matching circuit 208 for processing, wherein the first output matching circuit 206 Set to match the first frequency band, and the second output matching circuit 208 is set to match the second frequency band;
  • the output of the second adaptive frequency dividing network 204 is respectively connected to the input end of the first output matching circuit 206 and the input end of the second output matching circuit 208, and the second adaptive frequency dividing network 204 is used in the main power amplifier 200 and The signal of the first frequency band and the signal of the second frequency band are respectively separated from the output signals of the auxiliary power amplifier 201, and are respectively sent to the first output matching circuit 206 and the second output matching circuit 208 for processing;
  • the output terminals are connected to combine and output the output signals of the first output matching circuit 206 and the second output matching circuit 208.
  • the first output matching circuit 206 includes: a first matching circuit 302 connected to the main power amplifier, and an auxiliary power
  • the second matching circuit 304 is connected to the amplifier, wherein the first matching circuit 302 is combined with the second matching circuit 304 via the quarter-wavelength microstrip line 306, and the first matching circuit 302 and the second matching circuit 304 are combined.
  • the terminal is sequentially connected to the inter-frequency combiner 210 through the quarter-wavelength microstrip line of the first characteristic impedance 308 and the microstrip transmission line of the first impedance 310;
  • the second output matching circuit 208 includes a third matching circuit 312 coupled to the main power amplifier, and a fourth matching circuit 314 coupled to the auxiliary power amplifier, wherein the third matching circuit 312 passes through the quarter-wavelength microstrip line 316. Combining with the fourth matching circuit 314, the combining end of the third matching circuit 312 and the fourth matching circuit 314 sequentially passes through the quarter-wavelength microstrip line of the second characteristic impedance 318 and the microstrip transmission line of the second impedance 320 It is connected to the inter-frequency combiner 210.
  • the first characteristic impedance 308 is 35 ohms; and the first impedance 310 is 50 ohms.
  • the main power amplifier 200 has a power amplifier tube root impedance matched to 50 ohms at the first frequency band; the auxiliary power amplifier 201 has a power amplifier tube root impedance matched to 50 ohms at the first frequency band.
  • the input impedance of the input of the inter-frequency combiner 210 coupled to the output of the first output matching circuit 206 is 50 ohms.
  • the second characteristic impedance 318 is 35 ohms; and the second impedance 320 is 50 ohms.
  • the main power amplifier 200 has a power amplifier tube root impedance matched to 50 ohms at the second frequency band; the auxiliary power amplifier 201 has a power amplifier tube root impedance matched to 50 ohms at the second frequency band.
  • the input impedance of the input of the inter-frequency combiner 210 coupled to the output of the second output matching circuit 208 is 50 ohms.
  • the first frequency band is 1805 MHz to 1845 MHz; and the second frequency band is 2130 MHz to 2170 MHz.
  • main power amplifier 200 is biased in a Class AB state; auxiliary power amplifier 201 is biased in a Class C state.
  • the preferred embodiment of the present invention provides a dual-band high-efficiency Doherty power amplifier circuit capable of achieving dual-band high-efficiency Doherty while completing a single-band high-efficiency Doherty.
  • the dual-band high-efficiency Doherty power amplifier circuit can achieve high-efficiency transmission of narrow-band single-frequency signals and high-efficiency transmission of dual-frequency signals.
  • the dual-band high-efficiency Doherty power amplifier circuit is respectively connected to an adaptive frequency dividing network in a main power amplifier (corresponding to the above-mentioned main power amplifier 200) and an auxiliary power amplifier (corresponding to the auxiliary power amplifier 201) (corresponding to the above first self)
  • the adaptive frequency dividing network 202 and the second adaptive frequency dividing network 204) separate the different frequency output signals of the power amplifier tube and output the signals of the corresponding frequency bands to the output matching circuit, and the ends of the adaptive frequency dividing network are respectively connected to the matching microstrip circuit.
  • the matching microstrip circuits are respectively at the frequency Matching at 1 (corresponding to the first frequency band described above) and frequency 2 (corresponding to the second frequency band described above), the frequency 1 matching circuit of the main power amplifier (corresponding to the first matching circuit 302 described above) passes through the quarter-wavelength microstrip line and The frequency 1 matching circuit of the auxiliary power amplifier (corresponding to the second matching circuit 304 described above) performs combining, and the frequency 2 matching circuit of the main power amplifier (corresponding to the third matching circuit 312 described above) passes through the quarter-wavelength microstrip line and the auxiliary power amplifier.
  • the frequency 2 matching circuit (corresponding to the fourth matching circuit 314 described above) performs combining, and the frequency 1 combination is terminated with a 35 ohm characteristic impedance (corresponding to the first characteristic impedance 308) quarter-wavelength microstrip line, frequency 2
  • the junction is terminated with a 35 ohm characteristic impedance (corresponding to the second characteristic impedance 318 described above) of a quarter-wavelength microstrip line, and the characteristic impedance at frequency 1 and frequency 2 is 50 ohms at the end of the quarter-wavelength microstrip line.
  • a microstrip transmission line (corresponding to the first impedance 310 and the second impedance 320), and the ends of the 50 ohm microstrip transmission line of the frequency 1 and the frequency 2 are respectively connected to the inter-frequency combiner (corresponding to the above-described inter-frequency combiner 210) Two input terminals, the output of the different frequency combiner receives the signal Number output.
  • a preferred embodiment of the present invention also provides a dual-frequency adaptive high-efficiency Doherty circuit including a power distribution unit, an input matching unit, an input 90-degree phase shifter, and a signal amplifying unit (corresponding to the above-described main power amplifier 200 and auxiliary power amplifier) 201) an adaptive frequency division network (corresponding to the first adaptive frequency division network 202 and the second adaptive frequency division network 204), a main power amplifier frequency band 1 output matching unit (corresponding to the first matching circuit 302), Main power amplifier band 2 output matching unit (corresponding to the above third matching circuit 312), auxiliary power amplifier band 1 output matching unit (corresponding to the above second matching circuit 304), auxiliary power amplifier band 2 output matching unit (corresponding to the above a fourth matching circuit 314), a band 1 impedance invertor (corresponding to the above-mentioned quarter-wavelength microstrip line 306), a band 2 impedance inverting device (corresponding to the above-mentioned quarter-wavelength microstrip line 316), a frequency band 1 impedance transformer (corresponding
  • the main power amplifier is connected to the first adaptive frequency dividing network, and the first adaptive frequency dividing network output terminal is connected to the main power amplifier band 1 output matching unit and the input end of the main power amplifier band 2 output matching unit, and the auxiliary power amplifier and the first
  • the second adaptive frequency division network is connected, and the second adaptive frequency division network output terminal is connected to the input terminal of the auxiliary power amplifier frequency band 1 output matching unit and the auxiliary power amplifier frequency band 2 output matching unit, and the main power amplifier frequency band 1 output matching unit passes the frequency band.
  • the impedance inverse is connected to the input end of the band 1 impedance converter, and the main power amplifier band 2 output matching unit is connected to the input end of the band 2 impedance converter through the band 2 impedance invertor, and the auxiliary power amplifier band 1 output matching unit Connected to the input end of the band 1 impedance converter, the auxiliary power amplifier band 2 output matching unit is connected to the input end of the band 2 impedance converter, and the output end of the band 1 impedance converter is connected to an input end of the inter-frequency combiner.
  • the output of the band 2 impedance transformer is connected to the other input of the inter-frequency combiner, The output of the inter-frequency combiner outputs a signal to the terminal device.
  • the dual-frequency Doherty circuit main power amplifier and the auxiliary power amplifier output are matched through two high-frequency matching circuits of different frequency bands, and finally combined output, thereby obtaining a dual-frequency high-efficiency Doherty.
  • FIG. 4 is a block diagram showing the structure of a dual-frequency high-efficiency adaptive Doherty circuit according to a preferred embodiment of the present invention. As shown in FIG. 4, the circuit includes:
  • each port of the inter-frequency combiner is 50 ohms in the frequency band 1 (corresponding to the first frequency band mentioned above) and the frequency band 2 (corresponding to the second frequency band mentioned above);
  • the frequency band 1 is 1805 MHz to 1845 MHz, and the frequency band 2 is 2130 MHz to 2170 MHz;
  • the power amplifying unit includes two power amplifiers, wherein the main power amplifier is biased in the class AB state, and the auxiliary amplifier is biased in the class C state;
  • the adaptive frequency division network divides the signal of the frequency band 1 into the frequency band 1 output matching unit, and divides the frequency band 2 signal into the frequency band 2 output matching unit;
  • the adaptive crossover network and the main power amplifier band 1 output matching unit match the main power amplifier tube to the root impedance of the power amplifier tube at the frequency band 1 to 50 ohms, the adaptive frequency division network and the main power amplifier
  • the frequency band 2 output matching unit matches the impedance of the main power amplifier tube at the root of the power amplifier tube to 50 ohms in the frequency band 2
  • the adaptive frequency dividing network and the auxiliary power amplifier frequency band 1 output matching unit (corresponding to the above
  • the second matching circuit 304) matches the impedance of the auxiliary power amplifier tube to the root of the power amplifier tube at the frequency band 1 to 50 ohms, and the adaptive frequency dividing network and the auxiliary power amplifier frequency band 2 output matching unit (corresponding to the fourth matching circuit 314 described above) will assist the power amplifier
  • the tube is matched to 50 ohms at the root of the power amplifier tube at frequency band 2;
  • a band 1 impedance invertor (corresponding to the quarter-wavelength microstrip line 306 described above), a band 1 impedance converter (corresponding to the first characteristic impedance 308 described above), wherein the characteristic impedance of the band 1 impedance invertor is 50 Ohmic, the characteristic impedance of the band 1 impedance converter is 35 ohms;
  • a band 2 impedance invertor (corresponding to the quarter-wavelength microstrip line 316), a band 2 impedance converter (corresponding to the second characteristic impedance 318 described above), wherein the characteristic impedance of the band 2 impedance invertor is 50 Ohmic, the characteristic impedance of the band 2 impedance converter is 35 ohms;
  • the power synthesizer uses an inter-frequency combiner, and the input impedance of each port of the inter-frequency combiner at band 1 and band 2 is 50 ohms.
  • a Doherty power amplifier circuit has been newly added, since an output matching unit of a conventional Doherty power amplifier is changed into an output matching unit of two different frequency bands, thereby obtaining Doherty's high efficiency for single-frequency signal amplification, as well as high-efficiency for dual-frequency signals, improves Doherty's efficiency in dual-frequency signal amplification.
  • modules or steps of the present invention described above can be implemented by a general-purpose computing device that can be centralized on a single computing device or distributed across a network of multiple computing devices. Alternatively, they may be implemented by program code executable by the computing device such that they may be stored in the storage device by the computing device and, in some cases, may be different from the order herein.
  • the steps shown or described are performed, or they are separately fabricated into individual integrated circuit modules, or a plurality of modules or steps thereof are fabricated as a single integrated circuit module.
  • the invention is not limited to any specific combination of hardware and software.
  • the foregoing technical solution provided by the embodiment of the present invention adopts a first adaptive frequency division network, a second adaptive frequency division network, a first output matching circuit, a second output matching circuit, and an inter-frequency combiner, wherein the first self- The output end of the adaptive frequency dividing network is respectively connected to the input end of the first output matching circuit and the input end of the second output matching circuit, and the first adaptive frequency dividing network is set to be respectively in the output signals of the main power amplifier and the auxiliary power amplifier.
  • the signal of the first frequency band and the signal of the second frequency band are separated and sent to the first output matching circuit and the second output matching circuit respectively, wherein the first output matching circuit is set to match the first frequency band, and the second output matching circuit Set to match the second frequency band; the output ends of the second adaptive frequency division network are respectively connected to the input end of the first output matching circuit and the input end of the second output matching circuit, and the second adaptive frequency dividing network is set to be at the main power
  • the signal of the first frequency band and the signal of the second frequency band are respectively separated from the output signals of the amplifier and the auxiliary power amplifier, and are respectively sent to the first
  • the matching circuit and the second output matching circuit are processed; the input ends of the different frequency combiner are respectively connected with the output end of the first output matching circuit and the output end of the second output matching circuit, and are set to match the first output matching circuit and the first
  • the circuit of combining and outputting the output signals of the two output matching circuits solves the problem of low efficiency of the dual-frequency Doherty power amplifier and improve

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Abstract

本发明提供了一种Doherty功放电路。其中,该电路包括主功率放大器和辅助功率放大器,还包括:第一自适应分频网络、第二自适应分频网络、第一输出匹配电路、第二输出匹配电路以及异频合路器,其中,第一自适应分频网络用于在主功率放大器和辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,第二自适应分频网络用于在主功率放大器和辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号;异频合路器用于将第一输出匹配电路和第二输出匹配电路的输出信号合路并输出。通过本发明,解决了双频Doherty功放的效率低的问题,提高了双频Doherty功放的效率。

Description

Doherty功放电路 技术领域
本发明涉及通信领域,具体而言,涉及一种Doherty功放电路。
背景技术
随着新一代无线通信技术的快速演进,高数据传输速率、多模式传输和绿色通信的发展趋势使得人们更加关注功放的工作带宽和效率,这就需要人们进一步研究双频功放的高效率技术。目前最为广泛应用的一种技术就是Doherty技术,因此如何在该技术的基础上进一步拓展带宽,提高功放效率就显得更加重要。
图1是根据相关技术的Doherty功放电路原理示意图,如图1所示,传统的Doherty电路由两个功放组成:一个主功放,一个辅助功放,主功放工作在B类或者AB类,辅助功放工作在C类。两个功放经过各自微带输出匹配电路匹配到50欧姆,在主功放的微带输出匹配电路后连接四分之一波长的50欧姆微带线实现阻抗变换作用,合路端处于辅助功放的微带匹配结构末端与主功放的四分之一波长线末端,合路端后一般采用特征阻抗为35欧姆四分之一波长传输线实现25欧姆到50欧姆阻抗变换。
传统Doherty电路中,双频Doherty功放的设计思路是设计能够包含两个工作频带的宽带Doherty功放,在设计中一般是将功放漏极输出匹配电路设计成具有宽带特性的输出匹配电路,但是由于功放管本身在不同频点的阻抗离散较大,使得设计宽带匹配电路的过程中很难满足两个频带信号的良好匹配,从而导致双频Doherty功放的效率低。
针对相关技术双频Doherty功放的效率低的问题,目前尚未提出有效的解决方案。
发明内容
本发明实施例提供了一种Doherty功放电路,以至少解决相关技术中双频Doherty功放的效率低的问题。
根据本发明的一个实施例,提供了一种Doherty功放电路,包括主功率放大器和辅助功率放大器,还包括:第一自适应分频网络、第二自适应分频网络、第一输出匹配电路、第二输出匹配电路以及异频合路器,其中,所述第一自适应分频网络的输出端分别与所述第一输出匹配电路的输入端、所述第二输出匹配电路的输入端连接,所述第一自适应分频网络用于在所述主功率放大器和所述辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入所述第一输出匹配电路和所述第二输出匹配电路处理,其中,所述第一输出匹配电路设置为匹配所述第一频段,所述第二输出匹配电路设置为匹配所述第二频段;所述第二自适应分频网络的输出端分别与所述第一输出匹配电路的输入端、所述第二输出匹配电路的输入端连接,所述第二自适应分频网络用于在所述主功率放大器和所述辅助功率放 大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入所述第一输出匹配电路和所述第二输出匹配电路处理;所述异频合路器的输入端分别与所述第一输出匹配电路的输出端、所述第二输出匹配电路的输出端连接,设置为将所述第一输出匹配电路和所述第二输出匹配电路的输出信号合路并输出。
在本发明实施例中,所述第一输出匹配电路包括:与所述主功率放大器连接的第一匹配电路,和与所述辅助功率放大器连接的第二匹配电路,其中,所述第一匹配电路经过四分之一波长微带线与所述第二匹配电路进行合路,所述第一匹配电路和所述第二匹配电路的合路端依次通过第一特性阻抗的四分之一波长微带线和第一阻抗的微带传输线与所述异频合路器连接;所述第二输出匹配电路包括:与所述主功率放大器连接的第三匹配电路,和与所述辅助功率放大器连接的第四匹配电路,其中,所述第三匹配电路经过四分之一波长微带线与所述第四匹配电路进行合路,所述第三匹配电路和所述第四匹配电路的合路端依次通过第二特性阻抗的四分之一波长微带线和第二阻抗的微带传输线与所述异频合路器连接。
在本发明实施例中,所述第一特性阻抗为35欧姆;所述第一阻抗为50欧姆。
在本发明实施例中,所述主功率放大器在所述第一频段处功放管根部阻抗被匹配为50欧姆;所述辅助功率放大器在所述第一频段处功放管根部阻抗被匹配为50欧姆。
在本发明实施例中,与所述第一输出匹配电路的输出端连接的所述异频合路器的输入端的输入阻抗为50欧姆。
在本发明实施例中,所述第二特性阻抗为35欧姆;所述第二阻抗为50欧姆。
在本发明实施例中,所述主功率放大器在所述第二频段处功放管根部阻抗被匹配为50欧姆;所述辅助功率放大器在所述第二频段处功放管根部阻抗被匹配为50欧姆。
在本发明实施例中,与所述第二输出匹配电路的输出端连接的所述异频合路器的输入端的输入阻抗为50欧姆。
在本发明实施例中,所述第一频段为1805MHz至1845MHz;所述第二频段为2130MHz至2170MHz。
在本发明实施例中,所述主功率放大器偏置在AB类状态;所述辅助功率放大器偏置在C类状态。
通过本发明实施例,采用第一自适应分频网络、第二自适应分频网络、第一输出匹配电路、第二输出匹配电路以及异频合路器,其中,第一自适应分频网络的输出端分别与第一输出匹配电路的输入端、第二输出匹配电路的输入端连接,第一自适应分频网络设置为在主功率放大器和辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入第一输出匹配电路和第二输出匹配电路处理,其中,第一输出匹配电路设置为匹配第一频段,第二输出匹配电路设置为匹配第二频段;第二自适应分频网络的输出端分别与第一输出匹配电路的输入端、第二输出匹配电路的输入端连接,第二自适应分频网络设置为在 主功率放大器和辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入第一输出匹配电路和第二输出匹配电路处理;异频合路器的输入端分别与第一输出匹配电路的输出端、第二输出匹配电路的输出端连接,设置为将第一输出匹配电路和第二输出匹配电路的输出信号合路并输出的电路,解决了双频Doherty功放的效率低的问题,提高了双频Doherty功放的效率。
附图说明
此处所说明的附图用来提供对本发明的进一步理解,构成本申请的一部分,本发明的示意性实施例及其说明用于解释本发明,并不构成对本发明的不当限定。在附图中:
图1是根据相关技术的Doherty功放电路原理示意图;
图2是根据本发明实施例的Doherty功放电路的结构框图;
图3是根据本发明实施例的Doherty功放电路的优选结构框图;
图4是根据本发明优选实施例的双频高效率自适应Doherty电路结构框图。
具体实施方式
下文中将参考附图并结合实施例来详细说明本发明。需要说明的是,在不冲突的情况下,本申请中的实施例及实施例中的特征可以相互组合。
需要说明的是,本发明的说明书和权利要求书及上述附图中的术语“第一”、“第二”等是用于区别类似的对象,而不必用于描述特定的顺序或先后次序。
在本实施例中提供了一种Doherty功放电路,图2是根据本发明实施例的Doherty功放电路的结构框图,如图2所示,该电路包括主功率放大器200和辅助功率放大器201,还包括:第一自适应分频网络202、第二自适应分频网络204、第一输出匹配电路206、第二输出匹配电路208以及异频合路器210,其中,
第一自适应分频网络202的输出端分别与第一输出匹配电路206的输入端、第二输出匹配电路208的输入端连接,第一自适应分频网络202用于在主功率放大器200和辅助功率放大器201的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入第一输出匹配电路206和第二输出匹配电路208处理,其中,第一输出匹配电路206设置为匹配第一频段,第二输出匹配电路208设置为匹配第二频段;
第二自适应分频网络204的输出端分别与第一输出匹配电路206的输入端、第二输出匹配电路208的输入端连接,第二自适应分频网络204用于在主功率放大器200和辅助功率放大器201的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入第一输出匹配电路206和第二输出匹配电路208处理;
异频合路器210的输入端分别与第一输出匹配电路206的输出端、第二输出匹配电路208 的输出端连接,设置为将第一输出匹配电路206和第二输出匹配电路208的输出信号合路并输出。
图3是根据本发明实施例的Doherty功放电路的优选结构框图,如图3所示,优选地,第一输出匹配电路206包括:与主功率放大器连接的第一匹配电路302,和与辅助功率放大器连接的第二匹配电路304,其中,第一匹配电路302经过四分之一波长微带线306与第二匹配电路304进行合路,第一匹配电路302和第二匹配电路304的合路端依次通过第一特性阻抗308的四分之一波长微带线和第一阻抗310的微带传输线与异频合路器210连接;
第二输出匹配电路208包括:与主功率放大器连接的第三匹配电路312,和与辅助功率放大器连接的第四匹配电路314,其中,第三匹配电路312经过四分之一波长微带线316与第四匹配电路314进行合路,第三匹配电路312和第四匹配电路314的合路端依次通过第二特性阻抗318的四分之一波长微带线和第二阻抗320的微带传输线与异频合路器210连接。
优选地,上述第一特性阻抗308为35欧姆;上述第一阻抗310为50欧姆。
优选地,主功率放大器200在第一频段处功放管根部阻抗被匹配为50欧姆;辅助功率放大器201在第一频段处功放管根部阻抗被匹配为50欧姆。
优选地,与第一输出匹配电路206的输出端连接的异频合路器210的输入端的输入阻抗为50欧姆。
优选地,上述第二特性阻抗318为35欧姆;上述第二阻抗320为50欧姆。
优选地,主功率放大器200在第二频段处功放管根部阻抗被匹配为50欧姆;辅助功率放大器201在第二频段处功放管根部阻抗被匹配为50欧姆。
优选地,与第二输出匹配电路208的输出端连接的异频合路器210的输入端的输入阻抗为50欧姆。
优选地,第一频段为1805MHz至1845MHz;第二频段为2130MHz至2170MHz。
优选地,主功率放大器200偏置在AB类状态;辅助功率放大器201偏置在C类状态。
为了使本发明实施例的描述更加清楚,下面结合优选实施例进行描述和说明。
本发明优选实施例提供了一种双频带高效率Doherty功放电路,该功放电路在完成单频带高效率Doherty的同时能够实现双频带高效率Doherty。
采用双频带高效率Doherty功放电路既可以实现窄带单频信号的高效率传输,又可以实现双频信号的高效率传输。该双频带高效率Doherty功放电路在主功放(相当于上述主功率放大器200)与辅助功放(相当于上述辅助功率放大器201)管漏极分别接入自适应分频网络(相当于上述第一自适应分频网络202和第二自适应分频网络204),将功放管的不同频率输出信号分离并将相应频段的信号输出给输出匹配电路,自适应分频网络末端分别接入匹配微带电路(相当于上述第一输出匹配电路206和第二输出匹配电路208),匹配微带电路分别在频率 1(相当于上述第一频段)和频率2(相当于上述第二频段)处匹配,主功放的频率1匹配电路(相当于上述第一匹配电路302)经过四分之一波长微带线与辅助功放的频率1匹配电路(相当于上述第二匹配电路304)进行合路,主功放的频率2匹配电路(相当于上述第三匹配电路312)经过四分之一波长微带线与辅助功放的频率2匹配电路(相当于上述第四匹配电路314)进行合路,频率1合路端接35欧姆特征阻抗(相当于上述第一特性阻抗308)四分之一波长微带线,频率2合路端接35欧姆特征阻抗(相当于上述第二特性阻抗318)四分之一波长微带线,在频率1和频率2的特征阻抗为四分之一波长微带线末端分别接50欧姆的微带传输线(相当于上述第一阻抗310和第二阻抗320),频率1和频率2的50欧姆微带传输线末端分别接异频合路器(相当于上述异频合路器210)的两个输入端,异频合路器的输出端接信号输出。
本发明优选实施例还提供了一种双频自适应高效率Doherty电路,包括功率分配单元,输入匹配单元,输入90度相移器,信号放大单元(相当于上述主功率放大器200和辅助功率放大器201),自适应分频网络(相当于上述第一自适应分频网络202和第二自适应分频网络204),主功率放大器频段1输出匹配单元(相当于上述第一匹配电路302),主功率放大器频段2输出匹配单元(相当于上述第三匹配电路312),辅助功率放大器频段1输出匹配单元(相当于上述第二匹配电路304),辅助功率放大器频段2输出匹配单元(相当于上述第四匹配电路314),频段1阻抗逆置器(相当于上述四分之一波长微带线306),频段2阻抗逆置器(相当于上述四分之一波长微带线316),频段1阻抗变换器(相当于上述第一特性阻抗308),频段2阻抗变换器(相当于上述第二特性阻抗318),异频合路器(相当于上述异频合路器210)。主功率放大器与第一自适应分频网络相连,第一自适应分频网络输出端接主功率放大器频段1输出匹配单元和主功率放大器频段2输出匹配单元的输入端相连,辅助功率放大器与第二自适应分频网络相连,第二自适应分频网络输出端接辅助功率放大器频段1输出匹配单元和辅助功率放大器频段2输出匹配单元的输入端相连,主功率放大器频段1输出匹配单元通过频段1阻抗逆置器与频段1阻抗变换器的输入端相连,主功率放大器频段2输出匹配单元通过频段2阻抗逆置器与频段2阻抗变换器的输入端相连,辅助功率放大器频段1输出匹配单元与频段1阻抗变换器的输入端相连,辅助功率放大器频段2输出匹配单元与频段2阻抗变换器的输入端相连,频段1阻抗变换器的输出端与异频合路器的一个输入端相连,频段2阻抗变换器的输出端与异频合路器的另一个输入端相连,异频合路器的输出端输出信号至终端设备。
通过上述双频自适应高效率Doherty电路,双频Doherty电路主功放和辅助功放输出匹配通过两个不同频段的高效率匹配电路输出并最终合路输出,从而获得了双频高效率Doherty。
下面结合附图对本发明优选实施例进行说明。
图4是根据本发明优选实施例的双频高效率自适应Doherty电路结构框图,如图4所示,该电路包括:
异频合路器的各端口阻抗在频段1(相当于上述第一频段)和频段2(相当于上述第二频段)处均为50欧姆;
优选地,频段1为1805MHz至1845MHz,频段2为2130MHz至2170MHz;
功率放大单元包括两个功率放大器,其中主功率放大器偏置在AB类状态,辅助放大器偏置在C类状态;
自适应分频网络将频段1的信号分至频段1输出匹配单元,将频段2的信号分至频段2输出匹配单元;
自适应分频网络与主功率放大器频段1输出匹配单元(相当于上述第一匹配电路302)将主功放管在频段1处功放管根部阻抗匹配至50欧姆,自适应分频网络与主功率放大器频段2输出匹配单元(相当于上述第三匹配电路312)将主功放管在频段2处功放管根部阻抗匹配至50欧姆,自适应分频网络与辅助功率放大器频段1输出匹配单元(相当于上述第二匹配电路304)将辅助功放管在频段1处功放管根部阻抗匹配至50欧姆,自适应分频网络与辅助功率放大器频段2输出匹配单元(相当于上述第四匹配电路314)将辅助功放管在频段2处功放管根部阻抗匹配至50欧姆;
频段1阻抗逆置器(相当于上述四分之一波长微带线306)、频段1阻抗变换器(相当于上述第一特性阻抗308),其中,频段1阻抗逆置器的特性阻抗为50欧姆,频段1阻抗变换器的特性阻抗为35欧姆;
频段2阻抗逆置器(相当于上述四分之一波长微带线316)、频段2阻抗变换器(相当于上述第二特性阻抗318),其中,频段2阻抗逆置器的特性阻抗为50欧姆,频段2阻抗变换器的特性阻抗为35欧姆;
功率合成器采用异频合路器,异频合路器在频段1和频段2处的各端口输入阻抗为50欧姆。
综上所述,通过本发明的上述实施例和优选实施例,新增了一种Doherty功放电路,由于将传统Doherty功率放大器的一个输出匹配单元变为两个不同频段的输出匹配单元,从而获得Doherty对于单频信号放大的高效率,同时对于双频信号同样具有高效率特性,提高了Doherty在双频信号放大时的效率。
显然,本领域的技术人员应该明白,上述的本发明的各模块或各步骤可以用通用的计算装置来实现,它们可以集中在单个的计算装置上,或者分布在多个计算装置所组成的网络上,可选地,它们可以用计算装置可执行的程序代码来实现,从而,可以将它们存储在存储装置中由计算装置来执行,并且在某些情况下,可以以不同于此处的顺序执行所示出或描述的步骤,或者将它们分别制作成各个集成电路模块,或者将它们中的多个模块或步骤制作成单个集成电路模块来实现。这样,本发明不限制于任何特定的硬件和软件结合。
以上所述仅为本发明的优选实施例而已,并不用于限制本发明,对于本领域的技术人员来说,本发明可以有各种更改和变化。凡在本发明的精神和原则之内,所作的任何修改、等同替换、改进等,均应包含在本发明的保护范围之内。
工业实用性
本发明实施例提供的上述技术方案,采用第一自适应分频网络、第二自适应分频网络、第一输出匹配电路、第二输出匹配电路以及异频合路器,其中,第一自适应分频网络的输出端分别与第一输出匹配电路的输入端、第二输出匹配电路的输入端连接,第一自适应分频网络设置为在主功率放大器和辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入第一输出匹配电路和第二输出匹配电路处理,其中,第一输出匹配电路设置为匹配第一频段,第二输出匹配电路设置为匹配第二频段;第二自适应分频网络的输出端分别与第一输出匹配电路的输入端、第二输出匹配电路的输入端连接,第二自适应分频网络设置为在主功率放大器和辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入第一输出匹配电路和第二输出匹配电路处理;异频合路器的输入端分别与第一输出匹配电路的输出端、第二输出匹配电路的输出端连接,设置为将第一输出匹配电路和第二输出匹配电路的输出信号合路并输出的电路,解决了双频Doherty功放的效率低的问题,提高了双频Doherty功放的效率。

Claims (10)

  1. 一种Doherty功放电路,包括主功率放大器和辅助功率放大器,还包括:第一自适应分频网络、第二自适应分频网络、第一输出匹配电路、第二输出匹配电路以及异频合路器,其中,
    所述第一自适应分频网络的输出端分别与所述第一输出匹配电路的输入端、所述第二输出匹配电路的输入端连接,所述第一自适应分频网络用于在所述主功率放大器和所述辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入所述第一输出匹配电路和所述第二输出匹配电路处理,其中,所述第一输出匹配电路设置为匹配所述第一频段,所述第二输出匹配电路设置为匹配所述第二频段;
    所述第二自适应分频网络的输出端分别与所述第一输出匹配电路的输入端、所述第二输出匹配电路的输入端连接,所述第二自适应分频网络用于在所述主功率放大器和所述辅助功率放大器的输出信号中分别分离出第一频段的信号和第二频段的信号,并分别送入所述第一输出匹配电路和所述第二输出匹配电路处理;
    所述异频合路器的输入端分别与所述第一输出匹配电路的输出端、所述第二输出匹配电路的输出端连接,设置为将所述第一输出匹配电路和所述第二输出匹配电路的输出信号合路并输出。
  2. 根据权利要求1所述的Doherty功放电路,其中,
    所述第一输出匹配电路包括:与所述主功率放大器连接的第一匹配电路,和与所述辅助功率放大器连接的第二匹配电路,其中,所述第一匹配电路经过四分之一波长微带线与所述第二匹配电路进行合路,所述第一匹配电路和所述第二匹配电路的合路端依次通过第一特性阻抗的四分之一波长微带线和第一阻抗的微带传输线与所述异频合路器连接;
    所述第二输出匹配电路包括:与所述主功率放大器连接的第三匹配电路,和与所述辅助功率放大器连接的第四匹配电路,其中,所述第三匹配电路经过四分之一波长微带线与所述第四匹配电路进行合路,所述第三匹配电路和所述第四匹配电路的合路端依次通过第二特性阻抗的四分之一波长微带线和第二阻抗的微带传输线与所述异频合路器连接。
  3. 根据权利要求2所述的Doherty功放电路,其中,
    所述第一特性阻抗为35欧姆;所述第一阻抗为50欧姆。
  4. 根据权利要求3所述的电路,其中,
    所述主功率放大器在所述第一频段处功放管根部阻抗被匹配为50欧姆;
    所述辅助功率放大器在所述第一频段处功放管根部阻抗被匹配为50欧姆。
  5. 根据权利要求3所述的Doherty功放电路,其中,
    与所述第一输出匹配电路的输出端连接的所述异频合路器的输入端的输入阻抗为50欧姆。
  6. 根据权利要求2所述的Doherty功放电路,其中,
    所述第二特性阻抗为35欧姆;所述第二阻抗为50欧姆。
  7. 根据权利要求6所述的Doherty功放电路,其中,
    所述主功率放大器在所述第二频段处功放管根部阻抗被匹配为50欧姆;
    所述辅助功率放大器在所述第二频段处功放管根部阻抗被匹配为50欧姆。
  8. 根据权利要求6所述的Doherty功放电路,其中,
    与所述第二输出匹配电路的输出端连接的所述异频合路器的输入端的输入阻抗为50欧姆。
  9. 根据权利要求1至8中任一项所述的Doherty功放电路,其中,
    所述第一频段为1805MHz至1845MHz;所述第二频段为2130MHz至2170MHz。
  10. 根据权利要求1至8中任一项所述的Doherty功放电路,其中,
    所述主功率放大器偏置在AB类状态;
    所述辅助功率放大器偏置在C类状态。
PCT/CN2016/074726 2015-07-14 2016-02-26 Doherty功放电路 WO2017008512A1 (zh)

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