Classifications

• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
  • G01B11/00—Measuring arrangements characterised by the use of optical techniques
  • G01B11/16—Measuring arrangements characterised by the use of optical techniques for measuring the deformation in a solid, e.g. optical strain gauge
  • G01B11/161—Measuring arrangements characterised by the use of optical techniques for measuring the deformation in a solid, e.g. optical strain gauge by interferometric means
• • H—ELECTRICITY
  • H01—ELECTRIC ELEMENTS
  • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
  • H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
  • H01L22/10—Measuring as part of the manufacturing process
  • H01L22/12—Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
  • G01B11/00—Measuring arrangements characterised by the use of optical techniques
  • G01B11/24—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures
  • G01B11/2441—Measuring arrangements characterised by the use of optical techniques for measuring contours or curvatures using interferometry
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
  • G01B9/00—Measuring instruments characterised by the use of optical techniques
  • G01B9/02—Interferometers
  • G01B9/02015—Interferometers characterised by the beam path configuration
  • G01B9/02017—Interferometers characterised by the beam path configuration with multiple interactions between the target object and light beams, e.g. beam reflections occurring from different locations
  • G01B9/02021—Interferometers characterised by the beam path configuration with multiple interactions between the target object and light beams, e.g. beam reflections occurring from different locations contacting different faces of object, e.g. opposite faces
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
  • G01B9/00—Measuring instruments characterised by the use of optical techniques
  • G01B9/02—Interferometers
  • G01B9/02015—Interferometers characterised by the beam path configuration
  • G01B9/02027—Two or more interferometric channels or interferometers
• • G—PHYSICS
  • G01—MEASURING; TESTING
  • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
  • G01B2210/00—Aspects not specifically covered by any group under G01B, e.g. of wheel alignment, caliper-like sensors
  • G01B2210/56—Measuring geometric parameters of semiconductor structures, e.g. profile, critical dimensions or trench depth

Definitions

• the present invention generally relates to the prediction of in-plane distortion of a chucked substrate, and, in particular, the prediction of in-plane distortion of a chucked substrate base on measurements of out-of-plane distortions of the substrate in an unchucked stated.
• Fabricating semiconductor devices such as logic and memory devices typically includes processing a substrate such as a semiconductor wafer using a large number of semiconductor fabrication processes to form various features and multiple levels of the semiconductor devices.
• lithography is a semiconductor fabrication process that involves transferring a pattern from a reticle to a resist arranged on a semiconductor wafer. Additional examples of semiconductor fabrication processes include, but are not limited to, chemical- mechanical polishing (CMP), etching, deposition, and ion implantation. Multiple semiconductor devices may be fabricated in an arrangement on a single semiconductor wafer and then separated into individual semiconductor devices.
• the term "wafer” generally refers to substrates formed of a semiconductor or non-semiconductor material.
• a semiconductor or non-semiconductor material may include, but are not limited to, monocrystalline silicon, gallium arsenide, and indium phosphide
• a wafer may include one or more layers or films.
• such layers may include, but are not limited to, a resist, a dielectric material, a conductive material, and a semiconductive material.
• wafer as used herein is intended to encompass a wafer on which all types of such layers or films may be formed.
• Many different types of devices may be formed on a wafer, and the term wafer as used herein is intended to encompass a wafer on which any type of device known in the art may be fabricated.
• the system includes a substrate geometry measurement tool configured to measure out-of- plane distortions of the substrate in an unchucked state.
• the system includes a controller communicatively coupled to the measurement tool, the controller including one or more processors configured to execute a set of program instructions.
• the program instructions configured to cause the one or more processors to: receive one or more measurement results indicative of out- of-plane distortions of the substrate in the unchucked state from the measurement tool; determine an effective surface film stress of the substrate in the unchucked state based on the measured out-of-plane distortions of the substrate in the unchucked state with a two-dimensional plate model; determine in-plane distortions of the substrate in a chucked state based on the effective surface film stress of the substrate in the unchucked state with the two-dimensional plate model; and adjust at least one of a process tool or a metrology tool based on at least one of the measured out-of-plane distortions or the determined in-plane distortions.
• the system includes a substrate geometry measurement too! configured to measure out-of- plane distortions of the substrate in an unchucked state.
• the system includes a controller communicatively coupled to the measurement tool, the controller including one or more processors configured to execute a set of program instructions.
• the program instructions configured to cause the one or more processors to: receive one or more measurement results indicative of out- of-plane distortions of the substrate in the unchucked state from the measurement tool; apply a two-dimensional plate model to determine in-plane distortions of the substrate in a chucked state based on the out-of-plane distortions of the substrate in the unchucked state; and adjust at least one of a process tool or an overlay tool based on at least one of the measured out-of-plane distortions or the determined in-plane distortions.
• the system includes a substrate geometry measurement tool configured to measure out-of- plane distortions of the substrate in an unchucked state.
• the system includes a controller communicatively coupled to the measurement tool, the controller including one or more processors configured to execute a set of program instructions.
• the program instructions configured to cause the one or more processors to: receive one or more measurement results indicative of out- of-plane distortions of the substrate in the unchucked state from the measurement tool; apply an Euler-Lagrange plate model to determine in-plane distortions of the substrate in a chucked state based on the out-of-plane distortions of the substrate in the unchucked state; and adjust at least one of a process tool or an overlay tool based on at least one of the measured out-of-plane distortions or the determined in-plane distortions.
• the method includes measuring one or more out-of-plane distortions of the substrate in an unchucked state.
• the method includes determining, with a two- dimensional plate model, an effective film stress of a film on the substrate in the unchucked state based on the measured out-of-plane distortions of the substrate in the unchucked state.
• the method includes determining, with the two-dimensional plate model, in-plane distortions of the substrate in a chucked state based on the effective film stress of the film on the substrate in the unchucked state.
• the method includes adjusting at least one of a process tool or an overlay tool based on at least one of the measured out-of-plane distortions or the determined in-plane distortions.
• FIG. 1A is a block diagram view of a system for measuring substrate geometry, in accordance with one embodiment of the present disclosure.
• FIG. 1 B illustrates a schematic view of a dual Fizeau cavity of a dual Fizeau interferometer, in accordance with one embodiment of the present disclosure.
• FIG. 2 is a flow diagram illustrating steps performed in a method for determining in- plane distortions in a substrate, in accordance with one embodiment of the present disclosure.
• FIG. 3 is a flow diagram illustrating information feedback and feedforward based on acquired in-plane distortion results, in accordance with one embodiment of the present disclosure.
• FIGS. 1A through 3 a method and system for determining in-plane distortions in a substrate are described in accordance with the present disclosure.
• Embodiments of the present disclosure are directed to systems and methods for determining in-plane distortions of a chucked substrate based on the measured out- of-plane distortions of an unchecked substrate (i.e., free standing substrate).
• Embodiments of the present disclosure utilize linear elastic solid body deformation mechanics of thin objects (e.g., two-dimension plate theory) to derive a model that allows for the prediction of in-plane distortion of a chucked wafer from measured out-of- piane distortions of an unchucked substrate.
• Wafer shape change resulting from wafer processing and/or wafer chucking may induce in-plane distortions (!PD) within the wafer, which may lead to overlay error between a first patterning step (N) and a subsequent patterning step (N+1 ).
• !PD in-plane distortions
• the relationship between wafer shape change and overlay error is described in detail in K. Turner et at "Predicting Distortions and Qveriay Errors Due to Wafer Deformation During Chucking on Lithography Scanners", J. icro/Nanoiith, MEMS MOEMS 8(4), 043015, (October-December 2009), which is incorporated in the entirety herein by reference.
• FIG. 1A illustrates a conceptual block diagram view of a system 100 for determining in-plane distortions in a substrate, in accordance with one or more embodiments of the present disclosure.
• the system 100 includes a substrate geometry measurement tool 102.
• the substrate geometry measurement tool 102 may include any wafer shape measurement tool known in the art, !n one embodiment, the substrate geometry measurement tool 102 may include a Dual Fizeau interferometer 1 10 suitable for simultaneously measuring out-of-piane distortion (i.e., displacement in direction normal to surface of the substrate) of the front-side of the substrate 104 and the back-side of the substrate 104.
• the system 100 may include one or more controllers 1 12 communicatively coupled to the substrate geometry measurement tool 102 and configured to receive out-of-piane distortion measurements from the measurement tool 102,
• FIG. 1 B illustrates a conceptual view of a Dual Fizeau cavity, in accordance with one or more embodiments of the present disclosure.
• the Dual Fizeau cavity may be configured to hold the substrate 104 in a substantially vertical position.
• the Dual Fizeau cavity 108 many include a set of point contact devices (not shown) configured to receive and hold the substrate 104 in a substantially upright position in a substantially free state (i.e., unchucked state).
• the Dual Fizeau interferometer 1 10 may analyze various parameters associated with the substrate 104 and its spatial relationship to the reference fiats 106a and 106b,
• the measurement tool 102 may simultaneously measure out-of-plane distortions (or height variations) of the front-side surface and/or back-side surface of the substrate 104. It is further noted that the shape value at each of the measured points of the front-side and/or back-side surface may then be calculated utilizing the measured out-of-piane distortion at those points.
• the shape, s(x,y), of the substrate as a function of X-Y position on the surface of the substrate may be expressed as: s(x, y) « (d A (x, y) - d B (x, y)) - Tilt (1 )
• dA(x,y) represents the cavity distance between the reference flat A 106a of cavity 108 and a first side (e.g., front-side) of the substrate 104
• de(x,y) represents the cavity distance between the reference flat B 106b of cavity 108 and a second side (e.g., back-side) of the substate 104
• Tilt represents the tilt of the substrate 104 within the cavity 108.
• a two-dimensional X-Y map of shape may be constructed by calculating shape at a plurality of positions on the substate 104.
• a shape map having a lateral resolution of approximately 500 m may be constructed utilizing the out-of-plane measurements acquired with the interferometry system 1 10 and the corresponding shape value at each of the measured points on the wafer.
• Dual Fizeau interferometry suitable for measuring front-side and back-side topography of a substrate is described in detail in Klaus Freischlad et ai., "interferometry for Wafer Dimensional Metrology", Proc. SPIE 6672, 1 (2007), which is incorporated in the entirety herein by reference.
• Dual sided interferometry is described generally in U.S. Patent No. 6,847,458 by Freischlad et ai., entitled Method and Apparatus for Measuring the Shape and Thickness Variation of Polished Opaque Plates, issued on January 25, 2005, U.S. Patent No. 8,068,234 by Tang et al., entitled Method and Apparatus for Measuring Shape or Thickness information of a Substrate, issued on November 29, 201 1 , which are both incorporated in the entirety herein by reference.
• the system 100 includes a controller 1 12.
• the controller 1 12 is communicatively coupled to the substrate geometry measurement tool 102.
• the controller 1 12 may be coupled to the output of a detector (not shown) of the substrate geometry measurement tool 102.
• the controller 1 12 may be coupled to the detector in any suitable manner (e.g., by one or more transmission media indicated by the line shown in FIG. 1 A) such that the controller 1 12 can receive the output generated by the measurement tool 1 12.
• the controller 1 12 includes one or more processors 1 14.
• the one or more processors 1 14 are configured to execute a set of program instructions.
• the program instructions are configured to cause the one or more processors to receive one or more measurement results indicative of out-of-plane distortions of the substrate 104 in the unchucked state from the measurement tool 102.
• the program instructions are configured to cause the one or more processors to construct or retrieve from memory a 2-D plate model based on 2-D plate theory (e.g., linear elastic solid body deformation mechanics of thin objects on a disk). Utilizing the 2-D plate model a set of partial differential equations of disk may be derived. The one or more processors 1 14 may then solve these equations to determine predicted in-line plane distortion of a chucked substrate 104 based on measurements of out-of-piane distortions of the unchucked substrate 104.
• 2-D plate theory e.g., linear elastic solid body deformation mechanics of thin objects on a disk.
• the program instructions are configured to cause the one or more processors to determine, with the 2-D plate model, an effective surface film stress of the substrate 104 in the unchucked state based on the measured out-of-plane distortions of the substrate 104 in the unchucked state.
• the one or more processors 1 14 may solve the equations of the 2-D plate model to determine the effective surface film stress of the substrate 104 in the unchucked state based on the measured out ⁇ of-piane distortions of the substrate 104 in the unchucked state, !t is noted that the effective film stress is that stress which causes the out-of-plane distortion in the substrate 104 in the unchucked state.
• the program instructions are configured to cause the one or more processors to determine in-plane distortions of the substrate 104 in a chucked state based on the effective surface film stress of the substrate in the unchucked state.
• the effective surface film stress predicted using the measured out-of-plane distortions of the unchucked substrate 104 serves as an input to calculate the in-plane distortions of the substrate 104 in a chucked state.
• the program instructions are configured to cause the one or more processors to adjust at least one of a process tool or an overlay tool based on at least one of the measured out-of-piane distortions or the determined in-plane distortions.
• the one or more processors 1 14 of controller 1 12 may include any one or more processing elements known in the art. In this sense, the one or more processors 1 14 may include any microprocessor-type device configured to execute software algorithms and/or instructions.
• the one or more processors 114 may consist of a desktop computer, mainframe computer system, workstation, image computer, parallel processor, or other computer system (e.g., networked computer) configured to execute a program configured to operate the system 100, as described throughout the present disclosure.
• processor may be broadly defined to encompass any device having one or more processing elements, which execute program instructions stored in memory 1 16.
• different subsystems of the system 100 e.g., process tool, overlay metrology tool, display or user interface
• the memory 1 16 may include any storage medium known in the art suitable for storing program instructions executable by the associated one or more processors 1 14.
• the memory 1 16 may include a non-transitory memory medium.
• the memory 1 16 may include, but is not limited to, a read-only memory, a random access memory, a magnetic or optical memory device (e.g., disk), a magnetic tape, a solid state drive and the like.
• the memory 1 16 is configured to store one or more results from the measurement tool 102 and/or the output of the various steps described herein.
• memory 1 14 may be housed in a common controller housing with the one or more processors 1 14.
• the memory 1 16 may be located remotely with respect to the physical location of the processors and controller 1 12.
• the one or more processors 1 14 of controller 1 12 may access a remote memory (e.g., server), accessible through a network (e.g., internet, intranet and the like).
• the memory 1 16 includes program instructions for causing the one or more processors 1 14 carry out the various steps described through the present disclosure,
• the controller 1 12 may receive and/or acquire data or information from other sub-system (e.g., inspection results from an inspection system or metrology results from a metrology system) by a transmission medium that may include wireline and/or wireless portions.
• the controller 1 12 may transmit one or more results and/or control signals to one or more subsystems of system 100.
• controller 112 may transmit one or more results and/or control signals to a process tool (e.g., feedback data to upstream process tool of fabrication line), overlay metrology tool (e.g., feedforward data to downstream overlay metrology tool), display or user interface.
• the transmission medium may serve as a data link between the controller 1 12 and other subsystems of the system 100.
• the controller 1 12 may send data to external systems via a transmission medium (e.g., network connection).
• the system 100 includes a user interface.
• the user interface is communicatively coupled to the one or more processors 1 14 of controller 1 12.
• the user interface device may be utilized by controller 1 12 to accept selections and/or instructions from a user.
• a display may be used to display data to a user (not shown).
• a user may input selection and/or instructions (e.g., a user selection of measured field sites or field sites for regression process) responsive to data displayed to the user via the display device.
• the user interface device may include any user interface known in the art.
• the user interface may include, but is not limited to, a keyboard, a keypad, a touchscreen, a lever, a knob, a scroll wheel, a track bail, a switch, a dial, a sliding bar, a scroll bar, a slide, a handle, a touch pad, a paddle, a steering wheel, a joystick, a bezel input device or the like.
• a touchscreen interface device those skilled in the art should recognize that a large number of touchscreen interface devices may be suitable for implementation in the present invention.
• the display device may be integrated with a touchscreen interface, such as, but not limited to, a capacitive touchscreen, a resistive touchscreen, a surface acoustic based touchscreen, an infrared based touchscreen, or the like.
• a touchscreen interface such as, but not limited to, a capacitive touchscreen, a resistive touchscreen, a surface acoustic based touchscreen, an infrared based touchscreen, or the like.
• any touchscreen interface capable of integration with the display portion of a display device is suitable for implementation in the present invention.
• the user interface may include, but is not limited to, a bezel mounted interface.
• the display device may include any display device known in the art.
• the display device may include, but is not limited to, a liquid crystal display (LCD).
• the display device may include, but is not limited to, an organic light-emitting diode (OLED) based display.
• the display device may include, but is not limited to a CRT display.
• FIGS. 1A-1 B may be further configured as described herein.
• the system 100 may be configured to perform any other step(s) of any of the method embodiment(s) described herein.
• FIG, 2 is a flow diagram illustrating steps performed in a method 200 of determining in-plane distortions in a substrate, in accordance with one or more embodiments of the present disclosure. It is noted herein that the steps of method 200 may be implemented ail or in part by the system 100. It is further recognized, however, that the method 200 is not limited to the system 100 in that additional or alternative system-level embodiments may carry out all or part of the steps of method 200. [0Q3S] In step 2 0, out-of-plane distortions of the substrate 104 in an unchucked state are measured. For example, as shown in FIGS.
• out-of-plane distortions (e.g., displacements) of the substrate 104 may be measured using the substrate geometry measurement tool 102.
• out-of-plane distortions of the substrate 104 may be measured using a dual Fizeau interferometer.
• the out-of-plane distortions measured by the geometry measurement too! 102 may be transmitted to controller 1 12.
• the out-of-plane distortion measurements may be stored in memory 1 16 for later processing by the one or more processors 1 14.
• the 2-D plate model is applied to determine an effective film stress, which causes the out-of-plane distortions of the substrate 104, in the unchucked state based on the measurement of the out-of-plane distortions.
• one or more processors 104 of controller 1 12 may apply the 2-D plate model to the out-of-plane measurements acquired from the substrate 104 to determine the effective film stress capable of causing the out-of-plane distortions of the substrate 104 in the unchucked state (i.e., not been chucked into a flat configuration). Equation 1 below describes the case of momentum balance for the in-plane x- and y-directions:
• Equation 2 provides the stresses for the case of linear elasticity ar me von rman strains:
• Equation 2 ⁇ ov ox cxoyj
• h thickness
• wo displacement in z-direction
• E Young's modulus of the substrate
• v Poisson's ratio
• Equations 4-5 a number of approaches may be applied.
• the fitting function may include any fitting function know in the art such as, but not limited to, a Zernike polynomial. After fitting, derivatives may be calculated for the fitted function, so as to calculate the stresses above.
• a finite difference method may be utilized to find the stress components of Equations 4-5
• a finite element method may be utilized to find the stress components of Equations 4-5.
• a finite volume method may be utilized to find the stress components of Equations 4-5.
• any number of analytical approaches known in the art may be applied to Equations 4-5 above, such as, but not limited to, the various analytical methods disclosed herein to analyze the various differential equations of the present disclosure.
• the 2-D plate model is applied to determine in-plane distortions of the substrate 104 in a chucked state based on the effective surface film stress of the substrate in the unchucked state found in step 220.
• one or more processors 104 of controller 1 12 may apply the 2-D plate model (or an additional 2-D plate model) to the determine in-plane distortions of the substrate 104 in a chucked state based on the effective surface film stress of the substrate in the unchucked state.
• the effective surface film stress found in step 220 serves as an input to a 2 ⁇ D plate mode! based on a disk formulation to calculate the in-plane distortions of the substrate 104 in a chucked state into an approximately flat configuration.
• the stress components of Equations 4-5 may be used as forcing terms in the calculation of the in-plane distortion of the substrate 104 in the chucked state, resulting in the followin :
• the in-plane distortion of the substrate 104 in the chucked state by applying one or more solution techniques to Equation 6 above.
• a finite difference method may be applied to Equation 6 to determine the in- plane distortion of the substrate 104.
• a finite element method may be applied to Equation 6 to determine the in-plane distortion of the substrate 104.
• a finite volume method may be applied to Equation 6 to determine the in-plane distortion of the substrate 104.
• a method of moments analysis may be applied to Equation 8 to determine the in-plane distortion of the substrate 104
• a power series may be applied to Equation 6 to determine the in-p!ane distortion of the substrate 104.
• the closed-form solution to Equation 6 may be found to determine the in-plane distortion of the substrate 104.
• two or more methods may be mixed to determine the in-plane distortion of the substrate 104. For instance, Fourier series analysis may be combined with finite difference analysis to determine the in-plane distortion of the substrate 104.
• step 220 may be removed and the in-plane distortion of substrate 104 in the chucked state may be calculated directly from the measured out-of-plane distortions from tool 102.
• the system 100 may reduce the model to a single set of equations.
• the effective surface film stress may be algebraically eliminated so that only a single set of equations is required to calculate the in-plane distortions of the substrate 104 in an unchucked state.
• Equation 7 provides:
• the in-plane distortion of the substrate 104 in the chucked state is calculated by applying one or more solution techniques to Equation 7 above.
• a finite difference method may be applied to Equation 7 to determine the in-plane distortion of the substrate 104.
• a finite element method may be applied to Equation 7 to determine the in-plane distortion of the substrate 104.
• a finite volume method may be applied to Equation 7 to determine the in-plane distortion of the substrate 104.
• a method of moments analysis may be applied to Equation 7 to determine the in-plane distortion of the substrate 104
• a power series may be applied to Equation 7 to determine the in-plane distortion of the substrate 104.
• the closed-form solution to Equation 7 may be found to determine the in-plane distortion of the substrate 104.
• two or more methods may be mixed to determine the in-plane distortion of the substrate 104. For instance, Fourier series analysis may be combined with finite difference analysis to determine the in-plane distortion of the substrate 104
• a process tool or overlay tool is adjusted based on the in-plane distortions found in step 220.
• the controller 1 12 may use this information to diagnose one or more problems or errors with a process tool 1 13 located upstream from the substrate geometry tool 102.
• processing problems may include, but are not limited to, non-uniformities in film deposition, out-of-spec thermal processes and the like.
• the controller 1 12 may feedback information to a process tool 1 13 so as to adjust or correct the process tool 1 13 such that process steps are brought back within tolerance levels.
• the controller 1 12 may use this information to feedforward information to a downstream metrology tool 1 14.
• the in- plane distortion information (along with other wafer shape information) may be used in a feed-forward control scheme in an overlay advanced process control (APC) loop.
• APC overlay advanced process control
• FIG. 3 illustrates a flow diagram 300 depicting information feedforward/feedback, in accordance with one embodiment of the present disclosure.
• one or more fabrication processes are carried out on a substrate.
• one or more process tools e.g., see process tool 1 13 in FIG. 1A
• the geometry of the substrate is measured.
• the substrate geometry may be measured with substrate geometry measurement too! 102.
• the out-of-piane distortions (OPD) of the substrate in an unchucked state are determined.
• OPD out-of-piane distortions
• step, 308 based on the out-of-plane distortion, the in-plane distortion (IPD) of the substrate in a chucked state is determined.
• feedforward information may be transmitted forward to one or more downstream metrology applications (e.g., overlay metrology tool).
• feedback information may be transmitted to one or more upstream process tools.
• equation (8) may be converted to cylindrical coordinates for the purposes of analyzing in-plane distortions in substrate 104.
• equation 8 is rewritten as follows:
• the analysis of the effective surface films stress of the substrate in an unchucked state and the subsequent in-plane distortions of the substrate in a chucked state may be carried out by variations of the 2-D plate model.
• effective surface films stress of the substrate in an unchucked state and the subsequent in-plane distortions of the substrate in a chucked state may be carried out under an Euler-Lagrange framework.
• the Euler-Lagrange approach solves the system through the minimization of energy utilizing the Euler-Lagrange equations of motion.
• All of the methods described herein may include storing results of one or more steps of the method embodiments in a storage medium.
• the results may include any of the results described herein and may be stored in any manner known in the art.
• the storage medium may include any storage medium described herein or any other suitable storage medium known in the art.
• the results can be accessed in the storage medium and used by any of the method or system embodiments described herein, formatted for display to a user, used by another software module, method, or system, etc.
• the results may be stored "permanently,” “semi-permanently,” temporarily, or for some period of time.
• the storage medium may be random access memory (RAM), and the results may not necessarily persist indefinitely in the storage medium.
• an implementer may opt for a mainly hardware and/or firmware vehicle; alternatively, if flexibility is paramount, the implementer may opt for a mainly software implementation; or, yet again alternatively, the implementer may opt for some combination of hardware, software, and/or firmware.
• any vehicle to be utilized is a choice dependent upon the context in which the vehicle will be deployed and the specific concerns (e.g., speed, flexibility, or predictability) of the implementer, any of which may vary.
• Those skilled in the art will recognize that optical aspects of implementations will typically employ optically-oriented hardware, software, and or firmware.

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