WO2016152106A1 - Tranche de semi-conducteur, dispositif à semi-conducteur et procédé de fabrication de la tranche de semi-conducteur - Google Patents

Tranche de semi-conducteur, dispositif à semi-conducteur et procédé de fabrication de la tranche de semi-conducteur Download PDF

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WO2016152106A1
WO2016152106A1 PCT/JP2016/001529 JP2016001529W WO2016152106A1 WO 2016152106 A1 WO2016152106 A1 WO 2016152106A1 JP 2016001529 W JP2016001529 W JP 2016001529W WO 2016152106 A1 WO2016152106 A1 WO 2016152106A1
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layer
iii nitride
group iii
nitride semiconductor
semiconductor layer
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哲生 成田
紘子 井口
伊藤 健治
伸幸 大竹
真一 星
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株式会社デンソー
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L21/02104Forming layers
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    • C23COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23CCOATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C16/00Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
    • C23C16/22Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
    • C23C16/30Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
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    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
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    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/10Inorganic compounds or compositions
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    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
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    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/778Field effect transistors with two-dimensional charge carrier gas channel, e.g. HEMT ; with two-dimensional charge-carrier layer formed at a heterojunction interface
    • HELECTRICITY
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    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/80Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier
    • H01L29/812Field effect transistors with field effect produced by a PN or other rectifying junction gate, i.e. potential-jump barrier with a Schottky gate

Definitions

  • the present disclosure relates to a semiconductor wafer, a semiconductor device, and a method for manufacturing a semiconductor wafer.
  • Patent Document 1 discloses a technique for growing a buffer layer on a silicon substrate and growing a group III nitride semiconductor layer (main functional layer) on the buffer layer.
  • high concentration (1 ⁇ 10 18 cm ⁇ 3 ) carbon is introduced into the buffer layer and / or the buffer layer side of the group III nitride semiconductor layer.
  • the group III nitride semiconductor is heated from a high temperature (during vapor phase growth) to a low temperature (typically room temperature). It is known that a tensile strain is generated in a group III nitride semiconductor when cooled to a low temperature.
  • a group III nitride semiconductor layer is grown on a buffer layer having a compressive strain to cancel tensile strain generated in the group III nitride semiconductor layer.
  • An object of the present disclosure is to provide a semiconductor wafer having a smooth surface of a group III nitride semiconductor layer, a manufacturing method thereof, and a semiconductor device including the semiconductor wafer while preventing leakage current from flowing.
  • the semiconductor wafer includes a substrate, a buffer layer provided on the substrate, and a group III nitride semiconductor layer provided on the buffer layer.
  • the buffer layer has a smaller lattice constant than the group III nitride semiconductor layer.
  • the group III nitride semiconductor layer contains carbon.
  • the peak of the carbon concentration of the group III nitride semiconductor layer is the group III nitride semiconductor. Located away from both the front and back of the layer.
  • the group III nitride semiconductor layer contains carbon, a leakage current of a semiconductor device manufactured using the semiconductor wafer can be prevented.
  • the carbon concentration in the middle part of the group III nitride semiconductor layer a position away from both the front surface and the back surface
  • the carbon concentration necessary to prevent leakage current is set to the group III nitride semiconductor layer.
  • the carbon concentration of the group III nitride semiconductor layer can be lowered on the buffer layer side (the back side of the group III nitride semiconductor layer). By suppressing the carbon concentration on the buffer layer side, it is possible to suppress the occurrence of strain-induced step bunching in the group III nitride semiconductor layer.
  • the semiconductor wafer described above can smooth the surface of the group III nitride semiconductor layer while preventing leakage current from flowing.
  • a semiconductor device includes a substrate, a buffer layer provided on the substrate, a group III nitride semiconductor layer provided on the buffer layer, and a group III nitride semiconductor layer. And a semiconductor element.
  • the lattice constant (average lattice constant) of the buffer layer is smaller than the lattice constant (average lattice constant) of the group III nitride semiconductor layer.
  • the group III nitride semiconductor layer contains carbon.
  • the peak of the carbon concentration of the group III nitride semiconductor layer is the same as the surface of the group III nitride semiconductor layer. Located away from both sides.
  • a method for manufacturing a semiconductor wafer including a substrate and a group III nitride semiconductor layer provided on the substrate includes forming a buffer layer and a group III nitride semiconductor layer. Forming. In forming the buffer layer, a buffer layer having a lattice constant smaller than that of the group III nitride semiconductor layer is vapor-phase grown on the substrate. In forming the group III nitride semiconductor layer, the group III nitride semiconductor layer is vapor-phase grown on the buffer layer. The growth pressure of the group III nitride semiconductor layer is minimized during the formation of the group III nitride semiconductor layer.
  • the carbon concentration introduced into the group III nitride semiconductor layer is increased. Therefore, according to the manufacturing method described above, it is possible to manufacture a semiconductor wafer having the highest carbon concentration in the middle portion of the group III nitride semiconductor layer.
  • FIG. 4 is a photograph showing the surface of the semiconductor wafer of Experimental Example 1.
  • FIG. 3B is a diagram of the photograph of FIG. 3A.
  • 6 is a photograph showing the surface of the semiconductor wafer of Experimental Example 2.
  • FIG. 4B is a diagram of the photograph of FIG. 4A.
  • the semiconductor wafer includes a substrate, a buffer layer provided on the substrate, and a group III nitride semiconductor layer provided on the buffer layer.
  • the substrate has a smaller coefficient of thermal expansion than the group III nitride semiconductor layer.
  • the temperature integral value of the linear expansion coefficient of 300 to 1300K is smaller than the temperature integral value of the linear expansion coefficient of 300 to 1300K in the a-axis direction of the material constituting the group III nitride semiconductor layer.
  • the material of the substrate is silicon (Si) or silicon carbide (SiC).
  • the thickness of the substrate is 0.1 to 2 mm.
  • an interface layer and an aluminum nitride (AlN) layer are provided between the substrate and the buffer layer.
  • Aluminum oxide (Al2O3) can be used as the material for the interface layer.
  • the interface layer can be omitted.
  • the thickness of the aluminum nitride layer is 10 to 500 nm.
  • the aluminum nitride layer preferably has a thickness of 50 to 500 nm.
  • the thickness of the aluminum nitride layer is preferably 10 to 100 nm.
  • Aluminum nitride has the smallest lattice constant among group III nitride semiconductors.
  • the aluminum nitride layer by providing the aluminum nitride layer, a necessary amount of compressive strain can be applied to the buffer layer.
  • the interface layer and the aluminum nitride layer can be omitted, and the buffer layer can be formed directly on the surface of the substrate.
  • the buffer layer has a smaller lattice constant than the group III nitride semiconductor layer.
  • the lattice constant (average lattice constant) of the buffer layer is the lattice constant (average lattice constant) of the group III nitride semiconductor layer. Smaller than.
  • the buffer layer has a compressive strain.
  • the material of the buffer layer is AlxGa1-xN (0 ⁇ x ⁇ 1).
  • a buffer layer made of AlxGa1-xN (0 ⁇ x ⁇ 1) a multilayer structure including buffer layers having different values of “x” can be used.
  • the value of “x” becomes smaller toward the surface (the group III nitride semiconductor layer side). That is, it is preferable that the buffer layer made of AlxGa1-xN (0 ⁇ x ⁇ 1) has a smaller Al composition toward the surface.
  • the buffer layer a multilayer structure in which different materials are repeatedly stacked can be used.
  • the buffer layer may be repeatedly provided with a laminated structure of AlN and GaN.
  • the buffer layer may be repeatedly provided with a laminated structure of AlN and AlGaN.
  • the thickness of the buffer layer can be 0.5 to 10 ⁇ m.
  • the “buffer layer” in the present embodiment does not mean a so-called “low-temperature buffer layer” for reducing the lattice constant difference between the substrate and the group III nitride semiconductor layer, but a group III nitride. This is to apply a surface force to the semiconductor layer to alleviate thermal strain generated in the group III nitride semiconductor layer when the group III nitride semiconductor layer changes from a high temperature to a low temperature after film formation.
  • the buffer layer has a smaller lattice constant than the group III nitride semiconductor layer
  • the buffer layer has a lattice constant (average lattice constant) when the entire buffer layer and the entire group III nitride semiconductor layer are compared. ) Is smaller than the lattice constant (average lattice constant) of the group III nitride semiconductor layer. Therefore, when comparing a part of the buffer layer and a part of the group III nitride semiconductor layer, the lattice constant of a part of the buffer layer may be larger than the lattice constant of a part of the group III nitride semiconductor layer.
  • the group III nitride semiconductor layer contains carbon.
  • the surface on the buffer layer side of the group III nitride semiconductor layer is the back surface, and the surface opposite to the back surface is the surface.
  • the peak of the carbon concentration of the group III nitride semiconductor layer is located away from both the front surface and the back surface (surface in contact with the buffer layer) of the group III nitride semiconductor layer.
  • the carbon concentration on the surface of the group III nitride semiconductor layer is preferably lower than the carbon concentration on the back surface. Specifically, when the carbon concentration peak of the group III nitride semiconductor layer is an intermediate part, the surface side is the front part from the intermediate part, and the back side is the back part from the intermediate part.
  • a functional layer through which a current flows may be formed on the surface portion.
  • the carbon concentration of the surface (surface portion) of the group III nitride semiconductor layer is lowered, the carbon concentration of the functional layer can be kept low, and a semiconductor element with a small loss (resistance) can be obtained. Note that if the functional layer contains a large amount of carbon, the current flow may be hindered by the presence of carbon.
  • the group III nitride semiconductor layer preferably includes a plurality of layers having different concentrations of contained carbon.
  • the nitride semiconductor layer has a stacked structure in which the first layer, the second layer, and the third layer are stacked in this order from the buffer layer side, and the average value of the carbon concentration is second layer> first layer. It is preferable to satisfy the relationship. It is particularly preferable that the average value of the carbon concentration of each layer satisfies the relationship of second layer> first layer> third layer. Note that at least the first layer and the second layer preferably have a larger lattice constant than the buffer layer.
  • the material of the first layer and the second layer is preferably a group III nitride semiconductor mainly composed of gallium (Ga).
  • the “group III nitride semiconductor mainly composed of gallium” typically means gallium nitride (GaN), and as an impurity, B, Al, In, on the order of atomic percent of less than 1% with respect to GaN. Those containing elements such as S, As, and Sb are also included in the “Group III nitride semiconductor mainly composed of gallium”.
  • strain relaxation can be efficiently caused between the buffer layer and the second layer using the thin first layer.
  • the group III nitride semiconductor constituting the first layer contains a large amount of aluminum, the difference in lattice constant between the buffer layer and the first layer is small, and the thin first layer is sufficient between the buffer layer and the second layer. Distortion is less likely to occur. Further, by using a group III nitride semiconductor mainly composed of gallium as the material of the second layer, it is possible to suppress the occurrence of new strain between the first layer and the second layer. That is, since a material close to the lattice constant of the first layer is laminated as the second layer, new strain is unlikely to occur between the first layer and the second layer.
  • the thickness of the first layer is preferably 0.05 to 0.5 ⁇ m.
  • the thickness of the first layer is less than 0.05 ⁇ m, strain relaxation is not easily caused. Further, when the thickness of the first layer is thicker than 0.5 ⁇ m, the effect of suppressing the leakage current cannot be sufficiently obtained. From the viewpoint of suppressing the leakage current, more preferably, the thickness of the first layer is 0.05 to less than 0.2 ⁇ m. If the first layer is sufficiently thinner than the second layer, it is possible to prevent the leakage current suppressing effect from being lowered.
  • the carbon concentration of the first layer is preferably 1 ⁇ 10 16 to 1 ⁇ 10 18 cm ⁇ 3 . More preferably, the carbon concentration of the first layer is 1 ⁇ 10 16 to 5 ⁇ 10 17 cm ⁇ 3 . By making the carbon concentration of the first layer lower than that of the second layer, the compressive strain inherent in the buffer layer can be relaxed.
  • the thickness of the second layer is preferably 0.2 to 3.0 ⁇ m.
  • the carbon concentration of the second layer is preferably 5 ⁇ 10 17 to 1 ⁇ 10 20 cm ⁇ 3 . More preferably, the carbon concentration of the second layer is 1 ⁇ 10 18 cm ⁇ 3 to 1 ⁇ 10 20 cm ⁇ 3 from the viewpoint of suppressing leakage current. If the thickness of the second layer is sufficiently thicker than that of the first layer, the leakage current suppressing effect can be sufficiently exerted.
  • Gallium nitride can be used as the material for the third layer.
  • the third layer can be used as a functional layer (a layer constituting a semiconductor element).
  • the carbon concentration of the third layer is preferably less than 1 ⁇ 10 17 cm ⁇ 3 .
  • the third layer is substantially free of carbon.
  • the thickness of the third layer can be appropriately adjusted according to the target semiconductor device.
  • a plurality of layers (fourth layer, fifth layer, etc.) can be further provided on the surface of the third layer.
  • an HEMT (High Electron Mobility Transistor) including a heterojunction can be manufactured by forming an AlGaN layer (fourth layer) on the surface of a gallium nitride layer (third layer).
  • the semiconductor wafer 1 includes a silicon substrate 2, an interface layer 4 formed on the silicon substrate 2, an AlN layer 6 formed on the interface layer 4, a buffer layer 8 formed on the AlN layer 6, a buffer A group III nitride semiconductor layer 10 formed on the layer 8 is provided.
  • the thickness T2 of the silicon substrate 2 is 675 ⁇ m.
  • the material of the interface layer 4 is aluminum oxide.
  • the thickness T4 of the interface layer 4 is adjusted to be less than 3 nm.
  • the thickness T6 of the AlN layer 6 is adjusted to 0.3 ⁇ m.
  • the material of the buffer layer 8 is AlxGa1-xN.
  • the thickness T8 of the buffer layer 8 is adjusted to 2.5 ⁇ m.
  • the buffer layer 8 has a multilayer structure, and a layer having a larger value of “x” is formed toward the AlN layer 6 side.
  • the group III nitride semiconductor layer 10 includes a first GaN layer 10a, a second GaN layer 10b, and a third GaN layer 10c.
  • the material of the group III nitride semiconductor layer 10 is gallium nitride (GaN).
  • the first GaN layer 10a contains 2 ⁇ 10 16 cm ⁇ 3 of carbon.
  • the second GaN layer 10b contains 4 ⁇ 10 18 cm ⁇ 3 of carbon.
  • the third GaN layer 10c does not substantially contain carbon (may contain inevitable carbon).
  • the group III nitride semiconductor layer 10 is formed using a metal organic chemical vapor deposition method.
  • the thickness T10a of the first GaN layer 10a is adjusted to 0.1 ⁇ m
  • the thickness T10b of the second GaN layer 10b is adjusted to 0.5 ⁇ m
  • the thickness T10c of the third GaN layer 10c is adjusted to 0.4 ⁇ m.
  • another nitride semiconductor layer may be formed on the surface of the third GaN layer 10c.
  • the third GaN layer 10c may contain n-type impurities (Si or the like) and p-type impurities (Mg or the like).
  • the first GaN layer 10a, the second GaN layer 10b, and the third GaN layer 10c are examples of the first layer, the second layer, and the third layer, respectively.
  • a nitride stack (typically AlGaN) having a heterojunction is formed on the surface of the group III nitride semiconductor layer 10 (the surface of the third GaN layer 10c).
  • a semiconductor device having a HEMT structure that operates as a heterojunction two-dimensional electron gas and a channel can be manufactured.
  • the interface layer 4 is formed on the silicon substrate 2 using an atomic layer deposition method (ALD method). Thereafter, an AlN layer 6 and a buffer layer 8 are formed in this order on the interface layer 4 using a metal organic chemical vapor deposition method (MOCVD method) (buffer layer forming step).
  • MOCVD method metal organic chemical vapor deposition method
  • buffer layer forming step trimethylaluminum is used as the Al material, trimethylgallium is used as the Ga material, and ammonia is used as the N material.
  • the growth temperature is about 1000 ° C.
  • the first GaN layer 10a is formed on the buffer layer 8 at a growth pressure of 300 Torr.
  • the second GaN layer 10b is formed on the first GaN layer 10a at a growth pressure of 50 Torr.
  • the carbon concentration (4 ⁇ 10 18 cm ⁇ 3 ) of the second GaN layer 10 b is higher than the carbon concentration (2 ⁇ 10 16 cm ⁇ 3 ) of the first GaN layer 10 a.
  • the third GaN layer 10c is formed on the second GaN layer 10b at a growth pressure of 300 Torr.
  • the carbon concentration of the third GaN layer 10c (substantially does not contain carbon) is adjusted to be lower than the carbon concentrations of the first GaN layer 10a and the second GaN layer 10b using parameters other than the growth pressure.
  • the lattice constant (lattice constant in the a-plane direction) of the buffer layer 8 is smaller than the lattice constant of the group III nitride semiconductor layer (lattice constant in the a-plane direction of GaN) 10. Therefore, the buffer layer 8 applies compressive strain to the group III nitride semiconductor layer 10.
  • the group III nitride semiconductor layer 10 tends to undergo tensile strain in the process of temperature drop after growth.
  • the buffer layer 8 cancels the tensile strain generated in the group III nitride semiconductor layer 10 and suppresses the group III nitride semiconductor layer 10 from warping and generating cracks and the like.
  • FIG. 2 shows the carbon concentration of the group III nitride semiconductor layer 10.
  • the horizontal axis of the graph represents the carbon concentration (cm ⁇ 3 ), and the vertical axis represents each layer (first GaN layer 10a to third GaN layer 10c).
  • the carbon concentration shown in FIG. 2 has shown the average value of each layer.
  • the carbon concentration of the second GaN layer 10b is 4 ⁇ 10 18 cm ⁇ 3 .
  • the concentration of carbon contained in the GaN layer is higher than 1 ⁇ 10 18 cm ⁇ 3 , the leakage current can be suppressed.
  • the thickness T10a of the first GaN layer 10a is thinner than the thickness T10b of the second GaN layer 10b.
  • the thickness T10a is increased, the effect of suppressing leakage current may be reduced.
  • the thickness T10a thinner than the thickness T10b the effect of suppressing leakage current can be improved.
  • the carbon concentration (2 ⁇ 10 16 cm ⁇ 3 ) of the first GaN layer 10a is lower than the carbon concentration (4 ⁇ 10 18 cm ⁇ 3 ) of the second GaN layer 10b. That is, the first GaN layer 10a does not contain carbon at a concentration sufficient to suppress leakage current.
  • the first GaN layer 10a having a low carbon concentration is formed on the buffer layer 8, effective strain relaxation occurs.
  • the carbon concentration of the first GaN layer 10a is high (for example, 1 ⁇ 10 18 cm ⁇ 3 or more that is effective in suppressing leakage current)
  • the group III nitride semiconductor layer with the compressive strain of the buffer layer 8 inherently contained 10 grows. As a result, distortion-induced step bunching occurs and it is difficult to smooth the surface of the semiconductor wafer 1.
  • the characteristics of the semiconductor device may deteriorate.
  • “Distortion-induced step bunching” is a mechanism of step bunching occurrence discovered and proposed by Tersoff et al., And disclosed in “Physical Review Letters Volume 75 2730 (1995)”.
  • the mechanism is that when a strain is generated on a semiconductor surface formed by periodic step terraces, an attractive force between steps is proportional to the square of the strain and inversely proportional to the distance between steps.
  • the attractive force between steps forms a bundle of steps (step bunching) one after another, and a step is formed on the surface of the semiconductor wafer, so that the surface smoothness of the semiconductor wafer is lowered. Therefore, generation of step bunching can be suppressed by reducing the distortion of the semiconductor surface.
  • Strain-induced step bunching becomes more prominent in a wafer (so-called off-angle wafer) whose principal axis is slightly inclined with respect to a perpendicular perpendicular to the growth surface.
  • the c-axis is generally the main axis. Therefore, in the case of a group III nitride semiconductor, it can be said that the state where the c-axis is inclined with respect to the normal of the growth surface has an off angle.
  • the growth surface has a periodic structure in which step terraces are regularly repeated, and the flatness of the wafer surface can be improved.
  • the strain-induced step bunching in the nitride semiconductor layer is more prominent in a group III nitride semiconductor containing gallium as a main group element. Step bunching occurs in the process where group III atomic species on the terrace are diffused into the step edge. Therefore, step bunching is likely to occur in an environment that satisfies the condition of “average distance between steps ⁇ (1/2) ⁇ surface diffusion length of group III atomic species”. In group III atomic species, gallium is known to have a longer surface diffusion length than aluminum and indium. Therefore, strain-induced step bunching is likely to occur in a group III nitride semiconductor mainly containing gallium, particularly gallium nitride. Note that “gallium nitride” in this embodiment includes gallium nitride containing impurities (Al, In, Mg, Si, Ge, C, Fe, etc.) less than 1%.
  • the compressive strain of the buffer layer 8 is reduced in the first GaN layer 10a by making the carbon concentration of the first GaN layer 10a lower than the carbon concentration of the second GaN layer 10b.
  • the compressive strain of the buffer layer 8 is reduced in the first GaN layer 10a by making the carbon concentration of the first GaN layer 10a lower than the carbon concentration of the second GaN layer 10b.
  • the carbon concentration of the group III nitride semiconductor layer 10 can be controlled by the growth pressure of the group III nitride semiconductor layer. When other growth conditions are the same, the carbon concentration of the group III nitride semiconductor layer increases as the growth pressure decreases.
  • the carbon concentration of the second GaN layer 10b can be increased by adjusting the growth pressure low after crystal growth of the first GaN layer 10a.
  • the compressive strain of the buffer layer 8 is reduced as the thickness of the second GaN layer 10b increases.
  • the warpage of the semiconductor wafer varies depending on the product of the group III nitride semiconductor layer 10 “strain” and “film thickness”. That is, when the second GaN layer 10b is formed directly on the buffer layer 8, since the “strain” is large, the amount of warpage of the semiconductor wafer greatly changes due to a slight change in the “film thickness”. For this reason, it is difficult to control the amount of warpage of the semiconductor wafer in the method of forming the second GaN layer 10b containing high-concentration carbon thickly.
  • FIG. 3A is an optical micrograph of the surface S1 of a semiconductor wafer in which an interface layer, an AlN layer, a buffer layer, a first GaN layer, and a second GaN layer are grown in this order on a silicon substrate
  • FIG. 3B is a photograph of FIG. 3A.
  • the carbon concentration of the first GaN layer is 2 ⁇ 10 16 cm ⁇ 3 (growth pressure 300 Torr), and the carbon concentration of the second GaN layer is 4 ⁇ 10 18 cm ⁇ 3 (growth pressure 50 Torr).
  • step flow growth was confirmed, and it was confirmed that a semiconductor wafer having a smooth surface was obtained.
  • the residual strain in the a-axis direction of the GaN layer was 0.11%.
  • the c-axis of the first GaN layer 10a was inclined 0.26 degrees in the m-axis direction with respect to the normal to the growth surface.
  • FIG. 4A is an optical micrograph of the surface S2 of a semiconductor wafer in which an interface layer, an AlN layer, a buffer layer, a second GaN layer, and a first GaN layer are grown in this order on a silicon substrate
  • FIG. 4B is a photograph of FIG. 3B.
  • the order of growing the first GaN layer and the second GaN layer is opposite to that of the semiconductor wafer of Experimental Example 1. That is, in the semiconductor wafer of Experimental Example 2, the second GaN layer containing a high concentration of carbon is grown on the surface of the buffer layer.
  • the group III nitride semiconductor layer includes the first GaN layer 10a, the second GaN layer 10b, and the third GaN layer 10c has been described.
  • the present disclosure can also be applied to a semiconductor wafer in which another nitride semiconductor layer is formed on the surface of the third GaN layer 10c.
  • the first GaN layer 10a, the second GaN layer 10b, and the third GaN layer 10c are examples of a group III nitride semiconductor layer
  • the first GaN layer 10a, the second GaN layer 10b, and the third GaN layer 10c are a group III mainly composed of GaN. It can also be made of a nitride semiconductor.
  • the group III nitride semiconductor layer may have a structure in which the carbon concentration continuously changes from the back surface (buffer layer side) to the front surface.
  • the group III nitride semiconductor layer may not form a clear layer structure. Even in such a case, the peak of the carbon concentration of the group III nitride semiconductor layer is located away from both the front surface and the back surface of the group III nitride semiconductor layer. The surface of the wafer can be smoothed.
  • the semiconductor wafer 1 in which the group III nitride semiconductor layer 10 has the carbon concentration of the second GaN layer 10b> the first GaN layer 10a> the third GaN layer 10c has been described.
  • the present disclosure is effective when the peak of the carbon concentration of the group III nitride semiconductor layer is located away from both the front surface and the back surface. That is, if the condition that the carbon concentration of the second GaN layer 10b is the highest among the group III nitride semiconductor layers 10 is satisfied, the carbon concentration is: second GaN layer 10b> third GaN layer 10c> first GaN layer 10a. Even if there is an effect. If the peak of the carbon concentration of the group III nitride semiconductor layer is at a position away from both the front surface and the back surface, distortion-induced step bunching can be suppressed while suppressing leakage current.

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Abstract

L'invention concerne une tranche de semi-conducteur (1) dans laquelle une couche semi-conductrice au nitrure du groupe III (10) est disposée sur un substrat (2), une couche tampon (8)étant disposée entre celles-ci. La couche tampon (8) présente une constante de réseau qui est inférieure à celle de la couche semi-conductrice au nitrure III (10). La couche semi-conductrice au nitrure III (10) contient du carbone. La crête de concentration de carbone de la couche semi-conductrice au nitrure III (10) est située à une position séparée à la fois de la surface avant et la surface arrière de ladite couche semi-conductrice au nitrure III (10). En conséquence, la tranche de semi-conducteur comprenant la surface avant lisse de la couche semi-conductrice de nitrure III peut être obtenue tout en empêchant l'écoulement d'un courant de fuite.
PCT/JP2016/001529 2015-03-26 2016-03-17 Tranche de semi-conducteur, dispositif à semi-conducteur et procédé de fabrication de la tranche de semi-conducteur WO2016152106A1 (fr)

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JP6784861B1 (ja) * 2020-03-18 2020-11-11 住友化学株式会社 窒化物半導体基板

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JP2005255440A (ja) * 2004-03-10 2005-09-22 Univ Meijo Iii族窒化物半導体の作製方法、及びiii族窒化物半導体
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JP2012243886A (ja) * 2011-05-18 2012-12-10 Sharp Corp 半導体装置
WO2013145404A1 (fr) * 2012-03-28 2013-10-03 株式会社豊田中央研究所 Substrat stratifié de monocristal de silicium et de monocristal de nitrure du groupe iii présentant un angle de décalage

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JP2005255440A (ja) * 2004-03-10 2005-09-22 Univ Meijo Iii族窒化物半導体の作製方法、及びiii族窒化物半導体
JP2007251144A (ja) * 2006-02-20 2007-09-27 Furukawa Electric Co Ltd:The 半導体素子
JP2011166067A (ja) * 2010-02-15 2011-08-25 Panasonic Corp 窒化物半導体装置
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