WO2016101303A1 - Ffs阵列基板及液晶显示面板 - Google Patents

Ffs阵列基板及液晶显示面板 Download PDF

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Publication number
WO2016101303A1
WO2016101303A1 PCT/CN2014/095512 CN2014095512W WO2016101303A1 WO 2016101303 A1 WO2016101303 A1 WO 2016101303A1 CN 2014095512 W CN2014095512 W CN 2014095512W WO 2016101303 A1 WO2016101303 A1 WO 2016101303A1
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Prior art keywords
common electrode
layer
disposed
array substrate
transparent
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PCT/CN2014/095512
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English (en)
French (fr)
Inventor
郝思坤
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深圳市华星光电技术有限公司
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Priority to US14/418,035 priority Critical patent/US20160178978A1/en
Publication of WO2016101303A1 publication Critical patent/WO2016101303A1/zh

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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136227—Through-hole connection of the pixel electrode to the active element through an insulation layer
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/136286—Wiring, e.g. gate line, drain line
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/1362—Active matrix addressed cells
    • G02F1/1368—Active matrix addressed cells in which the switching element is a three-electrode device
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134372—Electrodes characterised by their geometrical arrangement for fringe field switching [FFS] where the common electrode is not patterned

Definitions

  • the present invention relates to the field of liquid crystal display, and in particular to an FFS array substrate and a liquid crystal display panel.
  • the liquid crystal display device is currently the most widely used flat panel display device, and can provide a high-resolution color screen for various electronic devices such as mobile phones, personal digital assistants (PDAs), digital cameras, and computers.
  • PDAs personal digital assistants
  • LCDs liquid crystal display devices
  • FFS Flexible Field Switching (Fringe Field Switching Technology) Liquid crystal display devices are popular among users because of their wide viewing angle and high aperture ratio.
  • an FFS liquid crystal display device generally includes an upper substrate, a lower substrate, and a liquid crystal layer disposed between the upper substrate and the lower substrate.
  • the lower substrate is generally provided with a planar common electrode and a pixel electrode having a slit structure to achieve a better display mode.
  • each pixel has a slit structure of a plurality of regions, and the slits of each region have different extending directions in the slit structure to form a plurality of display domains.
  • the pre-deflection directions of the liquid crystal molecules of different display domains are different, thereby expanding the angle of the light emitted from the liquid crystal layer, and realizing the wide-angle display of the liquid crystal display device.
  • the common electrode disposed on the lower substrate of the liquid crystal display device is generally a transparent electrode, but the impedance of the transparent electrode is large, and when a large current flows through the common electrode, the potential on the common electrode is not stable.
  • An object of the present invention is to provide an FFS array substrate and a liquid crystal display panel having a stable potential of a common electrode; and to solve the technical problem of potential instability on the common electrodes of the conventional FFS array substrate and the liquid crystal display panel.
  • An embodiment of the present invention provides an FFS array substrate, including:
  • a first metal layer disposed on the base substrate to form a scan line and a gate of the thin film transistor
  • a first insulating layer disposed on the first metal layer for isolating the first metal layer and the second metal layer;
  • the second metal layer is disposed on the first insulating layer to form a data line, a source of the thin film transistor, and a drain of the thin film transistor;
  • a second insulating layer disposed on the second metal layer for isolating the second metal layer and the common electrode layer;
  • the common electrode layer includes a common electrode line disposed on the second insulating layer and a transparent common electrode disposed on the common electrode line and the second insulating layer; wherein a resistivity of the common electrode line Less than the resistivity of the transparent common electrode;
  • a third insulating layer disposed on the common electrode layer for isolating the common electrode layer and the transparent electrode layer;
  • the transparent electrode layer is disposed on the third insulating layer to form a transparent pixel electrode, and the transparent pixel electrode passes through the third insulating layer, the common electrode layer, and the second insulating layer A via is connected to the drain of the thin film transistor.
  • the surface of the transparent pixel electrode is provided with a slit structure.
  • the FFS array substrate includes a plurality of display domains.
  • the slits in the slit structure of the transparent pixel electrode of each of the display domains have different extending directions.
  • the common electrode line is disposed at a boundary of adjacent display domains.
  • the second metal layer further includes a common line for providing a common signal, and the common electrode line passes through the second through hole penetrating the second insulating layer and the first The common lines on the two metal layers are connected.
  • the common electrode layer includes a transparent common electrode disposed on the second insulating layer, and a common electrode line disposed on the transparent common electrode; wherein the common electrode The resistivity of the line is less than the resistivity of the transparent common electrode.
  • An embodiment of the present invention further provides an FFS array substrate, including:
  • a first metal layer disposed on the base substrate to form a scan line and a gate of the thin film transistor
  • a first insulating layer disposed on the first metal layer for isolating the first metal layer and the second metal layer, and isolating the first metal layer and the common electrode layer;
  • a second metal layer disposed on the first insulating layer to form a data line, a source of the thin film transistor, and a drain of the thin film transistor;
  • the common electrode layer includes a common electrode line disposed on the first insulating layer and a transparent common electrode disposed on the common electrode line and the first insulating layer; wherein a resistivity of the common electrode line Less than the resistivity of the transparent common electrode;
  • a second insulating layer disposed on the second metal layer and the common electrode layer for isolating the second metal layer and the transparent electrode layer, and isolating the common electrode layer and the transparent electrode layer;
  • the transparent electrode layer is disposed on the second insulating layer to form a transparent pixel electrode, and the transparent pixel electrode is connected to a drain of the thin film transistor through a first through hole penetrating the second insulating layer.
  • the surface of the transparent pixel electrode is provided with a slit structure.
  • the FFS array substrate includes a plurality of display domains.
  • the slits in the slit structure of the transparent pixel electrode of each of the display domains have different extending directions.
  • the common electrode line is disposed at a boundary of adjacent display domains.
  • the first metal layer further includes a common line for providing a common signal, and the common electrode line passes through the second through hole penetrating the first insulating layer and the first The common lines on a metal layer are connected.
  • the embodiment of the invention further provides a liquid crystal display device of an FFS array substrate, which comprises an upper substrate, an FFS array substrate, and a liquid crystal layer disposed between the upper substrate and the FFS array substrate; wherein the FFS array substrate comprises:
  • a first metal layer disposed on the base substrate to form a scan line and a gate of the thin film transistor
  • a first insulating layer disposed on the first metal layer for isolating the first metal layer and the second metal layer;
  • the second metal layer is disposed on the first insulating layer to form a data line, a source of the thin film transistor, and a drain of the thin film transistor;
  • a second insulating layer disposed on the second metal layer for isolating the second metal layer and the common electrode layer;
  • the common electrode layer includes a common electrode line disposed on the second insulating layer and a transparent common electrode disposed on the common electrode line and the second insulating layer; wherein a resistivity of the common electrode line Less than the resistivity of the transparent common electrode;
  • a third insulating layer disposed on the common electrode layer for isolating the common electrode layer and the transparent electrode layer;
  • the transparent electrode layer is disposed on the third insulating layer to form a transparent pixel electrode, and the transparent pixel electrode passes through the third insulating layer, the common electrode layer, and the second insulating layer A via is connected to the drain of the thin film transistor.
  • the surface of the transparent pixel electrode is provided with a slit structure.
  • the FFS array substrate includes a plurality of display domains.
  • the slits in the slit structure of the transparent pixel electrode of each of the display domains have different extending directions.
  • the common electrode line is disposed at a boundary of adjacent display domains.
  • the second metal layer further includes a common line for providing a common signal, and the common electrode line passes through the second through hole penetrating the second insulating layer Connected to the common line on the second metal layer.
  • the common electrode layer includes a transparent common electrode disposed on the second insulating layer, and a common electrode line disposed on the transparent common electrode;
  • the resistivity of the common electrode line is smaller than the resistivity of the transparent common electrode.
  • the FFS array substrate and the liquid crystal display device of the present invention ensure the stability of the potential on the common electrode by providing the common electrode layer having the common electrode line and the transparent common electrode.
  • the display effect of the corresponding liquid crystal display device is improved; and the technical problem of potential instability on the common electrode of the conventional FFS array substrate and the liquid crystal display panel is solved.
  • FIG. 1A is a top plan view showing a first preferred embodiment of an FFS array substrate of the present invention
  • Figure 1B is a schematic cross-sectional view of the line A-A' of Figure 1A;
  • FIG. 2A is a top plan view showing a second preferred embodiment of the FFS array substrate of the present invention.
  • Figure 2B is a schematic cross-sectional view of the line B-B' of Figure 2A;
  • 3A is a top plan view showing a third preferred embodiment of the FFS array substrate of the present invention.
  • Figure 3B is a schematic cross-sectional view showing the line C-C' of Figure 3A;
  • FIG. 4A is a top plan view showing a fourth preferred embodiment of the FFS array substrate of the present invention.
  • Figure 4B is a schematic cross-sectional view showing the line D-D' of Figure 4A;
  • 5A is a top plan view showing a fifth preferred embodiment of the FFS array substrate of the present invention.
  • Figure 5B is a schematic cross-sectional view showing the line E-E' of Figure 5A;
  • 6A is a top plan view showing a sixth preferred embodiment of the FFS array substrate of the present invention.
  • Figure 6B is a schematic cross-sectional view showing the line F-F' of Figure 6A;
  • FIG. 7 is a top plan view showing a seventh preferred embodiment of the FFS array substrate of the present invention.
  • FIG. 8 is a top plan view showing the eighth preferred embodiment of the FFS array substrate of the present invention.
  • FIG. 1A is a top plan view showing a first preferred embodiment of the FFS array substrate of the present invention
  • FIG. 1B is a cross-sectional structural view taken along line A-A' of FIG. 1A.
  • the FFS array substrate 10 of the preferred embodiment includes a base substrate 11, a first metal layer, a first insulating layer 13, a second metal layer, a second insulating layer 15, a common electrode layer, a third insulating layer 17, and a transparent electrode layer. .
  • the first metal layer is disposed on the base substrate 11 to form the scan line 121 and the gate electrode 122 of the thin film transistor; the first insulating layer 13 is disposed on the first metal layer for isolating the first metal layer and the second metal layer a second metal layer is disposed on the first insulating layer 13 to form a data line 141, a source 142 of the thin film transistor, and a drain 143 of the thin film transistor; the second insulating layer 15 is disposed on the second metal layer for isolation a second metal layer and a common electrode layer; the common electrode layer includes a common electrode line 162 disposed on the second insulating layer 15 and a transparent common electrode 161 disposed on the common electrode line 162 and the third insulating layer 15, wherein the common electrode line
  • the resistivity of 162 is smaller than the resistivity of the transparent common electrode 161; the third insulating layer 17 is disposed on the common electrode layer for isolating the transparent electrode layer and the common electrode layer; and the transparent electrode layer is disposed on the third
  • the FFS array substrate 10 of the preferred embodiment includes a plurality of display domains, and the surface of the transparent pixel electrode 181 of the FFS array substrate 10 is provided with a slit structure 182, and the slit structure of the transparent pixel electrode 181 of each display domain of the FFS array substrate 10 In 182, the slits extend in different directions.
  • the common electrode line 162 is disposed at the boundary of adjacent display domains.
  • the transparent pixel electrode 181 on the transparent electrode layer receives the data signal on the data line 141 through the first via 151, the drain 143 of the thin film transistor, and the source 142 of the thin film transistor.
  • the transparent common electrode 161 on the common electrode layer receives a common signal through the common electrode line 162.
  • the liquid crystal molecules in the liquid crystal layer of the liquid crystal display device are deflected by the data signal and the common signal, so that the liquid crystal display device displays the corresponding picture content.
  • the common electrode line 162 is a metal wire of low resistivity, the impedance of the entire common electrode can be preferably lowered, so that the potential on the common electrode is more stable and more uniform.
  • the boundary portion of the adjacent display domains is a weak display region, that is, the display effect is poor; and the opaque common electrode line 162 is disposed at the boundary of the adjacent display domains, the common electrode line 162 can be avoided for the liquid crystal display device.
  • the aperture ratio causes a large influence, so that the impedance of the common electrode is lowered in the case where the influence on the aperture ratio of the liquid crystal display device is small.
  • the common electrode line 162 is inserted into each pixel of the liquid crystal display device.
  • the common electrode line 162 can also be used for transmitting a touch signal.
  • the FFS array substrate of the preferred embodiment ensures the stability of the potential on the common electrode by providing the common electrode layer having the common electrode line and the transparent common electrode, thereby improving the display effect of the corresponding liquid crystal display device.
  • FIG. 2A is a schematic top plan view of a second preferred embodiment of the FFS array substrate of the present invention
  • FIG. 2B is a cross-sectional structural view of the line B-B' of FIG. 2A
  • the FFS array substrate 20 of the preferred embodiment includes a base substrate 21, a first metal layer, a first insulating layer 23, a second metal layer, a second insulating layer 25, a common electrode layer, a third insulating layer 27, and a transparent electrode layer. .
  • the first metal layer is disposed on the base substrate 21 to form the scan line 221 and the gate 222 of the thin film transistor; the first insulating layer 23 is disposed on the first metal layer for isolating the first metal layer and the second metal layer a second metal layer is disposed on the first insulating layer 23 to form the data line 241, the source 242 of the thin film transistor, and the drain 243 of the thin film transistor; the second insulating layer 25 is disposed on the second metal layer for isolation a second metal layer and a common electrode layer; the common electrode layer includes a common electrode line 262 disposed on the second insulating layer 25 and a transparent common electrode 261 disposed on the common electrode line 262 and the second insulating layer 25, wherein the common electrode line
  • the resistivity of 262 is smaller than the resistivity of the transparent common electrode 261; the third insulating layer 27 is disposed on the common electrode layer for isolating the transparent electrode layer and the common electrode layer; and the transparent electrode layer is disposed on the third insulating layer 27 to
  • the FFS array substrate 20 of the preferred embodiment includes a plurality of display domains, and the surface of the transparent pixel electrode 281 of the FFS array substrate 20 is provided with a slit structure 282, and the slit structure of the transparent pixel electrode 281 of each display domain of the FFS array substrate 20 In 282, the slits extend in different directions.
  • the common electrode line 262 is disposed at the boundary of adjacent display domains.
  • the second metal layer of the FFS array substrate 20 of the preferred embodiment is further provided with a common line 244 for providing a common signal, and the common electrode layer passes through the second through the second insulating layer 25.
  • the via 252 is connected to a common line 244 on the second metal layer.
  • the common line 244 can also be disposed on the first metal layer.
  • the transparent pixel electrode 281 on the transparent electrode layer receives the data signal on the data line 241 through the first via 251, the drain 243 of the thin film transistor, and the source 242 of the thin film transistor.
  • the transparent common electrode 261 on the common electrode layer receives a common signal through the common electrode line 262 on the common electrode layer, the second via 252, and the common line 244 on the second metal layer.
  • the liquid crystal molecules in the liquid crystal layer of the liquid crystal display device are deflected by the data signal and the common signal, so that the liquid crystal display device displays the corresponding picture content.
  • the FFS array substrate of the preferred embodiment transmits a common signal through a common line on the second metal layer, and the common electrode line on the common electrode layer does not need to penetrate the entire liquid crystal display device, so the aperture ratio of the common electrode line to the liquid crystal display device is set. The impact is even smaller.
  • FIG. 3A is a schematic top plan view of a third preferred embodiment of the FFS array substrate of the present invention
  • FIG. 3B is a cross-sectional structural view of the C-C' cross-section of FIG. 3A.
  • the FFS array substrate 30 of the preferred embodiment includes a base substrate 31, a first metal layer, a first insulating layer 33, a second metal layer, a second insulating layer 35, a common electrode layer, a third insulating layer 37, and a transparent electrode layer. .
  • the first metal layer is disposed on the base substrate 31 to form the scan line 321 and the gate 322 of the thin film transistor; the first insulating layer 33 is disposed on the first metal layer for isolating the first metal layer and the second metal layer a second metal layer is disposed on the first insulating layer 33 to form a data line 341, a source 342 of the thin film transistor, and a drain 343 of the thin film transistor; the second insulating layer 35 is disposed on the second metal layer for isolation a second metal layer and a common electrode layer; the common electrode layer includes a transparent common electrode 361 disposed on the second insulating layer 35 and a common electrode line 362 disposed on the transparent common electrode 361, wherein the common electrode line 362 has a resistivity less than that of the transparent The resistivity of the common electrode 361; the third insulating layer 37 is disposed on the common electrode layer for isolating the transparent electrode layer and the common electrode layer; the transparent electrode layer is disposed on the third insulating layer 37 to form the transparent pixel
  • the FFS array substrate 30 of the preferred embodiment includes a plurality of display domains, and the surface of the transparent pixel electrode 381 of the FFS array substrate 30 is provided with a slit structure 382, and the slit structure of the transparent pixel electrode 381 of each display domain of the FFS array substrate 30
  • the slits in 382 extend in different directions.
  • the common electrode line 362 is disposed at the boundary of adjacent display domains.
  • the preferred embodiment differs from the first preferred embodiment in that the common electrode line 362 is disposed on the transparent common electrode 361.
  • the specific working principle of the FFS array substrate 30 of the preferred embodiment is the same as or similar to that described in the first preferred embodiment of the FFS array substrate. For details, refer to the related description in the first preferred embodiment of the FFS array substrate.
  • the FFS array substrate of the preferred embodiment also ensures the stability of the potential on the common electrode by providing the common electrode layer having the common electrode line and the transparent common electrode, thereby improving the display effect of the corresponding liquid crystal display device.
  • FIG. 4A is a schematic top plan view of a fourth preferred embodiment of the FFS array substrate of the present invention
  • FIG. 4B is a cross-sectional structural view of the D-D' cross-section of FIG. 4A.
  • the FFS array substrate 40 of the preferred embodiment includes a base substrate 41, a first metal layer, a first insulating layer 43, a second metal layer, a common electrode layer, a second insulating layer 46, and a transparent electrode layer.
  • the first metal layer is disposed on the base substrate 41 to form the scan line 421 and the gate 422 of the thin film transistor; the first insulating layer 43 is disposed on the first metal layer for isolating the first metal layer and the second metal layer Separating the first metal layer and the common electrode layer; the second metal layer is disposed on the first insulating layer 43 to form the data line 441, the source 442 of the thin film transistor, and the drain 443 of the thin film transistor; the common electrode layer is disposed at a common electrode line 452 on the first insulating layer 43, and a transparent common electrode 451 disposed on the common electrode line 452 and the first insulating layer 43, wherein the resistivity of the common electrode line 452 is smaller than the resistivity of the transparent common electrode 451; The second insulating layer 46 is disposed on the second metal layer and the common electrode layer for isolating the common electrode layer and the transparent electrode layer, isolating the second metal layer, and the transparent electrode layer; the transparent electrode layer is disposed on the second insulating layer
  • the FFS array substrate 40 of the preferred embodiment includes a plurality of display domains, and the surface of the transparent pixel electrode 481 of the FFS array substrate 40 is provided with a slit structure 482, and the slit structure of the transparent pixel electrode 481 of each display domain of the FFS array substrate 40 In 482, the slits extend in different directions.
  • the common electrode line 452 is disposed at the boundary of adjacent display domains.
  • the transparent pixel electrode 471 on the transparent electrode layer receives the data signal on the data line 441 through the first via 461, the drain 443 of the thin film transistor, and the source 442 of the thin film transistor.
  • the transparent common electrode 451 on the common electrode layer receives a common signal through the common electrode line 452.
  • the liquid crystal molecules in the liquid crystal layer of the liquid crystal display device are deflected by the data signal and the common signal, so that the liquid crystal display device displays the corresponding picture content.
  • the common electrode line 452 is a metal wire of low resistivity, the impedance of the entire common electrode can be preferably lowered, so that the potential on the common electrode is more stable and more uniform.
  • the boundary portion of the adjacent display domains is a weak display region, that is, the display effect is poor; and the opaque common electrode line 452 is disposed at the boundary of the adjacent display domains, the common electrode line 452 can be avoided on the liquid crystal display device.
  • the aperture ratio causes a large influence, so that the impedance of the common electrode is lowered in the case where the influence on the aperture ratio of the liquid crystal display device is small.
  • the common electrode line 452 is inserted into each pixel of the liquid crystal display device.
  • the common electrode line 452 can also be used for transmitting a touch signal.
  • the FFS array substrate of the preferred embodiment ensures the stability of the potential on the common electrode by providing the common electrode layer having the common electrode line and the transparent common electrode, thereby improving the display effect of the corresponding liquid crystal display device.
  • FIG. 5A is a top plan view of a fifth preferred embodiment of the FFS array substrate of the present invention
  • FIG. 5B is a cross-sectional structural view of the E-E' cross-section of FIG. 5A.
  • the FFS array substrate 50 of the preferred embodiment includes a base substrate 51, a first metal layer, a first insulating layer 53, a second metal layer, a common electrode layer, a second insulating layer 56, and a transparent electrode layer.
  • the first metal layer is disposed on the base substrate 51 to form the scan line 521 and the gate 522 of the thin film transistor; the first insulating layer 53 is disposed on the first metal layer for isolating the first metal layer and the second metal layer Separating the first metal layer and the common electrode layer; the second metal layer is disposed on the first insulating layer 53 to form the data line 541, the source 542 of the thin film transistor, and the drain 543 of the thin film transistor; the common electrode layer is disposed at a common electrode line 552 on the first insulating layer 53, and a transparent common electrode 551 disposed on the common electrode line 552 and the first insulating layer 53, wherein the resistivity of the common electrode line 552 is smaller than the resistivity of the transparent common electrode 551; The second insulating layer 56 is disposed on the second metal layer and the common electrode layer for isolating the common electrode layer and the transparent electrode layer, isolating the second metal layer, and the transparent electrode layer; the transparent electrode layer is disposed on the second insulating layer
  • the FFS array substrate 50 of the preferred embodiment includes a plurality of display domains, and the surface of the transparent pixel electrode 581 of the FFS array substrate 50 is provided with a slit structure 582, and the slit structure of the transparent pixel electrode 581 of each display domain of the FFS array substrate 50 In 582, the slits extend in different directions.
  • the common electrode line 552 is disposed at the boundary of adjacent display domains.
  • the first metal layer of the FFS array substrate 50 of the preferred embodiment is further provided with a common line 523 for providing a common signal, and the common electrode layer passes through the second through the first insulating layer 53.
  • the through hole 531 is connected to the common line 523 on the first metal layer.
  • the transparent pixel electrode 571 on the transparent electrode layer receives the data signal on the data line 541 through the first via 561, the drain 543 of the thin film transistor, and the source 542 of the thin film transistor.
  • the transparent common electrode 551 on the common electrode layer receives a common signal through the common electrode line 552 on the common electrode layer, the second via 531, and the common line 523 on the first metal layer.
  • the liquid crystal molecules in the liquid crystal layer of the liquid crystal display device are deflected by the data signal and the common signal, so that the liquid crystal display device displays the corresponding picture content.
  • the FFS array substrate of the preferred embodiment transmits a common signal through a common line on the first metal layer, and the common electrode line on the common electrode layer does not need to penetrate the entire liquid crystal display device, so the arrangement ratio of the common electrode line to the liquid crystal display device The impact is even smaller.
  • FIG. 6A is a schematic top plan view of a sixth preferred embodiment of the FFS array substrate of the present invention
  • FIG. 6B is a cross-sectional structural view of the F-F' cross-section of FIG. 6A.
  • the FFS array substrate 60 of the preferred embodiment includes a base substrate 61, a first metal layer, a first insulating layer 63, a second metal layer, a common electrode layer, a second insulating layer 66, and a transparent electrode layer.
  • the first metal layer is disposed on the base substrate 61 to form the scan line 621 and the gate 622 of the thin film transistor; the first insulating layer 63 is disposed on the first metal layer for isolating the first metal layer and the second metal layer Separating the first metal layer and the common electrode layer; the second metal layer is disposed on the first insulating layer 63 to form the data line 641, the source 642 of the thin film transistor, and the drain 643 of the thin film transistor; the common electrode layer is disposed at a transparent common electrode 651 on the first insulating layer 63, and a common electrode line 652 disposed on the transparent common electrode 651, wherein the resistivity of the common electrode line 652 is smaller than that of the transparent common electrode 651; the second insulating layer 66 is disposed On the second metal layer and the common electrode layer, the common electrode layer and the transparent electrode layer are separated, the second metal layer and the transparent electrode layer are separated; the transparent electrode layer is disposed on the second insulating layer 66 to form the transparent pixel electrode 671
  • the transparent pixel electrode 671 is connected to the drain 643 of the thin film transistor on the second metal layer through the first via 661 penetrating the second insulating layer 66; in addition, the FFS array substrate 60 is further It includes a channel 681 for forming a semiconductor layer of a thin film transistor.
  • the FFS array substrate 60 of the preferred embodiment includes a plurality of display domains, and the surface of the transparent pixel electrode 671 of the FFS array substrate 60 is provided with a slit structure 672, and the slit structure of the transparent pixel electrode 671 of each display domain of the FFS array substrate 60
  • the slits in 672 extend in different directions.
  • the common electrode line 652 is disposed at the boundary of adjacent display domains.
  • the present preferred embodiment differs from the fourth preferred embodiment in that the common electrode line 652 is disposed on the transparent common electrode 651.
  • the specific working principle of the FFS array substrate 60 of the preferred embodiment is the same as or similar to that described in the third preferred embodiment of the FFS array substrate. For details, refer to the related description in the first preferred embodiment of the FFS array substrate.
  • the FFS array substrate of the preferred embodiment also ensures the stability of the potential on the common electrode by providing the common electrode layer having the common electrode line and the transparent common electrode, thereby improving the display effect of the corresponding liquid crystal display device.
  • the FFS array substrate of the present invention includes a plurality of display domains, and the manner in which the display domains are divided can be determined according to customer requirements and actual conditions.
  • FIG. 7 is a schematic top plan view of a seventh preferred embodiment of the FFS array substrate of the present invention.
  • Each pixel in the FFS array substrate 70 of the preferred embodiment has two left and right display domains, and thus the common electrode line 71 is disposed on the top-down center line of each pixel.
  • FIG. 8 is a schematic top plan view of an eighth preferred embodiment of the FFS array substrate of the present invention.
  • Each pixel in the FFS array substrate 80 of the preferred embodiment has upper and lower display domains, and thus the common electrode line 81 is disposed on the left-to-right center line of each pixel.
  • the arrangement manner of the common electrode lines is different, but as long as the common electrode lines are disposed at the boundary of adjacent display domains, the common electrode impedance can be improved and the liquid crystal can be improved.
  • the effect of the aperture ratio of the display device is different, but as long as the common electrode lines are disposed at the boundary of adjacent display domains, the common electrode impedance can be improved and the liquid crystal can be improved. The effect of the aperture ratio of the display device.
  • the present invention also provides a liquid crystal display panel including an upper substrate, an FFS array substrate, and a liquid crystal layer disposed between the upper substrate and the FFS array substrate.
  • the specific structure and the specific working principle of the FFS array substrate are the same as or similar to those in the preferred embodiment of the FFS array substrate. For details, refer to the related description in the preferred embodiment of the FFS array substrate.
  • the FFS array substrate and the liquid crystal display device of the present invention ensure the stability of the potential on the common electrode by providing the common electrode layer having the common electrode line and the transparent common electrode, thereby improving the display effect of the corresponding liquid crystal display device; There are technical problems in the potential instability of the FFS array substrate and the common electrode of the liquid crystal display panel.

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Abstract

一种FFS阵列基板（10），包括衬底基板（11）、第一金属层、第一绝缘层（13）、第二金属层、第二绝缘层（15）、公共电极层、第三绝缘层（17）以及透明电极层；其中公共电极层包括公共电极线（162）以及透明公共电极（161），公共电极线（162）的电阻率小于透明公共电极（161）的电阻率。该FFS阵列基板（10）保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果。

Description

FFS阵列基板及液晶显示面板 技术领域
本发明涉及液晶显示领域，特别是涉及一种FFS阵列基板及液晶显示面板。
 背景技术
液晶显示装置是目前使用最广泛的一种平板显示装置，可为各种电子设备如移动电话、个人数字助理(PDA)、数字相机以及计算机等提供具有高分辨率彩色屏幕。其中FFS（Fringe Field Switching，边缘场开关技术）液晶显示装置以其观看视角广以及开口率高等特点受到广大用户的喜爱。
目前普遍采用的FFS液晶显示装置，通常包括上基板、下基板以及设置在上基板和下基板之间的液晶层。其中下基板上一般设置有平面的公共电极以及具有狭缝（slit）结构的像素电极，以实现更好的显示模式。
同时为了避免液晶显示装置的观看视角过小的问题，每个像素均具有多个区域的狭缝结构，每个区域的狭缝结构中狭缝的延伸方向均不同，以形成多个显示畴。不同显示畴的液晶分子的预偏转方向不同，从而扩大了从液晶层出射的光线的角度，实现了液晶显示装置的广角度显示。
同样为了增加液晶显示装置的开口率，液晶显示装置的下基板上设置的公共电极一般为透明电极，但是透明电极的阻抗较大，导致公共电极上有大电流通过时，公共电极上的电位不稳定。
故，有必要提供一种FFS阵列基板及液晶显示面板，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种公共电极具有稳定电位的FFS阵列基板及液晶显示面板；以解决现有的FFS阵列基板以及液晶显示面板的公共电极上的电位不稳定的技术问题。
 技术解决方案
本发明实施例提供一种FFS阵列基板，其包括：
衬底基板；
第一金属层，设置在所述衬底基板上，以形成扫描线以及薄膜晶体管的栅极；
第一绝缘层，设置在所述第一金属层上，用于隔离所述第一金属层以及第二金属层；
所述第二金属层，设置在所述第一绝缘层上，以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极；
第二绝缘层，设置在所述第二金属层上，用于隔离所述第二金属层以及公共电极层；
所述公共电极层，包括设置在所述第二绝缘层上的公共电极线以及设置在所述公共电极线以及所述第二绝缘层上的透明公共电极；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率；
第三绝缘层，设置在所述公共电极层上，用于隔离所述公共电极层以及透明电极层；以及
所述透明电极层，设置在所述第三绝缘层上，以形成透明像素电极，所述透明像素电极通过贯穿所述第三绝缘层、所述公共电极层以及所述第二绝缘层的第一通孔与所述薄膜晶体管的漏极连接。
在本发明所述的FFS阵列基板中，所述透明像素电极表面设置有狭缝结构。
在本发明所述的FFS阵列基板中，所述FFS阵列基板包括多个显示畴。
在本发明所述的FFS阵列基板中，每个所述显示畴的所述透明像素电极的所述狭缝结构中狭缝的延伸方向不同。
在本发明所述的FFS阵列基板中，所述公共电极线设置在相邻的所述显示畴的交界处。
在本发明所述的FFS阵列基板中，所述第二金属层还包括用于提供公共信号的公共线，所述公共电极线通过贯穿所述第二绝缘层的第二通孔与所述第二金属层上的所述公共线连接。
在本发明所述的FFS阵列基板中，所述公共电极层包括设置在所述第二绝缘层上的透明公共电极，以及设置在所述透明公共电极上的公共电极线；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率。
本发明实施例还提供一种FFS阵列基板，其包括：
衬底基板；
第一金属层，设置在所述衬底基板上，以形成扫描线以及薄膜晶体管的栅极；
第一绝缘层，设置在所述第一金属层上，用于隔离所述第一金属层以及第二金属层，以及隔离所述第一金属层以及公共电极层；
第二金属层，设置在所述第一绝缘层上，以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极；
所述公共电极层，包括设置在所述第一绝缘层上的公共电极线以及设置在所述公共电极线以及所述第一绝缘层上的透明公共电极；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率；
第二绝缘层，设置在所述第二金属层以及所述公共电极层上，用于隔离所述第二金属层以及透明电极层，以及隔离所述公共电极层以及所述透明电极层；以及
所述透明电极层，设置在所述第二绝缘层上，以形成透明像素电极，所述透明像素电极通过贯穿所述第二绝缘层的第一通孔与所述薄膜晶体管的漏极连接。
在本发明所述的FFS阵列基板中，所述透明像素电极表面设置有狭缝结构。
在本发明所述的FFS阵列基板中，所述FFS阵列基板包括多个显示畴。
在本发明所述的FFS阵列基板中，每个所述显示畴的所述透明像素电极的所述狭缝结构中狭缝的延伸方向不同。
在本发明所述的FFS阵列基板中，所述公共电极线设置在相邻的所述显示畴的交界处。
在本发明所述的FFS阵列基板中，所述第一金属层还包括用于提供公共信号的公共线，所述公共电极线通过贯穿所述第一绝缘层的第二通孔与所述第一金属层上的所述公共线连接。
本发明实施例还提供一种FFS阵列基板的液晶显示装置，其包括上基板、FFS阵列基板以及设置在上基板和FFS阵列基板之间的液晶层；其中所述FFS阵列基板包括：
衬底基板；
第一金属层，设置在所述衬底基板上，以形成扫描线以及薄膜晶体管的栅极；
第一绝缘层，设置在所述第一金属层上，用于隔离所述第一金属层以及第二金属层；
所述第二金属层，设置在所述第一绝缘层上，以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极；
第二绝缘层，设置在所述第二金属层上，用于隔离所述第二金属层以及公共电极层；
所述公共电极层，包括设置在所述第二绝缘层上的公共电极线以及设置在所述公共电极线以及所述第二绝缘层上的透明公共电极；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率；
第三绝缘层，设置在所述公共电极层上，用于隔离所述公共电极层以及透明电极层；以及
所述透明电极层，设置在所述第三绝缘层上，以形成透明像素电极，所述透明像素电极通过贯穿所述第三绝缘层、所述公共电极层以及所述第二绝缘层的第一通孔与所述薄膜晶体管的漏极连接。
在本发明所述的FFS阵列基板的液晶显示装置中，所述透明像素电极表面设置有狭缝结构。
在本发明所述的FFS阵列基板的液晶显示装置中，所述FFS阵列基板包括多个显示畴。
在本发明所述的FFS阵列基板的液晶显示装置中，每个所述显示畴的所述透明像素电极的所述狭缝结构中狭缝的延伸方向不同。
在本发明所述的FFS阵列基板的液晶显示装置中，所述公共电极线设置在相邻的所述显示畴的交界处。
在本发明所述的FFS阵列基板的液晶显示装置中，所述第二金属层还包括用于提供公共信号的公共线，所述公共电极线通过贯穿所述第二绝缘层的第二通孔与所述第二金属层上的所述公共线连接。
在本发明所述的FFS阵列基板的液晶显示装置中，所述公共电极层包括设置在所述第二绝缘层上的透明公共电极，以及设置在所述透明公共电极上的公共电极线；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率。
 有益效果
相较于现有的FFS阵列基板以及液晶显示装置，本发明的FFS阵列基板以及液晶显示装置通过设置具有公共电极线和透明公共电极的公共电极层，保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果；解决了现有的FFS阵列基板以及液晶显示面板的公共电极上的电位不稳定的技术问题。
 附图说明
图1A为本发明的FFS阵列基板的第一优选实施例的俯视结构示意图；
图1B为图1A的A-A’截面线的截面结构示意图；
图2A为本发明的FFS阵列基板的第二优选实施例的俯视结构示意图；
图2B为图2A的B-B’截面线的截面结构示意图；
图3A为本发明的FFS阵列基板的第三优选实施例的俯视结构示意图；
图3B为图3A的C-C’截面线的截面结构示意图；
图4A为本发明的FFS阵列基板的第四优选实施例的俯视结构示意图；
图4B为图4A的D-D’截面线的截面结构示意图；
图5A为本发明的FFS阵列基板的第五优选实施例的俯视结构示意图；
图5B为图5A的E-E’截面线的截面结构示意图；
图6A为本发明的FFS阵列基板的第六优选实施例的俯视结构示意图；
图6B为图6A的F-F’截面线的截面结构示意图；
图7为本发明的FFS阵列基板的第七五优选实施例的俯视结构示意图；
图8为本发明的FFS阵列基板的第八优选实施例的俯视结构示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是参考附加图式的方向。因此，使用的方向用语是用以说明及理解本发明，而非用以限制本发明。
在图中，结构相似的单元是以相同标号表示。
请参照图1A和图1B, 图1A为本发明的FFS阵列基板的第一优选实施例的俯视结构示意图；图1B为图1A的A-A’截面线的截面结构示意图。本优选实施例的FFS阵列基板10包括衬底基板11、第一金属层、第一绝缘层13、第二金属层、第二绝缘层15、公共电极层、第三绝缘层17以及透明电极层。
第一金属层设置在衬底基板11上，以形成扫描线121以及薄膜晶体管的栅极122；第一绝缘层13设置在第一金属层上，用于隔离第一金属层以及第二金属层；第二金属层设置在第一绝缘层13上，以形成数据线141、薄膜晶体管的源极142以及薄膜晶体管的漏极143；第二绝缘层15设置在第二金属层上，用于隔离第二金属层以及公共电极层；公共电极层包括设置在第二绝缘层15上的公共电极线162以及设置在公共电极线162以及第三绝缘层15上的透明公共电极161，其中公共电极线162的电阻率小于透明公共电极161的电阻率；第三绝缘层17设置在公共电极层上，用于隔离透明电极层以及公共电极层；透明电极层设置在第三绝缘层17上，以形成透明像素电极181，透明像素电极181通过贯穿第三绝缘层17、公共电极层以及第二绝缘层15的第一通孔151与薄膜晶体管的漏极143连接；此外该FFS阵列基板10还包括用于形成薄膜晶体管的沟道191的半导体层。
本优选实施例的FFS阵列基板10包括多个显示畴，FFS阵列基板10的透明像素电极181表面设置有狭缝结构182，FFS阵列基板10的每个显示畴的透明像素电极181的狭缝结构182中狭缝的延伸方向不同。公共电极线162设置在相邻的显示畴的交界处。
本优选实施例的FFS阵列基板10使用时，透明电极层上的透明像素电极181通过第一通孔151、薄膜晶体管的漏极143以及薄膜晶体管的源极142接收数据线141上的数据信号。公共电极层上的透明公共电极161通过公共电极线162接收公共信号。液晶显示装置的液晶层中的液晶分子在数据信号和公共信号的作用下发生偏转，从而液晶显示装置显示相应的画面内容。
由于公共电极线162为低电阻率的金属线，因此可以较好的降低整个公共电极的阻抗，使得公共电极上的电位更加稳定以及更加均匀。
同时由于相邻显示畴的交界部分为弱显示区域，即显示效果较差；将不透光的公共电极线162设置在相邻显示畴的交界处，可以避免公共电极线162对液晶显示装置的开口率造成较大影响，从而在对液晶显示装置的开口率影响较小的情况下，降低了公共电极的阻抗。
此外该公共电极线162贯穿液晶显示装置的各个像素中，当该液晶显示装置的表面设置有触控元件时，该公共电极线162还可用于传输触控信号。
因此本优选实施例的FFS阵列基板通过设置具有公共电极线和透明公共电极的公共电极层，保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果。
请参照图2A和图2B，图2A为本发明的FFS阵列基板的第二优选实施例的俯视结构示意图；图2B为图2A的B-B’截面线的截面结构示意图。本优选实施例的FFS阵列基板20包括衬底基板21、第一金属层、第一绝缘层23、第二金属层、第二绝缘层25、公共电极层、第三绝缘层27以及透明电极层。
第一金属层设置在衬底基板21上，以形成扫描线221以及薄膜晶体管的栅极222；第一绝缘层23设置在第一金属层上，用于隔离第一金属层以及第二金属层；第二金属层设置在第一绝缘层23上，以形成数据线241、薄膜晶体管的源极242以及薄膜晶体管的漏极243；第二绝缘层25设置在第二金属层上，用于隔离第二金属层以及公共电极层；公共电极层包括设置在第二绝缘层25上的公共电极线262以及设置在公共电极线262以及第二绝缘层25上的透明公共电极261，其中公共电极线262的电阻率小于透明公共电极261的电阻率；第三绝缘层27设置在公共电极层上，用于隔离透明电极层以及公共电极层；透明电极层设置在第三绝缘层27上，以形成透明像素电极281，透明像素电极281通过贯穿第三绝缘层27、公共电极层以及第二绝缘层25的第一通孔251与薄膜晶体管的漏极243连接；此外该FFS阵列基板20还包括用于形成薄膜晶体管的沟道291的半导体层。
本优选实施例的FFS阵列基板20包括多个显示畴，FFS阵列基板20的透明像素电极281表面设置有狭缝结构282，FFS阵列基板20的每个显示畴的透明像素电极281的狭缝结构282中狭缝的延伸方向不同。公共电极线262设置在相邻的显示畴的交界处。
在第一优选实施例的基础上，本优选实施例的FFS阵列基板20的第二金属层上还设置有用于提供公共信号的公共线244，公共电极层通过贯穿第二绝缘层25的第二通孔252与第二金属层上的公共线244连接。当然该公共线244也可设置在第一金属层上。
本优选实施例的FFS阵列基板20使用时，透明电极层上的透明像素电极281通过第一通孔251、薄膜晶体管的漏极243以及薄膜晶体管的源极242接收数据线241上的数据信号。公共电极层上的透明公共电极261通过公共电极层上的公共电极线262、第二通孔252以及第二金属层上的公共线244接收公共信号。液晶显示装置的液晶层中的液晶分子在数据信号和公共信号的作用下发生偏转，从而液晶显示装置显示相应的画面内容。
本优选实施例的FFS阵列基板通过第二金属层上的公共线传输公共信号，公共电极层上的公共电极线不需要贯穿整个液晶显示装置，因此公共电极线的设置对液晶显示装置的开口率的影响更小。
请参照图3A和图3B，图3A为本发明的FFS阵列基板的第三优选实施例的俯视结构示意图；图3B为图3A的C-C’截面线的截面结构示意图。本优选实施例的FFS阵列基板30包括衬底基板31、第一金属层、第一绝缘层33、第二金属层、第二绝缘层35、公共电极层、第三绝缘层37以及透明电极层。
第一金属层设置在衬底基板31上，以形成扫描线321以及薄膜晶体管的栅极322；第一绝缘层33设置在第一金属层上，用于隔离第一金属层以及第二金属层；第二金属层设置在第一绝缘层33上，以形成数据线341、薄膜晶体管的源极342以及薄膜晶体管的漏极343；第二绝缘层35设置在第二金属层上，用于隔离第二金属层以及公共电极层；公共电极层包括设置在第二绝缘层35上的透明公共电极361以及设置在透明公共电极361上的公共电极线362，其中公共电极线362的电阻率小于透明公共电极361的电阻率；第三绝缘层37设置在公共电极层上，用于隔离透明电极层以及公共电极层；透明电极层设置在第三绝缘层37上，以形成透明像素电极381，透明像素电极381通过贯穿第三绝缘层37、公共电极层以及第二绝缘层35的第一通孔351与薄膜晶体管的漏极343连接；此外该FFS阵列基板30还包括用于形成薄膜晶体管的沟道391的半导体层。
本优选实施例的FFS阵列基板30包括多个显示畴，FFS阵列基板30的透明像素电极381表面设置有狭缝结构382，FFS阵列基板30的每个显示畴的透明像素电极381的狭缝结构382中狭缝的延伸方向不同。公共电极线362设置在相邻的显示畴的交界处。
本优选实施例与第一优选实施例的区别在于公共电极线362设置在透明公共电极361上。本优选实施例的FFS阵列基板30的具体工作原理与FFS阵列基板的第一优选实施例中的描述相同或相似，具体请参见FFS阵列基板的第一优选实施例中的相关描述。
因此本优选实施例的FFS阵列基板同样通过设置具有公共电极线和透明公共电极的公共电极层，保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果。
请参照图4A和图4B，图4A为本发明的FFS阵列基板的第四优选实施例的俯视结构示意图；图4B为图4A的D-D’截面线的截面结构示意图。本优选实施例的FFS阵列基板40包括衬底基板41、第一金属层、第一绝缘层43、第二金属层、公共电极层、第二绝缘层46以及透明电极层。
第一金属层设置在衬底基板41上，以形成扫描线421以及薄膜晶体管的栅极422；第一绝缘层43设置在第一金属层上，用于隔离第一金属层以及第二金属层、隔离第一金属层以及公共电极层；第二金属层设置在第一绝缘层43上，以形成数据线441、薄膜晶体管的源极442以及薄膜晶体管的漏极443；公共电极层包括设置在第一绝缘层43上的公共电极线452，以及设置在公共电极线452以及第一绝缘层43上的透明公共电极451，其中公共电极线452的电阻率小于透明公共电极451的电阻率；第二绝缘层46设置在第二金属层以及公共电极层上，用于隔离公共电极层以及透明电极层、隔离第二金属层以及透明电极层；透明电极层设置在第二绝缘层46上，以形成透明像素电极471，透明像素电极471通过贯穿第二绝缘层46的第一通孔461与第二金属层上的薄膜晶体管的漏极443连接；此外该FFS阵列基板40还包括用于形成薄膜晶体管的沟道481的半导体层。
本优选实施例的FFS阵列基板40包括多个显示畴，FFS阵列基板40的透明像素电极481表面设置有狭缝结构482，FFS阵列基板40的每个显示畴的透明像素电极481的狭缝结构482中狭缝的延伸方向不同。公共电极线452设置在相邻的显示畴的交界处。
本优选实施例的FFS阵列基板40使用时，透明电极层上的透明像素电极471通过第一通孔461、薄膜晶体管的漏极443以及薄膜晶体管的源极442接收数据线441上的数据信号。公共电极层上的透明公共电极451通过公共电极线452接收公共信号。液晶显示装置的液晶层中的液晶分子在数据信号和公共信号的作用下发生偏转，从而液晶显示装置显示相应的画面内容。
由于公共电极线452为低电阻率的金属线，因此可以较好的降低整个公共电极的阻抗，使得公共电极上的电位更加稳定以及更加均匀。
同时由于相邻显示畴的交界部分为弱显示区域，即显示效果较差；将不透光的公共电极线452设置在相邻显示畴的交界处，可以避免公共电极线452对液晶显示装置的开口率造成较大影响，从而在对液晶显示装置的开口率影响较小的情况下，降低了公共电极的阻抗。
此外该公共电极线452贯穿液晶显示装置的各个像素中，当该液晶显示装置的表面设置有触控元件时，该公共电极线452还可用于传输触控信号。
因此本优选实施例的FFS阵列基板通过设置具有公共电极线和透明公共电极的公共电极层，保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果。
请参照图5A和图5B，图5A为本发明的FFS阵列基板的第五优选实施例的俯视结构示意图；图5B为图5A的E-E’截面线的截面结构示意图。本优选实施例的FFS阵列基板50包括衬底基板51、第一金属层、第一绝缘层53、第二金属层、公共电极层、第二绝缘层56以及透明电极层。
第一金属层设置在衬底基板51上，以形成扫描线521以及薄膜晶体管的栅极522；第一绝缘层53设置在第一金属层上，用于隔离第一金属层以及第二金属层、隔离第一金属层以及公共电极层；第二金属层设置在第一绝缘层53上，以形成数据线541、薄膜晶体管的源极542以及薄膜晶体管的漏极543；公共电极层包括设置在第一绝缘层53上的公共电极线552，以及设置在公共电极线552以及第一绝缘层53上的透明公共电极551，其中公共电极线552的电阻率小于透明公共电极551的电阻率；第二绝缘层56设置在第二金属层以及公共电极层上，用于隔离公共电极层以及透明电极层、隔离第二金属层以及透明电极层；透明电极层设置在第二绝缘层56上，以形成透明像素电极571，透明像素电极571通过贯穿第二绝缘层56的第一通孔561与第二金属层上的薄膜晶体管的漏极543连接；此外该FFS阵列基板50还包括用于形成薄膜晶体管的沟道581的半导体层。
本优选实施例的FFS阵列基板50包括多个显示畴，FFS阵列基板50的透明像素电极581表面设置有狭缝结构582，FFS阵列基板50的每个显示畴的透明像素电极581的狭缝结构582中狭缝的延伸方向不同。公共电极线552设置在相邻的显示畴的交界处。
在第一优选实施例的基础上，本优选实施例的FFS阵列基板50的第一金属层上还设置有用于提供公共信号的公共线523，公共电极层通过贯穿第一绝缘层53的第二通孔531与第一金属层上的公共线523连接。
本优选实施例的FFS阵列基板50使用时，透明电极层上的透明像素电极571通过第一通孔561、薄膜晶体管的漏极543以及薄膜晶体管的源极542接收数据线541上的数据信号。公共电极层上的透明公共电极551通过公共电极层上的公共电极线552、第二通孔531以及第一金属层上的公共线523接收公共信号。液晶显示装置的液晶层中的液晶分子在数据信号和公共信号的作用下发生偏转，从而液晶显示装置显示相应的画面内容。
本优选实施例的FFS阵列基板通过第一金属层上的公共线传输公共信号，公共电极层上的公共电极线不需要贯穿整个液晶显示装置，因此公共电极线的设置对液晶显示装置的开口率的影响更小。
请参照图6A和图6B，图6A为本发明的FFS阵列基板的第六优选实施例的俯视结构示意图；图6B为图6A的F-F’截面线的截面结构示意图。本优选实施例的FFS阵列基板60包括衬底基板61、第一金属层、第一绝缘层63、第二金属层、公共电极层、第二绝缘层66以及透明电极层。
第一金属层设置在衬底基板61上，以形成扫描线621以及薄膜晶体管的栅极622；第一绝缘层63设置在第一金属层上，用于隔离第一金属层以及第二金属层、隔离第一金属层以及公共电极层；第二金属层设置在第一绝缘层63上，以形成数据线641、薄膜晶体管的源极642以及薄膜晶体管的漏极643；公共电极层包括设置在第一绝缘层63上的透明公共电极651，以及设置在透明公共电极651上的公共电极线652，,其中公共电极线652的电阻率小于透明公共电极651的电阻率；第二绝缘层66设置在第二金属层以及公共电极层上，用于隔离公共电极层以及透明电极层、隔离第二金属层以及透明电极层；透明电极层设置在第二绝缘层66上，以形成透明像素电极671，透明像素电极671通过贯穿第二绝缘层66的第一通孔661与第二金属层上的薄膜晶体管的漏极643连接；此外该FFS阵列基板60还包括用于形成薄膜晶体管的沟道681的半导体层。
本优选实施例的FFS阵列基板60包括多个显示畴，FFS阵列基板60的透明像素电极671表面设置有狭缝结构672，FFS阵列基板60的每个显示畴的透明像素电极671的狭缝结构672中狭缝的延伸方向不同。公共电极线652设置在相邻的显示畴的交界处。
本优选实施例与第四优选实施例的区别在于公共电极线652设置在透明公共电极651上。本优选实施例的FFS阵列基板60的具体工作原理与FFS阵列基板的第三优选实施例中的描述相同或相似，具体请参见FFS阵列基板的第一优选实施例中的相关描述。
因此本优选实施例的FFS阵列基板同样通过设置具有公共电极线和透明公共电极的公共电极层，保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果。
本发明的FFS阵列基板包括多个显示畴，显示畴的划分方式可以根据客户的要求以及实际情况而定。请参照图7，图7为本发明的FFS阵列基板的第七优选实施例的俯视结构示意图。本优选实施例的FFS阵列基板70中每个像素具有左右两个显示畴，因此公共电极线71设置在每个像素的由上至下的中心线上。请参照图8，图8为本发明的FFS阵列基板的第八优选实施例的俯视结构示意图。本优选实施例的FFS阵列基板80中每个像素具有上下两个显示畴，因此公共电极线81设置在每个像素的由左至右的中心线上。
当然根据不同的显示畴的划分方式，公共电极线的设置方式均有所不同，但是只要将公共电极线设置在相邻的显示畴的交界处均可达到较好的降低公共电极阻抗以及提升液晶显示装置的开口率的效果。
本发明还提供一种液晶显示面板，该液晶显示面板包括上基板、FFS阵列基板以及设置在上基板和FFS阵列基板之间的液晶层。该FFS阵列基板的具体结构以及具体工作原理与上述的FFS阵列基板的优选实施例中的相关描述相同或相似，具体请参见上述FFS阵列基板的优选实施例中的相关描述。
本发明的FFS阵列基板以及液晶显示装置通过设置具有公共电极线和透明公共电极的公共电极层，保证了公共电极上的电位的稳定性，提高了相应的液晶显示装置的显示效果；解决了现有的FFS阵列基板以及液晶显示面板的公共电极上的电位不稳定的技术问题。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。

Claims (20)

  1. 一种FFS阵列基板，其包括：
    衬底基板；
    第一金属层，设置在所述衬底基板上，以形成扫描线以及薄膜晶体管的栅极；
    第一绝缘层，设置在所述第一金属层上，用于隔离所述第一金属层以及第二金属层；
    所述第二金属层，设置在所述第一绝缘层上，以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极；
    第二绝缘层，设置在所述第二金属层上，用于隔离所述第二金属层以及公共电极层；
    所述公共电极层，包括设置在所述第二绝缘层上的公共电极线以及设置在所述公共电极线以及所述第二绝缘层上的透明公共电极；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率；
    第三绝缘层，设置在所述公共电极层上，用于隔离所述公共电极层以及透明电极层；以及
    所述透明电极层，设置在所述第三绝缘层上，以形成透明像素电极，所述透明像素电极通过贯穿所述第三绝缘层、所述公共电极层以及所述第二绝缘层的第一通孔与所述薄膜晶体管的漏极连接。
  2. 根据权利要求1所述的FFS阵列基板，其中所述透明像素电极表面设置有狭缝结构。
  3. 根据权利要求2所述的FFS阵列基板，其中所述FFS阵列基板包括多个显示畴。
  4. 根据权利要求3所述的FFS阵列基板，其中每个所述显示畴的所述透明像素电极的所述狭缝结构中狭缝的延伸方向不同。
  5. 根据权利要求3所述的FFS阵列基板，其中所述公共电极线设置在相邻的所述显示畴的交界处。
  6. 根据权利要求1所述的FFS阵列基板，其中所述第二金属层还包括用于提供公共信号的公共线，所述公共电极线通过贯穿所述第二绝缘层的第二通孔与所述第二金属层上的所述公共线连接。
  7. 根据权利要求1所述的FFS阵列基板，其中所述公共电极层包括设置在所述第二绝缘层上的透明公共电极，以及设置在所述透明公共电极上的公共电极线；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率。
  8. 一种FFS阵列基板，其包括：
    衬底基板；
    第一金属层，设置在所述衬底基板上，以形成扫描线以及薄膜晶体管的栅极；
    第一绝缘层，设置在所述第一金属层上，用于隔离所述第一金属层以及第二金属层，以及隔离所述第一金属层以及公共电极层；
    第二金属层，设置在所述第一绝缘层上，以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极；
    所述公共电极层，包括设置在所述第一绝缘层上的公共电极线以及设置在所述公共电极线以及所述第一绝缘层上的透明公共电极；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率；
    第二绝缘层，设置在所述第二金属层以及所述公共电极层上，用于隔离所述第二金属层以及透明电极层，以及隔离所述公共电极层以及所述透明电极层；以及
    所述透明电极层，设置在所述第二绝缘层上，以形成透明像素电极，所述透明像素电极通过贯穿所述第二绝缘层的第一通孔与所述薄膜晶体管的漏极连接。
  9. 根据权利要求8所述的FFS阵列基板，其中所述透明像素电极表面设置有狭缝结构。
  10. 根据权利要求8所述的FFS阵列基板，其中所述FFS阵列基板包括多个显示畴。
  11. 根据权利要求10所述的FFS阵列基板，其中每个所述显示畴的所述透明像素电极的所述狭缝结构中狭缝的延伸方向不同。
  12. 根据权利要求10所述的FFS阵列基板，其中所述公共电极线设置在相邻的所述显示畴的交界处。
  13. 根据权利要求8所述的FFS阵列基板，其中所述第一金属层还包括用于提供公共信号的公共线，所述公共电极线通过贯穿所述第一绝缘层的第二通孔与所述第一金属层上的所述公共线连接。
  14. 一种FFS阵列基板的液晶显示装置，其包括上基板、FFS阵列基板以及设置在上基板和FFS阵列基板之间的液晶层；其中所述FFS阵列基板包括：
    衬底基板；
    第一金属层，设置在所述衬底基板上，以形成扫描线以及薄膜晶体管的栅极；
    第一绝缘层，设置在所述第一金属层上，用于隔离所述第一金属层以及第二金属层；
    所述第二金属层，设置在所述第一绝缘层上，以形成数据线、所述薄膜晶体管的源极以及所述薄膜晶体管的漏极；
    第二绝缘层，设置在所述第二金属层上，用于隔离所述第二金属层以及公共电极层；
    所述公共电极层，包括设置在所述第二绝缘层上的公共电极线以及设置在所述公共电极线以及所述第二绝缘层上的透明公共电极；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率；
    第三绝缘层，设置在所述公共电极层上，用于隔离所述公共电极层以及透明电极层；以及
    所述透明电极层，设置在所述第三绝缘层上，以形成透明像素电极，所述透明像素电极通过贯穿所述第三绝缘层、所述公共电极层以及所述第二绝缘层的第一通孔与所述薄膜晶体管的漏极连接。
  15. 根据权利要求14所述的FFS阵列基板的液晶显示装置，其中所述透明像素电极表面设置有狭缝结构。
  16. 根据权利要求15所述的FFS阵列基板的液晶显示装置，其中所述FFS阵列基板包括多个显示畴。
  17. 根据权利要求16所述的FFS阵列基板的液晶显示装置，其中每个所述显示畴的所述透明像素电极的所述狭缝结构中狭缝的延伸方向不同。
  18. 根据权利要求16所述的FFS阵列基板的液晶显示装置，其中所述公共电极线设置在相邻的所述显示畴的交界处。
  19. 根据权利要求14所述的FFS阵列基板的液晶显示装置，其中所述第二金属层还包括用于提供公共信号的公共线，所述公共电极线通过贯穿所述第二绝缘层的第二通孔与所述第二金属层上的所述公共线连接。
  20. 根据权利要求14所述的FFS阵列基板的液晶显示装置，其中所述公共电极层包括设置在所述第二绝缘层上的透明公共电极，以及设置在所述透明公共电极上的公共电极线；其中所述公共电极线的电阻率小于所述透明公共电极的电阻率。
PCT/CN2014/095512 2014-12-22 2014-12-30 Ffs阵列基板及液晶显示面板 WO2016101303A1 (zh)

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