WO2016038685A1 - Appareil de communication multiplex - Google Patents

Appareil de communication multiplex Download PDF

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Publication number
WO2016038685A1
WO2016038685A1 PCT/JP2014/073798 JP2014073798W WO2016038685A1 WO 2016038685 A1 WO2016038685 A1 WO 2016038685A1 JP 2014073798 W JP2014073798 W JP 2014073798W WO 2016038685 A1 WO2016038685 A1 WO 2016038685A1
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WIPO (PCT)
Prior art keywords
multiplex communication
data
output unit
communication
input
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PCT/JP2014/073798
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English (en)
Japanese (ja)
Inventor
伸夫 長坂
重元 廣田
英和 金井
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富士機械製造株式会社
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Priority to JP2016547292A priority Critical patent/JP6511457B2/ja
Priority to PCT/JP2014/073798 priority patent/WO2016038685A1/fr
Publication of WO2016038685A1 publication Critical patent/WO2016038685A1/fr

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    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04JMULTIPLEX COMMUNICATION
    • H04J3/00Time-division multiplex systems

Definitions

  • the present invention relates to a multiplex communication apparatus that performs multiplex communication with peripheral devices at a distance and constructs a sensor feedback control function with high accuracy.
  • FIG. 5 is a system configuration diagram of a conventional multiple communication system.
  • the multiplex communication system 1001 includes a controller 11 and is divided into an A area (fixed part) 101 and a B area (movable part) 301.
  • the controller 11 controls the entire apparatus by a position / speed / torque command.
  • a area (fixed part) 101 is a multi-axis control amplifier, and controls an AC servo motor, which will be described later, by PID control in response to a command from the controller 11.
  • Area B (movable part) 301 is a head unit, which is a unit attached to the tip of the mounter, and inspects the mounting of the surface-mounted product or the component mounting state on the board.
  • the multi-axis control amplifier which is the A area (fixed portion) 101 has a multi-axis control board 111.
  • the multi-axis control board 111 is a board on which a microcomputer for controlling a 4-axis AC servo motor is mounted.
  • the multi-axis control board 111 includes a PHY-IC 112, a slave ASIC 113, a PHY-IC 114, a 4-axis motor control microcomputer 115, DI 116, D0117, a communication ASIC 118, and four DRV-ICs 119, 120, 121, and 122.
  • the PHY-IC 112 is connected to the controller 11 with a cable 12.
  • the cable 12 is a 100 base-tx based industrial Ethernet (registered trademark) LAN cable.
  • the PHY-IC 112 is connected to the slave ASIC 113.
  • the slave ASIC 113 is connected to the PHY-IC 114 and the 4-axis motor control microcomputer 115.
  • the 4-axis motor control microcomputer 115 is connected to DIs 116 and D0117.
  • the 4-axis motor control microcomputer 115 is connected to the four DRV-ICs 119, 120, 121, and 122 via the communication ASIC 118.
  • the head unit which is the B area (movable part) 301 includes a head substrate 1201, a sensor substrate 311, a limit switch 314, a relay 315, and four AC servomotor / serial encoders 316, 317, 318, and 319.
  • the head substrate 1201 is a substrate that acquires sensor information of the head unit which is the B area (movable part) 301 by I2C communication or SPI communication, and transmits it as slave information of industrial Ethernet (registered trademark). (Moving part) DI / DO control in the head unit which is 301 is performed.
  • the head substrate 1201 includes a PHY-IC 1202, a slave ASIC 1203, and a microcomputer 1204.
  • the microcomputer 1204 has an I2C 1205 and an SPI 1206.
  • the slave ASIC 1203 is connected to the PHY-IC 1202 and the microcomputer 1204.
  • the sensor substrate 311 is a substrate on which the pressure sensor 312 and the acceleration sensor 313 are mounted.
  • the pressure-sensitive sensor 312 is a sensor for controlling the indentation pressure of the mounted component.
  • the pressure sensitive sensor 312 is connected to the I2C 1205 in the microcomputer 1204. Therefore, the sensor value of the pressure sensor 312 is acquired from the microcomputer 1204 via I2C communication.
  • the acceleration sensor 313 is a sensor that detects acceleration in order to suppress vibration of the head unit that is the B area (movable part) 301.
  • the acceleration sensor 313 is connected to the SPI 1206 in the microcomputer 1204. Therefore, the sensor value of the acceleration sensor 313 is acquired from the microcomputer 1204 via SPI communication.
  • the PHY-IC 1202 in the head substrate 1201 is connected to the PHY-IC 114 in the multi-axis control substrate 111 in the A area (fixed portion) 101 by a cable 1301.
  • the cable 1301 is a 100 base-tx-based industrial Ethernet (registered trademark) LAN cable.
  • the limit switch 314, the relay 315, and the four AC servo motor / serial encoders 316, 317, 318, and 319 in the head unit which is the B area (movable part) 301 are the multi-axis control board of the A area (fixed part) 101.
  • 111 are connected to DI 116, D 0117, and four DRV-ICs 119, 120, 121, 122 by cables 1302, 1303, 1304, 1305, 1306, 1307.
  • the present invention has been made in view of the above points, and a small peripheral device that has been conventionally usable only for a short distance can communicate with a unit / apparatus outside the casing at a distance. It is an object to provide a multiplex communication apparatus.
  • the invention according to claim 1 made to solve this problem is a multiplex communication apparatus, wherein serial bus standard data transmission between a microcomputer and a peripheral device is multiplexed within a board or between boards.
  • the “peripheral device” includes, for example, an EEPROM, an A / D converter, a D / A converter, an acceleration sensor, a pressure sensor, or a load cell.
  • serial bus standard data transmission includes, for example, SPI (Serial Peripheral Interface) communication, I2C (Inter-Integrated Circuit) communication, or Microwire (registered trademark) communication.
  • SPI Serial Peripheral Interface
  • I2C Inter-Integrated Circuit
  • Microwire registered trademark
  • a small peripheral device that has been conventionally usable only for a short distance can communicate with a unit / apparatus outside the casing at a distance.
  • FIG. 1 is a system configuration diagram of a multiplex communication system using a multiplex communication board according to an embodiment of the present invention. It is an internal block diagram of the same multiplex communication board. It is the figure by which the multiplex communication protocol by the standard (GbE) of Ethernet (trademark) at the time of the same multiplex communication board transmitting / receiving by a half duplex communication system was represented. It is the figure by which the multiplex communication protocol by the standard (GbE) of Ethernet (trademark) at the time of the same multiplex communication board transmitting / receiving by a half duplex communication system was represented. It is a system block diagram of the multiplex communication system of a prior art.
  • GbE standard
  • Ethernet trademark
  • FIG. 1 is a system configuration diagram of a multiplex communication system in which a multiplex communication board according to an embodiment of the present invention is used.
  • the multiplex communication system 1 includes a controller 11 and is divided into an A area (fixed part) 101 and a B area (movable part) 301.
  • the controller 11 controls the entire apparatus by a position / speed / torque command.
  • a area (fixed part) 101 is a multi-axis control amplifier, and controls an AC servo motor, which will be described later, by PID control in response to a command from the controller 11.
  • Area B (movable part) 301 is a head unit, which is a unit attached to the tip of the mounter, and inspects the mounting of the surface-mounted product or the component mounting state on the board.
  • the multi-axis control amplifier which is the A area (fixed portion) 101 includes a multi-axis control board 111 and the multiplex communication board 201 according to the present embodiment.
  • the multi-axis control board 111 is a board on which a microcomputer for controlling a 4-axis AC servo motor is mounted.
  • the multi-axis control board 111 includes a PHY-IC 112, a slave ASIC 113, a PHY-IC 114, a 4-axis motor control microcomputer 115, DI 116, D0117, a communication ASIC 118, and four DRV-ICs 119, 120, 121, and 122.
  • the 4-axis motor control microcomputer 115 has an I2C 131 and an SPI 132.
  • the PHY-IC 112 is connected to the controller 11 with a cable 12.
  • the cable 12 is a 100 base-tx based industrial Ethernet (registered trademark) LAN cable.
  • the PHY-IC 112 is connected to the slave ASIC 113.
  • the slave ASIC 113 is connected to the PHY-IC 114 and the 4-axis motor control microcomputer 115.
  • the 4-axis motor control microcomputer 115 is connected to DIs 116 and D0117.
  • the 4-axis motor control microcomputer 115 is connected to the four DRV-ICs 119, 120, 121, and 122 via the communication ASIC 118.
  • the multiplex communication board 201 includes an ETHERPHY-IC 202, a multiplex communication FPGA 203, a DO 206, a DI 207, and four DRV-ICs 208, 209, 210, and 211.
  • the multiplex communication FPGA 203 has an I2C 204 and an SPI 205.
  • the ETHERPHY-IC 202 is connected to the multiplex communication FPGA 203.
  • the multiplex communication FPGA 203 is connected to the DO 206, the DI 207, and the four DRV-ICs 208, 209, 210, and 211.
  • the I2C 204 and the SPI 205 in the multiplex communication FPGA 203 are connected to the I2C 131 and the SPI 132 in the 4-axis motor control microcomputer 115.
  • the multiplex communication board 201 is connected to the I2C 131 and the SPI 132 in the multi-axis control board 111 through communication lines in the multi-axis control amplifier of the A area (fixed portion) 101 that is the same housing. .
  • the DO 206, DI 207, and the four DRV-ICs 208, 209, 210, 211 in the multiplex communication board 201 are the DI 116, D 0117, and the four DRV-ICs 119, 120 in the multi-axis control board 111. , 121, 122.
  • the head unit which is the B area (movable part) 301 includes a sensor substrate 311, a multiplex communication substrate 401 according to the present embodiment, a limit switch 314, a relay 315, and four AC servomotor / serial encoders 316, 317, 318, and 319.
  • the sensor substrate 311 is a substrate on which the pressure sensor 312 and the acceleration sensor 313 are mounted.
  • the pressure-sensitive sensor 312 is a sensor for controlling the indentation pressure of the mounted component.
  • the acceleration sensor 313 is a sensor that detects acceleration in order to suppress vibration of the head unit that is the B area (movable part) 301.
  • the multiplex communication board 401 includes an ETHERPHY-IC 402, a multiplex communication FPGA 403, a DI 406, a D 0407, and four DRV-ICs 408, 409, 410, and 411.
  • the multiplex communication FPGA 403 includes an I2C 404 and an SPI 405.
  • the I2C 404 in the multiplex communication FPGA 403 is connected to the pressure-sensitive sensor 312.
  • the SPI 405 in the multiplex communication FPGA 403 is connected to the acceleration sensor 313.
  • the multiplex communication FPGA 403 is connected to the DI 406, D 0407, and the four DRV-ICs 408, 409, 410, and 411.
  • the DI 406, D0407, and four DRV-ICs 408, 409, 410, 411 in the multiplex communication board 401 are a limit switch 314, a relay 315, and four AC servo motor / serial encoders 316, 317, 318. , 319.
  • the ETHERPHY-IC 402 in the multiplex communication board 401 according to the present embodiment is connected by a cable 501 to the ETHERPHY-IC 202 in the multiplex communication board 201 according to the present embodiment in the A area (fixed portion) 101.
  • the cable 501 is an Ethernet (registered trademark) cable for multiplex communication, and a 1000 base-t category 5e anti-bending LAN line is used.
  • FIG. 2 is an internal configuration diagram of the multiplex communication boards 201 and 401 according to the present embodiment. That is, FIG. 2 shows an internal configuration of a board that performs multiplex communication using a serial encoder signal, an I2C signal, and an SPI signal using GbE.
  • the multiplex communication boards 201 and 401 according to the present embodiment are roughly divided into a multiplexing target signal input unit, a multiplexing processing unit, and a multiplexing communication unit using GbE.
  • the multiple communication boards 201 and 401 according to the present embodiment are connected by the cable 501 as described above.
  • the multiplex communication board 201 includes a 1000base-t PHY-IC 212, a DIP-SW 213, a multiplex communication protocol processing unit 220, a serial encoder input / output unit 230, an I2C input / output unit 240, an SPI input / output unit 250, It includes a processing unit 260, a DRIVER-IC 270 for RS485, and two I / O input / output units 280 and 290.
  • the 1000base-t PHY-IC 212 is a 1000base-t communication PHY-IC for performing multiplex communication.
  • the DIP-SW 213 is a DIP switch that sets the timing in advance because the mode for determining data at which timing of the clock in SPI communication is determined by the IC of the sensor or the like (however, the default value is a 4-axis motor) UART and IO setting from the control microcomputer 115 side may also be used).
  • the multiplex communication protocol processing unit 220 is a processing unit that performs mixing / separation processing of local data for a multiplex communication protocol.
  • the multiplex communication protocol processing unit 220 includes a GMII-IF data input unit 221, a demultiplexing unit 222, a multiplex mixing unit 223, and a GMII-IF data output unit 224.
  • the serial encoder input / output unit 230 inputs or outputs ABS serial encoder communication data such as AC servo motors 316 to 319.
  • the serial encoder input / output unit 230 transmits data to the multiplex communication protocol processing unit 220 or outputs data received from the multiplex communication protocol processing unit 220.
  • the serial encoder input / output unit 230 includes an HDLC-I / F data input unit 231, a reception buffer 232, an HDLC-I / F data output unit 233, and a transmission buffer 234, and these signals each signal to be multiplexed.
  • the I2C input / output unit 240 samples the data using the I2C communication clock and the high-speed clock in the multiplex communication FPGA 203 and transmits the H and L (1, 0) signals to the multiplex communication protocol processing unit 220.
  • the I2C input / output unit 240 outputs the H, L (1, 0) signal from the multiplex communication protocol processing unit 220 to the I / O input / output unit 280.
  • the I2C input / output unit 240 includes an I2C-I / F data input unit 241, a reception buffer 242, an I2C-I / F data output unit 243, and a transmission buffer 244, which multiplex each signal to be multiplexed.
  • the SPI input / output unit 250 samples data using the SPI communication clock and the high-speed clock in the multiplex communication FPGA 203, and transmits the H and L (1, 0) signals to the multiplex communication protocol processing unit 220.
  • the SPI input / output unit 250 outputs the H, L (1, 0) signal from the multiplex communication protocol processing unit 220 to the I / O input / output unit 290.
  • the mode for determining data at which timing of the clock is determined in advance by the DIP-SW 213 since it is determined by the IC such as a sensor.
  • the SPI input / output unit 250 includes an SPI-I / F data input unit 251, a reception buffer 252, an SPI-I / F data output unit 253, and a transmission buffer 254, which multiplex each signal to be multiplexed.
  • the multiplex processing unit 260 is a multiplex processing unit for realizing the function of the multiplex communication board 201 according to the present embodiment, and is a multiplex communication FPGA 203.
  • the multiplex processing unit 260 includes a multiplex communication protocol processing unit 220, a serial encoder input / output unit 230, an I2C input / output unit 240, and an SPI input / output unit 250.
  • the RS485 DRIVER-IC 270 is a DRIVER-IC of the physical layer RS485 of the serial encoder.
  • the I / O input / output unit 280 is an input / output unit suitable for the I2C signal level.
  • the I / O input / output unit 290 is an input / output unit suitable for the SPI signal level.
  • the multiplex communication board 401 includes a 1000-base-t PHY-IC 412, an LED 413, a multiplex communication protocol processing unit 420, a serial encoder input / output unit 430, an I2C input / output unit 440, and an SPI input / output unit 450.
  • the 1000base-t PHY-IC 412 is a 1000base-t communication PHY-IC for performing multiplex communication.
  • the LED 413 is a visual confirmation LED for checking whether the specification matches the 4-axis motor control microcomputer 115 side by SPI communication.
  • the multiplex communication protocol processing unit 420 is a processing unit that performs mixing / separation processing of local data for a multiplex communication protocol.
  • the multiplex communication protocol processing unit 420 includes a GMII-IF data input unit 421, a demultiplexing unit 422, a multiplex mixing unit 423, and a GMII-IF data output unit 424.
  • the serial encoder input / output unit 430 inputs or outputs ABS serial encoder communication data of the AC servo motors 316 to 319 and the like.
  • the serial encoder input / output unit 430 transmits data to the multiplex communication protocol processing unit 420 or outputs data received from the multiplex communication protocol processing unit 420.
  • the serial encoder input / output unit 430 includes an HDLC-I / F data input unit 431, a reception buffer 432, an HDLC-I / F data output unit 433, and a transmission buffer 434.
  • the I2C input / output unit 440 samples data using the I2C communication clock and the high-speed clock in the multiplex communication FPGA 403 and transmits the H, L (1, 0) signal to the multiplex communication protocol processing unit 420.
  • the I2C input / output unit 440 outputs the H, L (1, 0) signal from the multiplex communication protocol processing unit 420 to the I / O input / output unit 480.
  • the I2C input / output unit 440 includes an I2C-I / F data input unit 441, a reception buffer 442, an I2C-I / F data output unit 443, and a transmission buffer 444, which multiplex each signal to be multiplexed.
  • the SPI input / output unit 450 samples data using the SPI communication clock and the high-speed clock in the multiplex communication FPGA 403 and transmits the H, L (1, 0) signal to the multiplex communication protocol processing unit 420.
  • the SPI input / output unit 450 outputs the H, L (1, 0) signal from the multiplex communication protocol processing unit 420 to the I / O input / output unit 490.
  • the mode for determining data at which timing of the clock is determined in advance by the DIP-SW 213 since it is determined by the IC such as a sensor.
  • the SPI input / output unit 450 includes an SPI-I / F data input unit 451, a reception buffer 452, an SPI-I / F data output unit 453, and a transmission buffer 454, which multiplex each signal to be multiplexed.
  • the multiplex processing unit 460 is a multiplex processing unit for realizing the function of the multiplex communication board 401 according to the present embodiment, and is a multiplex communication FPGA 403.
  • the multiplex processing unit 460 includes a multiplex communication protocol processing unit 420, a serial encoder input / output unit 430, an I2C input / output unit 440, and an SPI input / output unit 450.
  • the RS485 DRIVER-IC 470 is a DRIVER-IC of the physical layer RS485 of the serial encoder.
  • the I / O input / output unit 480 is an input / output unit suitable for the I2C signal level.
  • the I / O input / output unit 490 is an input / output unit that conforms to the SPI signal level.
  • the multiplex communication boards 201 and 401 according to the present embodiment use GbE (1000 base-t, half-duplex communication) and perform transmission / reception by switching at a fixed number of times.
  • 3 and 4 show a multiplex communication protocol based on the Ethernet (registered trademark) standard GbE when the multiplex communication boards 201 and 401 (see FIG. 2) according to the present embodiment perform transmission and reception by the half-duplex communication method.
  • FIG. 1 1000 base-t, half-duplex communication
  • FIG. 3 is a diagram showing a multiplex communication protocol of a half-duplex communication method for transmitting data from A area 2 to B area 3, but half-duplex for transmitting data from B area 3 to A area 2.
  • the multiplex communication protocol of the communication method is not described.
  • FIG. 4 shows a half-duplex communication protocol for transmitting data from B area 3 to A area 2, but transmits data from A area 2 to B area 3.
  • the multiplex communication protocol of the half duplex communication system is not described.
  • the multiplex communication protocol is a communication protocol as shown in FIG. 3 and FIG. 4 for each 125 MHz clock, and transmits / receives 8 bits, and performs communication synthesis / separation on the local side.
  • the 8 bits are represented by “B0”, “B1”, “B2”, “B3”, “B4”, “B5”, “B6”, “B7” arranged in the vertical axis in FIGS.
  • the numerical values “0” to “14” arranged on the horizontal axis are the counter numbers of the clock (125 MHz, which is the same as that for the standard GbE) for performing multiplexed communication.
  • the numerical values “15” to “29” arranged on the horizontal axis are the counter numbers of the clock (125 MHz, which is the same as that for the standard GbE) for performing multiplexed communication.
  • SPI-D represents data of SPI communication. “With / without SPI” is a flag indicating the presence / absence of data. “With SPI” indicates that there is SPI data. “No SPI” indicates that there is no SPI data. “I2C-D” represents I2C communication data. “I2C present / not present” is a flag indicating the presence / absence of data. “I2C present” indicates that there is I2C data. “No I2C” indicates that there is no I2C data.
  • “DO0”, “DO1”, “DO2”, and “DO3” are digital output signals (Hi: 1, Low: 0).
  • “DI1”, “DI2”, and “DI3” are digital input signals (Hi: 1, Low: 0).
  • “encoder 1 data”, “encoder 2 data”, “encoder 3 data”, and “encoder 4 data” are data for multiplexing encoder signals.
  • the “FEC (15, 11) shortening system” is a shortening system of the Hamming code (15, 11) (3 BIT is fixed to 0) and is 4 BIT data added for error correction.
  • a total of 11 BITs of 8 BIT + (3 BIT is fixed to 0) in a horizontal row with the counter number “2” to “9” are targeted.
  • a total of 11 BITs of 8 BIT + (3 BIT is fixed to 0) in a horizontal row with the counter number “17” to “24” are targeted.
  • “SS1”, “SS2”, “SS3”, and “SS4” are selection signals for devices to be communicated by SPI communication.
  • “MODE0”, “MODE1”, “MODE2”, and “MODE3” represent clock timing modes (Clock Phase) for determining data by SPI communication.
  • “CLK_I2C_NO” and “CLK_SPI_NO” provide four types of representative clock frequencies for I2C and SPI communication (for example, 1, 2, 5, and 10 MHz) for use in peripheral devices on the movable part side. The clock to be specified is specified.
  • the pressure-sensitive sensor 312 and the acceleration sensor 313, which are small peripheral devices that have conventionally been used only for a short distance, can communicate with each other between units and devices outside the casing.
  • the analog output of the sensor is directly connected to the A / D of the microcomputer, so there is no resolution due to noise, and the wiring-saving standards such as industrial Ethernet (registered trademark) or CC-Link (registered trademark) Since it is necessary to select a unit on which A / D or the like is mounted as a slave device, it has not been possible to reduce the size.
  • the pressure-sensitive sensor 312 and the acceleration sensor 313, which are peripheral devices can be directly connected to the multiplex communication board 401 according to this embodiment with high speed and low delay. Good complex control is possible.
  • the 4-axis motor control microcomputer 115 can directly collect data from the sensors (the pressure-sensitive sensor 312 and the acceleration sensor 313), so that there is little delay and high-performance feedback control can be realized.
  • the communication line includes a multi-axis control amplifier that is A area (fixed part) 101 and a head unit that is B area (movable part) 301. It is only necessary to connect one LAN line of the Ethernet (registered trademark) cable 501 for multiplex communication between the two.
  • the multi-axis control amplifier that is the A area (fixed part) 101 and the B area (movable) No change in wiring with the head unit 301 is required. This can be dealt with only by changing the CPU of the multi-axis control board 111. Therefore, even if the device has already been delivered, the effect of the new function can be obtained by using a new head unit that is the B area (movable part) 301 without wiring work.
  • notch FILTER notch FILTER, etc.
  • the processing load is high because the load on the CPU during this processing is large and the heat generation is high. It is necessary to use an expensive CPU.
  • a control CPU is used by utilizing a predetermined function (for example, LPF, HPF (High Pass Filer), or notch) or a frequency digital filter function in the multiplex communication FPGAs 203 and 403.
  • a predetermined function for example, LPF, HPF (High Pass Filer), or notch
  • a frequency digital filter function in the multiplex communication FPGAs 203 and 403.
  • this invention is not limited to the said embodiment, A various change is possible in the range which does not deviate from the meaning.
  • the pressure-sensitive sensor 312 and the acceleration sensor 313 are used as “peripheral devices”.
  • an EEPROM, an A / D converter, a D / A converter, a load cell, or the like may be used as the “peripheral device”.
  • SPI communication and I2C communication are performed as “serial bus standard data transmission”.
  • Serial bus standard data transmission Microwire (registered trademark) communication or the like may be performed.
  • Multiplex Communication System 115 4-axis Motor Control Microcomputer 201 Multiplex Communication Board 202 ETHERPHY-IC 203 FPGA for multiplex communication 233 HDLC-I / F output unit 234 Transmission buffer 243 I2C-I / F data output unit 244 Transmission buffer 253 SPI-I / F data output unit 254 Transmission buffer 311 Sensor substrate 312 Pressure sensor 313 Acceleration sensor 401 Multiplex communication substrate 402 ETHERPHY-IC 403 FPGA for multiplex communication 433 HDLC-I / F output unit 434 Transmission buffer 443 I2C-I / F data output unit 444 Transmission buffer 453 SPI-I / F data output unit 454 Transmission buffer 501 Ethernet (registered trademark) cable for multiplex communication

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  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Time-Division Multiplex Systems (AREA)

Abstract

L'invention concerne un appareil de communication multiplex destiné à permettre la communication de dispositifs périphériques de petite taille, qui ne pouvaient classiquement être utilisés qu'à courte distance, entre des unités/appareils à distance à l'extérieur du boîtier. Un circuit intégré de couche physique Ethernet (ETHERPHY-IC) 402 dans une carte de communication multiplex 401 est connecté à un ETHERPHY-IC 202 dans une carte de communication multiplex 201 d'une zone A (partie fixe) 101 à l'aide d'un câble 501. Le câble 501 est un câble Ethernet pour communication multiplex (marque déposée), qui comprend une ligne LAN flexible de catégorie 5 pour 1000Base-T.
PCT/JP2014/073798 2014-09-09 2014-09-09 Appareil de communication multiplex WO2016038685A1 (fr)

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PCT/JP2014/073798 WO2016038685A1 (fr) 2014-09-09 2014-09-09 Appareil de communication multiplex

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