WO2016019860A1 - 垂直型led芯片结构及其制备方法 - Google Patents

垂直型led芯片结构及其制备方法 Download PDF

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WO2016019860A1
WO2016019860A1 PCT/CN2015/086098 CN2015086098W WO2016019860A1 WO 2016019860 A1 WO2016019860 A1 WO 2016019860A1 CN 2015086098 W CN2015086098 W CN 2015086098W WO 2016019860 A1 WO2016019860 A1 WO 2016019860A1
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layer
led chip
chip structure
vertical led
fabricating
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PCT/CN2015/086098
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English (en)
French (fr)
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吕孟岩
张琼
童玲
张宇
李起鸣
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映瑞光电科技(上海)有限公司
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Priority to DE112015003673.3T priority Critical patent/DE112015003673T5/de
Priority to GB1701184.2A priority patent/GB2542542B/en
Publication of WO2016019860A1 publication Critical patent/WO2016019860A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/405—Reflective materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008—Processes
    • H01L2933/0016—Processes relating to electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40—Materials therefor
    • H01L33/42—Transparent materials

Definitions

  • the invention relates to the field of LED chip manufacturing, in particular to a vertical LED chip structure and a preparation method thereof.
  • LED chips have two basic structures: a lateral structure (Lateral) and a vertical structure (Vertical).
  • the traditional dressing structure LED chip is a typical representative of the lateral structure.
  • the LED chip is formed on the sapphire substrate. Due to the limitation of the non-conductivity and poor thermal conductivity of the sapphire substrate, the lateral structure has inherent defects since its birth: (1) sapphire is not conductive, and both P and N electrodes are in the LED chip.
  • both the N-electrode and the P-electrode have the problem of shielding the electrode on the light-emitting surface; (2) the thermal conductivity of the sapphire is very poor, and the PN junction heat of the lateral-structure LED chip needs to be derived through the sapphire substrate, for the large-sized power type.
  • the chip has a long heat conduction path, and the LED chip has a large thermal resistance and a limited operating current.
  • V-LEDs use silicon or metal substrates with high conductivity and good heat dissipation.
  • the P electrode and the N electrode of the V-LED chip are respectively on both sides of the epitaxial layer of the LED chip, and since the patterned electrode and all the p-type confinement layers are used as the P-side electrode, the current flows almost entirely vertically through the LED chip.
  • the epitaxial layer has few lateral currents, which can improve the current distribution of the planar structure, improve the luminous efficiency, and can also solve the problem of shielding the P electrode and improve the light-emitting area of the LED chip.
  • the substrate has good thermal conductivity. Silicon or metal, The PN junction heat dissipation problem can be solved, and a large-sized power chip can be realized.
  • the silicon or metal substrate in contact with the P electrode at the bottom is not transparent, a mirror is formed on the P surface of the V-LED chip for increasing the light extraction efficiency, and the V-LED chip mainly emits light from the N side of the top, and the P surface
  • the good or bad ohmic contact and the reflectivity of the mirror become the key points for the success of the V-LED chip.
  • the brightness of the P-mirror mirror directly determines the brightness of the V-LED chip.
  • the light mirror used in the vertical type LED chip is mainly a metal structure, and relies on the high reflectivity of metals such as Ag, Al, and Rh to complete the reflection of light directed toward the bottom of the chip.
  • FIG. 1 is a schematic structural diagram of a vertical LED chip in the prior art.
  • a V-LED chip on the market includes a substrate 10, a protective layer and a metal bonding layer sequentially formed on the substrate 10.
  • the mirror 30 is often made of a metal material having a high reflectance, and a reflective material mainly composed of Ag is used.
  • the formed mirror 30 Due to the active nature of Ag, the formed mirror 30 is prone to oxidation, clustering, migration, etc., so that a protective layer needs to be prepared; due to poor adhesion between P-GaN of Ag and V-LED chips, before the mirror A layer of other metals such as Cr, Ni (not shown) are usually prepared to solve the adhesion problem.
  • the interface of the mirror 30 formed by simply using Ag or other metal materials has a certain absorption of light, which reduces the luminous efficiency of the V-LED.
  • the prior art also proposes a structure of a vertical type LED chip as shown in FIG. 2, which is reflected by an Ag material according to a physical phenomenon in which visible light is totally reflected from an optically dense medium to a light-diffusing medium.
  • the double-layer composite mirror combined with the mirror 30 and a non-conductive low-refractive-index medium (such as SiO 2 ) can effectively reduce the absorption of light at the interface of the mirror 30 and improve the effective reflectivity of the composite mirror.
  • the vertical type LED chip proposed in FIG. 2 is similar to that in FIG. 1, except that a low refractive index medium 31 is formed between the mirror 30 and the P-GaN layer 40 for improvement. Reflectivity.
  • the composite mirror also has an important function as the ohmic contact layer of the P-plane of the vertical LED chip, the low refractive index medium 31 (usually SiO 2 ) is not electrically conductive, and the function of ohmic contact cannot be realized, and only the Ag material can be used.
  • the mirror 30 is implemented, so it is necessary to ensure that the Ag-type mirror 30 occupies a considerable proportion in the composite mirror, and the surface area occupied by the low-refractive-index medium 31 in the composite mirror only occupies the surface area of the composite mirror. 20-80%, and thus the reflectivity of the composite mirror cannot be increased by infinitely increasing the proportion of the low refractive index medium 31 in the composite mirror.
  • the lateral current spreading capability of the P-plane is extremely weak, and the double-layer composite mirror which relies on the distribution of the mirror material 30 of the Ag material to adjust the current distribution is difficult to uniformly spread the current to the entire P-plane.
  • the present invention provides a method for preparing a vertical LED chip structure, including the steps of:
  • the epitaxial layer including an undoped layer, an N-GaN layer, a quantum well layer, and a P-GaN layer which are sequentially formed, the undoped layer being formed On the growth substrate;
  • Forming a low refractive index dielectric layer on the transparent conductive contact layer Forming a low refractive index dielectric layer on the transparent conductive contact layer, performing photolithography on the low refractive index dielectric layer, etching a distribution pattern, the distribution pattern exposing the transparent conductive contact layer;
  • An N electrode is formed on the N-GaN layer.
  • the transparent conductive contact layer is made of ITO, ZnO or AZO.
  • the low refractive index dielectric layer is made of one or more of SiO 2 , SiN x , Ti 3 O 5 , and Al 2 O 3 .
  • the thickness of the low refractive index dielectric layer ranges from 10 angstroms to 50 micrometers.
  • the area of the low refractive index dielectric layer accounts for 85% to 95% of the area of the vertical LED chip.
  • a negative adhesive stripping technique is used to form a reflective layer in a fixed region, such that the size of the reflective layer is smaller than the size of the vertical LED chip.
  • the reflective layer is made of Ag, Al or Rh.
  • the protective layer is made of a combination of (Ti-Pt)x or TiW-Pt, and the metal bonding layer is made of Au, Sn or AuSn alloy.
  • the bonding substrate is made of Si, Cu or MoCu.
  • the growth substrate is removed by laser lift-off or chemical lift-off.
  • the undoped layer is first etched by wet or dry etching before forming the N electrode.
  • the N-GaN layer is exposed; secondly, the N-GaN layer is subjected to a roughening treatment to form a rough surface, and the roughening treatment uses a solution of KOH or H 2 SO 4 .
  • a passivation layer is formed on the rough surface, and the passivation layer is SiO 2 .
  • the N electrode material is Ni/Au, Al/Ti/Pt/Au or Cr/Pt/Au.
  • the present invention also provides a vertical type LED chip structure, which is formed by a preparation method of a vertical type LED chip structure as described above, and the structure includes, in order, a bonding substrate, a metal bonding layer, a protective layer, and a reflective layer. And a low refractive index dielectric layer, a transparent conductive contact layer, a P-GaN layer, a quantum well layer, an N-GaN layer and an N electrode provided with a distribution pattern, wherein the N electrode is connected to the N-GaN layer.
  • a rough surface and a passivation layer are further formed on the surface of the N-GaN layer, and the passivation layer is formed on the rough surface. Both the rough surface and the passivation layer expose the N electrode.
  • the beneficial effects of the present invention are mainly embodied in that a composite reflection consisting of a transparent conductive contact layer, a low refractive index dielectric layer provided with a distribution pattern, and a reflective layer is formed on one side of the P-GaN layer.
  • the mirror enables the low refractive index dielectric layer to occupy a larger area of the composite mirror, which can greatly reduce the absorption ratio of the mirror to the light, and the lateral conductivity of the transparent conductive contact layer is excellent, and the current can be uniformly distributed throughout the P-GaN layer. The distribution effectively improves the overall effective reflectivity of the composite mirror.
  • FIG. 1 is a schematic structural view of a vertical type LED chip in the prior art
  • FIG. 2 is a schematic structural view of another vertical type LED chip in the prior art
  • FIG. 3 is a flow chart showing a method of fabricating a vertical LED chip structure according to an embodiment of the present invention
  • FIG. 4 to FIG. 12 are schematic cross-sectional views showing a structure of a vertical LED chip in an embodiment of the present invention.
  • a method for fabricating a vertical LED chip structure including the steps of:
  • S100 providing a growth substrate, forming an epitaxial layer on the growth substrate, the epitaxial layer comprising an undoped layer, an N-GaN layer, a quantum well layer, and a P-GaN layer formed in sequence, the undoped layer a layer formed on the growth substrate;
  • S800 forming an N electrode on the N-GaN layer.
  • a growth substrate 100 is provided.
  • the growth substrate 100 may be a sapphire substrate, a silicon substrate, a SiC substrate, a patterned substrate, or the like.
  • the epitaxial layer includes an undoped layer 210, an N-GaN layer 220, a quantum well layer 230, and a P-GaN layer 240, wherein the epitaxial layer may be MOCVD (Metal Organic Vapor Deposition, Metal Organic Chemical) Growth methods such as Vapor Deposition) and/or MBE (Molecular Beam Epitaxy) are formed.
  • MOCVD Metal Organic Vapor Deposition, Metal Organic Chemical
  • MBE Molecular Beam Epitaxy
  • a transparent conductive contact layer 300 is formed on the P-GaN layer 240.
  • the transparent conductive contact layer 300 is made of a low-resistance high-transmittance film such as ITO, ZnO or AZO.
  • the transparent conductive contact layer 300 is used as an ohmic contact layer.
  • a low refractive index dielectric layer 400 is formed on the transparent conductive contact layer 300, and the low refractive index dielectric layer 400 is provided with a distribution pattern, that is, a through hole 410 is formed, which is The simplification only schematically depicts a cross section of a through hole, but the invention should not be limited thereto.
  • the distribution pattern is exposed to the transparent conductive contact layer 300, and the distribution pattern may be in various shapes, such as a circular, rectangular or elliptical different combination distribution, etc., which is not limited herein.
  • the low refractive index dielectric layer 400 is made of one or more of SiO 2 , SiN x , Ti 3 O 5 , and Al 2 O 3 , and the low refractive index dielectric layer 400 has a thickness ranging from 10 ⁇ . ⁇ 50 ⁇ m, for example, 100 angstroms.
  • the low refractive index dielectric layer 400 may be formed by using an electron beam (E-beam), a sputtering (Sputter), a reactive plasma deposition (RPD), or the like.
  • the low refractive index medium is formed.
  • the area of the layer 400 accounts for 85% to 95% of the area of the vertical LED chip, so that the absorption ratio of the subsequently formed mirror to light can be greatly reduced.
  • a reflective layer 500 is formed on the low refractive index dielectric layer 400 and the exposed transparent conductive contact layer 300, specifically, using a negative lift-off technique in a fixed region.
  • the reflective layer 500 is formed by evaporation to make the size of the reflective layer 500 smaller than the size of the vertical LED chip, even if the reflective layer 500 exposes the edge of the vertical LED chip, thereby facilitating the subsequent formation of the protective layer.
  • the reflective layer 500 is protected.
  • the material of the reflective layer 500 is Ag, Al or Rh.
  • a protective layer and a metal bonding layer 600 are formed on the reflective layer 500 (the protective layer and the metal bonding layer are illustrated as a layer for simplification of the drawing),
  • the protective layer material is a combination of (Ti-Pt) x or TiW-Pt, and the protective layer covers the reflective layer 500 in its entirety to protect it.
  • the metal bonding layer is made of Au, Sn or AuSn alloy for bonding with a subsequently formed bonding substrate.
  • a bonding substrate 700 is bonded to the metal bonding layer; the bonding substrate 700 is made of a conductive, heat-dissipating substrate such as Si, Cu or MoCu.
  • step S700 the growth substrate 100 is removed, and the growth substrate 100 may be generally removed by laser lift-off or chemical lift-off.
  • the laser lift-off causes the undoped layer 210 to form a layer of metal Ga on the surface. Therefore, it is necessary to remove the metal Ga by using an acid or a base or the like, and the solution used may be HCL or KOH.
  • the undoped layer 210 is first etched by wet or dry (ICP) etching to expose the N-GaN layer 220.
  • the undoped layer 210 may be completely etched away or only partially removed; secondly, the N-GaN layer 220 is roughened to form a rough surface 211, and the roughened surface 211 formed by the roughening treatment can increase the N-GaN layer.
  • the surface area of 220 increases the area of light emitted and improves luminous efficiency.
  • an N electrode 212 is formed on the N-GaN layer 220.
  • the material of the N electrode 212 is Ni/Au, Al/Ti/Pt/Au or Cr/Pt/Au, and is formed.
  • a passivation layer 800 is formed on the rough surface 211, the passivation layer 800 is SiO 2 for protecting the entire chip, and the passivation layer 800 is formed to expose the N electrode 212.
  • a vertical LED chip structure is also proposed, which is formed by a method for fabricating a vertical LED chip structure as described above, the structure including: a bonded substrate in sequence 700, a protective layer and metal bonding layer 600, a reflective layer 500, a low refractive index dielectric layer 400 provided with a distribution pattern, a transparent conductive contact layer 300, a P-GaN layer 240, a quantum well layer 230, an N-GaN layer 220, An N electrode 212, a rough surface 211, and a passivation layer 800, wherein the N electrode 212 is connected to the N-GaN layer 220, and the rough surface 211 is formed on a surface of the N-GaN layer 220, the passivation A layer 800 is formed on the rough surface 211, and both the rough surface 211 and the passivation layer 800 expose the N electrode 212.
  • a transparent conductive contact layer, a low refractive index dielectric layer provided with a distribution pattern, and a reflective layer are sequentially formed on the P-GaN layer.
  • the composite mirror can make the low refractive index dielectric layer occupy a larger area of the composite mirror, can greatly reduce the absorption ratio of the mirror to the light, and because the transparent conductive contact layer has excellent lateral conductivity, the current can be guaranteed throughout the P- The uniform distribution of the GaN layer effectively improves the overall effective reflectivity of the composite mirror.

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Abstract

本发明提出了一种垂直型LED芯片结构及其制备方法，在P-GaN层上依次形成透明导电接触层、设有分布图形的低折射率介质层和反射层三层组成的复合反射镜，可使低折射率介质层占复合反射镜较大的面积，能够大大降低反射镜对光的吸收比例，且由于透明导电接触层横向导电能力优秀，可保证电流在整个P-GaN层均匀的分布，有效提高了复合反射镜的综合有效反射率。

Description

垂直型LED芯片结构及其制备方法 技术领域
本发明涉及LED芯片制造领域，尤其涉及一种垂直型LED芯片结构及其制备方法。
背景技术
近年来，对于发光二极管(Light-Emitting Diode，LED)的研究已经成为趋势。LED芯片有两种基本结构：横向结构(Lateral)和垂直结构(Vertical)。传统的正装结构LED芯片是横向结构的典型代表。LED芯片形成在蓝宝石衬底上，由于受限于蓝宝石衬底不导电、导热率差的制约，横向结构自从诞生就存在先天缺陷：(1)蓝宝石不导电，P电极与N电极均在LED芯片的同一侧，由此带来多种不利因素，如一、在电性能方面，电流在n-与p-类型限制层中横向流动不等距离带来的电流拥挤效应(Current crowding)；二、出光性能方面，N电极与P电极均在出光面上带来的电极遮光问题；(2)蓝宝石导热系数很差，横向结构LED芯片的PN结热量需要通过蓝宝石衬底导出，对大尺寸的功率型芯片来说导热路径较长，这种LED芯片的热阻较大，工作电流也受到限制。
为了克服横向结构LED芯片的这些不足，美国Cree公司、德国Osram公司、美国Philips Lumileds公司及美国SemiLEDs都积极开发垂直型LED芯片(以下简称V-LED)。V-LED采用高导电率、散热良好的硅或者金属衬底。一方面：V-LED芯片的P电极与N电极分别在LED芯片的外延层的两侧，由于图形化电极和全部的p-类型限制层作为P面电极，使得电流几乎全部垂直流过LED芯片的外延层，极少存在横向流动的电流，可以改善平面结构的电流分布问题，提高发光效率，也可以解决P电极的遮光问题，提升LED芯片的发光面积；另一方面：衬底采用导热良好的硅或者金属， PN结散热问题能够得到解决，大尺寸功率型芯片得以实现。
由于底部与P电极接触的硅或金属衬底均不能透光，因此会在V-LED芯片的P面形成反射镜用于增加出光效率，V-LED芯片主要从顶部的N面出光，P面欧姆接触好坏与反射镜反射率高低成为V-LED芯片成败的关键点，其中P面反射镜反射率的优劣直接决定V-LED芯片的发光亮度。目前，垂直型LED芯片采用的光反射镜主要为金属结构，依赖Ag、Al、Rh等金属的高反射率完成射向芯片底部的光的反射。
请参考图1，图1为现有技术中一种垂直型LED芯片的结构示意图，目前，市场上V-LED芯片包括衬底10、依次形成在衬底10上的保护层和金属键合层20、反射镜30、P-GaN层40、量子阱层50、N-GaN层60以及N电极70。通常，反射镜30多使用高反射率的金属材料，常见的为以Ag为主体的反射材料。由于Ag的性质活泼，导致形成的反射镜30易发生氧化、团簇、迁移等现象，从而需制备保护层；由于Ag与V-LED芯片的P-GaN之间粘附力不良，反射镜前通常会制备一层Cr、Ni(图未示出)等其他金属以解决粘附性问题。然而，单纯采用Ag或其他金属材质形成的反射镜30的界面对光线会有一定的吸收，降低了V-LED的发光效率。
为了解决上述问题，现有技术中还提出一种如图2所示的垂直型LED芯片的结构，根据可见光从光密介质入射到光疏介质发生全反射这一物理现象，由Ag材质的反射镜30和一层不导电的低折射率介质(如SiO2)组合的双层复合反射镜，可以有效减小光在反射镜30界面的吸收，提升了复合反射镜的有效反射率。如图2所示，图2中提出的垂直型LED芯片与图1中的相似，不同的是，在反射镜30和P-GaN层40之间形成了低折射率介质31，用于提高有效反射率。
由于复合反射镜还有一个重要功能就是作为垂直型LED芯片P面的欧姆接触层，而低折射率介质31(通常为SiO2)并不导电，无法实现欧姆接 触的功能，只能靠Ag材质的反射镜30来实现，因此必须要保证Ag材质的反射镜30在复合反射镜中占相当大的比例，低折射率介质31在复合反射镜中所占的表面积只占复合反射镜的表面积的20-80％，因而不能通过无限增加低折射率介质31在复合反射镜中比例的方式来增大复合反射镜的反射率。此外P面的横向电流扩展能力极弱，这种依靠Ag材质的反射镜30的分布来调整电流分布的双层复合反射镜很难做到均匀的将电流扩散到整个P面。
因此，如何解决现有技术中反射镜存在的问题，便成为本领域技术人员的一项重要任务。
发明内容
本发明的目的在于提供一种垂直型LED芯片结构及其制备方法，能够在降低反射镜对光的吸收比例的同时兼顾电流在垂直型LED芯片P面的均匀分布。
为了实现上述目的，本发明提出了一种垂直型LED芯片结构的制备方法，包括步骤：
提供生长衬底，在所述生长衬底上形成外延层，所述外延层包括依次形成的未掺杂层、N-GaN层、量子阱层和P-GaN层，所述未掺杂层形成在所述生长衬底上；
在所述P-GaN层上形成透明导电接触层；
在所述透明导电接触层上形成低折射率介质层，对所述低折射率介质层进行光刻，刻蚀出分布图形，所述分布图形暴露出所述透明导电接触层；
在所述低折射率介质层和透明导电接触层上形成反射层；
在所述反射层上形成保护层及金属键合层；
在所述金属键合层上键合键合衬底；
去除所述生长衬底，并刻蚀所述未掺杂层，暴露出所述N-GaN层；
在所述N-GaN层上形成N电极。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述透明导电接触层材质为ITO、ZnO或AZO。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述低折射率介质层材质为SiO2、SiNx、Ti3O5、Al2O3中的一种或多种堆叠而成，所述低折射率介质层的厚度范围是10埃～50μm。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述低折射率介质层的面积占所述垂直型LED芯片面积的85％～95％。
进一步的，在所述的垂直型LED芯片结构的制备方法中，采用负胶剥离技术在固定区域蒸镀形成反射层，使所述反射层的尺寸小于所述垂直型LED芯片的尺寸。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述反射层的材质为Ag、Al或Rh。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述保护层材质为(Ti-Pt)x或TiW-Pt组合，所述金属键合层材质为Au、Sn或AuSn合金。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述键合衬底材质为Si、Cu或MoCu。
进一步的，在所述的垂直型LED芯片结构的制备方法中，采用激光剥离或化学剥离去除所述生长衬底。
进一步的，在所述的垂直型LED芯片结构的制备方法中，在去除所述生长衬底之后，形成所述N电极之前，首先采用湿法或者干法刻蚀对未掺杂层进行刻蚀，暴露出所述N-GaN层；其次对所述N-GaN层进行粗化处理形成粗糙面，所述粗化处理使用溶液为KOH或H2SO4。
进一步的，在所述的垂直型LED芯片结构的制备方法中，在所述N电极之后，在所述粗糙面上形成钝化层，所述钝化层为SiO2。
进一步的，在所述的垂直型LED芯片结构的制备方法中，所述N电极材质为Ni/Au、Al/Ti/Pt/Au或Cr/Pt/Au。
本发明还提出了一种垂直型LED芯片结构，采用如上文所述的垂直型LED芯片结构的制备方法形成，所述结构依次包括：键合衬底、金属键合层、保护层、反射层、设有分布图形的低折射率介质层、透明导电接触层、P-GaN层、量子阱层、N-GaN层和N电极，其中，所述N电极与所述N-GaN层相连。
进一步的，在所述的垂直型LED芯片结构中，还包括粗糙面和钝化层，所述粗糙面形成于所述N-GaN层表面，所述钝化层形成于所述粗糙面上，所述粗糙面和钝化层均暴露出所述N电极。
与现有技术相比，本发明的有益效果主要体现在：在P-GaN层一侧形成依次由透明导电接触层、设有分布图形的低折射率介质层和反射层三层组成的复合反射镜，可使低折射率介质层占复合反射镜较大的面积，能够大大降低反射镜对光的吸收比例，且由于透明导电接触层横向导电能力优秀，可保证电流在整个P-GaN层均匀的分布，有效提高了复合反射镜的综合有效反射率。
附图说明
图1为现有技术中一种垂直型LED芯片的结构示意图；
图2为现有技术中另一种垂直型LED芯片的结构示意图；
图3为本发明一实施例中垂直型LED芯片结构的制备方法的流程图；
图4至图12为本发明一实施例中垂直型LED芯片结构制作过程中的剖面示意图。
具体实施方式
下面将结合示意图对本发明的垂直型LED芯片结构及其制备方法进行更详细的描述，其中表示了本发明的优选实施例，应该理解本领域技术人员可以修改在此描述的本发明，而仍然实现本发明的有利效果。因此，下列描述应当被理解为对于本领域技术人员的广泛知道，而并不作为对本发明的限制。
为了清楚，不描述实际实施例的全部特征。在下列描述中，不详细描述公知的功能和结构，因为它们会使本发明由于不必要的细节而混乱。应当认为在任何实际实施例的开发中，必须做出大量实施细节以实现开发者的特定目标，例如按照有关系统或有关商业的限制，由一个实施例改变为另一个实施例。另外，应当认为这种开发工作可能是复杂和耗费时间的，但是对于本领域技术人员来说仅仅是常规工作。
在下列段落中参照附图以举例方式更具体地描述本发明。根据下面说明和权利要求书，本发明的优点和特征将更清楚。需说明的是，附图均采用非常简化的形式且均使用非精准的比例，仅用以方便、明晰地辅助说明本发明实施例的目的。
请参考图3，在本实施例中，提出了一种垂直型LED芯片结构的制备方法，包括步骤：
S100：提供生长衬底，在所述生长衬底上形成外延层，所述外延层包括依次形成的未掺杂层、N-GaN层、量子阱层和P-GaN层，所述未掺杂层形成在所述生长衬底上；
S200：在所述P-GaN层上形成透明导电接触层；
S300：在所述透明导电接触层上形成低折射率介质层，对所述低折射率介质层进行光刻，刻蚀出分布图形，所述分布图形暴露出所述透明导电 接触层；
S400：在所述低折射率介质层和透明导电接触层上形成反射层；
S500：在所述反射层上形成保护层及金属键合层；
S600：在所述金属键合层上键合键合衬底；
S700：去除所述生长衬底、并刻蚀所述未掺杂层，暴露出所述N-GaN层；
S800：在所述N-GaN层上形成N电极。
具体的，请参考图4，在步骤S100中，提供生长衬底100，生长衬底100可以为蓝宝石衬底、硅衬底、SiC衬底及图形化衬底等等。在本实施例中，外延层包括未掺杂层210、N-GaN层220、量子阱层230和P-GaN层240，其中，所述外延层可以采用MOCVD(金属有机气相沉积，Metal Organic Chemical Vapor Deposition)和/或MBE(分子束外延，Molecular Beam Epitaxy)等生长方法形成。
请参考图5，在步骤S200中，在所述P-GaN层240上形成透明导电接触层300，所述透明导电接触层300的材质为ITO、ZnO或AZO等低阻高透光率薄膜，所述透明导电接触层300作为欧姆接触层使用。
请参考图6，在步骤S300中，在所述透明导电接触层300上形成低折射率介质层400，所述低折射率介质层400设有分布图形，即形成有通孔410，图中作为简化仅示意性地画出一个通孔的截面，然而本发明不应以此为限。所述分布图形暴露出所述透明导电接触层300，所述分布图形可以为多种形状，例如圆形、矩形或椭圆形的不同组合分布等，在此不做限定。所述低折射率介质层400材质为SiO2、SiNx、Ti3O5、Al2O3中的一种或多种堆叠而成，所述低折射率介质层400的厚度范围是10埃～50μm，例如是100埃。所述低折射率介质层400可以采用电子束(E-beam)、溅射(Sputter)、活性等离子体沉积(Reactive Plasma Deposition，RPD)等方式形成，优选 的，形成的所述低折射率介质层400的面积占所述垂直型LED芯片面积的85％～95％，从而能够大大降低后续形成的反射镜对光的吸收比例。
请参考图7，在步骤S400中，在所述低折射率介质层400和暴露出的透明导电接触层300上形成反射层500，具体的，采用负胶剥离(Lift-off)技术在固定区域蒸镀形成反射层500，使所述反射层500的尺寸小于所述垂直型LED芯片的尺寸，即使所述反射层500暴露出所述垂直型LED芯片的边缘，便于后续形成保护层全面对所述反射层500进行保护。所述反射层500的材质为Ag、Al或Rh。
请参考图8，在步骤S500中，在所述反射层500上形成保护层及金属键合层600(为了简化附图，将所述保护层及金属键合层作为一层示意)，所述保护层材质为(Ti-Pt)x或TiW-Pt组合，所述保护层全面覆盖所述反射层500，以对其进行保护。所述金属键合层材质为Au、Sn或AuSn合金，用于与后续形成的键合衬底进行键合。
请参考图9，在步骤S600中，在所述金属键合层上键合键合衬底700；所述键合衬底700材质为Si、Cu或MoCu等导电且散热良好的衬底。
请参考图10，在步骤S700中，去除所述生长衬底100，通常可以采用激光剥离或化学剥离去除所述生长衬底100。通常，采用激光剥离会使未掺杂层210在表面形成一层金属Ga，因此，需要采用酸或者碱等去除金属Ga，采用的溶液可以为HCL或KOH。
请参考图11，形成所述N电极之前，首先采用湿法或者干法(ICP)刻蚀对所述未掺杂层210进行刻蚀，暴露出所述N-GaN层220，其中，所述未掺杂层210可以被完全刻蚀去除，也可以仅仅去除部分；其次对所述N-GaN层220进行粗化处理形成粗糙面211，粗化处理形成的粗糙面211能够增加N-GaN层220的表面积，增加出光的面积，提高发光效率。
请参考图12，在步骤S800中，在所述N-GaN层220上形成N电极212， N电极212的材质为Ni/Au、Al/Ti/Pt/Au或Cr/Pt/Au，在形成N电极212之后，在所述粗糙面211上形成钝化层800，所述钝化层800为SiO2，用于保护整个芯片，形成的钝化层800暴露出N电极212。
请继续参考图12，在本发明的另一面，还提出了一种垂直型LED芯片结构，采用如上文所述的垂直型LED芯片结构的制备方法形成，所述结构依次包括：键合衬底700、保护层和金属键合层600、反射层500、设有分布图形的低折射率介质层400、透明导电接触层300、P-GaN层240、量子阱层230、N-GaN层220、N电极212、粗糙面211和钝化层800，其中，所述N电极212与所述N-GaN层220相连，所述粗糙面211形成于所述N-GaN层220表面，所述钝化层800形成于所述粗糙面211上，所述粗糙面211和钝化层800均暴露出所述N电极212。
综上，在本发明实施例提供的垂直型LED芯片结构及其制备方法中，在P-GaN层上依次形成透明导电接触层、设有分布图形的低折射率介质层和反射层三层组成的复合反射镜，可使低折射率介质层占复合反射镜较大的面积，能够大大降低反射镜对光的吸收比例，且由于透明导电接触层横向导电能力优秀，可保证电流在整个P-GaN层均匀的分布，有效提高了复合反射镜的综合有效反射率。
上述仅为本发明的优选实施例而已，并不对本发明起到任何限制作用。任何所属技术领域的技术人员，在不脱离本发明的技术方案的范围内，对本发明揭露的技术方案和技术内容做任何形式的等同替换或修改等变动，均属未脱离本发明的技术方案的内容，仍属于本发明的保护范围之内。

Claims (15)

  1. 一种垂直型LED芯片结构的制备方法，其特征在于，包括步骤：
    提供生长衬底，在所述生长衬底上形成外延层，所述外延层包括依次形成的未掺杂层、N-GaN层、量子阱层和P-GaN层，所述未掺杂层直接形成在所述生长衬底上；
    在所述P-GaN层上形成透明导电接触层；
    在所述透明导电接触层上形成低折射率介质层，对所述低折射率介质层进行光刻，刻蚀出分布图形，所述分布图形暴露出所述透明导电接触层；
    在所述低折射率介质层和透明导电接触层上形成反射层；
    在所述反射层上形成保护层及金属键合层；
    在所述金属键合层上键合一键合衬底；
    去除所述生长衬底，并刻蚀所述未掺杂层，暴露出至少部分所述N-GaN层；
    在暴露出的N-GaN层上形成N电极。
  2. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，所述透明导电接触层材质为ITO、ZnO或AZO。
  3. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，所述低折射率介质层材质为SiO2、SiNx、Ti3O5、Al2O3中的一种或多种堆叠而成，所述低折射率介质层的厚度范围是10埃～50μm。
  4. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，所述低折射率介质层的横截面积占所述垂直型LED芯片横截面积的85％～95％。
  5. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，
    采用负胶剥离技术蒸镀形成反射层，使所述反射层的横截面积小于所述垂直型LED芯片的横截面积。
  6. 如权利要求5所述的垂直型LED芯片结构的制备方法，其特征在于，所述反射层的材质为Ag、Al或Rh。
  7. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，所述保护层的材质为(Ti-Pt)x或TiW-Pt组合，所述金属键合层的材质为Au、Sn或AuSn合金。
  8. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，所述键合衬底的材质为Si、Cu或MoCu。
  9. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，采用激光剥离或化学剥离去除所述生长衬底。
  10. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，刻蚀所述未掺杂层包括：采用湿法或者干法刻蚀对未掺杂层进行刻蚀，暴露出所述N-GaN层。
  11. 如权利要求10所述的垂直型LED芯片结构的制备方法，其特征在于，形成N电极之前还包括对所述N-GaN层进行粗化处理形成粗糙面，所述粗化处理使用溶液为KOH或H2SO4。
  12. 如权利要求11所述的垂直型LED芯片结构的制备方法，其特征在于，在形成N电极之后，还包括在所述粗糙面上形成钝化层，所述钝化层暴露出所述N电极。
  13. 如权利要求1所述的垂直型LED芯片结构的制备方法，其特征在于，所述N电极的材质为Ni/Au、Al/Ti/Pt/Au或Cr/Pt/Au。
  14. 一种垂直型LED芯片结构，采用如权利要求1至13中任意一项所述的垂直型LED芯片结构的制备方法形成，其特征在于，所述结构依次包括：键合衬底、金属键合层、保护层、反射层、设有分布图形的低折射 率介质层、透明导电接触层、P-GaN层、量子阱层、N-GaN层和N电极，其中，所述N电极与所述N-GaN层相连。
  15. 如权利要求14所述的垂直型LED芯片结构，其特征在于，还包括粗糙面和钝化层，所述粗糙面形成于所述N-GaN层表面，所述钝化层形成于所述粗糙面上，所述粗糙面和钝化层均暴露出所述N电极。
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