WO2016009763A1 - Dispositif d'inspection de semi-conducteurs et procédé de commande de dispositif d'inspection de semi-conducteurs - Google Patents

Dispositif d'inspection de semi-conducteurs et procédé de commande de dispositif d'inspection de semi-conducteurs Download PDF

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Publication number
WO2016009763A1
WO2016009763A1 PCT/JP2015/067108 JP2015067108W WO2016009763A1 WO 2016009763 A1 WO2016009763 A1 WO 2016009763A1 JP 2015067108 W JP2015067108 W JP 2015067108W WO 2016009763 A1 WO2016009763 A1 WO 2016009763A1
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Prior art keywords
signal
inspection
detector
level voltage
speed
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PCT/JP2015/067108
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English (en)
Japanese (ja)
Inventor
今川　健吾
幕内　雅巳
今井　栄治
茂原　廉永
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株式会社日立ハイテクノロジーズ
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Publication of WO2016009763A1 publication Critical patent/WO2016009763A1/fr

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    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B11/00—Measuring arrangements characterised by the use of optical techniques
    • G01B11/30—Measuring arrangements characterised by the use of optical techniques for measuring roughness or irregularity of surfaces
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01N—INVESTIGATING OR ANALYSING MATERIALS BY DETERMINING THEIR CHEMICAL OR PHYSICAL PROPERTIES
    • G01N21/00—Investigating or analysing materials by the use of optical means, i.e. using sub-millimetre waves, infrared, visible or ultraviolet light
    • G01N21/84—Systems specially adapted for particular applications
    • G01N21/88—Investigating the presence of flaws or contamination
    • G01N21/95—Investigating the presence of flaws or contamination characterised by the material or shape of the object to be examined
    • G01N21/956—Inspecting patterns on the surface of objects

Definitions

  • the present invention relates to a technique for inspecting, measuring, or observing a semiconductor wafer, a semiconductor device (semiconductor integrated circuit device), a photomask (exposure mask), a liquid crystal panel, and the like.
  • Patent Document 1 As a background technology, there is a technology disclosed in JP 2005-521876 (Patent Document 1). This publication describes the configuration of an inspection system (inspection apparatus) and an outline of a control method (see Patent Document 1 [Background after surgery] and [0015] to [0021]).
  • the pattern and defects formed on the wafer are more complicated and smaller than before.
  • a light source for example, laser light
  • the scattered light from the wafer is also weaker than before.
  • CMOS Complementary Metal Oxide Semiconductor
  • TDI time delay integration
  • this type of inspection apparatus is required to perform high-throughput inspection (high-speed inspection) for the purpose of reducing the manufacturing cost of the inspection object.
  • image sensors that support high-speed operation for example, linear charge coupled devices (CCDs), CMOS sensors, time delay integration (TDI) sensors, etc.
  • TDI time delay integration
  • the present invention has been made in view of the above problems, and provides an inspection apparatus that realizes a high-sensitivity inspection according to an inspection speed (inspection rate) set and selected by an operator of the inspection apparatus, and a control method thereof. .
  • the present invention provides an inspection apparatus suitable for inspection at the time of setting a low-speed inspection speed for inspecting complicated and minute patterns / defects and a control method therefor.
  • a semiconductor inspection apparatus that performs inspection by receiving scattered light generated by irradiating light on an inspection target wafer with a plurality of detectors, and controls the semiconductor inspection apparatus and outputs an inspection speed signal related to an inspection speed.
  • a control unit a signal calculation unit for calculating a detector control signal for controlling the operation of the detector based on the inspection speed signal output from the control unit; and the control of the calculated first detector.
  • a signal generation unit that generates a signal synchronized with a control signal of the second detector;
  • the inspection sensitivity of the inspection apparatus can be improved.
  • FIG. 5 is a diagram showing a schematic configuration of a conventional inspection apparatus.
  • Irradiation light (inspection light) 33 is output from a laser (light source) 32 to irradiate the wafer 30 placed on the stage 31.
  • Irradiation to the wafer 30 may be performed by adjusting a spot, light intensity, or the like by arranging a lens, a mirror, a filter, or the like (not shown) in the optical path or the periphery of the irradiation light 33.
  • the irradiation light 30 generates scattered light 34 and 35 corresponding to the pattern, defect, and foreign matter state of the wafer 30, and the CCD (detectors) 1 and 11 receive the scattered light 34 and 35.
  • the light reception to the CCD may be adjusted by, for example, condensing the light reception to the CCDs 1 and 11 by arranging lenses, mirrors, filters, and the like (not shown) on or around the optical paths of the scattered light 34 and 35.
  • the signal generation unit 22 generates and outputs a control signal for operating the CCDs 1 and 11 based on the control signal from the device control unit 20.
  • This control signal is input to the CCDs 1 and 11 via the driver circuits 2 and 12.
  • the CCD control signal controls the operation such as charge transfer inside the CCD, and is, for example, a vertical transfer signal, a horizontal transfer (shift register transfer) signal, etc., which are all necessary for operating the applied CCD.
  • the control signal is shown.
  • This CCD control signal can be easily determined by the person in charge (CCD designer or manufacturer, CCD application device designer, etc.) (or according to the specifications of the CCD to be applied). ) Will be able to grasp.
  • CCD1 and 11 output a signal corresponding to the amount of received light in accordance with a CCD control signal.
  • the output signal is converted into digital data by the A / D converters 4 and 14 via the detection circuits 3 and 13.
  • the detection circuits 3 and 13 are amplifier circuits having a buffer or gain, and may be omitted depending on the device configuration.
  • the A / D converter is digitized by a sampling clock (not shown) according to a command from the apparatus control unit, and includes a function of correlated double sampling (CDS: Correlated Double Sampling) generally used for detecting a CCD signal. It may be a thing.
  • CDS Correlated Double Sampling
  • the above operation is performed by moving one or more of the stage 31, CCD 1, 11, and laser 32 (or irradiation light 33) in the X, Y, or Z direction, and the inspection area of the wafer 30 preset by the operator. (A part or a plurality of regions or the entire surface of the wafer 30) is inspected.
  • the image processing unit 23 forms an image based on the digitized detection signals from the CCDs 1 and 11 obtained in this way and displays them on a GUI 24 (Graphical User Interface), for example.
  • GUI 24 Graphic User Interface
  • the laser 32 is illustrated as being disposed obliquely with respect to the wafer 30, but is not limited to this, and any configuration that can irradiate the irradiation light 33 to the wafer 30 may be used.
  • the configuration example in which two CCDs are arranged is shown, but the configuration is not limited to two, and any configuration in which a plurality of two or more CCDs are arranged may be used.
  • FIG. 6 is an example of a timing chart at a high inspection rate
  • FIG. 7 is an example of a timing chart of a conventional apparatus at a low inspection rate.
  • a CCD The basic principle and operation of a CCD is a well-known technique, and a number of photodiodes (hereinafter referred to as PD) corresponding to pixels are arranged in a one-dimensional or two-dimensional array. Stores the charge received by the PD for a certain period of time.
  • PD photodiodes
  • T11 and T12 correspond to the light reception time (integration time) (in the inspection apparatus, this time is also called the inspection rate).
  • the electric charge stored by receiving light is transferred to a shift register configured in the CCD by a vertical transfer signal 50.
  • the charges stored in the shift register are sequentially moved by the horizontal transfer signal.
  • the received light charge amount of each PD that has been independent is serialized and transferred.
  • the number to be serialized differs depending on the CCD configuration (number of PDs (number of pixels) and output terminals (also called taps in the CCD)).
  • the CCD output unit converts the charge amount into an electrical signal and outputs an output signal 52.
  • Ta corresponds to a signal for one pixel.
  • the inspection apparatus generates a high-speed vertical transfer signal and a horizontal transfer signal with a narrow pulse width and controls the CCD to perform a high-throughput inspection (inspection when the scattered light is relatively large). is doing.
  • 6 and 7 show general signal outlines of the CCD, and may be signals that match the specifications of the vertical transfer signal and horizontal transfer signal of the CCD to be actually applied. In addition, all necessary control signals and the number of signals may be increased according to the CCD to be applied.
  • a wafer has been described as an inspection object and a CCD has been applied to an image sensor.
  • the present invention is not limited to this, and the inspection object described in the technical field and the summary of the invention is not limited thereto. It may be an object or an image sensor.
  • FIG. 1 is a diagram showing a schematic configuration of an inspection apparatus in the first embodiment.
  • the difference from the conventional inspection apparatus of FIG. 5 is that a signal calculation unit 21 is provided between the apparatus control unit 20 and a signal generation unit 22 that generates a control signal of the CCD.
  • the operator of the inspection apparatus sets or selects an inspection rate in the GUI 24 or a user interface (not shown) (for example, an operation panel, a keyboard, a description file (also referred to as a recipe) of inspection information / conditions, etc.)).
  • the signal calculation unit 21 receives a signal (inspection speed signal) corresponding to the set or selected inspection rate from the apparatus control unit 20, and calculates the pulse width of the CCD control signal based on the received signal.
  • the signal generator 22 generates a control signal synchronized with both the CCDs 1 and 11 based on the calculation result from the signal calculator 21.
  • the purpose of synchronization is to match the timing of the signals output from both the CCDs 1 and 11 and the timing of the two systems as a system such as the A / D converters 4 and 14.
  • the image processing unit 23 has an advantage that signals from the two systems can be easily integrated into an image of the same inspection location on the wafer 30 by synchronization.
  • FIG. 8 is a diagram showing an example of a timing chart at a low inspection rate.
  • a signal like 50 to 52 in FIG. 6 is obtained, and in a high sensitivity inspection (when a low inspection rate is set), 56 to 58 in FIG. Such a signal.
  • the horizontal transfer signal 54 is operated at high speed as shown in FIG. 7, but by applying this embodiment, as shown in FIG.
  • the horizontal transfer signal 57 can be operated at a low speed.
  • the time width of the signal corresponding to one pixel of the CCD output signal also increases from the conventional Ta in FIG. 7 to Tb in FIG.
  • the CCD output signal will be supplemented with reference to FIG.
  • the CCD output signal 59 varies in amplitude between V1 and V2 according to the amount of charge received by the PD. Therefore, for example, the A / D converters 4 and 14 shown in FIG. 1 detect the amplitude of the timings t2 and t3 (or t3 and t4). Since the frequency band from the CCDs 1 and 11 to the A / D converters 4 and 14 is determined by the application circuit, a relatively stable signal waveform can be obtained for a low-speed signal.
  • a stable output signal can be obtained by calculating and controlling the operation of the CCD at a low speed, and as a result, inspection with higher sensitivity than conventional can be realized.
  • the signal calculation unit 21 calculates the optimum pulse width and start time of the signal according to the inspection rate and the CCD specification, the signal calculation unit 21 is shared with the calculation function of the device control unit 20 and the logic circuit of the signal generation unit 20. It is also possible and can be realized at low cost because only the arithmetic function is added.
  • one or more of the stage 31, the CCD 1, 11, and the laser 32 (or irradiation light 33) are changed according to the inspection position of the wafer 30 and the pattern / foreign particle count, thereby changing the partial inspection rate. It may be inspected while changing.
  • the apparatus is configured so that the upper and lower limits of the high inspection rate and the low inspection rate can be set arbitrarily.
  • the preferred format of the signal processing unit is the inspection rate time, the vertical transfer time determined from the CCD specifications to be applied and the configuration factors of the inspection device, the waiting time until the start of horizontal transfer, and other processing and control required by the CCD and device. This is a method of subtracting the time and calculating the value calculated for the number of pixels per output determined by the CCD configuration.
  • the operator can arbitrarily change all rising timings, pulse widths, duty ratios, etc. of the CCD control signal so that the output signal of the CCD can be optimally obtained.
  • the operator can arbitrarily change all rising timings, pulse widths, duty ratios, etc. of the CCD control signal so that the output signal of the CCD can be optimally obtained.
  • the present embodiment firstly, it is possible to improve the inspection sensitivity of an inspection apparatus particularly for complicated and minute size patterns / defects and to suppress the defect rate in the market. Second, by realizing them with inexpensive means and compatible circuit means with a conventional inspection apparatus, investment by a semiconductor manufacturer or the like can be suppressed.
  • FIG. 2 is a diagram showing a schematic configuration of the inspection apparatus in the second embodiment.
  • filter circuits 5 and 15 are provided between the detection circuits 3 and 13 and the A / D converters 4 and 14.
  • the filter circuits 5 and 15 applied here are variable low-pass filters (LPFs) that can change the cutoff frequency according to the inspection rate.
  • LPFs variable low-pass filters
  • the filter circuits 5 and 15 switch to filters having different cutoff frequencies based on the signal from the apparatus control unit 20.
  • the CCD output signal is a high-frequency signal containing a large amount of high-frequency components (52 in FIG. 6).
  • a low-frequency signal (58 in FIG. 9) containing a lot of low-frequency components is set, so that a filter with a low cutoff frequency is set.
  • a filter with a low cut-off frequency can reduce unnecessary noise mixed from a CCD, a detection circuit to be configured, a power supply, etc., compared with a filter with a high cut-off frequency. For this reason, by enabling the optimum filter setting according to the inspection rate, that is, the speed of the CCD output signal, the SN ratio increases particularly in the high sensitivity inspection (when the low inspection rate is set). As a result, it is possible to realize a higher sensitivity inspection than in the first embodiment.
  • the filter circuits 5 and 15 may be arbitrarily designed so that the worker who develops the inspection apparatus does not distort the CCD output waveform in view of the CCD output signal and the inspection rate range.
  • the number of inspection rate settings is not necessarily the same. For example, it is possible to classify the inspection rate in several ranges and devise to reduce the number of filter switching according to the number of classifications.
  • the circuit configuration can be easily realized by combining some or all of resistors, capacitors, inductors, variable resistors, varicaps (variable capacitors), operational amplifiers, switch means, etc. The configuration can easily be imagined.
  • FIG. 3 is a diagram showing a schematic configuration of the inspection apparatus in the third embodiment.
  • a voltage calculation unit 25 and a power supply variable unit 26 are provided.
  • the voltage calculation unit 26 determines the optimum high and low level voltages of the CCD control signal according to the inspection rate based on the signal from the apparatus control unit 20. And outputs the calculation result.
  • the power supply variable unit 25 sets the voltage based on the calculation result and outputs Vcc and Vee.
  • the driver circuits 2 and 12 output high level Vcc and low level Vee signals based on the signal from the signal generation unit 22.
  • the driver circuits 2 and 12 are driven by a fixed voltage from the power supply circuit, which is not shown and described, whereas in the present embodiment, the driver is driven according to the inspection rate.
  • the drive levels 2 and 12 will change.
  • the allowable amount of charge is determined by the potential difference between the high level and low level of the CCD control signal.
  • the light reception time of the PD is long, and it is necessary to store a large amount of charge.
  • the allowable charge amount in the CCD is small, the charge moves to an adjacent pixel, and a CCD output corresponding to PD light reception cannot be obtained, which may cause an error in the inspection result.
  • the pattern may be changed according to the pattern of the wafer 30 to be inspected or the shape of the foreign matter.
  • the defect detection rate increases compared to the conventional case, and the error inspection result.
  • the rate of can be reduced.
  • an inspection apparatus may be used for each pattern forming process, and the charge allowable amount of the CCD may be controlled according to the inspection process.
  • FIG. 4 is a diagram showing a schematic configuration of the inspection apparatus in the fourth embodiment.
  • the present embodiment is a combination of the second embodiment and the third embodiment. Since operations and effects have been described in each embodiment, they are omitted.
  • FIG. 10 is a diagram showing a control flow of the inspection apparatus.
  • the present embodiment is specialized for the control flow of the inspection apparatus related to the above-described first to fifth embodiments made according to the present invention.
  • the inspection / control flow for inspecting using the conventional apparatus is as follows: Illustration and description are omitted.
  • the inspection is first started in flow S1.
  • conditions and parameters necessary for inspection such as inspection conditions and inspection rates are set or selected (details are as described in the first embodiment).
  • signal calculation is performed based on the inspection conditions and inspection parameters set or selected.
  • a signal is generated based on the calculation result of S3.
  • detection control of the inspection apparatus is performed based on the signal generated in S4.
  • the inspection is performed by the detection control in S5 and the control of the entire inspection apparatus (not shown), and the inspection is completed in S6.
  • the flow S6 may be repeatedly inspected by repeating the flow S6 repeatedly or by changing the inspection position.
  • calculation of timing parameters necessary for synchronizing and controlling and driving the plurality of detectors 1 and 11 (S3), and signal generation for synchronizing and controlling and driving the plurality of detectors 1 and 11 (S4) is detection control (S5) by applying a signal to the detectors 1 and 11.
  • the calculation of the parameters necessary for setting or selecting the timing parameter and the cut-off frequency required for synchronizing and controlling and driving the plurality of detectors 1 and 11 (S3), the plurality of detectors 1 and 11 Are the signal generation (S4) for controlling or selecting the control / drive and the cut-off frequency by synchronizing them, and the detection control to the detectors 1 and 11 and the filter units 5 and 15 (S5).
  • timing parameters necessary for synchronizing and controlling and driving the detectors 1 and 11 and voltage parameters for controlling the high level voltage and the low level voltage of signals to be controlled and driven by the detectors 1 and 11 are used.
  • S3 control signal for controlling and driving the plurality of detectors 1 and 11 in synchronization, power supply voltage control or variable of the driver circuits 2 and 12 (S4), signal application to the detectors 1 and 11 Is the detection control (S5).
  • timing parameters necessary for synchronizing and controlling and driving the detectors 1 and 11 and voltage parameters for controlling the high level voltage and the low level voltage of signals to be controlled and driven by the detectors 1 and 11 are used. And calculation of parameters necessary to control or select the cutoff frequency (S3), control signals for synchronizing and controlling the plurality of detectors 1 and 11, and power supply voltage control or variable of the driver circuits 2 and 12; This is signal generation (S4) for controlling or selecting the cutoff number fraction, and detection control to the detectors 1 and 11 and the filter units 5 and 15 (S5).
  • this invention is not limited to the above-mentioned Example, Various modifications are included.
  • each of the above-described configurations, functions, processing units, processing means, and the like may be realized by hardware by designing a part or all of them with, for example, an integrated circuit.
  • Each of the above-described configurations, functions, and the like may be realized by software by interpreting and executing a program that realizes each function by the processor.
  • Information such as programs, tables, and files for realizing each function can be stored in a recording device such as a memory, a hard disk, or an SSD (Solid State Drive), or a recording medium such as an IC card, an SD card, or a DVD.
  • a recording device such as a memory, a hard disk, or an SSD (Solid State Drive), or a recording medium such as an IC card, an SD card, or a DVD.
  • the inspection described in each embodiment does not specialize only the inspection, but indicates all ranges that can be confirmed by an inspection apparatus such as measurement and observation.

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  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Health & Medical Sciences (AREA)
  • Life Sciences & Earth Sciences (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Biochemistry (AREA)
  • General Health & Medical Sciences (AREA)
  • Immunology (AREA)
  • Pathology (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)
  • Length Measuring Devices By Optical Means (AREA)

Abstract

L'invention porte sur un dispositif d'inspection et sur son procédé de commande, lesquels mettent en œuvre une inspection de sensibilité élevée en fonction de la vitesse d'inspection (débit d'inspection). En particulier, l'invention porte sur un dispositif d'inspection et sur son procédé d'inspection, lesquels sont aptes à une inspection dans laquelle un motif/défaut complexe et de fine taille joue le rôle de cible pour l'inspection quand une basse vitesse d'inspection est établie. Ce dispositif d'inspection de semi-conducteurs, qui effectue une inspection à l'aide d'une pluralité de détecteurs pour recevoir une lumière dispersée générée par l'émission de lumière sur une tranche à inspecter, comporte : une unité de calcul de signaux pour calculer des signaux de commande de détecteur pour commander le fonctionnement des détecteurs ; une unité de génération de signaux pour générer des signaux de commande pour les détecteurs sur la base des signaux calculés ; et une unité de commande pour commander le dispositif d'inspection de semi-conducteurs, et délivrer en sortie des signaux de vitesse d'inspection concernant la vitesse d'inspection. L'unité de calcul de signaux calcule les signaux de commande de détecteur sur la base des signaux de vitesse d'inspection délivrés en sortie à partir de l'unité de commande, et l'unité de génération de signaux génère des signaux de commande de premier et second détecteurs respectivement synchronisés dans les premier et second détecteurs.
PCT/JP2015/067108 2014-07-18 2015-06-15 Dispositif d'inspection de semi-conducteurs et procédé de commande de dispositif d'inspection de semi-conducteurs WO2016009763A1 (fr)

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JP2014147313A JP2016023999A (ja) 2014-07-18 2014-07-18 半導体検査装置および半導体検査装置の制御方法

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Cited By (1)

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CN109314937A (zh) * 2016-05-18 2019-02-05 瑞典爱立信有限公司 在网络节点中用于发送用于系统接入或监视的控制信息的方法，以及在无线设备中用于接收用于系统接入或监视的控制信息的方法

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KR102081647B1 (ko) 2016-07-04 2020-02-27 가부시키가이샤 히다치 하이테크놀로지즈 검사 장치 및 검사 방법

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JPH08152314A (ja) * 1994-11-29 1996-06-11 Hitachi Ltd 電子部品の検査装置
JP2003153084A (ja) * 2001-11-08 2003-05-23 Sony Corp 固体撮像素子の制御装置および制御方法
JP2007205828A (ja) * 2006-02-01 2007-08-16 Advanced Mask Inspection Technology Kk 光学画像取得装置、パターン検査装置、光学画像取得方法、及び、パターン検査方法
JP2010048587A (ja) * 2008-08-20 2010-03-04 Hitachi High-Technologies Corp パターン欠陥検査装置および方法
JP2012137350A (ja) * 2010-12-27 2012-07-19 Hitachi High-Technologies Corp 欠陥検査方法および欠陥検査装置

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Publication number Priority date Publication date Assignee Title
JPH08152314A (ja) * 1994-11-29 1996-06-11 Hitachi Ltd 電子部品の検査装置
JP2003153084A (ja) * 2001-11-08 2003-05-23 Sony Corp 固体撮像素子の制御装置および制御方法
JP2007205828A (ja) * 2006-02-01 2007-08-16 Advanced Mask Inspection Technology Kk 光学画像取得装置、パターン検査装置、光学画像取得方法、及び、パターン検査方法
JP2010048587A (ja) * 2008-08-20 2010-03-04 Hitachi High-Technologies Corp パターン欠陥検査装置および方法
JP2012137350A (ja) * 2010-12-27 2012-07-19 Hitachi High-Technologies Corp 欠陥検査方法および欠陥検査装置

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109314937A (zh) * 2016-05-18 2019-02-05 瑞典爱立信有限公司 在网络节点中用于发送用于系统接入或监视的控制信息的方法，以及在无线设备中用于接收用于系统接入或监视的控制信息的方法

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