WO2016009763A1

WO2016009763A1 - Semiconductor inspection device and method of controlling semiconductor inspection device

Info

Publication number: WO2016009763A1
Application number: PCT/JP2015/067108
Authority: WO
Inventors: 今川　健吾; 幕内　雅巳; 今井　栄治; 茂原　廉永
Original assignee: 株式会社日立ハイテクノロジーズ
Priority date: 2014-07-18
Filing date: 2015-06-15
Publication date: 2016-01-21
Also published as: JP2016023999A

Abstract

Provided are an inspection device and a method of controlling same, which implement high sensitivity inspection according to the inspection speed (inspection rate). In particular, provided are an inspection device and a method of controlling same, which are suitable for inspection in which a complex and fine sized pattern/defect serves as the target for inspection when a low inspection speed is set. This semiconductor inspection device, which performs inspection by using a plurality of detectors to receive scattered light generated by emitting light onto a wafer to be inspected, is provided with: a signal calculating unit for calculating detector control signals for controlling operation of the detectors; a signal generating unit for generating control signals for the detectors on the basis of the calculated signals; and a control unit for controlling the semiconductor inspection device, and outputting inspection speed signals pertaining to the inspection speed. The signal calculating unit calculates the detector control signals on the basis of the inspection speed signals output from the control unit, and the signal generating unit generates control signals of first and second detectors respectively synchronized in the first and second detectors.

Description

Semiconductor inspection apparatus and method for controlling semiconductor inspection apparatus

The present invention relates to a technique for inspecting, measuring, or observing a semiconductor wafer, a semiconductor device (semiconductor integrated circuit device), a photomask (exposure mask), a liquid crystal panel, and the like.

As a background technology, there is a technology disclosed in JP 2005-521876 (Patent Document 1). This publication describes the configuration of an inspection system (inspection apparatus) and an outline of a control method (see Patent Document 1 [Background after surgery] and [0015] to [0021]).

Special table 2005-521876

Due to the miniaturization technology of the semiconductor process, the pattern and defects formed on the wafer are more complicated and smaller than before. When such a complicated and minute pattern or defect is irradiated with light using a light source (for example, laser light), the scattered light from the wafer is also weaker than before.

For this reason, from image sensors (for example, linear charge coupled devices (CCDs), CMOS (Complementary Metal Oxide Semiconductor) sensors, time delay integration (TDI) sensors, etc.) that are used as detectors. The obtained detection signal is also reduced in proportion to the amount of scattered light. As a result, the inspection sensitivity and the defect detection rate are lowered, and there is a problem that the defect rate is increased in the market.

In order to solve this problem, in this type of inspection device, inspection sensitivity and defect detection rate corresponding to miniaturization technology are improved by various devices and technical uses. For example, the technique described in Patent Document 1 is one of them.

On the other hand, this type of inspection apparatus is required to perform high-throughput inspection (high-speed inspection) for the purpose of reducing the manufacturing cost of the inspection object. For this reason, image sensors that support high-speed operation (for example, linear charge coupled devices (CCDs), CMOS sensors, time delay integration (TDI) sensors, etc.) are used as image sensors. The throughput of the apparatus is improved by controlling the internal operation of the apparatus at high speed.

Thus, in this type of inspection apparatus that requires both high sensitivity and high throughput, when the technique described in Patent Document 1 is used, the light reception (condensation) time of the image sensor (this time is disclosed in Patent Document 1). Is defined as “integration time” to increase the detection signal amount of the image sensor and improve the inspection sensitivity. However, since the internal operation of the image sensor is fast, there is a limit to high sensitivity detection.

The present invention has been made in view of the above problems, and provides an inspection apparatus that realizes a high-sensitivity inspection according to an inspection speed (inspection rate) set and selected by an operator of the inspection apparatus, and a control method thereof. . In particular, the present invention provides an inspection apparatus suitable for inspection at the time of setting a low-speed inspection speed for inspecting complicated and minute patterns / defects and a control method therefor.

The outline of a representative one of the inventions disclosed in the present application will be briefly described as follows.

A semiconductor inspection apparatus that performs inspection by receiving scattered light generated by irradiating light on an inspection target wafer with a plurality of detectors, and controls the semiconductor inspection apparatus and outputs an inspection speed signal related to an inspection speed. A control unit; a signal calculation unit for calculating a detector control signal for controlling the operation of the detector based on the inspection speed signal output from the control unit; and the control of the calculated first detector. A signal generation unit that generates a signal synchronized with a control signal of the second detector;

According to the present invention, the inspection sensitivity of the inspection apparatus can be improved.

It is a schematic block diagram of the inspection apparatus which shows a 1st Example. It is a schematic block diagram of the test | inspection apparatus which shows a 2nd Example. It is a schematic block diagram of the test | inspection apparatus which shows a 3rd Example. It is a schematic block diagram of the test | inspection apparatus which shows a 4th Example. It is a schematic block diagram of the conventional inspection apparatus. It is a figure which shows an example of the timing chart at the time of a high test | inspection rate. It is a figure which shows the timing chart of the conventional apparatus at the time of a low test | inspection rate. It is a figure which shows an example of the timing chart at the time of a low test | inspection rate. It is a figure which shows the outline of a CCD output signal. It is a figure which shows an example of the control method of a test | inspection apparatus.

Before describing each embodiment according to the present invention, the operation of this type of conventional inspection apparatus will be briefly described with reference to FIG.

FIG. 5 is a diagram showing a schematic configuration of a conventional inspection apparatus. Irradiation light (inspection light) 33 is output from a laser (light source) 32 to irradiate the wafer 30 placed on the stage 31. Irradiation to the wafer 30 may be performed by adjusting a spot, light intensity, or the like by arranging a lens, a mirror, a filter, or the like (not shown) in the optical path or the periphery of the irradiation light 33. The irradiation light 30 generates scattered

light

34 and 35 corresponding to the pattern, defect, and foreign matter state of the wafer 30, and the CCD (detectors) 1 and 11 receive the

scattered light

34 and 35. Actually, a plurality of scattered lights are generated, but two cases are shown as an example. The light reception to the CCD may be adjusted by, for example, condensing the light reception to the CCDs 1 and 11 by arranging lenses, mirrors, filters, and the like (not shown) on or around the optical paths of the

scattered light

34 and 35.

The signal generation unit 22 generates and outputs a control signal for operating the CCDs 1 and 11 based on the control signal from the device control unit 20. This control signal is input to the CCDs 1 and 11 via the

driver circuits

2 and 12. The CCD control signal controls the operation such as charge transfer inside the CCD, and is, for example, a vertical transfer signal, a horizontal transfer (shift register transfer) signal, etc., which are all necessary for operating the applied CCD. The control signal is shown.

This CCD control signal can be easily determined by the person in charge (CCD designer or manufacturer, CCD application device designer, etc.) (or according to the specifications of the CCD to be applied). ) Will be able to grasp.

CCD1 and 11 output a signal corresponding to the amount of received light in accordance with a CCD control signal. The output signal is converted into digital data by the A / D converters 4 and 14 via the detection circuits 3 and 13. The detection circuits 3 and 13 are amplifier circuits having a buffer or gain, and may be omitted depending on the device configuration.

The A / D converter is digitized by a sampling clock (not shown) according to a command from the apparatus control unit, and includes a function of correlated double sampling (CDS: Correlated Double Sampling) generally used for detecting a CCD signal. It may be a thing.

The above operation is performed by moving one or more of the stage 31, CCD 1, 11, and laser 32 (or irradiation light 33) in the X, Y, or Z direction, and the inspection area of the wafer 30 preset by the operator. (A part or a plurality of regions or the entire surface of the wafer 30) is inspected.

The image processing unit 23 forms an image based on the digitized detection signals from the CCDs 1 and 11 obtained in this way and displays them on a GUI 24 (Graphical User Interface), for example.

The laser 32 is illustrated as being disposed obliquely with respect to the wafer 30, but is not limited to this, and any configuration that can irradiate the irradiation light 33 to the wafer 30 may be used. In addition, the configuration example in which two CCDs are arranged is shown, but the configuration is not limited to two, and any configuration in which a plurality of two or more CCDs are arranged may be used.

Next, the outline of the operation of the relationship between the CCD light reception time control signal and the output signal will be briefly described with reference to FIGS. FIG. 6 is an example of a timing chart at a high inspection rate, and FIG. 7 is an example of a timing chart of a conventional apparatus at a low inspection rate.

The basic principle and operation of a CCD is a well-known technique, and a number of photodiodes (hereinafter referred to as PD) corresponding to pixels are arranged in a one-dimensional or two-dimensional array. Stores the charge received by the PD for a certain period of time.

In the example of FIG. 6, T11 and T12 correspond to the light reception time (integration time) (in the inspection apparatus, this time is also called the inspection rate). The electric charge stored by receiving light is transferred to a shift register configured in the CCD by a vertical transfer signal 50. The charges stored in the shift register are sequentially moved by the horizontal transfer signal. By this vertical transfer and horizontal transfer operation, the received light charge amount of each PD that has been independent is serialized and transferred. The number to be serialized differs depending on the CCD configuration (number of PDs (number of pixels) and output terminals (also called taps in the CCD)).

The CCD output unit converts the charge amount into an electrical signal and outputs an output signal 52. In the output signal 52, Ta corresponds to a signal for one pixel. As shown in FIG. 6, the inspection apparatus generates a high-speed vertical transfer signal and a horizontal transfer signal with a narrow pulse width and controls the CCD to perform a high-throughput inspection (inspection when the scattered light is relatively large). is doing.

On the other hand, in an inspection that requires a high-sensitivity inspection (inspection when the scattered light is relatively small), a large amount of weak scattered light is stored as shown in FIG. 7, and therefore the light reception time is T21, T22 (T21, T22> T11). , T12), a high-sensitivity inspection is performed by increasing the CCD output signal amount by making the length longer.

6 and 7 show general signal outlines of the CCD, and may be signals that match the specifications of the vertical transfer signal and horizontal transfer signal of the CCD to be actually applied. In addition, all necessary control signals and the number of signals may be increased according to the CCD to be applied. As an example of this type of inspection apparatus, a wafer has been described as an inspection object and a CCD has been applied to an image sensor. However, the present invention is not limited to this, and the inspection object described in the technical field and the summary of the invention is not limited thereto. It may be an object or an image sensor.

Hereinafter, specific examples of the present invention will be described with reference to the accompanying drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments of the present invention, and the repetitive description thereof will be omitted.

FIG. 1 is a diagram showing a schematic configuration of an inspection apparatus in the first embodiment. The difference from the conventional inspection apparatus of FIG. 5 is that a signal calculation unit 21 is provided between the apparatus control unit 20 and a signal generation unit 22 that generates a control signal of the CCD.

The operator of the inspection apparatus sets or selects an inspection rate in the GUI 24 or a user interface (not shown) (for example, an operation panel, a keyboard, a description file (also referred to as a recipe) of inspection information / conditions, etc.)). The signal calculation unit 21 receives a signal (inspection speed signal) corresponding to the set or selected inspection rate from the apparatus control unit 20, and calculates the pulse width of the CCD control signal based on the received signal.

The signal generator 22 generates a control signal synchronized with both the CCDs 1 and 11 based on the calculation result from the signal calculator 21. The purpose of synchronization is to match the timing of the signals output from both the CCDs 1 and 11 and the timing of the two systems as a system such as the A / D converters 4 and 14. In addition, the image processing unit 23 has an advantage that signals from the two systems can be easily integrated into an image of the same inspection location on the wafer 30 by synchronization.

FIG. 8 is a diagram showing an example of a timing chart at a low inspection rate. According to the present embodiment, for example, in a high-throughput inspection (when a high inspection rate is set), a signal like 50 to 52 in FIG. 6 is obtained, and in a high sensitivity inspection (when a low inspection rate is set), 56 to 58 in FIG. Such a signal.

In the conventional inspection apparatus, for example, in the high-sensitivity inspection at the light receiving times T21 and T22, the horizontal transfer signal 54 is operated at high speed as shown in FIG. 7, but by applying this embodiment, as shown in FIG. The horizontal transfer signal 57 can be operated at a low speed. As a result, the time width of the signal corresponding to one pixel of the CCD output signal also increases from the conventional Ta in FIG. 7 to Tb in FIG.

Here, the CCD output signal will be supplemented with reference to FIG. In FIG. 9, the CCD output signal 59 varies in amplitude between V1 and V2 according to the amount of charge received by the PD. Therefore, for example, the A / D converters 4 and 14 shown in FIG. 1 detect the amplitude of the timings t2 and t3 (or t3 and t4). Since the frequency band from the CCDs 1 and 11 to the A / D converters 4 and 14 is determined by the application circuit, a relatively stable signal waveform can be obtained for a low-speed signal.

That is, as in this embodiment, when the low inspection rate is set, a stable output signal can be obtained by calculating and controlling the operation of the CCD at a low speed, and as a result, inspection with higher sensitivity than conventional can be realized. . Since the signal calculation unit 21 calculates the optimum pulse width and start time of the signal according to the inspection rate and the CCD specification, the signal calculation unit 21 is shared with the calculation function of the device control unit 20 and the logic circuit of the signal generation unit 20. It is also possible and can be realized at low cost because only the arithmetic function is added.

Note that, as an example, two inspection rates, a high inspection rate and a low inspection rate, have been described, but a plurality of inspection rates may be set and selected. In some cases, one or more of the stage 31, the CCD 1, 11, and the laser 32 (or irradiation light 33) are changed according to the inspection position of the wafer 30 and the pattern / foreign particle count, thereby changing the partial inspection rate. It may be inspected while changing.

Desirably, the apparatus is configured so that the upper and lower limits of the high inspection rate and the low inspection rate can be set arbitrarily. The preferred format of the signal processing unit is the inspection rate time, the vertical transfer time determined from the CCD specifications to be applied and the configuration factors of the inspection device, the waiting time until the start of horizontal transfer, and other processing and control required by the CCD and device. This is a method of subtracting the time and calculating the value calculated for the number of pixels per output determined by the CCD configuration.

More desirably, the operator can arbitrarily change all rising timings, pulse widths, duty ratios, etc. of the CCD control signal so that the output signal of the CCD can be optimally obtained. As a result, it is possible to flexibly cope with a wafer on which all patterns are formed, and to realize a stable high-sensitivity inspection.

According to the present embodiment, firstly, it is possible to improve the inspection sensitivity of an inspection apparatus particularly for complicated and minute size patterns / defects and to suppress the defect rate in the market. Second, by realizing them with inexpensive means and compatible circuit means with a conventional inspection apparatus, investment by a semiconductor manufacturer or the like can be suppressed.

FIG. 2 is a diagram showing a schematic configuration of the inspection apparatus in the second embodiment. The difference from the first embodiment is that

filter circuits

5 and 15 are provided between the detection circuits 3 and 13 and the A / D converters 4 and 14. The

filter circuits

5 and 15 applied here are variable low-pass filters (LPFs) that can change the cutoff frequency according to the inspection rate. As in the first embodiment, when the operator sets or selects the inspection rate, the

filter circuits

5 and 15 switch to filters having different cutoff frequencies based on the signal from the apparatus control unit 20.

For example, in a high-throughput inspection (when a high inspection rate is set), the CCD output signal is a high-frequency signal containing a large amount of high-frequency components (52 in FIG. 6). At the time of setting the inspection rate, a low-frequency signal (58 in FIG. 9) containing a lot of low-frequency components is set, so that a filter with a low cutoff frequency is set.

A filter with a low cut-off frequency can reduce unnecessary noise mixed from a CCD, a detection circuit to be configured, a power supply, etc., compared with a filter with a high cut-off frequency. For this reason, by enabling the optimum filter setting according to the inspection rate, that is, the speed of the CCD output signal, the SN ratio increases particularly in the high sensitivity inspection (when the low inspection rate is set). As a result, it is possible to realize a higher sensitivity inspection than in the first embodiment.

The

filter circuits

5 and 15 may be arbitrarily designed so that the worker who develops the inspection apparatus does not distort the CCD output waveform in view of the CCD output signal and the inspection rate range. The number of inspection rate settings is not necessarily the same. For example, it is possible to classify the inspection rate in several ranges and devise to reduce the number of filter switching according to the number of classifications. The circuit configuration can be easily realized by combining some or all of resistors, capacitors, inductors, variable resistors, varicaps (variable capacitors), operational amplifiers, switch means, etc. The configuration can easily be imagined.

FIG. 3 is a diagram showing a schematic configuration of the inspection apparatus in the third embodiment. The difference from the first embodiment is that a voltage calculation unit 25 and a power supply variable unit 26 are provided. As in the first embodiment, when the operator sets or selects the inspection rate, the voltage calculation unit 26 determines the optimum high and low level voltages of the CCD control signal according to the inspection rate based on the signal from the apparatus control unit 20. And outputs the calculation result. The power supply variable unit 25 sets the voltage based on the calculation result and outputs Vcc and Vee. The

driver circuits

2 and 12 output high level Vcc and low level Vee signals based on the signal from the signal generation unit 22.

In other words, in the first and second embodiments, the

driver circuits

2 and 12 are driven by a fixed voltage from the power supply circuit, which is not shown and described, whereas in the present embodiment, the driver is driven according to the inspection rate. The

drive levels

2 and 12 will change.

In the PDs and shift registers (not shown) of the CCDs 1 and 11, generally, the allowable amount of charge (depth of the charge well) is determined by the potential difference between the high level and low level of the CCD control signal. In particular, in high-sensitivity inspection (when a low inspection rate is set), the light reception time of the PD is long, and it is necessary to store a large amount of charge. At this time, if the allowable charge amount in the CCD is small, the charge moves to an adjacent pixel, and a CCD output corresponding to PD light reception cannot be obtained, which may cause an error in the inspection result.

Therefore, more accurate high-sensitivity inspection can be realized by controlling the allowable charge amount in the CCD according to the inspection rate. In addition to the inspection rate, the pattern may be changed according to the pattern of the wafer 30 to be inspected or the shape of the foreign matter.

For example, when the scattered light from the wafer 30 is a relatively large pattern or foreign matter, the charge amount inside the CCD is large. Therefore, by applying this embodiment, the defect detection rate increases compared to the conventional case, and the error inspection result. The rate of can be reduced. Further, in the semiconductor inspection, an inspection apparatus may be used for each pattern forming process, and the charge allowable amount of the CCD may be controlled according to the inspection process.

FIG. 4 is a diagram showing a schematic configuration of the inspection apparatus in the fourth embodiment. The present embodiment is a combination of the second embodiment and the third embodiment. Since operations and effects have been described in each embodiment, they are omitted.

By applying this example, not only high-sensitivity inspection can be realized, but also suitable inspection settings can be realized according to the pattern, foreign matter, or semiconductor forming process of the wafer to be inspected. It is possible to increase the convenience of the operator, improve the defect detection rate, and reduce the error detection rate.

FIG. 10 is a diagram showing a control flow of the inspection apparatus. The present embodiment is specialized for the control flow of the inspection apparatus related to the above-described first to fifth embodiments made according to the present invention. The inspection / control flow for inspecting using the conventional apparatus is as follows: Illustration and description are omitted.

In FIG. 10, the inspection is first started in flow S1. In the flow S2, conditions and parameters necessary for inspection such as inspection conditions and inspection rates are set or selected (details are as described in the first embodiment). In the flow S3, signal calculation is performed based on the inspection conditions and inspection parameters set or selected. In flow S4, a signal is generated based on the calculation result of S3. In flow S5, detection control of the inspection apparatus is performed based on the signal generated in S4. In the flow S6, the inspection is performed by the detection control in S5 and the control of the entire inspection apparatus (not shown), and the inspection is completed in S6.

In addition, depending on the inspection conditions, the flow S6 may be repeatedly inspected by repeating the flow S6 repeatedly or by changing the inspection position.

Next, specific examples of the flows S3 to S5 will be described according to the first to fourth embodiments.

In the first embodiment, calculation of timing parameters necessary for synchronizing and controlling and driving the plurality of detectors 1 and 11 (S3), and signal generation for synchronizing and controlling and driving the plurality of detectors 1 and 11 (S4) is detection control (S5) by applying a signal to the detectors 1 and 11.

In the second embodiment, the calculation of the parameters necessary for setting or selecting the timing parameter and the cut-off frequency required for synchronizing and controlling and driving the plurality of detectors 1 and 11 (S3), the plurality of detectors 1 and 11 Are the signal generation (S4) for controlling or selecting the control / drive and the cut-off frequency by synchronizing them, and the detection control to the detectors 1 and 11 and the filter units 5 and 15 (S5).

In the third embodiment, timing parameters necessary for synchronizing and controlling and driving the detectors 1 and 11 and voltage parameters for controlling the high level voltage and the low level voltage of signals to be controlled and driven by the detectors 1 and 11 are used. (S3), control signal for controlling and driving the plurality of detectors 1 and 11 in synchronization, power supply voltage control or variable of the driver circuits 2 and 12 (S4), signal application to the detectors 1 and 11 Is the detection control (S5).

In the fourth embodiment, timing parameters necessary for synchronizing and controlling and driving the detectors 1 and 11 and voltage parameters for controlling the high level voltage and the low level voltage of signals to be controlled and driven by the detectors 1 and 11 are used. And calculation of parameters necessary to control or select the cutoff frequency (S3), control signals for synchronizing and controlling the plurality of detectors 1 and 11, and power supply voltage control or variable of the

driver circuits

2 and 12; This is signal generation (S4) for controlling or selecting the cutoff number fraction, and detection control to the detectors 1 and 11 and the filter units 5 and 15 (S5). In addition, this invention is not limited to the above-mentioned Example, Various modifications are included. For example, the above-described embodiments have been described in detail for easy understanding of the present invention, and are not necessarily limited to those having all the configurations described. Further, a part of the configuration of one embodiment can be replaced with the configuration of another embodiment, and the configuration of another embodiment can be added to the configuration of one embodiment. Further, it is possible to add, delete, and replace other configurations for a part of the configuration of each embodiment. Each of the above-described configurations, functions, processing units, processing means, and the like may be realized by hardware by designing a part or all of them with, for example, an integrated circuit. Each of the above-described configurations, functions, and the like may be realized by software by interpreting and executing a program that realizes each function by the processor. Information such as programs, tables, and files for realizing each function can be stored in a recording device such as a memory, a hard disk, or an SSD (Solid State Drive), or a recording medium such as an IC card, an SD card, or a DVD. In addition, the inspection described in each embodiment does not specialize only the inspection, but indicates all ranges that can be confirmed by an inspection apparatus such as measurement and observation.

1,11 CCD (image sensor)
2, 12 Driver circuit 3, 13 Detection circuit 4, 14 A /

D converter

5, 15 Filter unit 21 Signal calculation unit 20 Device control unit 22 Signal generation unit 23 Image processing unit 24 GUI
25 Voltage Calculation Unit 26 Power Supply Variable Unit 30 Wafer (Inspection Object)
31 Stage 32 Laser (light source)

Claims

A semiconductor inspection apparatus for performing inspection by receiving scattered light generated by irradiating light on an inspection target wafer with a plurality of detectors,
A control unit for controlling the semiconductor inspection apparatus and outputting an inspection speed signal relating to an inspection speed;
Based on the inspection speed signal output from the control unit, a signal calculation unit for calculating a detector control signal for controlling the operation of the detector;
A signal generation unit that generates a signal that synchronizes the calculated control signal of the first detector and the control signal of the second detector;
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 1,
The detector control signal is a horizontal transfer signal and a vertical transfer signal that control the charge transfer operation of the detector,
When the inspection speed signal is a first inspection speed signal and a second inspection speed signal that is slower than the first inspection speed signal,
The signal calculation unit calculates a first horizontal transfer signal based on the first inspection speed signal, calculates a second horizontal transfer signal based on the second inspection speed signal,
The speed of the first horizontal transfer signal is faster than the speed of the second horizontal transfer signal,
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 1,
A detection signal detected by the detector is input, and a variable filter unit that changes a cutoff frequency according to the inspection speed output from the control unit is provided.
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 3,
When the inspection speed is high, the variable filter unit has a high cut-off frequency, and when the inspection speed is low, the cut-off frequency is low.
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 1,
A drive circuit for driving the detector based on the detector control signal output from the signal generator;
A voltage calculation unit for calculating a high level voltage and a low level voltage of the detector control signal according to the inspection speed output from the control unit;
A voltage variable unit for setting and outputting the high level voltage and the low level voltage calculated by the voltage calculation unit;
With
The drive circuit outputs a high level voltage or a low level voltage set and output by the voltage variable unit according to the detector control signal to the detector.
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 5,
The voltage calculation unit is configured such that a potential difference between the high level voltage and the low level voltage when the inspection speed is high is a potential difference between the high level voltage and the low level voltage when the inspection speed is low. Smaller than,
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 1,
A variable filter unit that receives a detection signal detected by the detector and changes a cut-off frequency according to the inspection speed output from the control unit;
A drive circuit for driving the detector based on the detector control signal output from the signal generator;
A voltage calculation unit for calculating a high level voltage and a low level voltage of the detector control signal according to the inspection speed output from the control unit;
A voltage variable unit for setting and outputting the high level voltage and the low level voltage calculated by the voltage calculation unit;
With
The drive circuit outputs a high level voltage or a low level voltage set and output by the voltage variable unit according to the detector control signal to the detector.
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 7,
When the inspection speed is high, the variable filter unit has a high cut-off frequency, and when the inspection speed is low, the cut-off frequency is low.
A semiconductor inspection apparatus.
The semiconductor inspection apparatus according to claim 7,
The voltage calculation unit is configured such that a potential difference between the high level voltage and the low level voltage when the inspection speed is high is a potential difference between the high level voltage and the low level voltage when the inspection speed is low. Smaller than,
A semiconductor inspection apparatus.
A method of controlling a semiconductor inspection apparatus that performs inspection by receiving scattered light generated by irradiating light on an inspection target wafer with a plurality of detectors,
A control step of controlling the detector and outputting an inspection speed signal relating to the inspection speed;
Based on the inspection speed signal output from the control step, a signal calculation step for calculating a detector control signal for controlling the operation of the detector;
A signal generation step of generating a signal obtained by synchronizing the calculated control signal of the first detector and the control signal of the second detector;
A method for controlling a semiconductor inspection apparatus comprising:
A method for controlling a semiconductor inspection apparatus according to claim 10, comprising:
The detector control signal is a horizontal transfer signal and a vertical transfer signal that control the charge transfer operation of the detector,
When the inspection speed signal is a first inspection speed signal and a second inspection speed signal that is slower than the first inspection speed signal,
In the signal calculation step, a first horizontal transfer signal is calculated based on the first inspection speed signal, a second horizontal transfer signal is calculated based on the second inspection speed signal,
The speed of the first horizontal transfer signal is faster than the speed of the second horizontal transfer signal,
A method for controlling a semiconductor inspection apparatus.
It is a control method of the semiconductor inspection device according to claim 10,
The detection signal detected by the detector comprises a step of changing a cutoff frequency according to the inspection speed.
A method for controlling a semiconductor inspection apparatus.
It is a control method of the semiconductor inspection device according to claim 10,
A driving step of driving the detector based on the detector control signal generated in the signal generating step;
A voltage calculating step for calculating a high level voltage and a low level voltage of the detector control signal according to the inspection speed;
A voltage variable step for setting the high level voltage and the low level voltage calculated in the voltage calculation step;
With
In the driving step, according to the detector control signal, a high level voltage or a low level voltage set in the voltage variable step is output to the detector.
A method for controlling a semiconductor inspection apparatus.
It is a control method of the semiconductor inspection device according to claim 10,
Detecting a detection signal detected by the detector, and changing a cutoff frequency according to the inspection speed;
A driving step of driving the detector based on the detector control signal generated in the signal generating step;
A voltage calculating step for calculating a high level voltage and a low level voltage of the detector control signal according to the inspection speed;
A voltage variable step for setting the high level voltage and the low level voltage calculated in the voltage calculation step;
With
In the driving step, according to the detector control signal, a high level voltage or a low level voltage set in the voltage variable step is output to the detector.
A method for controlling a semiconductor inspection apparatus.