WO2015184774A1 - 一种倒装发光二极管结构及其制作方法 - Google Patents

一种倒装发光二极管结构及其制作方法 Download PDF

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WO2015184774A1
WO2015184774A1 PCT/CN2014/094876 CN2014094876W WO2015184774A1 WO 2015184774 A1 WO2015184774 A1 WO 2015184774A1 CN 2014094876 W CN2014094876 W CN 2014094876W WO 2015184774 A1 WO2015184774 A1 WO 2015184774A1
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layer
flip
epitaxial layer
chip
epitaxial
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PCT/CN2014/094876
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French (fr)
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何安和
林素慧
郑建森
彭康伟
林潇雄
徐宸科
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厦门市三安光电科技有限公司
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Publication of WO2015184774A1 publication Critical patent/WO2015184774A1/zh
Priority to US15/236,434 priority Critical patent/US11127886B2/en
Priority to US17/445,691 priority patent/US11888094B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46Reflective coating, e.g. dielectric Bragg reflector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/24Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate of the light emitting region, e.g. non-planar junction
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0025Processes relating to coatings
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/40Materials therefor
    • H01L33/405Reflective materials

Definitions

  • the invention relates to a flip-chip LED structure, in particular to a flip-chip LED structure and a manufacturing method thereof.
  • Light-emitting diodes are used in various fields due to their long life and low energy consumption. Especially with the increasing performance of their lighting performance indicators, LEDs are becoming more and more widely used, for example. Used in optical display devices, traffic signs, data storage devices, communication devices, and lighting devices. Among them, the III-V compound semiconductor represented by gallium nitride (GaN) has characteristics such as wide band gap, high luminous efficiency, high electron saturation drift speed, and stable chemical properties, and high-intensity blue light-emitting diodes, blue lasers, and the like. The field of optoelectronic devices has great potential for application and has attracted widespread attention.
  • semiconductor light emitting diodes currently have a problem of low luminous efficiency.
  • a large amount of energy is concentrated inside the device and cannot be emitted, which causes energy waste and affects the service life of the device. Therefore, increasing the light extraction efficiency of a semiconductor light emitting diode has become the biggest problem at present.
  • Many methods for improving the light-emitting efficiency of LEDs have been applied to device structures based on application requirements, such as transparent substrates, surface roughening, metal mirror structures, flip-chips, and the like. Among them, flip chip has received more and more attention due to its application advantages such as high current resistance, low voltage, high light efficiency and no need to wire.
  • flip-chip LED chips are generally designed in a rectangular shape, and the structure is generally formed by a substrate, an epitaxial layer, a P-type ohmic contact layer (which also serves as a reflective metal layer), an insulating layer, and an N-type ohmic contact layer to the bottom.
  • the layered stack structure wherein the metal layers are all made into a large planar structure, so the design of the insulating layer is particularly important. Once the insulating layer is damaged, the P and N electrodes are short-circuited; generally, the insulating layer inside the chip is relatively stable. Rupture, but the insulation layer at the edge of the chip tends to crack in the chip cutting process.
  • the size and position of the P and N metal electrodes are limited.
  • soldering such as solder paste soldering
  • the solder paste is unevenly coated and the solder paste overflows from the pad area. If the core edge insulating layer is damaged, circuit failure, leakage, etc. may occur.
  • Abnormalities as shown in Figures 1 and 2, affect the yield of packaging operations, which is not conducive to the promotion and application of flip chip.
  • the technical problem to be solved by the invention is to overcome the deficiencies of the prior art, and adopt a special barrier grid structure from the chip design and manufacturing process to provide a flip-chip LED chip with improved reliability and a manufacturing method thereof, which are fundamentally solved.
  • Overflow of solder paste or other solid crystalline conductive material causes internal short circuit problems in the chip.
  • the invention forms a barrier gate structure on the edge of the epitaxial layer of the flip-chip LED chip, so that the conventional chip insulation layer cladding material is easily broken in the chip cutting, thereby forming a novel insulation protection structure, effectively protecting the sidewall of the chip and avoiding The chip is short-circuited during use due to overflow of solder paste or other solid crystalline conductive material, improving the reliability of the chip.
  • the technical solution of the present invention is: a flip-chip LED structure comprising: a substrate; an epitaxial layer on the substrate, the epitaxial layer comprising: a first semiconductor layer, a second semiconductor layer, and a clip a light emitting layer between the semiconductor layer and the second semiconductor layer; at least one opening structure located above an edge position of the epitaxial layer and extending to the surface of the substrate such that a sidewall of the partial epitaxial layer and a portion of the substrate surface are exposed, thereby
  • the epitaxial layer is divided into an epitaxial body layer and a barrier gate structure; an insulating layer is disposed over the opening structure as a metal electrode isolation layer.
  • the flip-chip LED structure may further include adding a reflective layer before forming at least one opening structure on the epitaxial layer, and the reflective layer may be a reflective metal layer or a distributed Bragg reflection layer or an omnidirectional reflection layer; After the insulating layer is formed, a metal electrode is placed on the epitaxial layer.
  • the invention also provides a method for fabricating a flip-chip light-emitting diode, which mainly comprises the following steps: 1) providing a substrate; 2) fabricating an epitaxial layer on the substrate, the epitaxial layer comprising: a first semiconductor layer, a second semiconductor a layer and a light-emitting layer sandwiched between the first semiconductor layer and the second semiconductor layer; 3) etching at least one opening structure from the surface of the epitaxial layer by an etching process, and extending to the surface of the substrate such that a side of the partial epitaxial layer The wall and part of the substrate surface are exposed to divide the epitaxial layer into an epitaxial body layer and a barrier gate structure; 4) depositing an insulating layer in the opening structure as a metal electrode isolation layer.
  • the method for fabricating the flip-chip LED may further include the following steps: forming a reflective layer before forming at least one opening structure on the epitaxial layer, and the reflective layer may be a reflective metal layer or a distributed Bragg reflector layer or a full range
  • the reflective layer may also include forming a metal electrode on the epitaxial layer after forming the insulating layer.
  • the opening structure is U-shaped or V-shaped or W-shaped or one of any combination of the foregoing.
  • the substrate may be a growth substrate or a heat dissipation substrate or a bonded substrate or any combination of the foregoing.
  • the growth substrate material may be sapphire (Al 2 O 3 ) or silicon carbide (SiC) or gallium nitride (GaN) or one of any combination of the foregoing.
  • the reflective metal layer comprises Ag or Al or Rh or one of any combination of the foregoing.
  • the insulating layer may be SiO 2 or SiN x or TiO 2 or one of any combination of the foregoing.
  • the metal electrode may be Ni/Au or Cr/Pt/Au or Ti/Al/Ti/Au or one of any combination of the foregoing.
  • the present invention at least includes the following beneficial effects: the present invention forms an opening at the edge of the epitaxial layer of the flip-chip LED chip to form a peripheral or partial barrier gate structure, and exerts an insulation protection effect to effectively protect the chip.
  • the sidewall overcomes the hidden trouble of the conventional chip insulation coating material in the chip cutting, thereby avoiding the short circuit caused by the overflow of the solder paste or other solid crystal conductive material in the use of the chip, and improving the reliability of the flip-chip LED chip. Sex and yield.
  • 1 is a cross-sectional view of a conventional flip-chip light emitting diode.
  • FIG. 2 is a top view of a conventional flip-chip light emitting diode.
  • Figure 3 is a cross-sectional view showing a flip-chip light emitting diode according to Embodiment 1 of the present invention.
  • Figure 4 is a top plan view of a flip-chip light emitting diode according to Embodiment 1 of the present invention.
  • 5 to 9 are schematic cross-sectional views showing a process flow for fabricating a flip-chip light emitting diode according to Embodiment 2 of the present invention.
  • Figure 10 is a cross-sectional view showing a flip-chip light emitting diode according to a third embodiment of the present invention.
  • Figure 11 is a cross-sectional view showing a flip-chip light emitting diode according to a fourth embodiment of the present invention.
  • Figure 12 is a top plan view showing a flip-chip light emitting diode according to Embodiment 4 of the present invention.
  • 100 growth substrate; 101: N-type layer 102: light-emitting layer; 103: P-type layer; 104: metal electrode; 105: insulating layer; 106: V-shaped opening structure; 107: solder paste; 108: reflective layer; W-shaped opening structure; A: epitaxial body layer; B: barrier grid structure.
  • the gallium nitride-based flip-chip light emitting diode shown in FIGS. 3 and 4 includes a growth substrate 100, an N-type layer 101, a light-emitting layer 102, a P-type layer 103, a metal electrode 104, an insulating layer 105, and a V-shaped opening structure 106.
  • the growth substrate 100 is a sapphire substrate; an epitaxial layer is formed on the luminescent layer 102, wherein the epitaxial layer sequentially includes an N-type layer 101, a luminescent layer 102, and a P-type layer 103.
  • a V-shaped opening structure 106 is located above the edge of the epitaxial layer and extends to the surface of the growth substrate 100 such that the sidewalls of the partial epitaxial layer and a portion of the substrate surface are exposed, thereby dividing the epitaxial layer into the epitaxial body layer A and
  • the barrier gate structure B because the barrier gate structure B is separated from the epitaxial body layer A, can function as a "retaining wall", thereby increasing the difficulty of solder climbing as much as possible, and since the chip cutting line is located outside the B, rather than in the V-groove, Therefore, the inner insulating layer of the V-shaped groove is not easily damaged by the cutting stress, thereby effectively avoiding the short circuit caused by the overflow of the solder paste 107 in use, thereby improving the reliability and yield of the flip-chip LED chip; the metal electrode 104 is formed.
  • an insulating layer 105 is formed on the V-shaped opening structure 106 as a metal electrode isolation layer.
  • FIG. 5 to FIG. 9 are schematic cross-sectional views showing the manufacturing process flow of the flip-chip LED structure, specifically:
  • the growth substrate 100 is made of sapphire for forming an epitaxial substrate of a GaN-based flip-chip light emitting diode; however, it should be recognized that the growth substrate 100 It can also be silicon carbide or gallium nitride or silicon or other substrates.
  • a long epitaxial layer is grown on the growth substrate 100.
  • the epitaxial layer sequentially includes an N-GaN layer 101, a light-emitting layer 102, and a P-GaN layer 103.
  • a GaN buffer layer may be grown on the growth substrate. , regenerate the epitaxial layer to achieve better lattice quality.
  • the chip size is defined by an ICP etching process, and the V-shaped opening structure 106 is etched downward from the P-GaN layer surface 103 of the epitaxial layer and extended to the surface of the growth substrate 100 such that the sidewalls of the partial epitaxial layer and The surface of part of the substrate is exposed, thereby dividing the epitaxial layer into the epitaxial body layer A and the barrier gate structure B, that is, the barrier gate structure B and the epitaxial body layer A are completely separated.
  • a metal electrode 104 is formed on the surface of a portion of the epitaxial body layer A, wherein the metal electrode 104 is preferably a Cr/Pt/Au material.
  • an insulating layer 105 is deposited on the V-shaped opening structure 106 as a metal electrode isolation layer, wherein the insulating layer 105 is preferably a distributed Bragg reflection layer in which SiO 2 and TiO 2 are stacked in a plurality of layers; using a grinding device for sapphire
  • the growth substrate is thinned and polished, and the chip is divided by a cutting and dicing process.
  • Each of the epitaxial body layers A of the chip should also retain at least one barrier structure B, which can play an insulation protection effect and effectively protect the epitaxial layer of the chip.
  • the sidewall overcomes the hidden trouble of the conventional chip insulation coating material in the chip cutting, thereby avoiding the short circuit caused by the overflow of the solder paste or other solid crystal conductive material in the use of the chip, and improving the reliability of the flip-chip LED chip.
  • the barrier gate structure B is completely isolated from the epitaxial body layer A, solder paste or other solid crystal does not occur even if the insulating layer cladding material is broken on the barrier gate structure B during chip division. The overflow of the conductive material causes a short circuit, thereby effectively improving the reliability and yield of the flip-chip LED chip.
  • the present embodiment first forms a reflective layer 108 before forming a V-shaped opening structure 106 on the epitaxial layer, and the reflective layer 108 may be a reflective metal layer or a distributed Bragg reflection layer. Or an omnidirectional reflective layer, the reflective layer 108 of the present embodiment preferably reflects a metal layer, and the reflective metal layer may include Ni or Pt or Ag or Al or Rh.
  • the opening structure formed on the epitaxial layer in this embodiment is not a V-type but a W-type (a V-shaped deformation, that is, the opening structure is not limited to a one-dimensional grating, and It is a combination of two or more V-type barrier grids, and the shape of the barrier grid is not limited to V-shape, and may be U-shaped or other curved shapes. It should be noted that the W-shaped opening structure 109 is far from the edge of the epitaxial layer.
  • the V-shaped opening must extend to the surface of the substrate 100, and the V-shaped opening of the W-shaped opening structure 109 that is closer to the edge of the epitaxial layer may not extend to the surface of the substrate 100, and only needs to be a concave structure to block. The effect is fine.

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Abstract

一种倒装发光二极管及其制作方法,包括:一基板(100);一外延层,位于基板之上,外延层包括:第一半导体层(101)、第二半导体层(103)以及夹于第一半导体层与第二半导体层之间的发光层(102);至少一个开口结构(106),位于外延层的边缘位置之上,且延伸至基板表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层(A)与阻隔栅结构(B);一绝缘层(105),位于开口结构之上,作为金属电极隔离层。

Description

一种倒装发光二极管结构及其制作方法
本申请要求于2014年6月6日提交中国专利局、申请号为201410248717.8、发明名称为“一种倒装发光二极管结构及其制作方法”的中国专利申请的优先权,其全部内容通过引用结合在本申请中。
技术领域
本发明涉及倒装发光二极管结构,尤其是涉及一种倒装发光二极管结构及其制作方法。
背景技术
发光二极管(英文为LED,缩写为Light Emitting Diode)由于具有寿命长、耗能低等优点,应用于各种领域,尤其随着其照明性能指标日益大幅提升,LED的应用越来越广泛,例如用于光学显示装置、交通标志、数据储存装置、通信装置及照明装置等。其中,以氮化镓(GaN)为代表的III-V族化合物半导体由于具有带隙宽、发光效率高、电子饱和漂移速度高、化学性质稳定等特点,在高亮度蓝光发光二极管、蓝光激光器等光电子器件领域有着巨大的应用潜力,引起了人们的广泛关注。
然而,目前半导体发光二极管存在着发光效率低的问题。对于普通的未经封装的发光二极管,大量的能量聚集在器件内部不能出射,既造成能量浪费,又影响器件的使用寿命。因此,提高半导体发光二极管的出光效率成为现在最大的课题。基于应用需求,许多种提高发光二极管出光效率的方法被应用到器件结构中,例如采用透明衬底、表面粗化、金属反射镜结构、倒装芯片等。其中倒装芯片由于具备耐大电流、电压低、光效高、无需打线等应用优势受到越来越多重视。
目前倒装发光二极管芯片一般被设计成矩形形状,结构上一般是由基板、外延层、P型欧姆接触层(兼做反射金属层)、绝缘层、N型欧姆接触层至下而上形成的层状堆叠结构,其中金属层均做成较大面状结构,因此绝缘层的设计就尤为重要,一旦绝缘层有破损,就会造成P、N电极短路;一般芯片内部的绝缘层较为稳定不易破裂,但是芯片边缘的绝缘层往往会在芯片切割工艺中产生破裂,另一方面因考虑芯片的出光效率、电流分布,尤其是对于大尺寸芯片设计,P、N金属电极的大小、位置受限,在封装时如采用锡膏焊接的作业方式,往往会造成锡膏涂布不均、锡膏溢流出焊盘区域,若遇到芯粒边缘绝缘层受损时就会发生电路不良、漏电等异常,如图1和2所示,影响封装作业的良率,不利于倒装芯片的推广应用。
发明内容
本发明所要解决的技术问题是克服现有技术的不足,从芯片设计与制作工艺中采用特殊阻隔栅结构,提供一种具有提高可靠性的倒装发光二极管芯片及其制作方法,从根本上解决锡膏或其他固晶导电材料溢流导致芯片内部短路问题。
本发明通过在倒装发光二极管芯片的外延层边缘制作阻隔栅结构,避免常规芯片绝缘层包覆材料在芯片切割中容易发生破裂,从而形成新型绝缘防护结构,有效保护了芯片的侧壁,避免芯片在使用中由于锡膏或其他固晶导电材料的溢流导致短路,提高芯片的可靠性。
本发明的技术方案为:一种倒装发光二极管结构,包括:一基板;一外延层,位于所述基板之上,所述外延层包括:第一半导体层、第二半导体层以及夹于第一半导体层与第二半导体层之间的发光层;至少一个开口结构,位于所述外延层的边缘位置之上,且延伸至基板表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层与阻隔栅结构;一绝缘层,位于所述开口结构之上,作为金属电极隔离层。
上述倒装发光二极管结构,还可以包括在外延层上形成至少一个开口结构之前增设反射层,所述反射层可以是反射金属层或者是分布布拉格反射层或者是全方位反射层;还可以包括在形成绝缘层后,再在外延层上设置金属电极。
本发明还提供一种倒装发光二极管的制作方法,其主要包括以下工艺步骤:1)提供一基板;2)在基板上制作外延层,所述外延层包括:第一半导体层、第二半导体层以及夹于第一半导体层与第二半导体层之间的发光层;3)采用蚀刻工艺,从外延层表面往下蚀刻出至少一个开口结构,且延伸至基板表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层与阻隔栅结构;4)在所述开口结构沉积绝缘层,作为金属电极隔离层。
上述倒装发光二极管的制作方法,还可以包括以下工艺步骤:在外延层上形成至少一个开口结构之前先形成反射层,所述反射层可以是反射金属层或者是分布布拉格反射层或者是全方位反射层;也可以包括在形成绝缘层后,再在外延层上制作金属电极。
优选地,所述开口结构为U型或者是V型或者是W型或者是前述任意组合之一。
优选地,所述基板可以是生长基板或者是散热基板或者是粘合基板或者是前述任意组合
之一。
优选地,所述生长基板材料可以是蓝宝石(Al2O3)或者是碳化硅(SiC)或者是氮化镓(GaN)或者是前述任意组合之一。
优选地,所述反射金属层包括Ag或者是Al或者是Rh或者是前述任意组合之一。
优选地,所述绝缘层可以是SiO2或者是SiNx或者是TiO2或者是前述材料任意组合之一。
优选地,所述金属电极可以是Ni/Au或者是Cr/Pt/Au或者是Ti/Al/Ti/Au或前述的任意组合之一。
与现有技术相比,本发明至少包括如下有益效果:本发明通过在倒装发光二极管芯片的外延层边缘制作开口,形成外围或局部的阻隔栅结构,发挥绝缘防护作用,有效地保护芯片的侧壁,克服常规芯片绝缘层包覆材料在芯片切割中容易发生破裂的隐患,从而避免芯片在使用中由于锡膏或其他固晶导电材料的溢流导致短路,提高倒装发光二极管芯片的可靠性和良率。
本发明的其它特征和优点将在随后的说明书中阐述,并且,部分地从说明书中变得显而易见,或者通过实施本发明而了解。
附图说明
附图用来提供对本发明的进一步理解,并且构成说明书的一部分,与本发明实施例一起用于解释本发明,并不构成对本发明的限制。此外,附图数据是描述概要,不是按比例绘制。
图1是现有的倒装发光二极管的剖视图。
图2是现有的倒装发光二极管的顶视图。
图3是本发明实施例1的倒装发光二极管的剖视图。
图4是本发明实施例1的倒装发光二极管的顶视图。
图5~9是本发明实施例2制作倒装发光二极管的工艺流程剖面示意图。
图10是本发明实施例3的倒装发光二极管的剖视图。
图11是本发明实施例4的倒装发光二极管的剖视图。
图12是本发明实施例4的倒装发光二极管的顶视图。
图中部件符号说明:
100:生长基板;101:N型层102:发光层;103:P型层;104:金属电极;105:绝缘层;106:V型开口结构;107:锡膏;108:反射层;109:W型开口结构;A:外延主体层;B:阻隔栅结构。
具体实施方式
以下将结合附图及实施例来详细说明本发明的实施方式,借此对本发明如何应用技术手 段来解决技术问题,并达成技术效果的实现过程能充分理解并据以实施。需要说明的是,只要不构成冲突,本发明中的各个实施例以及各实施例中的各个特征可以相互结合,所形成的技术方案均在本发明的保护范围之内。
实施例1
如图3和4所示的氮化镓基倒装发光二极管,包括:生长基板100、N型层101、发光层102、P型层103、金属电极104、绝缘层105、V型开口结构106、外延主体层A与阻隔栅结构B。
具体来说,上述氮化镓基倒装发光二极管结构中生长基板100为蓝宝石基板;外延层,形成于发光层102上,其中外延层依次包括N型层101、发光层102和P型层103;V型开口结构106,位于所述外延层的边缘位置之上,且延伸至生长基板100表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层A与阻隔栅结构B,由于阻隔栅结构B与外延主体层A分离,可以充当“挡墙”的作用,尽可能增加焊锡攀爬的难度,又由于芯片切割线位于B外侧而不是位于V型槽,因此V型槽内绝缘层不易因切割应力发生破损,从而有效地避免芯片在使用中由于锡膏107的溢流导致短路,从而改善倒装发光二极管芯片的可靠性和良率;金属电极104,形成于部分外延主体层A上;绝缘层105,形成于V型开口结构106之上,作为金属电极隔离层。
实施例2
如图5~9所示的倒装发光二极管结构的制作工艺流程剖面示意图,具体来说:
如图5所示,首先提供生长基板100,在本实施例中,所述生长基板100选用蓝宝石,用以形成GaN基倒装发光二极管的磊晶基板;然而应当认识到,所述生长基板100还可以是碳化硅或氮化镓或硅或其他基板。
如图6所示,在生长基板100上长外延层,外延层依次包括N-GaN层101、发光层102和P-GaN层103,更进一步地,还可以先在生长基板上生长GaN缓冲层,再生长外延层,以取得更优的晶格质量。
如图7所示,采用ICP蚀刻工艺定义芯片尺寸,从外延层之P-GaN层表面103往下蚀刻出V型开口结构106,且延伸至生长基板100表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层A与阻隔栅结构B,即阻隔栅结构B与外延主体层A完全分离。
如图8所示,在部分外延主体层A表面上制作金属电极104,其中金属电极104优选Cr/Pt/Au材料。
如图9所示,在V型开口结构106上沉积绝缘层105,作为金属电极隔离层,其中绝缘层105优选SiO2与TiO2多层交叠构成的分布布拉格反射层;使用研磨设备对蓝宝石生长基板减薄,并抛光,使用切割、划裂工艺将芯片分割,每个芯片外延主体层A还应至少保留一个阻隔栅结构B,该结构可以发挥绝缘防护作用,有效地保护芯片的外延层侧壁,克服常规芯片绝缘层包覆材料在芯片切割中容易发生破裂的隐患,从而避免芯片在使用中由于锡膏或其他固晶导电材料的溢流导致短路,提高倒装发光二极管芯片的可靠性和良率;此外,由于阻隔栅结构B与外延主体层A完全隔离开,即使在芯片分割中可能于阻隔栅结构B上产生绝缘层包覆材料破裂,也不会发生锡膏或其他固晶导电材料的溢流导致短路,因而有效提升倒装发光二极管芯片的可靠性和良率。
实施例3
如图10所示,与实施例1不同的是,本实施例在外延层上形成V型开口结构106之前先形成反射层108,所述反射层108可以是反射金属层或者是分布布拉格反射层或者是全方位反射层,本实施例反射层108优选反射金属层,反射金属层可以包括Ni或者是Pt或者是Ag或者是Al或者是Rh。
实施例4
如图11~12所示,与实施例3不同的是,本实施例在外延层上形成开口结构不是V型,是W型(属于V型的变形,即开口结构不限于一维光栅,可以是两个或多个V型阻隔栅的组合,阻隔栅形状也不限于V型,也可以是U型或其他曲线形状),需要指出的是W型开口结构109中距外延层边缘较远的V型开口须延伸至基板100表面亦可,而W型开口结构109中距外延层边缘较近的V型开口可以不延伸至基板100表面亦可,只需为凹形结构能起到阻隔的作用即可。

Claims (11)

  1. 一种倒装发光二极管结构,包括:
    一基板;
    一外延层,位于所述基板之上,所述外延层包括:第一半导体层、第二半导体层以及夹于第一半导体层与第二半导体层之间的发光层;
    至少一个开口结构,位于所述外延层的边缘位置之上,且延伸至基板表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层与阻隔栅结构;
    一绝缘层,位于所述开口结构之上,作为金属电极隔离层。
  2. 根据权利要求1所述的一种倒装发光二极管结构,其特征在于:所述阻隔栅结构具有避免芯片在使用中由于锡膏或其他固晶导电材料的溢流导致短路,提高倒装发光二极管芯片的可靠性和良率的功效。
  3. 根据权利要求1所述的一种倒装发光二极管结构,其特征在于:所述开口结构为U型或者是V型或者是W型或者是前述任意组合之一。
  4. 根据权利要求1所述的一种倒装发光二极管结构,其特征在于:还包括在外延层上形成至少一个开口结构之前增设反射层。
  5. 根据权利要求4所述的一种倒装发光二极管结构,其特征在于:所述反射层为反射金属层或者是分布布拉格反射层或者是全方位反射层。
  6. 根据权利要求1所述的一种倒装发光二极管结构,其特征在于:还包括在形成绝缘层后,再在外延层上设置金属电极。
  7. 一种倒装发光二极管的制作方法,其主要包括以下工艺步骤:
    1)提供一基板;
    2)在基板上制作外延层,所述外延层包括:第一半导体层、第二半导体层以及夹于第一半导体层与第二半导体层之间的发光层;
    3)采用蚀刻工艺,从外延层表面往下蚀刻出至少一个开口结构,且延伸至基板表面,使得部分外延层的侧壁以及部分基板表面裸露,从而将外延层划分为外延主体层与阻隔栅结构;
    4)在所述开口结构沉积绝缘层,作为金属电极隔离层。
  8. 根据权利要求7所述的一种倒装发光二极管结构的制作方法,其特征在于:所述阻隔栅结构具有避免发光二极管结构在使用中由于锡膏或其他固晶导电材料的溢流导致短路,提高倒装发光二极管的可靠性和良率的功效。
  9. 根据权利要求7所述的一种倒装发光二极管结构的制作方法,其特征在于:所述开口结构为U型或者是V型或者是W型或者是前述任意组合之一。
  10. 根据权利要求7所述的一种倒装发光二极管结构的制作方法,其特征在于:还包括在外延层上形成至少一个开口结构之前先形成反射层。
  11. 根据权利要求7所述的一种倒装发光二极管结构的制作方法,其特征在于:还包括在形成绝缘层后,再在外延层上制作金属电极。
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106093710A (zh) * 2016-08-19 2016-11-09 江西师范大学 一种基于物联网技术的线管智能监控装置
CN113644169A (zh) * 2021-08-13 2021-11-12 福建兆元光电有限公司 一种红光led芯片及其制造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN103996773B (zh) * 2014-06-06 2016-09-28 厦门市三安光电科技有限公司 一种倒装发光二极管结构及其制作方法
JP2016174018A (ja) * 2015-03-16 2016-09-29 株式会社東芝 半導体発光素子
JP2016174015A (ja) * 2015-03-16 2016-09-29 株式会社東芝 半導体発光素子
CN107845721A (zh) * 2017-10-23 2018-03-27 山东晶泰星光电科技有限公司 一种用于倒装或垂直led芯片的led支架
CN113659048B (zh) * 2021-07-22 2023-10-20 厦门三安光电有限公司 倒装发光二极管及其制备方法
CN113594326B (zh) * 2021-07-29 2022-12-20 厦门三安光电有限公司 一种发光二极管、发光模块及显示装置

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003051610A (ja) * 2001-08-03 2003-02-21 Nichia Chem Ind Ltd Led素子
JP2004228408A (ja) * 2003-01-24 2004-08-12 Sanyo Electric Co Ltd 半導体発光素子および半導体素子
US20080054290A1 (en) * 2006-09-05 2008-03-06 Epistar Corporation Light emitting device and the manufacture method thereof
CN101599457A (zh) * 2008-04-25 2009-12-09 三星电子株式会社 发光器件、包括发光系统的封装和系统以及其构造方法
CN103531686A (zh) * 2012-07-02 2014-01-22 东莞市正光光电科技有限公司 发光元件及其制作方法
CN203521451U (zh) * 2013-09-05 2014-04-02 深圳市智讯达光电科技有限公司 一种倒装led芯片的焊接保护结构及倒装led芯片
CN103996773A (zh) * 2014-06-06 2014-08-20 厦门市三安光电科技有限公司 一种倒装发光二极管结构及其制作方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI244221B (en) * 2004-03-01 2005-11-21 Epistar Corp Micro-reflector containing flip-chip light emitting device
KR20070007137A (ko) * 2004-04-20 2007-01-12 쇼와 덴코 가부시키가이샤 화합물 반도체 발광소자 웨이퍼의 제조방법
JP4632697B2 (ja) * 2004-06-18 2011-02-16 スタンレー電気株式会社 半導体発光素子及びその製造方法
US8124454B1 (en) * 2005-10-11 2012-02-28 SemiLEDs Optoelectronics Co., Ltd. Die separation
DE102009035429A1 (de) * 2009-07-31 2011-02-03 Osram Opto Semiconductors Gmbh Leuchtdiodenchip
CN102859726B (zh) * 2010-04-06 2015-09-16 首尔伟傲世有限公司 发光二极管及其制造方法
CN102544251B (zh) * 2010-12-27 2014-05-07 同方光电科技有限公司 一种大功率垂直发光二极管的制造方法
CN102339913B (zh) * 2011-09-30 2013-06-19 映瑞光电科技(上海)有限公司 高压led器件及其制造方法
CN103022334B (zh) * 2012-12-21 2016-01-13 映瑞光电科技(上海)有限公司 一种高压倒装led芯片及其制造方法
KR20150101783A (ko) * 2014-02-27 2015-09-04 서울바이오시스 주식회사 발광 다이오드 및 그 제조 방법
TWI583020B (zh) * 2015-07-06 2017-05-11 隆達電子股份有限公司 發光元件及發光裝置

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2003051610A (ja) * 2001-08-03 2003-02-21 Nichia Chem Ind Ltd Led素子
JP2004228408A (ja) * 2003-01-24 2004-08-12 Sanyo Electric Co Ltd 半導体発光素子および半導体素子
US20080054290A1 (en) * 2006-09-05 2008-03-06 Epistar Corporation Light emitting device and the manufacture method thereof
CN101599457A (zh) * 2008-04-25 2009-12-09 三星电子株式会社 发光器件、包括发光系统的封装和系统以及其构造方法
CN103531686A (zh) * 2012-07-02 2014-01-22 东莞市正光光电科技有限公司 发光元件及其制作方法
CN203521451U (zh) * 2013-09-05 2014-04-02 深圳市智讯达光电科技有限公司 一种倒装led芯片的焊接保护结构及倒装led芯片
CN103996773A (zh) * 2014-06-06 2014-08-20 厦门市三安光电科技有限公司 一种倒装发光二极管结构及其制作方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106093710A (zh) * 2016-08-19 2016-11-09 江西师范大学 一种基于物联网技术的线管智能监控装置
CN106093710B (zh) * 2016-08-19 2018-12-18 江西师范大学 一种基于物联网技术的线管智能监控装置
CN113644169A (zh) * 2021-08-13 2021-11-12 福建兆元光电有限公司 一种红光led芯片及其制造方法

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