WO2015158152A1 - 衬底上的孔隙沉积工艺及半导体加工设备 - Google Patents

衬底上的孔隙沉积工艺及半导体加工设备 Download PDF

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Publication number
WO2015158152A1
WO2015158152A1 PCT/CN2014/094380 CN2014094380W WO2015158152A1 WO 2015158152 A1 WO2015158152 A1 WO 2015158152A1 CN 2014094380 W CN2014094380 W CN 2014094380W WO 2015158152 A1 WO2015158152 A1 WO 2015158152A1
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substrate
pore
metal
pores
semiconductor processing
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PCT/CN2014/094380
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English (en)
French (fr)
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边国栋
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北京北方微电子基地设备工艺研究中心有限责任公司
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Priority to SG11201607490RA priority Critical patent/SG11201607490RA/en
Priority to KR1020167030766A priority patent/KR20160138296A/ko
Publication of WO2015158152A1 publication Critical patent/WO2015158152A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/22—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the process of coating
    • C23C14/34—Sputtering
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/283—Deposition of conductive or insulating materials for electrodes conducting electric current
    • H01L21/285—Deposition of conductive or insulating materials for electrodes conducting electric current from a gas or vapour, e.g. condensation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/0405, H01L21/0445, H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
    • H01L21/44—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
    • H01L21/441—Deposition of conductive or insulating materials for electrodes
    • H01L21/443—Deposition of conductive or insulating materials for electrodes from a gas or vapour, e.g. condensation

Definitions

  • the invention belongs to the technical field of semiconductor processing, and in particular relates to a pore deposition process on a substrate and a semiconductor processing device.
  • the dual embedded process also known as the dual damascene process. Specifically, as shown in FIG. 1, the dual embedded process includes the following steps:
  • Step S1 depositing a silicon nitride film 1 on the upper surface of the substrate for terminating the etching of the subsequently deposited dielectric material layer 2;
  • Step S2 depositing a low dielectric constant dielectric material layer 2 having a certain thickness on the surface of the silicon nitride film 1;
  • Step S3 performing photolithography on the dielectric material layer 2 to form a via pattern thereon for realizing interconnection lines in the vertical direction;
  • Step S4 etching on the dielectric material layer 2 according to the through hole pattern to obtain a through hole 3 having a predetermined depth;
  • Step S5 performing photolithography on the dielectric material layer 2 to form a trench pattern thereon for realizing interconnect lines in the horizontal direction;
  • Step S6 etching the dielectric material layer 2 according to the trench pattern to obtain the trench 4 having the depth required for the process, and continuing to etch the via hole 3 according to the via pattern to achieve the desired process. depth;
  • Step S7 depositing a barrier layer 5 and a copper seed layer 6 sequentially on the upper surface of the substrate by sputtering deposition to sequentially deposit on the upper surface of the substrate and the through holes 3 and 4 in the substrate a barrier layer 5 and a copper seed layer 6, wherein the barrier layer 5 serves to block diffusion of copper atoms to the dielectric material layer 2, and to enhance adhesion between the dielectric material layer 2 and the copper seed layer 6.
  • the copper seed layer 6 is used as a conductive layer in a subsequent electroplating process;
  • Step S8 depositing a copper layer on the upper surface of the substrate by an electroplating process to form a copper layer on the upper surface of the substrate and the via holes 3 and the trenches 4 thereon;
  • step S9 the copper layer on the upper surface of the substrate is planarized and cleaned by an annealing process and a chemical mechanical polishing process.
  • depositing the copper seed layer in step S7 is one of the key steps of the copper interconnection process, as shown in FIG. 2, which specifically includes the following steps:
  • Step S71 a degassing process is performed to remove volatile gas impurities on the surface of the substrate by heating to ensure electrical properties of the subsequent copper layer;
  • Step S72 the pre-cleaning process uses plasma etching to remove non-volatile gas impurities on the surface of the substrate to ensure electrical properties of the subsequent copper layer;
  • Step S73 depositing a barrier layer 5 (for example, tantalum nitride or tantalum) on the upper surface of the substrate by magnetron sputtering to be in the upper surface of the substrate and the via holes 3 and the trenches 4 thereon Depositing a barrier layer 5;
  • a barrier layer 5 for example, tantalum nitride or tantalum
  • step S74 a copper seed layer 6 is deposited on the upper surface of the substrate to deposit a copper seed layer 6 on both the upper surface of the substrate and the vias 3 and 4 thereon.
  • a magnetron sputtering process is performed using a semiconductor processing apparatus to deposit a copper seed layer 6 on both the upper surface of the substrate and the via holes 3 and trenches 4 thereon.
  • the semiconductor processing apparatus includes a reaction chamber 10, a copper target 11 is disposed at the top inside the reaction chamber 10, and a high ionization rate magnetron is disposed above the copper target 11. 12, for achieving high ionization of the target ions; a carrying device 13 for carrying the substrate is disposed in the reaction chamber 10 and below the copper target 11, and the carrying device 13 is electrically connected to the RF power source 14.
  • the RF power source 14 is used to provide RF power to the carrier device 13 to increase the directivity of the target particles, so that the copper seed layer 6 can be well controlled in the top extension region of the holes (through holes 3 and 4) (overhang) And the coverage of the inner sidewalls to meet the requirements of the subsequent electroplating process, and the complete filling of the pores meets the process requirements.
  • the above-mentioned magnetron sputtering process can only satisfy the coverage of the large-sized pore inner sidewall of the technology node above 22 nm, and cannot control the coverage of the small-sized pore inner sidewall of the technology node below 22 nm. Since the coverage of the inner side wall of the small-sized pores cannot be controlled, the result of subsequent complete filling of the pores is difficult to meet the process requirements. Therefore, how to improve the coverage of the inner sidewall of the small-sized aperture is a technical problem to be solved by those skilled in the art.
  • the present invention is directed to solving the technical problems existing in the prior art, and provides a pore deposition process on a substrate and a semiconductor processing apparatus, which can improve the coverage of the inner sidewall of the small-sized pore, thereby improving the subsequent small size.
  • the process quality of the pore filling process provides good conditions.
  • the present invention provides a pore deposition process on a substrate, wherein the metal particle migration process is performed at least once, and the metal particle migration process includes the following steps: Step S100, using a sputtering deposition method Forming a metal layer in the pores on the substrate; in step S200, heating the substrate forming the metal layer to a preset temperature such that metal particles of the metal layer gradually extend from the upper portion of the pore to the pore Bottom migration.
  • the preset temperature ranges from 200 to 300 °C.
  • the process temperature used in the step S100 ranges from less than 60 °C.
  • the performing the metal particle migration process at least once comprises repeatedly performing the metal particle migration process until the interior of the pore is completely filled with the metal particles.
  • a plating process filling process is further included, that is, a metal is deposited on the upper surface of the substrate by an electroplating process until the inside of the pores on the substrate is completely The metal particles are filled.
  • the present invention also provides a semiconductor processing apparatus including a reaction chamber, a heating chamber, and a transfer device, wherein the reaction chamber is used for sputtering deposition Forming a metal layer in the pores on the substrate; the heating chamber is configured to bring the substrate forming the metal layer to a preset temperature, so that the metal particles of the metal layer gradually move from the upper portion of the pore The bottom of the pore migrates; the transport means is for transporting the substrate between the reaction chamber and the heating chamber.
  • the heating chamber is disposed outside the sidewall of the reaction chamber and is in communication with the reaction chamber.
  • the transmission device includes a carrier arm and a rotary drive mechanism, wherein: the carrier arm is configured to carry the substrate; the rotary drive mechanism is configured to drive the carrier arm to rotate about a rotation axis thereof to drive the A substrate is transferred between the reaction chamber and the heating chamber.
  • the heating chamber is provided with heating means for heating the substrate to a preset temperature when the substrate is located in the heating chamber.
  • the preset temperature ranges from 200 to 300 °C.
  • the heating device comprises an infrared heating bulb, an electric resistance wire or an induction coil.
  • the metal particle migration process is performed at least once, and the metal particle migration process includes the following steps S100 and S200, and the lining is performed by sputtering deposition in step S100.
  • the upper part gradually migrates to the bottom of the pore.
  • the metal particles at the epitaxial region at the top of the pore migrate downward to the inner side wall of the pore and the bottom of the pore, thereby increasing the coverage of the metal particles in the inner wall of the pore.
  • Good conditions are provided for the subsequent pore filling process. Since the pore deposition process on the substrate provided by the present invention increases the coverage of the metal particles in the inner sidewall of the pore by the migration process of the metal particles, the method has no special requirement on the size of the pore, and is suitable for the technical node at 22 nm.
  • the above large size pores are also suitable for technical nodes at 22nm
  • the following small-sized pores are therefore suitable for a wide range of applications.
  • the metal particle migration process is repeated until the pores are completely filled with metal particles. In this way, the coverage of the metal particles in the inner sidewall of the pore can be further improved, and the complete filling of the pore can be directly realized, thereby improving the efficiency and quality of the process.
  • a plating process filling process needs to be performed, that is, a metal is deposited on the upper surface of the substrate by an electroplating process until the pores on the substrate are completely covered by the metal. Particle filling.
  • a plating process filling process needs to be performed, that is, a metal is deposited on the upper surface of the substrate by an electroplating process until the pores on the substrate are completely covered by the metal. Particle filling.
  • the semiconductor processing apparatus provided by the present invention comprises a reaction chamber, a heating chamber and a transport device capable of transporting a substrate between the reaction chamber and the heating chamber, and the heating chamber can be formed in the reaction chamber
  • the substrate of the metal layer is heated to a preset temperature to enhance the migration ability of the metal particles of the metal layer at the predetermined high temperature, thereby realizing migration of the metal particles from the upper portion of the pore to the bottom of the pore, and during the migration
  • the metal particles at the epitaxial region at the top of the pore migrate downward to the inner side wall of the pore and the bottom of the pore, thereby increasing the coverage of the metal particles in the inner side wall of the pore, and providing favorable conditions for the subsequent pore filling process. And improve the quality of the process.
  • the semiconductor processing apparatus provided by the present invention increases the coverage of the metal particles in the sidewalls of the pores by the migration process of the metal particles, there is no particular requirement for the size of the pores, and the scope of application is wide.
  • FIG. 2 is a schematic flow chart of step S7 in FIG. 1;
  • FIG 3 is a schematic view showing the structure of a reaction chamber of a conventional magnetron sputtering apparatus.
  • FIG. 4 is a view showing a form of pores in a step S100 of a pore deposition process on a substrate provided by an embodiment of the present invention
  • Figure 5 is a morphological change process diagram of the aperture shown in Figure 4 in step S200 of the embodiment of the present invention.
  • FIG. 6 is a schematic structural diagram of a semiconductor processing apparatus according to an embodiment of the present invention.
  • Figure 7 is a transmission trace diagram of the substrate between the reaction chamber and the heating chamber.
  • the essence of the invention is to provide a pore deposition process on a substrate and a corresponding semiconductor processing apparatus, wherein the migration of the metal particles at the preset temperature by heating the substrate forming the metal layer to a preset temperature
  • the ability is enhanced to realize the migration of the metal particles from the upper portion of the pore to the bottom of the pore, and during the migration, the metal particles at the epitaxial region at the top of the pore migrate downward to the inner side wall of the pore and the bottom of the pore, thereby improving
  • the coverage of the metal particles in the inner sidewall of the pore provides good conditions for the subsequent filling process of the pore. Further, since the coverage of the metal particles in the inner wall of the pore is improved by the migration process of the metal particles in the present invention, there is no particular requirement for the size of the pores, and the scope of application is wide.
  • FIG. 4 is a view showing the morphology of pores in step S100 of the pore deposition process on the substrate provided by the embodiment of the present invention.
  • Figure 5 is a diagram showing the morphological change process of the aperture shown in Figure 4 in step S200 of the embodiment of the present invention.
  • the metal particle migration process is performed at least once, and the metal particle migration process includes the following steps:
  • Step S100 forming a metal layer in the pores on the substrate by sputtering deposition; wherein the metal comprises copper or aluminum;
  • step S200 the substrate on which the metal layer is formed is heated to a preset temperature so that the metal particles of the metal layer gradually migrate from the upper portion of the pore to the bottom portion 3 of the pore.
  • the upper portion of the aperture comprises an epitaxial region 2 at the top of the aperture and an inner sidewall 1 above the bottom 3 of the aperture.
  • the metal particle migration process including step S100 and step S200 is performed.
  • step S100 since the size of the pores is small, the copper particles whose moving direction faces the inner side wall 1 of the pores do not easily enter the pores, thereby causing the copper layer deposited on the inner side wall 1 of the pores to be thin, and The metal layer deposited on the epitaxial region 2 and the pore bottom 3 at the top of the pore is relatively thick, as shown in FIG.
  • the coverage of the epitaxial region 2 and the inner sidewall 1 at the top of the pore is not well controlled, that is, In a portion of the epitaxial region 2 at the top of the pore which is desired to deposit or not deposit a metal layer, an excessive metal layer is deposited, and a portion of the inner sidewall 1 of the pore which is desired to deposit the metal layer is not deposited with metal.
  • Floor In a portion of the epitaxial region 2 at the top of the pore which is desired to deposit or not deposit a metal layer, an excessive metal layer is deposited, and a portion of the inner sidewall 1 of the pore which is desired to deposit the metal layer is not deposited with metal.
  • step S200 the substrate having the pores of the morphology shown in FIG. 4 is heated to a preset temperature.
  • the preset temperature ranges from 200 to 300 ° C, which makes the vacuum and the temperature Under the condition of temperature chamber, the migration ability of copper particles in the copper layer is enhanced, and gradually migrates from the upper part of the pore to the bottom 3 of the pore under the action of its atomic mass.
  • FIG. 5 shows the pores shown in FIG.
  • step S200 of the pore deposition process on the substrate provided by the embodiment of the invention: wherein, in the phase I, the copper layer deposited on the inner sidewall 1 of the pore is thin, and the epitaxial region 2 and the bottom of the pore at the top of the pore 3 The deposited metal layer is relatively thick; in stage II, the copper particles migrate from the upper part of the pore to the bottom 3 of the pore.
  • the metal particles of the epitaxial region 2 at the top of the pore migrate downward to the inner side wall of the pore 1 And at the bottom 3 of the pores, part of the metal particles on the inner side wall 1 of the pores also migrate toward the bottom 3 of the pores, so that the copper layer deposited on the upper portion of the pores becomes thinner, and the metal layer deposited on the bottom portion 3 of the pores becomes thicker; stage In the crucible, the copper particles continue to migrate from the upper part of the pore to the bottom 3 of the pore, the copper layer deposited on the upper part of the pore continues to be thinned, and the metal layer deposited on the bottom 3 of the pore Further thicker.
  • the range of the preset temperature is specifically set according to the metal material to be deposited in the process, as long as the migration ability of the metal particles can be enhanced under the preset temperature condition.
  • the metal particle migration process is repeatedly performed, that is, the above steps S100 and S200 are repeatedly performed, and the copper particles are repeatedly repetitively moved from the upper portion of the pores to the bottom portion 3 of the pores, so that the thickness of the copper particles deposited at the bottom 3 of the pores is increased. The thicker it is.
  • the above steps S100 and S200 are repeated until the inside of the pores is completely filled with metal particles (copper particles), thereby achieving complete filling of the inside of the pores by the metal particles.
  • the inside of the pores is completely filled with the metal particles, which not only can further improve the coverage of the metal particles of the inner side wall 1 of the pores, but also can directly achieve the complete filling of the pores without
  • the technology further increases the plating process to achieve complete filling of the pores, thereby improving process efficiency and improving process quality.
  • the metal copper may be deposited into the pores by the pore deposition process on the substrate provided by the embodiment to realize the copper interconnect. Moreover, to implement the copper interconnect, the following steps are also included before step S100:
  • Step S101 depositing a silicon nitride film on the upper surface of the substrate for stopping the etching of the subsequently deposited dielectric material layer;
  • Step S102 depositing a low dielectric constant dielectric material layer having a certain thickness on the surface of the silicon nitride film;
  • Step S103 etching a void on the dielectric material layer, wherein the void includes a trench for realizing an interconnect line in a horizontal direction and a via hole for realizing an interconnect line in a vertical direction.
  • the step S310 may be further included, and the copper layer on the surface of the substrate is planarized and cleaned by an annealing process and a chemical mechanical polishing process. .
  • the present invention achieves complete filling of the pores by the metal particles by repeatedly performing the metal particle migration process
  • the present invention is not limited thereto, and is actually In the application, after the metal particle migration process is performed at least once, the electroplating process filling process is further included, that is, the copper metal is deposited on the upper surface of the substrate by an electroplating process until the inside of the pores on the substrate is surrounded by metal particles (for example, copper particles). ) completely filled.
  • the coverage of the metal particles on the inner sidewall of the pore can be improved, thereby providing a good process basis for the subsequent plating process filling process, avoiding defects in the plating process; and, by means of the electroplating process
  • the filling process allows the pores to be completely filled, thereby improving the quality of the process. It can be understood that in order to meet the requirements of the electroplating process, the above metal particle migration process can be repeated a certain number of times to ensure that the coverage of the epitaxial region 2 and the inner sidewall 1 at the top of the pore meets the plating requirements.
  • a copper target is disposed at the top of the chamber in which the step S100 is completed, and a high ionization rate magnetron is disposed above the copper target to achieve high ionization of the target ions, and
  • the copper target is electrically connected to the direct current power source for exciting the process gas in the chamber to form a plasma and applying a negative bias to the copper target to attract the plasma to bombard the copper target, which causes the surface of the copper target to be bombarded and escaped.
  • the copper particles are deposited on the surface of the substrate to form a copper layer, and the output power of the DC power source is about 3 kW; in the chamber, under the copper target, a carrying device for carrying the substrate substrate is disposed, and the carrying device is The RF power source is electrically connected, and the RF power source is used to provide RF power to the carrying device to increase the directivity of the target particles.
  • the output power of the RF power source is about 400 W; in addition, the air pressure of the chamber is about 0 mTorr; the process used in step S100
  • the temperature range is less than 60 °C.
  • a specific working process of depositing metallic copper in the pores by using the pore deposition process on the substrate provided in the embodiment is specifically described.
  • the present invention is not limited thereto.
  • the pore deposition process on the substrate provided in this embodiment may also be used to deposit other metals in the pores, and the working process is similar to the above process of depositing metallic copper, but It is necessary to specifically set specific parameters in the deposition process according to different metal materials, for example, setting the magnetron sputtering method in step S100 and the preset temperature in step S200.
  • the pore deposition process on the substrate forms a metal layer in the void in step S100, and heats the substrate forming the metal layer to a preset temperature in step S200, which causes the metal Under the condition of preset temperature, the migration ability of the particles is enhanced, so that the metal particles gradually migrate from the upper part of the pores to the bottom of the pores, thereby increasing the coverage of the metal particles on the inner side wall of the pores, and providing the filling process for the subsequent pores. Good condition.
  • the coverage of the metal particles in the inner sidewall of the pore is improved by the migration process of the metal particles, so the method has no special requirement on the size of the pore, and has a wide application range, for example, It is suitable for large-sized pores with technology nodes above 22nm, and for small-sized pores with technology nodes below 22nm.
  • FIG. 6 is a schematic structural diagram of a semiconductor processing apparatus according to an embodiment of the present invention.
  • Figure 7 is a transmission trace diagram of the substrate between the reaction chamber and the heating chamber.
  • the semiconductor processing apparatus provided in this embodiment includes a reaction chamber 20, a heating chamber 21, and a transmission device 22.
  • the reaction chamber 20 is used to form a metal layer in the pores on the substrate by sputtering deposition, the metal includes copper or aluminum, etc.; the transport device 22 is used to transfer between the reaction chamber 20 and the heating chamber 21.
  • the heating chamber 21 is for heating the substrate to a preset temperature such that the metal particles of the metal layer gradually migrate from the upper portion of the pore to the bottom of the pore.
  • the metal particles in the epitaxial region at the top of the pore migrate downward to the inner side wall of the pore and the bottom of the pore, thereby increasing the coverage of the metal particles on the inner side wall of the pore, and providing a subsequent filling process for the pore. Good conditions, thereby improving the quality of the process.
  • the semiconductor processing apparatus provided by the embodiment of the present invention increases the coverage of the metal particles of the inner sidewall of the pore by the migration process of the metal particles, there is no special requirement for the size of the pore, and the scope of application is wide, for example, applicable to The large-sized pores of the technology node above 22 nm are suitable for small-sized pores with technology nodes below 22 nm.
  • the top of the reaction chamber 20 is provided with a metal target 201, and a high ionization rate magnetron 202 is disposed above the metal target 201.
  • the metal target 201 is electrically connected to the direct current power source for exciting the process gas in the reaction chamber 20 to form a plasma and loading the metal target 201 with a negative bias to attract The plasma bombards the metal target, which causes metal particles escaping from the surface of the metal target 201 to be deposited on the surface of the substrate to form a metal layer; in the reaction chamber 20, and under the metal target 201, useful
  • the substrate carrying device 203 is electrically connected to the RF power source 204.
  • the RF power source 204 is used to provide RF power to the carrier device 203 to increase the directivity of the target particles.
  • the metal target is a copper target
  • the output power of the radio frequency power source 204 is about 400 W
  • the pressure of the reaction chamber 20 is about 0 mTorr
  • the reaction chamber 20 The temperature range is less than 60 ° C
  • the output power of the DC power supply is about 3 kW.
  • the heating chamber 21 is disposed outside the side wall of the reaction chamber 20 and communicates with the reaction chamber 20; in addition, a heating device 211 is disposed in the heating chamber 21 for the substrate to be located in the heating chamber 21 When inside, the substrate is heated to a preset temperature.
  • the preset temperature ranges from 200 to 300 °C.
  • the heating device 211 includes an infrared heating bulb that is heated by infrared heating, and the infrared heating bulb is disposed on the top wall of the heating chamber 21.
  • the heating device 211 can also adopt other heating methods, such as an electric resistance wire, an induction coil, and the like.
  • the transport device 22 includes a carrier arm 221 and a rotary drive mechanism 222, wherein the carrier arm 221 is used to carry the substrate; the rotary drive mechanism 222 is configured to drive the carrier arm 221 to rotate about its rotation axis 2221 to drive the substrate in the reaction chamber 20 and
  • the heating chamber 21 is transferred between the two.
  • a thimble lifting mechanism 205 is further disposed in the reaction chamber 20, and the ejector lifting mechanism 205 is disposed on the carrying device 203. Below, and can be raised and lowered through the carrying device 203 to jack up or lower the substrate located on the upper surface of the carrying device 203.
  • the process position A is defined as the upper surface of the carrier base 203. a position for carrying the substrate; a process position B is a predetermined position in the heating chamber 21 for heating the substrate; and a process position for transferring the substrate from the process position A of the reaction chamber 20 to the heating chamber 21
  • the working process of B is: the ejector lifting mechanism 205 is raised to lift the substrate, and the substrate is vertically higher than the process position B; the rotary driving mechanism 222 drives the carrying arm 221 to rotate around the rotating shaft 2221, and is rotated to The reaction chamber 20 is located directly under the substrate; the ejector lifting mechanism 205 is lowered to place the substrate on the carrying arm 221; the rotary driving mechanism 222 drives the carrying arm 221 to rotate in the opposite direction around the rotating shaft 2221 to the heating chamber 21.
  • Process position B Since the operation of the process position A from the process position B of the heating chamber 21
  • the substrate can be moved along the motion trajectory S as shown in FIG. 7, moving from the position A of the reaction chamber 20 to the position B of the heating chamber 21, or The position B from the heating chamber 21 is moved to the position A of the reaction chamber 20.
  • the transfer device 22 can be used to transfer the substrate between the reaction chamber 20 and the heating chamber, which is not limited herein.
  • the transfer device 22 reciprocally transports the substrate between the reaction chamber 20 and the heating chamber
  • the deposition process in the reaction chamber 20 and the heating process of the heating chamber can be repeatedly performed, so that the metal particles can be repeatedly executed. Migrate until the pores are completely filled with metal particles. In this way, the coverage of the metal particles in the inner sidewall of the pore can be further improved, and the complete filling of the pore can be directly realized, thereby improving the efficiency and quality of the process.
  • the semiconductor processing apparatus provided in this embodiment is used to complete the pore deposition process on the substrate, and the working process is similar to the pore deposition process on the substrate provided in the above embodiments, and details are not described herein again.
  • the heating chamber 21 is in communication with the reaction chamber 20.
  • a gate valve may be disposed between the two. The communication or disconnection of the heating chamber 21 and the reaction chamber 20 is achieved by controlling the opening and closing of the gate valve.
  • specific parameters of the semiconductor processing equipment may be set according to different metal materials, for example, parameters such as temperature, air pressure, DC power output power, and RF power output power in the reaction chamber 20, and Heating the heating power of the heating device 211 in the chamber 21, the preset temperature required for heating of the substrate, and the like.

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Abstract

本发明提供了一种衬底上的孔隙沉积工艺及半导体加工设备。该衬底上的孔隙沉积工艺中，至少执行一次金属粒子迁移进程，所述金属粒子迁移进程包括下述步骤：步骤S100，采用溅射沉积的方式在衬底上的孔隙内形成金属层；步骤S200，将形成金属层的所述衬底加热至预设温度，以使所述金属层的金属粒子自所述孔隙的上部逐渐向所述孔隙的底部迁移。本发明提供的衬底上的孔隙沉积工艺及半导体加工设备，不仅能够提高孔隙内侧壁的金属粒子的覆盖率，为后续的孔隙的填充工艺提供了良好的条件；而且对孔隙的尺寸无特别要求，适用范围广。

Description

衬底上的孔隙沉积工艺及半导体加工设备 技术领域
本发明属于半导体加工技术领域，具体涉及一种衬底上的孔隙沉积工艺及半导体加工设备。
背景技术
铜互连技术中应用相对广泛的是双嵌入式工艺(也称为，双大马士革工艺)。具体地，如图1所示，双嵌入式工艺包括以下步骤：
步骤S1，在衬底的上表面上沉积一层氮化硅薄膜1，用于对后续沉积的介质材料层2起到终止刻蚀作用；
步骤S2，在该层氮化硅薄膜1的表面上沉积具有一定厚度的低介电常数的介质材料层2；
步骤S3，对该介质材料层2进行光刻，以在其上形成用于实现垂直方向上的互连线的通孔图形；
步骤S4，根据该通孔图形在介质材料层2上进行刻蚀，以获得具有预定深度的通孔3；
步骤S5，对该介质材料层2进行光刻，以在其上形成用于实现水平方向上的互连线的沟槽图形；
步骤S6，根据该沟槽图形在介质材料层2上进行刻蚀，以获得具有工艺所需深度的沟槽4，同时根据通孔图形继续刻蚀通孔3，以使其达到工艺所需的深度；
步骤S7，采用溅射沉积的方式在衬底的上表面上依次沉积阻挡层5和铜籽晶层6，以在衬底的上表面以及其上的通孔3和沟槽4内均依次沉积阻挡层5和铜籽晶层6，其中，阻挡层5用于阻挡铜原子扩散至介质材料层2，以及起到增强介质材料层2和铜籽晶层6之间的粘附性的 作用；铜籽晶层6用于在后续的电镀工艺中作为导电层；
步骤S8，采用电镀工艺在衬底的上表面上沉积铜层，以在衬底上表面以及其上的通孔3和沟槽4内形成铜层；
步骤S9，采用退火工艺和化学机械抛光工艺对衬底的上表面上的铜层进行平坦化处理和清洗。
其中，步骤S7中沉积铜籽晶层是铜互连工艺的关键步骤之一，如图2所示，其具体包括以下步骤：
步骤S71，去气工艺，采用加热的方式去除衬底表面上的可挥发性气体杂质，以保证后续铜层的电学性能；
步骤S72，预清洗工艺，采用等离子刻蚀的方法去除衬底表面上的不可挥发性气体杂质，以保证后续铜层的电学性能；
步骤S73，采用磁控溅射的方式在衬底的上表面上沉积阻挡层5(例如，氮化钽或者钽)，以在衬底的上表面以及其上的通孔3和沟槽4内均沉积有阻挡层5；
步骤S74，在衬底的上表面上沉积铜籽晶层6，以在衬底的上表面以及其上的通孔3和沟槽4内均沉积有铜籽晶层6。
在步骤S74中，利用下述半导体加工设备进行磁控溅射工艺，以在衬底的上表面以及其上的通孔3和沟槽4内均沉积铜籽晶层6。具体地，如图3所示，该半导体加工设备包括反应腔室10，在反应腔室10内的顶部设置有铜靶材11，并且在铜靶材11上方设置有高离化率磁控管12，用以实现靶材离子的高度离化；在反应腔室10内，且位于铜靶材11的下方设置有用于承载基片的承载装置13，该承载装置13与射频电源14电连接。射频电源14用于向承载装置13提供射频功率，以增加靶材粒子的方向性，从而可以很好地控制铜籽晶层6在孔隙(通孔3和沟槽4)的顶部外延区域(overhang)和内侧壁的覆盖率，以满足后续电镀工艺的要求，并使对孔隙进行的完全填充满足工艺要求。
然而，上述磁控溅射工艺仅能满足对技术节点在22nm以上的大尺寸孔隙内侧壁的覆盖率，而无法控制技术节点在22nm以下的小尺寸孔隙内侧壁的覆盖率。由于无法控制小尺寸孔隙的内侧壁的覆盖率，因而导致后续对孔隙进行完全填充的结果难以满足工艺要求。因此，如何提高小尺寸孔隙的内侧壁的覆盖率是本领域技术人员亟待解决的一个技术问题。
发明内容
本发明旨在解决现有技术中存在的技术问题，提供了一种衬底上的孔隙沉积工艺及半导体加工设备，其可以提高小尺寸孔隙的内侧壁的覆盖率，从而为提高后续的小尺寸孔隙的填充工艺的工艺质量提供了良好的条件。
为解决上述技术问题，本发明提供了一种衬底上的孔隙沉积工艺，其中，至少执行一次金属粒子迁移进程，所述金属粒子迁移进程包括下述步骤：步骤S100，采用溅射沉积的方式在衬底上的孔隙内形成金属层；步骤S200，将形成金属层的所述衬底加热至预设温度，以使所述金属层的金属粒子自所述孔隙的上部逐渐向所述孔隙的底部迁移。
其中，在所述步骤S200中，所述预设温度的取值范围在200～300℃。
其中，所述步骤S100所采用的工艺温度的取值范围为小于60℃。
其中，所述至少执行一次金属粒子迁移进程包括重复执行金属粒子迁移进程，直至所述孔隙的内部完全被所述金属粒子填充。
其中，在所述至少执行一次金属粒子迁移进程之后还包括电镀工艺填充进程，即，采用电镀工艺在所述衬底的上表面上沉积金属，直至所述衬底上的孔隙的内部完全被所述金属粒子填充。
作为另一个技术方面，本发明还提供一种半导体加工设备，其包括反应腔室、加热腔室和传输装置，其中，所述反应腔室用于采用溅射沉积的方式 在衬底上的孔隙内形成金属层；所述加热腔室用于使形成金属层的所述衬底达到预设温度，以使所述金属层的金属粒子自所述孔隙的上部逐渐向所述孔隙的底部迁移；所述传输装置用于在所述反应腔室和所述加热腔室之间传输所述衬底。
其中，所述加热腔室设置在所述反应腔室的侧壁外侧，且与所述反应腔室相连通。
其中，所述传输装置包括承载臂和旋转驱动机构，其中：所述承载臂用于承载所述衬底；所述旋转驱动机构用于驱动所述承载臂围绕其旋转轴旋转，以带动所述衬底在所述反应腔室和所述加热腔室二者之间传输。
其中，在所述加热腔室内设置有加热装置，用于在所述衬底位于所述加热腔室内时，将所述衬底加热至预设温度。
其中，所述预设温度的取值范围在200～300℃。
其中，所述加热装置包括红外加热灯泡、电热阻丝或感应线圈。
本发明具有下述有益效果：
在本发明提供的衬底上的孔隙沉积工艺中，至少执行一次金属粒子迁移进程，并且所述金属粒子迁移进程包括下述步骤S100和步骤S200，在步骤S100中采用溅射沉积的方式在衬底上的孔隙内形成金属层；步骤S200中，将形成金属层的所述衬底加热至预设温度，以使金属粒子在该预设温度时的迁移能力增强，从而实现金属粒子自孔隙的上部逐渐向孔隙的底部迁移，在该迁移过程中，孔隙顶部的外延区域处的金属粒子会向下迁移至孔隙的内侧壁及孔隙的底部，从而提高了孔隙内侧壁的金属粒子的覆盖率，为后续的孔隙的填充工艺提供了良好的条件。由于本发明提供的衬底上的孔隙沉积工艺中，借助金属粒子迁移进程而提高孔隙内侧壁的金属粒子的覆盖率，因此该工艺方法对孔隙的尺寸无特别要求，既适用于技术节点在22nm以上的大尺寸孔隙，又适用于技术节点在22nm 以下的小尺寸孔隙，因而其适用范围广。
在本发明一个实施例中，重复执行金属粒子迁移进程，直至孔隙内完全被金属粒子填充。这样，既可以进一步提高孔隙内侧壁的金属粒子的覆盖率，又可以直接实现孔隙的完全填充，从而提高工艺的效率和质量。
在本发明另一个实施例中，至少执行一次金属粒子迁移进程之后还需要执行电镀工艺填充进程，即，采用电镀工艺在衬底的上表面上沉积金属，直至衬底上的孔隙内完全被金属粒子填充。这样，通过至少执行一次金属粒子迁移进程，可以提高孔隙内侧壁的金属粒子的覆盖率，从而为后续的电镀工艺填充进程提供良好的工艺基础，避免电镀工艺中的缺陷；并且，借助电镀工艺填充进程，可以对该孔隙进行完全填充，从而提高了工艺质量。
本发明提供的半导体加工设备包括反应腔室内、加热腔室和传输装置，该传输装置能够在反应腔室和加热腔室之间传输衬底，并且该加热腔室能够将在反应腔室内形成有金属层的衬底加热至预设温度，以使金属层的金属粒子在该预设高温下的迁移能力增强，从而实现金属粒子自孔隙的上部逐渐向孔隙的底部迁移，并且在该迁移过程中，孔隙顶部的外延区域处的金属粒子会向下迁移至孔隙的内侧壁及孔隙的底部，从而提高了孔隙内侧壁的金属粒子的覆盖率，为后续的孔隙的填充工艺提供了良好的条件，并提高了工艺质量。进一步地，由于本发明提供的半导体加工设备，借助金属粒子迁移进程而提高孔隙内侧壁的金属粒子的覆盖率，因此对孔隙的尺寸无特别要求，适用范围广。
附图说明
图1为现有的双嵌入式工艺的流程示意图；
图2为图1中步骤S7的流程示意图；
图3为现有的磁控溅射设备的反应腔室的结构示意图
图4为在本发明实施例提供的衬底上的孔隙沉积工艺的步骤S100中孔隙的形态图；
图5为图4所示的孔隙在本发明实施例的步骤S200中形态变化过程图；
图6为本发明实施例提供的半导体加工设备的结构示意图；以及
图7为反应腔室和加热腔室之间衬底的传输轨迹图。
具体实施方式
本发明的实质是提供一种衬底上的孔隙沉积工艺及对应的半导体加工设备，其中，通过将形成金属层的衬底加热至预设温度，而使金属粒子在该预设温度时的迁移能力增强，从而实现金属粒子自孔隙的上部逐渐向孔隙的底部迁移，且在该迁移过程中，孔隙顶部的外延区域处的金属粒子会向下迁移至孔隙的内侧壁及孔隙的底部，从而提高了孔隙内侧壁的金属粒子的覆盖率，为后续的孔隙的填充工艺提供了良好的条件。进一步地，由于本发明中是借助金属粒子迁移进程而提高孔隙内侧壁的金属粒子的覆盖率，因此其对孔隙的尺寸无特别要求，适用范围广。
为使本领域的技术人员更好地理解本发明的技术方案，下面结合附图对本发明提供的衬底上的孔隙沉积工艺及半导体加工设备进行详细描述。
图4为在本发明实施例提供的衬底上的孔隙沉积工艺的步骤S100中孔隙的形态图。图5为图4所示的孔隙在本发明实施例的步骤S200中形态变化过程图。请一并参阅图4和图5，在本实施例提供的衬底上的孔隙沉积工艺中，至少执行一次金属粒子迁移进程，且该金属粒子迁移进程包括下述步骤：
步骤S100，采用溅射沉积的方式在衬底上的孔隙内形成金属层；其中，金属包括铜或者铝等；
步骤S200，将形成金属层的衬底加热至预设温度，以使金属层的金属粒子自孔隙的上部逐渐向孔隙的底部3迁移。其中，孔隙的上部包括孔隙顶部的外延区域2和位于孔隙底部3上方的内侧壁1。
下面结合图4和图5详细描述采用本实施例提供的衬底上的孔隙沉积工艺在孔隙内部沉积金属铜的具体工作过程：
首先，执行包含步骤S100和步骤S200的金属粒子迁移进程。
具体地，在步骤S100中，由于孔隙的尺寸较小，使得运动方向朝向孔隙的内侧壁1的铜粒子不易进入该孔隙内，因此会造成在孔隙的内侧壁1沉积的铜层较薄，而在孔隙顶部的外延区域2和孔隙底部3沉积的金属层相对较厚，如图4所示；此外，还会造成不能很好的控制孔隙顶部的外延区域2和内侧壁1的覆盖率，即，使得本希望不沉积或少沉积金属层的孔隙顶部的外延区域2中的部分区域沉积有过多的金属层，而本希望沉积金属层的孔隙的内侧壁1中的部分区域却未沉积金属层。
接着，在步骤S200中，将具有图4所示形态的孔隙的衬底加热至预设温度，具体地，预设温度的取值范围在200～300℃，这使得在真空且温度为该预设温度的腔室条件下，铜层的铜粒子的迁移能力增强，并在其原子质量的作用下自孔隙的上部逐渐向孔隙底部3迁移，图5示出了图4所示的孔隙在本发明实施例提供的衬底上的孔隙沉积工艺的步骤S200中形态变化过程：其中，阶段I中，孔隙的内侧壁1沉积的铜层较薄，而在孔隙顶部的外延区域2和孔隙底部3沉积的金属层相对较厚；阶段II中，铜粒子自孔隙的上部逐渐向孔隙底部3迁移，在该迁移过程中，孔隙顶部的外延区域2的金属粒子会向下迁移至孔隙的内侧壁1及孔隙的底部3，孔隙的内侧壁1上的部分金属粒子也会向孔隙的底部3迁移，这样，孔隙的上部沉积的铜层变薄，而孔隙的底部3沉积的金属层逐渐变厚；阶段Ш中，铜粒子继续自孔隙的上部向孔隙的底部3迁移，孔隙的上部沉积的铜层继续变薄，而孔隙底部3沉积的金属层 进一步变厚。在实际应用中，预设温度的取值范围根据工艺中所要沉积的金属材料不同而具体设定，只要满足在该预设温度条件下该金属粒子的迁移能力能够得以增强即可。
然后，重复执行金属粒子迁移进程，即，重复执行上述步骤S100和S200，继续实现铜粒子重复自孔隙的上部逐渐向孔隙的底部3迁移，可使孔隙的底部3沉积的铜粒子的厚度越来越厚。重复上述步骤S100和S200，直至孔隙的内部完全被金属粒子(铜粒子)填充，从而实现金属粒子对孔隙内部的完全填充。这样，通过重复执行金属粒子迁移进程来使孔隙的内部完全被金属粒子填充，不仅可以进一步提高孔隙的内侧壁1的金属粒子的覆盖率，而且可以直接实现孔隙的完全填充，而无需像现有技术那样再增加电镀工艺来实现孔隙的完全填充，由此，既提高了工艺效率，又提高了工艺质量。
在实际应用中，可借助本实施例提供的衬底上的孔隙沉积工艺向孔隙内沉积金属铜，以实现铜互连线。而且，为实现铜互连线，在步骤S100之前还包括以下步骤：
步骤S101，在衬底的上表面上沉积一层氮化硅薄膜，用于对后续沉积的介质材料层起到终止刻蚀的作用；
步骤S102，在该层氮化硅薄膜的表面上沉积具有一定厚度的低介电常数的介质材料层；
步骤S103，在该介质材料层上刻蚀孔隙，其中，孔隙包括用于实现水平方向的互连线的沟槽以及用于实现垂直方向上的互连线的通孔。
在实际应用中，至少执行一次金属粒子迁移进程并使孔隙内部被金属粒子完全填充之后还可以包括步骤S310，采用退火工艺和化学机械抛光工艺对衬底表面上的铜层进行平坦化处理和清洗。
需要说明的是，尽管前述实施例中通过重复执行金属粒子迁移进程来实现金属粒子对孔隙的完全填充，但是本发明并不局限于此，在实际 应用中，在至少执行一次金属粒子迁移进程之后还包括电镀工艺填充进程，即，采用电镀工艺在衬底的上表面上沉积铜金属，直至衬底上的孔隙内部被金属粒子(例如，铜粒子)完全填充。这样，通过至少执行一次金属粒子迁移进程，可以提高孔隙的内侧壁的金属粒子的覆盖率，从而为后续的电镀工艺填充进程提供良好的工艺基础，避免电镀工艺中的缺陷；并且，借助电镀工艺填充进程，可以对该孔隙进行完全填充，从而提高了工艺质量。可以理解，为了满足电镀工艺的要求，可重复上述金属粒子迁移进程特定次数，以确保孔隙顶部的外延区域2和内侧壁1的覆盖率满足电镀要求。
还需要说明的是，在完成步骤S100的腔室内的顶部设置有铜靶材，并且在铜靶材上方设置有高离化率磁控管，用以实现靶材离子的高度离化，并且，铜靶材与直流电源电连接，用以将腔室内的工艺气体激发形成等离子体以及向铜靶材加载负偏压以吸引等离子体轰击该铜靶材，这使得铜靶材表面被轰击逸出的铜粒子沉积在衬底的表面上形成铜层，直流电源的输出功率在3kW左右；在腔室内，且位于铜靶材的下方设置有用于承载衬底基片的承载装置，该承载装置与射频电源电连接，射频电源用于向承载装置提供射频功率，以增加靶材粒子的方向性，射频电源的输出功率在400W左右；另外，腔室的气压在0mTorr左右；步骤S100所采用的工艺温度的取值范围为小于60℃。
另外还需要说明的是，在本实施例中，具体描述了采用本实施例提供的衬底上的孔隙沉积工艺在孔隙内沉积金属铜的具体工作过程。但是本发明并不局限于此，在实际应用中，也可以采用本实施例提供的衬底上的孔隙沉积工艺在孔隙内沉积其他金属，其工作过程与上述沉积金属铜的过程相类似，只是需要根据不同的金属材料具体设置该沉积工艺过程中的具体参数，例如，设置步骤S100中的磁控溅射方式以及步骤S200中的预设温度等相关参数。
综上所述，本发明实施例提供的衬底上的孔隙沉积工艺，在步骤S100中在孔隙内形成金属层，在步骤S200中加热形成金属层的衬底至预设温度，这会使得金属粒子在预设温度的条件下，迁移能力增强，从而实现金属粒子自孔隙的上部逐渐向孔隙的底部迁移，从而提高了孔隙的内侧壁的金属粒子的覆盖率，为后续的孔隙的填充工艺提供了良好的条件。由于本发明实施例提供的衬底上的孔隙沉积工艺中，借助金属粒子迁移进程而提高孔隙内侧壁的金属粒子的覆盖率，因此该工艺方法对孔隙的尺寸无特别要求，适用范围广，例如，既适用于技术节点在22nm以上的大尺寸孔隙，又适用于技术节点在22nm以下的小尺寸孔隙。
作为另外一个技术方案，本发明还提供一种半导体加工设备。图6为本发明实施例提供的半导体加工设备的结构示意图。图7为反应腔室和加热腔室之间衬底的传输轨迹图。请一并参阅图6和图7，本实施例提供的半导体加工设备包括反应腔室20、加热腔室21和传输装置22。其中，反应腔室20用于采用溅射沉积的方式在衬底上的孔隙内形成金属层，金属包括铜或者铝等；传输装置22用于在反应腔室20和加热腔室21之间传输衬底；加热腔室21用于将衬底加热至预设温度，以使金属层的金属粒子自孔隙的上部逐渐向孔隙的底部迁移。借助金属粒子的迁移，孔隙顶部的外延区域的金属粒子会向下迁移至孔隙的内侧壁及孔隙的底部，从而提高了孔隙的内侧壁的金属粒子的覆盖率，为后续的孔隙的填充工艺提供了良好的条件，由此提高了工艺质量。进一步地，由于本发明实施例提供的半导体加工设备，借助金属粒子迁移进程而提高孔隙的内侧壁的金属粒子的覆盖率，因此对孔隙的尺寸无特别要求，适用范围广，例如，既适用于技术节点在22nm以上的大尺寸孔隙，又适用于技术节点在22nm以下的小尺寸孔隙。
具体地，在本实施例中，如图6所示，反应腔室20内的顶部设置有金属靶材201，并且在金属靶材201上方设置有高离化率磁控管202， 用以实现靶材离子的高度离化，并且，金属靶材201与直流电源电连接，用以将反应腔室20内的工艺气体激发形成等离子体以及向金属靶材201加载负偏压以吸引等离子体轰击该金属靶材，这使得金属靶材201表面被轰击逸出的金属粒子沉积在衬底的表面上形成金属层；在反应腔室20内，且位于金属靶材201的下方设置有用于承载衬底的承载装置203，该承载装置203与射频电源204电连接，射频电源204用于向承载装置203提供射频功率，以增加靶材粒子的方向性。为实现在反应腔室20内的衬底上的孔隙内形成铜层，金属靶材为铜靶材，射频电源204的输出功率在400W左右；反应腔室20的气压在0mTorr左右；反应腔室20温度的取值范围为小于60℃；直流电源的输出功率在3kW左右。
并且，加热腔室21设置在反应腔室20的侧壁外侧，且与反应腔室20相连通；另外，在加热腔室21内设置有加热装置211，用于在衬底位于加热腔室21内时，将衬底加热至预设温度，当金属为铜时，预设温度的取值范围在200～300℃。优选地，加热装置211包括红外加热灯泡，采用红外加热的方式进行加热，并且红外加热灯泡设置在加热腔室21的顶壁上。在实际应用中，加热装置211也可以采用其他加热方式，例如电热阻丝、感应线圈等。
传输装置22包括承载臂221和旋转驱动机构222，其中承载臂221用于承载衬底；旋转驱动机构222用于驱动承载臂221围绕其旋转轴2221旋转，以带动衬底在反应腔室20和加热腔室21二者之间传输。具体地，为实现传输装置22将衬底在反应腔室20和加热腔室21之间传输，在反应腔室20内还设置有顶针升降机构205，该顶针升降机构205设置在承载装置203的下方，且可以贯穿该承载装置203进行升降，以将位于承载装置203上表面的衬底顶起或者放下。
下面结合图7详细地描述顶针升降机构205和传输装置22如何配合实现衬底的传输。具体地，定义工艺位置A为承载基座203上表面 的用于承载衬底的位置；工艺位置B为预设的加热腔室21内对衬底进行加热的位置；将衬底自反应腔室20的工艺位置A传输至加热腔室21的工艺位置B的工作过程为：顶针升降机构205上升将衬底顶起，并使衬底的在竖直方向上高于工艺位置B；旋转驱动机构222驱动承载臂221围绕旋转轴2221旋转，并转至反应腔室内20且位于衬底的正下方；顶针升降机构205下降将衬底放至承载臂221上；旋转驱动机构222驱动承载臂221围绕旋转轴2221反向旋转，转至加热腔室21的工艺位置B。由于自加热腔室21的工艺位置B传输至反应腔室20的工艺位置A的工作过程与上述过程相类似，只是操作顺序相反，在此不再赘述。
因此，通过顶针升降机构205和传输装置22配合使用，可使衬底沿着如图7所示的运动轨迹S移动，自反应腔室20的位置A移动至加热腔室21的位置B，或者，自加热腔室21的位置B移动至反应腔室20的位置A。在实际应用中，也可采用其他方式的传输装置22实现衬底在反应腔室20和加热腔室之间传输，在此不一一限定。
进一步地，当传输装置22在反应腔室20和加热腔室之间往复传输衬底时，可以重复执行反应腔室20内的沉积过程和加热腔室的加热过程，从而可以重复执行金属粒子的迁移，直至孔隙内完全被金属粒子填充。这样，既可以进一步提高孔隙内侧壁的金属粒子的覆盖率，又可以直接实现孔隙的完全填充，从而提高工艺的效率和质量。
需要说明的是，采用本实施例提供的半导体加工设备来完成衬底上的孔隙沉积工艺，其工作过程和上述实施例提供的衬底上的孔隙沉积工艺相类似，在此不再赘述。
还需要说明的是，在本实施例中，加热腔室21与反应腔室20相连通，在实际应用中，为防止该两个腔室的环境相互影响，可在二者之间设置有门阀，通过控制门阀的打开与关闭来实现加热腔室21和反应腔室20的连通或者断开。
另外需要说明的是，在实际应用中，可根据不同的金属材料设置半导体加工设备的具体参数，例如，反应腔室20内的温度、气压、直流电源输出功率和射频电源输出功率等参数，以及加热腔室21内的加热装置211的加热功率、衬底所需加热的预设温度等参数。
可以理解的是，以上实施方式仅仅是为了说明本发明的原理而采用的示例性实施方式，然而本发明并不局限于此。对于本领域内的普通技术人员而言，在不脱离本发明的原理和实质的情况下，可以做出各种变型和改进，这些变型和改进也视为本发明的保护范围。

Claims (11)

  1. 一种衬底上的孔隙沉积工艺，其特征在于，至少执行一次金属粒子迁移进程，所述金属粒子迁移进程包括下述步骤：
    步骤S100，采用溅射沉积的方式在衬底上的孔隙内形成金属层；
    步骤S200，将形成金属层的所述衬底加热至预设温度，以使所述金属层的金属粒子自所述孔隙的上部逐渐向所述孔隙的底部迁移。
  2. 根据权利要求1所述的衬底上的孔隙沉积工艺，其特征在于，在所述步骤S200中，所述预设温度的取值范围在200～300℃。
  3. 根据权利要求1所述的衬底上的孔隙沉积工艺，其特征在于，所述步骤S100所采用的工艺温度的取值范围为小于60℃。
  4. 根据权利要求1-3中任意一项所述的衬底上的孔隙沉积工艺，其特征在于，所述至少执行一次金属粒子迁移进程包括重复执行金属粒子迁移进程，直至所述孔隙的内部完全被所述金属粒子填充。
  5. 根据权利要求1-3中任意一项所述的衬底上的孔隙沉积工艺，其特征在于，在所述至少执行一次金属粒子迁移进程之后还包括电镀工艺填充进程，即，采用电镀工艺在所述衬底的上表面上沉积金属，直至所述衬底上的孔隙的内部完全被所述金属粒子填充。
  6. 一种半导体加工设备，其特征在于，包括反应腔室、加热腔室和传输装置，其中，
    所述反应腔室用于采用溅射沉积的方式在衬底上的孔隙内形成金属层；
    所述加热腔室用于使形成金属层的所述衬底达到预设温度，以使所述金 属层的金属粒子自所述孔隙的上部逐渐向所述孔隙的底部迁移；
    所述传输装置用于在所述反应腔室和所述加热腔室之间传输所述衬底。
  7. 根据权利要求6所述的半导体加工设备，其特征在于，所述加热腔室设置在所述反应腔室的侧壁外侧，且与所述反应腔室相连通。
  8. 根据权利要求6所述的半导体加工设备，其特征在于，所述传输装置包括承载臂和旋转驱动机构，其中
    所述承载臂用于承载所述衬底；
    所述旋转驱动机构用于驱动所述承载臂围绕其旋转轴旋转，以带动所述衬底在所述反应腔室和所述加热腔室二者之间传输。
  9. 根据权利要求6所述的半导体加工设备，其特征在于，在所述加热腔室内设置有加热装置，用于在所述衬底位于所述加热腔室内时，将所述衬底加热至预设温度。
  10. 根据权利要求6所述的半导体加工设备，其特征在于，所述预设温度的取值范围在200～300℃。
  11. 根据权利要求9所述的半导体加工设备，所述加热装置包括红外加热灯泡、电热阻丝或感应线圈。
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Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0600423A1 (en) * 1992-11-30 1994-06-08 Nec Corporation Contact hole filling in a semiconductor device by irradiation with plasma of inert gas ions
JPH1098041A (ja) * 1996-09-25 1998-04-14 Denso Corp 半導体装置の製造方法
JP2002075895A (ja) * 2000-08-25 2002-03-15 Anelva Corp リフロー用スパッタリング装置
TW200406851A (en) * 1997-05-08 2004-05-01 Applied Materials Inc Sputter deposition and annealing of copper alloy metallization and seed layer
CN1697137A (zh) * 2004-05-12 2005-11-16 上海先进半导体制造有限公司 半导体工艺中淀积铝填充亚微米孔的方法
CN101552184A (zh) * 2008-04-03 2009-10-07 三星电子株式会社 基板结构及其形成方法与太赫装置及其制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5639357A (en) * 1994-05-12 1997-06-17 Applied Materials Synchronous modulation bias sputter method and apparatus for complete planarization of metal films
JP4761326B2 (ja) * 2010-01-15 2011-08-31 シャープ株式会社 薄膜形成装置システムおよび薄膜形成方法
US8841211B2 (en) * 2010-06-09 2014-09-23 Applied Materials, Inc. Methods for forming interconnect structures
CN102560388A (zh) * 2010-12-09 2012-07-11 北京北方微电子基地设备工艺研究中心有限责任公司 一种磁控溅射设备
CN103094156B (zh) * 2011-11-03 2016-02-10 北京北方微电子基地设备工艺研究中心有限责任公司 基片处理设备及其腔室装置和基片加热方法
JP6150438B2 (ja) * 2014-06-20 2017-06-21 京セラドキュメントソリューションズ株式会社 光走査装置およびそれを備えた画像形成装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0600423A1 (en) * 1992-11-30 1994-06-08 Nec Corporation Contact hole filling in a semiconductor device by irradiation with plasma of inert gas ions
JPH1098041A (ja) * 1996-09-25 1998-04-14 Denso Corp 半導体装置の製造方法
TW200406851A (en) * 1997-05-08 2004-05-01 Applied Materials Inc Sputter deposition and annealing of copper alloy metallization and seed layer
JP2002075895A (ja) * 2000-08-25 2002-03-15 Anelva Corp リフロー用スパッタリング装置
CN1697137A (zh) * 2004-05-12 2005-11-16 上海先进半导体制造有限公司 半导体工艺中淀积铝填充亚微米孔的方法
CN101552184A (zh) * 2008-04-03 2009-10-07 三星电子株式会社 基板结构及其形成方法与太赫装置及其制造方法

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