WO2015152411A1 - Dispositif à semiconducteur au nitrure, son procédé de fabrication, diode et transistor à effet de champ - Google Patents

Dispositif à semiconducteur au nitrure, son procédé de fabrication, diode et transistor à effet de champ Download PDF

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WO2015152411A1
WO2015152411A1 PCT/JP2015/060664 JP2015060664W WO2015152411A1 WO 2015152411 A1 WO2015152411 A1 WO 2015152411A1 JP 2015060664 W JP2015060664 W JP 2015060664W WO 2015152411 A1 WO2015152411 A1 WO 2015152411A1
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layer
semiconductor
electrode
nitride semiconductor
nitride
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Japanese (ja)
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拓也 古川
高木　啓史
晋哉 大友
正之 岩見
和行 梅野
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古河電気工業株式会社
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Definitions

  • the present invention relates to a nitride semiconductor device, a manufacturing method thereof, a diode, and a field effect transistor.
  • Wide band gap semiconductors typified by nitride-based semiconductors have high breakdown voltage, good electron transport properties, and good thermal conductivity, so they can be used as materials for high-temperature environments, high-power, or high-frequency semiconductor devices. Very attractive.
  • Typical wide band gap semiconductors include GaN, AlN, InN, BN, or a nitride semiconductor that is a mixed crystal of two or more of these.
  • FET field effect transistor
  • two-dimensional electron gas is generated at the heterojunction interface due to piezo polarization and spontaneous polarization. This two-dimensional electron gas has high electron mobility and carrier density.
  • Schottky barrier diodes Schottky Barrier Diode: SBD
  • heterojunction field effect transistors Heterojunction Field Effect Transistors: HFETs
  • SBD Schottky Barrier Diode
  • HFETs Heterojunction Field Effect Transistors
  • Patent Document 1 describes a configuration in which current collapse is suppressed and leakage is reduced by selectively providing a field plate layer (GaN FP layer) made of gallium nitride on an electron supply layer.
  • GaN FP layer field plate layer
  • the present invention has been made in view of the above, and an object of the present invention is to provide a nitride semiconductor device capable of suppressing leakage current in the nitride semiconductor device and suppressing a decrease in breakdown voltage, a manufacturing method thereof, and a diode. And providing a field effect transistor.
  • a nitride semiconductor device is provided on a substrate, a buffer layer provided on the upper layer of the substrate and doped with carbon, and provided on an upper layer of the buffer layer.
  • a semiconductor stacked body having a first semiconductor layer made of a nitride semiconductor, and a second semiconductor layer provided on an upper layer of the first semiconductor layer and having a wider band gap on average than the first semiconductor layer, and a semiconductor stacked body
  • a first electrode provided on at least a part of the layers to be formed, and a second electrode provided on at least a part of the layers constituting the semiconductor stacked body and spaced apart from the first electrode.
  • a third semiconductor layer containing carbon at a concentration of 1.0 ⁇ 10 18 cm ⁇ 3 or less is provided between the substrate and the buffer layer, and the thickness of the third semiconductor layer is 500 nm or more It is characterized by being less than 3000 nm That.
  • the nitride semiconductor device is characterized in that, in the above-mentioned invention, the third semiconductor layer is composed of an Al x Ga 1-x N layer (0 ⁇ X ⁇ 1) having an Al composition ratio X.
  • the nitride semiconductor device according to the present invention is characterized in that, in the above invention, the thickness of the third semiconductor layer is not less than 1000 nm and less than 3000 nm.
  • the nitride semiconductor device according to the present invention is characterized in that, in the above invention, the buffer layer has a carbon concentration of 5.0 ⁇ 10 18 cm ⁇ 3 or more and 5.0 ⁇ 10 19 cm ⁇ 3 or less.
  • the third semiconductor layer is composed of a plurality of Al x Ga 1-x N layers (0 ⁇ x ⁇ 1) having different Al composition ratios x. It is characterized by. Further, this configuration is characterized in that the Al composition ratio x of the Al x Ga 1-x N layer decreases upward in the stacking direction.
  • the nitride semiconductor device is characterized in that, in the above-mentioned invention, the third semiconductor layer is a laminate of a plurality of aluminum nitride layers and gallium nitride layers. Further, in this configuration, the third semiconductor layer is configured by repeatedly stacking a gallium nitride layer having a thickness of 100 nm to 700 nm and an aluminum nitride layer having a thickness of 20 nm to 60 nm multiple times. And
  • a fourth semiconductor layer made of a nitride semiconductor having an average narrower band gap than the second semiconductor layer is selectively provided on the second semiconductor layer. It is characterized by being.
  • the third semiconductor layer contains a surfactant atom as an impurity, and the concentration of the surfactant atom is 1.0 ⁇ 10 16 cm ⁇ 3 or more and 1.0 ⁇ 10 6. 18 cm ⁇ 3 or less.
  • the nitride semiconductor device includes a substrate, a buffer layer provided on the upper layer of the substrate and doped with carbon, a first semiconductor layer made of a nitride semiconductor provided on the upper layer of the buffer layer, and the first semiconductor Provided on at least a part of the semiconductor stacked body having the second semiconductor layer provided on the upper layer and having a band gap wider on average than the first semiconductor layer, and the layers constituting the semiconductor stacked body
  • a first electrode and a second electrode provided on and spaced apart from the first electrode on at least a part of the layers constituting the semiconductor stacked body, and between the substrate and the buffer layer, the surfactant atom contained at a concentration of 5.0 ⁇ 10 18 cm -3 or less carbon atoms with containing as impurities, thickness is provided a third semiconductor layer of less than 500 nm 3000 nm, impure surfactant atoms Wherein the concentration is 1.0 ⁇ 10 16 cm -3 or more 1.0 ⁇ 10 18 cm -3 or less.
  • the nitride semiconductor device according to the present invention is a third semiconductor device provided on at least a part of the layers constituting the semiconductor multilayer body and spaced apart from the first electrode and the second electrode. An electrode is further provided.
  • a field effect transistor according to the present invention has the structure of the nitride semiconductor device according to the above invention, wherein the first electrode is a gate electrode, the second electrode is a drain electrode, and the third electrode is a source electrode. To do.
  • the diode according to the present invention has the structure of the nitride semiconductor device according to the above-described invention, wherein the first electrode is an anode electrode and the second electrode is a cathode electrode.
  • a method of manufacturing a nitride semiconductor device includes a substrate, a buffer layer provided on the upper layer of the substrate and doped with carbon, a first semiconductor layer made of a nitride semiconductor provided on the upper layer of the buffer layer, and A semiconductor stacked body having a second semiconductor layer provided above the first semiconductor layer and having an average band gap wider than that of the first semiconductor layer; and at least a part of the layers constituting the semiconductor stacked body
  • a method for manufacturing a nitride semiconductor device comprising: a first electrode provided on the first electrode; and a second electrode provided on at least a part of the layers constituting the semiconductor stacked body and spaced apart from the first electrode.
  • the third semiconductor layer made of a nitride semiconductor was grown to a thickness of 500 nm or more and less than 3000 nm under the growth conditions in which carbon is doped at a concentration of 1.0 ⁇ 10 18 cm ⁇ 3 or less on the upper layer of the substrate. rear Wherein the growing the buffer layer on the upper layer of the third semiconductor layer.
  • the manufacturing method thereof, the diode, and the field effect transistor according to the present invention it is possible to suppress a leakage current in the nitride semiconductor device and suppress a decrease in breakdown voltage.
  • FIG. 1 is a cross-sectional view showing a semiconductor multilayer substrate for manufacturing a nitride semiconductor device according to the first embodiment of the present invention.
  • FIG. 2 is a graph showing an example of Al composition ratio dependence of the film thickness necessary to fill a 1 ⁇ m diameter pit with an Al x Ga 1-x N layer.
  • FIG. 3 is a sectional view showing a Schottky barrier diode manufactured using the semiconductor multilayer substrate according to the first embodiment of the present invention.
  • FIG. 4 shows the film thickness dependence of the planarization layer on the ratio of the device having a reference breakdown voltage or higher when the carbon concentration of the planarization layer according to the first embodiment of the present invention is fixed to 1 ⁇ 10 17 cm ⁇ 3 . It is a graph which shows.
  • FIG. 1 is a cross-sectional view showing a semiconductor multilayer substrate for manufacturing a nitride semiconductor device according to the first embodiment of the present invention.
  • FIG. 2 is a graph showing an example of Al composition ratio dependence of the film thickness
  • FIG. 5 is a graph showing the dependence of the flattening layer on the carbon concentration of the proportion of the device having a reference breakdown voltage or higher when the thickness of the flattening layer according to the first embodiment of the present invention is 2000 nm.
  • FIG. 6 is a schematic cross-sectional view showing a high mobility field effect transistor according to the second embodiment of the present invention.
  • FIG. 7 is a graph showing the surfactant concentration dependency in the proportion of devices that are above the reference breakdown voltage of the nitride semiconductor device.
  • FIG. 8 is a cross-sectional view showing a portion of an abnormal growth region of SBD for explaining the earnest study by the present inventor.
  • FIG. 9 is a cross-sectional view of a portion where an abnormally grown region of the semiconductor laminated substrate according to Experimental Example 1 has occurred, in order to explain the earnest study by the present inventor.
  • FIG. 10 is a cross-sectional view of a portion where an abnormally grown region of the semiconductor multilayer substrate according to Experimental Example 2 has occurred, in order to explain the earnest study by the present inventors.
  • the present inventor has made various studies on the cause of a large leakage current in a conventional nitride semiconductor device, the ratio of the breakdown voltage of the device exceeding a desired breakdown voltage, specifically, for example, the ratio of a breakdown voltage of 600 V or more being low. went.
  • the present inventor has focused on a nitride semiconductor device that is specifically determined to have a large leakage current as compared with a normal nitride semiconductor device such as SBD or HEMT.
  • SBD or HEMT normal nitride semiconductor device
  • the inventor has found that a non-growth region is generated in the semiconductor multilayer structure in the nitride semiconductor device due to various causes.
  • foreign matter may be mixed into the interface between the silicon (Si) substrate in the nitride semiconductor layer and the intervening layer made of aluminum nitride (AlN) epitaxially grown on the substrate.
  • foreign matter may also enter the interface between the intervening layer and the epitaxial growth layer made of gallium nitride (GaN) or aluminum gallium nitride (AlGaN).
  • GaN gallium nitride
  • AlGaN aluminum gallium nitride
  • meltback etching reaction between the Si substrate and Ga
  • a non-growth region is generated in the semiconductor multilayer structure in the nitride semiconductor device.
  • Such a non-growth region is difficult to be buried only by epitaxially growing a semiconductor layer thereon.
  • a nitride semiconductor layer epitaxially grown according to a growth condition in which carbon (C) is heavily doped to form a high resistance buffer layer or the like it is extremely difficult to embed a non-growth region. As a result, it is inevitable that the non-growth region remains as an abnormal growth region near the surface of the semiconductor multilayer structure.
  • Non-Patent Document 1 It is known that when an abnormal growth region remains as pits in this manner, in the nitride semiconductor device, the abnormal growth region becomes a leak source and a leak path is generated (see Non-Patent Document 1).
  • the present inventor conducted experiments and diligent investigations, and found that the abnormal growth region may be buried depending on the growth conditions when the u-GaN layer constituting the electron transit layer is formed as an upper layer. did.
  • this buried region becomes a leak source, which is one of the causes of the occurrence of a leak path in the nitride semiconductor device. It turned out to be one.
  • the leak path occurs, the leak current increases and the breakdown voltage of the nitride semiconductor device decreases.
  • FIG. 8 is a schematic cross-sectional view showing a Schottky barrier diode (SBD) as a nitride semiconductor device that is a subject of this study and has a foreign substance attached on the intervening layer.
  • SBD Schottky barrier diode
  • an intervening layer 92, a high resistance buffer layer 93, an electron transit layer 94, and an electron supply layer 95 are sequentially stacked on a substrate 91.
  • a field plate layer 96 a is selectively provided on the electron supply layer 95.
  • An anode electrode 97A and a cathode electrode 97C spaced from the anode electrode 97A are selectively provided on the electron supply layer 95.
  • An insulating film 98 is provided so as to cover the electron supply layer 95 and the field plate layer 96a, and at least a part of the anode electrode 97A and the cathode electrode 97C.
  • FIG. 8 shows a state in which a foreign substance 110 such as a particle exists in an upper layer portion of the intervening layer 92.
  • an intervening layer 92 made of aluminum nitride (AlN) for suppressing the reaction between Ga and Si is laminated on an upper layer of a substrate 91 such as a Si substrate.
  • a high-resistance buffer layer 93 as a nitride semiconductor layer containing GaN is stacked on the intervening layer 92.
  • foreign matter 110 such as particles is present on the substrate 91 or the intervening layer 92, crystal growth does not proceed in the portion where the foreign matter 110 is present, so that the growth of the high-resistance buffer layer 93 is slowed down and becomes an abnormal growth region. Defect 93a may occur.
  • the present inventor re-examined a method for reducing leakage due to the defect 93a. Then, the inventor has conceived of providing a flattened layer having a flattened surface shape below the high-resistance buffer layer 93 in order to suppress defects 93a on the surface of the high-resistance buffer layer 93.
  • the buffer layer can be stacked on the planarization layer while maintaining flatness, so that a leakage current flowing through the buffer layer can be reduced and a decrease in breakdown voltage can be suppressed. Therefore, leakage can be reduced and breakdown voltage can be improved in the nitride semiconductor device as the final product. Even if the planarization layer has a low resistance, the electric field generated in the nitride semiconductor layer below the upper surface of the planarization layer can be reduced by increasing the resistance of the buffer layer. Very low.
  • FIG. 9 shows an abnormal growth in a semiconductor multilayer substrate according to Experimental Example 1 in which a plurality of nitride semiconductor layers are stacked by a metal organic chemical vapor deposition (MOCVD) method for examination by the inventor. It is typical sectional drawing which shows an area
  • MOCVD metal organic chemical vapor deposition
  • the inventor conducted an experiment in which the nitride semiconductor layers 104, 105, 106, 107, 108, and 109 are sequentially epitaxially grown on the nitride semiconductor layer 103 while changing the growth conditions in various ways. Although not shown in FIG. 9, a thin AlN layer is sandwiched between the interfaces of the nitride semiconductor layers 103-109.
  • Table 1 is a table showing the growth conditions of these nitride semiconductor layers 104-109.
  • the layers 104 to 109 indicate the nitride semiconductor layers 104 to 109, respectively.
  • the carbon concentration when the crystal is grown under these conditions for example, secondary ion mass spectrometry (SIMS) is used.
  • SIMS secondary ion mass spectrometry
  • the acceleration voltage is set to 5 keV using cesium as the primary ion species
  • the beam current is set to 100 nA
  • the secondary ion polarity is set. Negative.
  • the sputter region is 200 ⁇ m ⁇ 400 ⁇ m
  • the gate region is about 12% of the center of the sputter region.
  • carbon concentration was measured 5 times and the arithmetic mean of the measured value of these five carbon concentrations was made into the carbon concentration in Table 1.
  • the carbon concentration measurement methods in the following experimental examples and embodiments are also the same.
  • the V / III ratio is increased by 3 to 6 times, for example, about 4 times, compared with the growth conditions of the other nitride semiconductor layers 105 to 109.
  • the growth rate was set to about 1/4 of 1/6 to 1/3.
  • the nitride semiconductor layer 104 is grown in this state, the nitride semiconductor layer 104 is auto-doped with carbon, and the carbon concentration becomes about 3 ⁇ 10 18 cm ⁇ 3 .
  • the V / III ratio is reduced as compared with the growth conditions of the other nitride semiconductor layers 104 and 106-109.
  • the carbon concentration of the nitride semiconductor layer 105 increases to about 2 ⁇ 10 19 cm ⁇ 3 .
  • the growth temperature is lowered as compared with the other nitride semiconductor layers 104, 105, and 107-109.
  • the carbon concentration of the nitride semiconductor layer 106 is about 2 ⁇ 10 19 cm ⁇ 3 .
  • the growth pressure is increased as compared with the other nitride semiconductor layers 104 to 106, 108, and 109.
  • the carbon concentration of the nitride semiconductor layer 107 is about 2 ⁇ 10 18 cm ⁇ 3, which is lower than the carbon concentration of the nitride semiconductor layers 105 and 106.
  • the growth temperature is increased as compared with the other nitride semiconductor layers 104 to 107, 109.
  • the carbon concentration of the nitride semiconductor layer 108 is about 2 ⁇ 10 18 cm ⁇ 3 , which is lower than that of the nitride semiconductor layers 105 and 106.
  • the growth condition of the nitride semiconductor layer 109 is a growth condition for growing a GaN layer constituting the conventional buffer layer, and the carbon concentration is as high as about 1 ⁇ 10 19 cm ⁇ 3 .
  • the shape of the defect 103a is reflected on each surface side of the nitride semiconductor layers 104 to 109.
  • the present inventor has examined materials and growth conditions that are easy to flatten in the upper layer of the defect 103a based on the above examination. Then, the present inventor, as the growth condition that is easy to flatten in the above-described experimental example 1, the condition that the material grows even in the non-growth region caused by the foreign material 110, that is, the direction substantially parallel to the surface of the substrate 101 (hereinafter referred to as the following) Note that the nitride semiconductor also needs to grow in the lateral direction. Therefore, the present inventor pays attention to the growth conditions of the nitride semiconductor layers 104, 107, and 108 which are grown relatively laterally in the nitride semiconductor layers 103 to 109 in the semiconductor multilayer substrate 100 shown in FIG. did.
  • the present inventor has shown from Experimental Example 1 that in the growth of a nitride semiconductor, when the carbon concentration of the semiconductor layer is relatively high, it is difficult to grow in the lateral direction, and when it is relatively low, it is easy to grow in the lateral direction. I found it.
  • FIG. 10 is a cross-sectional view showing the periphery of a defective portion of a semiconductor laminated substrate in which nitride semiconductor layers are laminated based on the study of the present inventors.
  • the semiconductor laminated substrate 200 according to Experimental Example 2 is provided with an AlN layer 202 assuming an intervening layer on a substrate 201.
  • a nitride semiconductor layer 203 made of GaN in which a defect 203a is generated due to the presence of the foreign matter 210 is formed.
  • the inventor has grown the nitride semiconductor layers 204, 205, 206, 207, 208, and 209 on the nitride semiconductor layer 203, respectively.
  • the epitaxial growth was carried out sequentially with various changes.
  • a thin AlN layer is sandwiched between the interfaces of the nitride semiconductor layers 203 to 209.
  • Table 2 shows the growth conditions of these nitride semiconductor layers 204 to 209.
  • layers 204 to 209 indicate nitride semiconductor layers 204 to 209, respectively.
  • the growth conditions of the nitride semiconductor layers 204 to 207, 209 are the same as the growth conditions of the nitride semiconductor layer 109 constituting the conventional buffer layer in Experimental Example 1.
  • the growth condition of nitride semiconductor layer 208 is a condition in which elements of growth conditions different from the growth conditions of other nitride semiconductor layers in nitride semiconductor layers 104, 107, and 108 described above are extracted. That is, in the growth of the nitride semiconductor layer 208, the growth temperature and the growth pressure are relatively increased, and the flow rate of the group III element is decreased to increase the V / III ratio.
  • the carbon concentration of the nitride semiconductor layer 208 is about 2.0 ⁇ 10 17 cm ⁇ 3 .
  • the present inventor can form a planarized layer by burying defects (concave portions) caused by foreign substances by growing a nitride semiconductor so that the concentration of carbon to be auto-doped is low. It has been found that a buffer layer with flatness can be formed on the upper layer. Therefore, the present inventor has studied by changing the conditions so that the carbon concentration of the auto-doped carbon in the nitride semiconductor layer becomes various concentrations. As a result, the inventor reduced the carbon concentration to less than the carbon concentration (about 1.0 ⁇ 10 19 cm ⁇ 3 ) in the buffer layer laminated on the upper layer, specifically to less than 2.0 ⁇ 10 18 cm ⁇ 3 .
  • the present inventor has also found that when a nitride semiconductor is grown so that the carbon concentration is 1 ⁇ 10 18 cm ⁇ 3 or less, it is easy to grow in the lateral direction and the recess is more easily filled. Thereby, since an abnormal growth region caused by defects or the like does not remain in the buffer layer constituting the nitride semiconductor device, it is possible to suppress the occurrence of a leak path in the nitride semiconductor device and to suppress the decrease in breakdown voltage.
  • the reference breakdown voltage is a breakdown voltage obtained based on a desired rated value or standard value of the nitride semiconductor device.
  • FIG. 1 is a schematic cross-sectional view showing a configuration of a semiconductor multilayer substrate for manufacturing a nitride semiconductor device according to the first embodiment of the present invention. That is, the semiconductor laminated substrate 10 in the first embodiment includes an intervening layer 12, a planarizing layer 13 as a third semiconductor layer, a high-resistance buffer layer 14, an electron transit layer 15, and an electron supply layer on a substrate 11. 16 and a semiconductor layer 17 are sequentially stacked. In addition, foreign matter 20 such as particles may be present on the upper layer of the substrate 11 or the intervening layer 12.
  • FIG. 1 is a cross-sectional view of a portion where the foreign material 20 exists on the intervening layer 12.
  • the substrate 11 is, for example, a silicon (Si) substrate, a gallium arsenide (GaAs) substrate, a gallium phosphide (GaP) substrate, a GaN substrate, an AlN substrate, a silicon carbide (SiC) substrate, a carbon (C) substrate, or sapphire (Al 2 O). 3 ) It consists of a substrate.
  • the substrate 11 is made of, for example, a Si substrate.
  • the intervening layer 12 is made of, for example, AlN having a lattice constant between Si and GaN.
  • the intervening layer 12 is a layer for suppressing the reaction between Ga and Si, and is interposed between the substrate 11 and the layer containing Ga.
  • the intervening layer 12 relaxes the difference in lattice constant between the substrate 11 and a nitride-based compound semiconductor layer such as GaN, so that the buffer layer 14 and the semiconductor stacked body can be stacked on the substrate 11.
  • the intervening layer 12 is not necessarily provided. In this case, the foreign matter 20 may exist on the substrate 11.
  • the thickness of the intervening layer 12 is, for example, 25 nm.
  • Planarizing layer 13 as the third semiconductor layer is, for example, carbon (C), doped with a relatively lower concentration than the upper layer of the buffer layer 14, the Al composition ratio X Al X Ga 1-X N (0 ⁇ X ⁇ 1).
  • the carbon concentration doped in the planarization layer 13 is easy to grow in a direction (lateral direction) parallel to the surface of the substrate 11 in order to suppress the occurrence of the above-described defects caused by the foreign matter 20 or the like. It is desirable that it is 18 cm ⁇ 3 or less, preferably 1 ⁇ 10 17 cm ⁇ 3 or less.
  • the planarization layer 13 has a configuration in which a GaN layer and an AlN layer are stacked, and a plurality of Al x Ga 1-x N layers (0 ⁇ x ⁇ 1) having different Al composition ratios x are stacked a plurality of times. It is good also as a structure.
  • the planarization layer 13 includes a plurality of Al x Ga 1-x N layers (0 ⁇ x ⁇ 1) having different Al composition ratios x so that the Al composition ratio x decreases upward in the stacking direction. It is good also as a structure laminated
  • the average carbon concentration is 1.0 ⁇ 10 18 cm ⁇ 3 or less, preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less. It is preferable to do this.
  • the planarizing layer 13 has a quantum size effect on the intervening layer 12 and a GaN layer that is thick enough not to produce the quantum size effect and has a thickness of 100 nm to 700 nm and is doped with carbon at a low concentration. It is also possible to form a structure in which an AlN layer having a thickness of 20 nm to 60 nm is repeatedly laminated a plurality of times.
  • the carbon concentration in the GaN layer in the laminated film is preferably 1.0 ⁇ 10 18 cm ⁇ 3 or less, and preferably 1.0 ⁇ 10 17 cm ⁇ . It is preferable to make it 3 or less.
  • the film thickness of the GaN layer which comprises the planarization layer 13 does not need to be the same film thickness, respectively.
  • the thickness of each of the plurality of AlN layers constituting the planarizing layer 13 may not be the same thickness. That is, in order to suppress an increase in stress generated in the planarizing layer 13, the thicknesses of the plurality of GaN layers constituting the planarizing layer 13 may be different from each other, and the thickness of the AlN layer is also different. It is the same.
  • the lower GaN layer may be thinned to about 200 nm, for example, and the upper GaN layer may be thickened to about 700 nm, for example.
  • the film thickness of the planarizing layer 13 will be described in detail later, but is preferably 500 nm or more and less than 3000 nm, more preferably 500 nm or more and 2500 nm or less, and even more preferably 1000 nm or more and 2200 nm or less in order to ensure the flatness of the surface. .
  • another semiconductor layer may be formed in the planarizing layer 13, and the thickness of the planarizing layer 13 in this case is the sum of the thicknesses of the respective planarizing layers.
  • the buffer layer 14 is thin enough to produce a quantum size effect, and has an Al u Ga 1-u N layer with a thickness of 1 to 10 nm and an Al v Ga 1-v N layer with a thickness of 15 to 25 nm (v ⁇ u). And a superlattice structure in which a plurality of layers are repeatedly stacked.
  • the reason for these film thicknesses is that unintended carriers (two-dimensional electron gas: 2DEG) due to piezo polarization and spontaneous polarization are generated in the structure of the buffer layer 14 so that an electric field shielding layer is not generated.
  • an impurity such as C to the buffer layer 14, the buffer layer 14 can be increased in resistance or semi-insulated.
  • the carbon concentration of the buffer layer 14 is 5.0 ⁇ 10 18 cm ⁇ 3 or more which is larger than 1.0 ⁇ 10 18 cm ⁇ 3 of the carbon concentration of the planarization layer 13 in order to increase resistance.
  • ⁇ 10 19 cm ⁇ 3 or less is preferable, and in the first embodiment, for example, about 1.0 ⁇ 10 19 cm ⁇ 3 .
  • the buffer layer 14 may be composed of a GaN layer (C—GaN layer) or an AlN layer doped with carbon at a relatively high concentration.
  • various layers necessary for the structure of the nitride semiconductor device may be provided in the buffer layer 14 as necessary.
  • the electron transit layer 15 as the first semiconductor layer is made of undoped gallium nitride (u-GaN) having a film thickness of 700 nm (0.7 ⁇ m), for example.
  • u-GaN undoped gallium nitride
  • a nitride semiconductor material other than GaN may be used as the material constituting the electron transit layer 15, and when AlGaN is used, the Al composition ratio is preferably 5% or less.
  • the electron supply layer 16 as the second semiconductor layer is, for example, a single layer of an Al x Ga 1-x N layer, a pseudo mixed crystal layer made of at least two types of nitride semiconductors having different Al composition ratios and different band gaps, or Al It is composed of a superlattice layer in which a plurality of nitride semiconductors having different composition ratios and different band gaps are stacked.
  • the electron supply layer 16 has, for example, a pseudo mixed crystal structure of Al Y Ga 1-Y N with an average Al composition ratio Y, and at least two different maximum Al composition ratios y1 or minimum Al compositions.
  • the electron supply layer 16 has a 2DEG carrier concentration (2DEG concentration) generated at the interface between the electron transit layer 15 and the electron supply layer 16 depending on the average Al composition ratio Y, the number of Al y Ga 1-y N layers, and the like. ) To the desired concentration.
  • the 2DEG concentration of 2DEG generated in the electron transit layer 15 is adjusted to be, for example, less than 3 ⁇ 10 13 cm ⁇ 2 .
  • the average Al composition ratio Y of the electron supply layer 16 is preferably 10% or more and 40% or less (0.1 ⁇ Y ⁇ 0.4), preferably 15% or more and 35% or less, assuming that 0 ⁇ Y ⁇ 1. (0.15 ⁇ Y ⁇ 0.35) is more preferable, and 20% or more and 30% or less (0.2 ⁇ Y ⁇ 0.3) is further preferable.
  • the band gap of the electron supply layer 16 is an average band gap. Specifically, the band gap value is weighted (integrated) according to the film thickness ratio of each Al y Ga 1-y N layer constituting the laminated structure. It is.
  • the electron supply layer 16 is configured such that the average band gap is larger than the band gap of the electron transit layer 15. In the electron supply layer 16, the thickness of each Al y Ga 1-y N layer, and a layer number or number of sets, the most suitable values depending on the design of the set concentration and the nitride semiconductor device of the 2DEG concentration Selected.
  • the electron supply layer 16 includes an Al y1 Ga 1 -y1 N layer having a maximum Al composition ratio y1 and an Al y2 Ga 1 -y2 N layer having a minimum Al composition ratio y2.
  • the thickness is preferably 2 nm or more, and in consideration of increasing the 2DEG concentration, 5 nm The above is more preferable, and 10 nm or more is further preferable.
  • the upper limit of the film thickness of the electron supply layer 16 is preferably a critical film thickness or less at which no misfit dislocation occurs, and considering the limit of ohmic contact, it is 100 nm or less, preferably 50 nm or less, more preferably 30 nm or less. Is preferred. And in this 1st Embodiment, it is 20 nm, for example.
  • a semiconductor layer 17 as a fourth semiconductor layer is provided on the electron supply layer 16 in accordance with the structure of the nitride semiconductor device manufactured from the semiconductor laminated substrate 10.
  • the semiconductor layer 17 is a group III nitride compound semiconductor narrower than the average band gap of the electron supply layer 16 in order to change the 2DEG concentration of 2DEG generated in the electron transit layer 15 at least at two levels, specifically, the Al composition ratio.
  • Al z Ga 1-z N layer of z (0 ⁇ z ⁇ 1) preferably, a GaN layer.
  • the film thickness of the semiconductor layer 17 will be described later.
  • the above-described electron transit layer 15, electron supply layer 16, and semiconductor layer 17 constitute the semiconductor multilayer body in the first embodiment.
  • the semiconductor multilayer body may be composed of the electron transit layer 15 and the electron supply layer 16. It is also possible to provide an etching sacrificial layer between the electron supply layer 16 and the semiconductor layer 17.
  • the etching sacrificial layer it is preferable that the material of the etching sacrificial layer is such that the upper semiconductor layer 17 has a high etching selectivity with respect to the etching sacrificial layer.
  • the average Al composition ratio of the etching sacrificial layer is preferably larger than the average Al composition ratio Y of the electron supply layer 16 and 40% or more.
  • a semiconductor stacked body is constituted by the electron transit layer 15, the electron supply layer 16, the etching sacrificial layer, and the semiconductor layer 17.
  • the semiconductor multilayer substrate 10 for manufacturing the nitride semiconductor device according to the first embodiment is configured.
  • each layer is grown on the substrate 11 by MOCVD.
  • Table 3 is a table showing the growth conditions when manufacturing the semiconductor laminated substrate 10.
  • Table 3 shows the growth conditions of the intermediate layer 12, the planarization layer 13, the buffer layer 14, the electron transit layer 15, the electron supply layer 16, and the semiconductor layer 17 in the first embodiment.
  • the growth is performed according to the growth temperature, the growth pressure, the ratio of group V (nitrogen: N) to group III (at least one element of Al and Ga) (V / III ratio), and these growth conditions.
  • the carbon concentration and film thickness of each layer are shown.
  • the various growth conditions described in Table 3 are merely examples, and are not necessarily limited to these conditions.
  • a source gas and a carrier gas are respectively supplied into an MOCVD reaction furnace (not shown) carrying the substrate 11 shown in FIG. To do.
  • TMAl trimethylaluminum
  • NH 3 ammonia
  • N 2 nitrogen
  • AlN is grown on the substrate 11 to form the intervening layer 12.
  • the intervening layer 12 is auto-doped with carbon (C).
  • An example of the growth conditions and the carbon concentration of the intervening layer 12 made of AlN are as shown in Table 3, and 1 torr is 133.3 Pa in the pressure.
  • a planarizing layer 13 having a thickness of 500 nm or more and less than 3000 nm is formed on the intervening layer 12.
  • the planarization layer 13 specifically, for example, at least one of trimethylgallium (TMGa) and trimethylaluminum (TMAl) is used as the group III source gas, and ammonia (NH 3 ) is used as the group V source gas. Is used.
  • the carrier gas for example, hydrogen (H 2 ) and nitrogen (N 2 ) are used.
  • Al X Ga 1-X N layer on the intermediate layer 12 (0 ⁇ X ⁇ 1)
  • Al X Ga 1-X N layer is grown carbon (C) is doped (0 ⁇ X ⁇ 1)
  • a planarizing layer 13 made of is formed.
  • FIG. 2 shows the dependence of the film thickness of the Al x Ga 1-x N layer on the Al composition ratio required to fill the pits (recesses) with a diameter of 1 ⁇ m when the carbon concentration is fixed at 1 ⁇ 10 17 cm ⁇ 3 , for example. It is a graph which shows an example of sex. As shown in FIG. 2, when the Al composition ratio X is 0, that is, when a pit having a diameter of 1 ⁇ m is filled with a GaN layer, the required film thickness is, for example, about 0.5 ⁇ m (500 nm).
  • the film thickness necessary to fill the pits increases to, for example, about 0.7 ⁇ m (700 nm). Further, as the Al composition ratio X increases, the film thickness required to fill the pits having a diameter of 1 ⁇ m increases.
  • the Al composition ratio X is 1, that is, in the case of an AlN layer, for example, about 2 ⁇ m, The film thickness is about four times that of the GaN layer.
  • the Al composition ratio X is small.
  • the design film thickness is increased as the Al composition ratio X increases.
  • the planarization of the surface is ensured by making the planarization layer 13 into the design film thickness according to the Al composition ratio X.
  • an Al u Ga 1-u N layer having an Al composition ratio u and an Al composition ratio v lower than the Al composition ratio u are formed on the planarization layer 13.
  • a buffer layer 14 having a superlattice structure in which a plurality of Al v Ga 1-v N layers (v ⁇ u) are repeatedly laminated is formed. Specifically, the buffer layer 14 is formed by repeatedly stacking a GaN layer having a thickness of 20 nm and an AlN layer having a thickness of 5 nm multiple times.
  • the growth temperature and the growth pressure are relatively lower than the growth conditions of the other semiconductor layers, and the group III material
  • the supply amount (group III flow rate) of gas (TMGa, TMAl) is made relatively large as compared with the growth conditions of other semiconductor layers.
  • An example of the growth conditions and the carbon concentration of the buffer layer 14 are as shown in Table 3.
  • the carbon concentration of the buffer layer 14 since the film thickness of each layer which comprises the buffer layer 14 is very small, it measured without distinguishing each layer.
  • GaN is grown on the buffer layer 14 to form an electron transit layer 15 made of a u-GaN layer.
  • TMAl is used as a group III source gas
  • an electron supply layer 16 made of an AlGaN layer is grown on the electron transit layer 15.
  • a semiconductor layer 17 made of, for example, a GaN layer is formed on the electron supply layer 16 using TMGa as a group III source gas.
  • An example of the growth conditions and carbon concentration of these electron transit layer 15, electron supply layer 16, and semiconductor layer 17 are as shown in Table 3.
  • the semiconductor laminated substrate 10 shown in FIG. 1 is formed.
  • FIG. 3 is a schematic cross-sectional view of the SBD as the nitride semiconductor device according to the first embodiment.
  • the SBD 1 is selectively provided with an anode electrode 18A as a Schottky electrode on the electron supply layer 16, and A cathode electrode 18C as an ohmic electrode spaced apart from the anode electrode 18A is provided. Further, a field plate layer 17a made of a part of the semiconductor layer 17 is provided on the anode electrode 18A side on the electron supply layer 16 so as to be separated from the cathode electrode 18C. An insulating film 19 is provided so as to cover the electron supply layer 16 and the field plate layer 17a and at least a part of the anode electrode 18A and the cathode electrode 18C.
  • the width of the nitride semiconductor device when a plurality of SBDs 1 are integrated is parallel to the surface of substrate 11 and along the width direction, for example, 150 mm.
  • the width L A of the anode electrode 18A is, for example, 20 ⁇ m
  • the width L C of the cathode electrode 18C is, for example, 20 ⁇ m
  • l AC is, for example, 20 ⁇ m.
  • the 2DEG concentration of the 2DEG layer a is lower than the 2DEG concentration of the 2DEG layer A other than the 2DEG layer a by providing the field plate layer 17a.
  • the electric field concentration in the portion where the field plate layer 17a is provided can be reduced and the electric field concentration can be suppressed.
  • the 2DEG concentration of the 2DEG layer a in the electron transit layer 15 decreases as the film thickness of the field plate layer 17a increases. Therefore, the film thickness of the field plate layer 17a (semiconductor layer 17) in the first embodiment is 20 nm or more and 200 nm or less, and preferably the 2DEG concentration can be easily controlled by controlling the film thickness using growth and etching.
  • the field plate layer 17a that is, the semiconductor layer 17, is made of, for example, a GaN layer having a thickness of 30 nm.
  • the anode electrode 18A as the first electrode has, for example, a Ni / Au laminated structure in which the lower electrode layer is a Ni layer and the upper electrode layer is an Au layer.
  • the anode electrode 18A comes into Schottky contact with the 2DEG layer A generated in the electron transit layer 15 via the electron supply layer 16.
  • the anode electrode 18A may be formed by removing the formation region of the anode electrode 18A in the electron supply layer 16 by recess etching, and may be brought into Schottky contact with 2DEG existing under the field plate layer 17a from the side surface.
  • the anode electrode 18A rides on the field plate layer 17a to form at least one step, and extends so as to protrude toward the cathode electrode 18C.
  • the anode electrode 18A is provided in contact with a part of the side surface and the upper surface of the field plate layer 17a.
  • another semiconductor film or dielectric film may be interposed between the anode electrode 18A and the field plate layer 17a so as not to contact each other.
  • the field plate portion is provided in a shape having multiple steps in the anode electrode 18A, for example, two steps.
  • the cathode electrode 18C as the second electrode has, for example, a Ti / Al laminated structure in which the lower electrode layer is a Ti layer and the upper electrode layer is an Al layer. Thereby, the cathode electrode 18 ⁇ / b> C is in ohmic contact with the 2DEG layer A generated in the electron transit layer 15 via the electron supply layer 16.
  • the insulating film 19 is made of, for example, SiO 2 , but may be made of other materials, specifically, silicon nitride (SiN), aluminum oxide (alumina: Al 2 O 3 ), etc. These may be combined as appropriate or may be sequentially stacked.
  • the insulating film 19 mainly protects the surfaces of the field plate layer 17a, the anode electrode 18A, the cathode electrode 18C, and the electron supply layer 16. As described above, the SBD 1 according to the first embodiment is configured.
  • the Al x Ga 1-x N layer increases in film thickness by 200 nm to 100 nm in the upward direction in the stacking direction. Further, the AlN layer increases in film thickness by 20 to 10 nm upward in the stacking direction.
  • the carbon concentration of the planarizing layer 13 was 1 ⁇ 10 17 cm ⁇ 3 .
  • the Al composition ratio x of the Al x Ga 1-x N layer constituting the planarizing layer 13 was set to various values, and the breakdown voltage was measured for each film thickness of the planarizing layer 13 of the SBD 1.
  • the Al x Ga 1-x N layer is a GaN layer with an Al composition ratio x of 0, an Al 0.4 Ga 0.6 N layer with an Al composition ratio x of 0.4, or an Al composition ratio x of 0.8.
  • the breakdown voltage of the SBD 1 in the case where the Al 0.8 Ga 0.2 N layer was used was measured for each film thickness of the planarizing layer 13.
  • the reference breakdown voltage is 600V.
  • the breakdown voltage measurement of SBD1 was performed as follows. That is, first, the substrate 11 and the anode electrode 18A are grounded. A withstand voltage is measured by applying a voltage of 600 V between the anode electrode 18A and the cathode electrode 18C so that the anode electrode 18A is negative and the cathode electrode 18C is positive.
  • the proportion of devices having a reference breakdown voltage or higher is 30%. It turns out that it is a grade.
  • the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) of the planarization layer 13 is composed of a GaN layer, and the film thickness is set to 500 nm or more, so that the ratio of devices having a reference breakdown voltage or more can be increased. It turns out that it can be made 70% or more which is a desirable ratio on manufacture.
  • the film thickness of the planarization layer 13 is 750 nm and 1000 nm (1 ⁇ m), it can be seen that the proportion of devices that have a reference breakdown voltage or higher is 80% or higher. In addition, it can be seen that when the thickness of the planarizing layer 13 is 2000 nm (2 ⁇ m) or more, the proportion of devices that have a reference breakdown voltage or more increases to 90% or more.
  • the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) of the planarizing layer 13 is an Al 0.4 Ga 0.6 N layer
  • the reference breakdown voltage is exceeded.
  • the proportion of the device is about 40%, whereas the proportion of the device having the reference breakdown voltage or more can be increased to 70% or more by setting the film thickness to 1200 nm or more.
  • the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) of the planarizing layer 13 is an Al 0.8 Ga 0.2 N layer, the proportion of devices that exceed the reference breakdown voltage when the film thickness is 1000 nm is 50%.
  • the ratio of devices having a reference breakdown voltage or more can be increased to 70% or more. That is, after the carbon concentration of the planarization layer 13 is set to 1 ⁇ 10 17 cm ⁇ 3 , the planarization layer 13 including the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) has a reference breakdown voltage or higher.
  • the film thickness D min (nm) necessary for setting the ratio of the apparatus to 70% or more can be approximated by, for example, the following equation (1).
  • the dependency of the required film thickness Dmin on the Al composition ratio shows the same tendency as the dependency of the film thickness required to fill the 1 ⁇ m diameter shown in FIG. D min ⁇ 2000x + 500 (1)
  • Formula (1) is an example which shows the tendency of Al composition ratio dependence of film thickness Dmin required as the planarization layer 13 to the last, and a numerical value is not limited to these.
  • the inventor of the present invention has set the film thickness as, for example, 2000 nm as the planarizing layer 13 in the SBD 1 as the nitride semiconductor device configured as described above. Then, the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) of the planarizing layer 13 is replaced with a GaN layer having an Al composition ratio x of 0, and Al 0.4 Ga 0.6 N having an Al composition ratio x of 0.4. In the case of a layer, or an Al 0.8 Ga 0.2 N layer having an Al composition ratio x of 0.8, the ratio of devices having a reference breakdown voltage or higher for each carbon concentration of the Al x Ga 1-x N layer of SBD 1 was calculated. .
  • FIG. 5 is a graph showing the carbon concentration dependency of the planarization layer 13 in the proportion of the device having the reference breakdown voltage or higher.
  • the carbon concentration of the planarizing layer 13 is 1.0 ⁇ 10 19 cm ⁇ 3 regardless of the Al composition ratio x, that is, in the case of the same configuration as the buffer layer of the conventional configuration, It can be seen that the proportion of the device is 30% or less.
  • the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) of the planarizing layer 13 is composed of a GaN layer, and the carbon concentration is made to be 1.0 ⁇ 10 18 cm ⁇ 3 or less, whereby the reference It can be seen that the ratio of the device having a withstand voltage or higher can be set to 70% or more, which is a preferable ratio in manufacturing.
  • the ratio of the device having the reference breakdown voltage or more is 80% or more and 1.0 ⁇ 10 16 cm ⁇ 3 or less. In this case, it can be seen that the proportion of the devices having the reference breakdown voltage or more increases to 90% or more.
  • the carbon concentration is 1.0 ⁇ 10 18 cm ⁇ 3.
  • the ratio of the devices with the reference breakdown voltage or higher is about 50%
  • the ratio of the devices with the reference breakdown voltage or higher is set to 70 by setting the carbon concentration to 5.0 ⁇ 10 17 cm ⁇ 3 or less. It can be seen that it can be made more than%.
  • the carbon concentration is 1.0 ⁇ 10 18 cm ⁇ 3.
  • the ratio of devices that exceed the reference breakdown voltage is about 40%, whereas the ratio of devices that exceed the reference breakdown voltage can be increased to 70% or more by setting the carbon concentration to 1.0 ⁇ 10 17 cm ⁇ 3 or less.
  • the planarizing layer 13 is composed of an Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) having an Al composition ratio x with a film thickness of 2000 nm, the ratio of the device having a reference breakdown voltage or higher is 70%.
  • the upper limit carbon concentration for achieving the above is preferably at least 1.0 ⁇ 10 18 cm ⁇ 3 and more preferably 1.0 ⁇ 10 17 cm ⁇ 3 or less.
  • the design of the planarizing layer 13 increases as the Al composition ratio x of the Al x Ga 1-x N layer of the planarizing layer 13 increases. By reducing the carbon concentration, it is possible to ensure the flatness of the surface of the planarization layer 13.
  • the planarizing layer 13 is configured to include an Al x Ga 1-x N layer (0 ⁇ x ⁇ 1), from the viewpoint of improving the degree of freedom in designing the thickness of the planarizing layer 13, It can be seen that a smaller Al composition ratio x is preferable.
  • the Al composition ratio x of the Al x Ga 1-x N layer (0 ⁇ x ⁇ 1) of the planarizing layer 13 is preferably 0 or more and 0.4 or less (0 ⁇ x ⁇ 0.4). It is more preferably 0.05 or less (0 ⁇ x ⁇ 0.05).
  • the Al composition ratio x when the Al composition ratio x is in the range of 0 or more and 0.05 or less, the film thickness of the flattening layer 13 at the ratio of the device that becomes the reference breakdown voltage or more.
  • the dependence tendency shows a tendency similar to the tendency when the Al composition ratio x shown in FIG.
  • the carbon concentration of the planarizing layer 13 is preferably low, and it is preferable to reduce the carbon concentration as the Al composition ratio x increases in order to ensure the flatness of the surface of the planarizing layer 13.
  • the planarization layer 13 whose surface is planarized with a carbon concentration of 1.0 ⁇ 10 18 cm ⁇ 3 or less is formed below the buffer layer 14.
  • substrate 11, the intervening layer 12, etc. can be suppressed.
  • it can suppress that a defect arises in the buffer layer 14 and the electron transit layer 15 which are formed in the upper layer of the planarization layer 13, it can suppress the leakage current in a nitride semiconductor device, and can suppress the fall of a proof pressure.
  • FIG. 6 is a schematic cross-sectional view showing a HEMT as the nitride semiconductor device according to the second embodiment.
  • the HEMT 2 according to the second embodiment is selectively spaced apart from the field plate layer 17b on the electron supply layer 16 in addition to the structure of the semiconductor multilayer substrate 10 according to the first embodiment.
  • the source electrode 21S, the gate electrode 21G, the drain electrode 21D, and the insulating film 22 are provided.
  • the HEMT 2 is a depletion mode (D-mode) HEMT (D-mode HEMT) that operates at a negative threshold voltage.
  • the width along the width direction of the nitride semiconductor device in which a plurality of HEMTs 2 are integrated is, for example, 150 mm.
  • the width L S along the width direction parallel to the surface of the substrate 11 in the source electrode 21S is, for example, 20 ⁇ m.
  • Similar width L G of the gate electrode 21G is, for example, 5 [mu] m.
  • a similar width L D of the drain electrode 21D is, for example, 20 ⁇ m.
  • the distance l SG between the source electrode 21S and the gate electrode 21G is, for example, 5 ⁇ m parallel to the surface of the substrate 11 and the distance l GD between the gate electrode 21G and the drain electrode 21D is, for example, 15 ⁇ m. .
  • the 2DEG concentration of 2DEG generated in the electron transit layer 15 decreases as the film thickness of the field plate layer 17b formed of a part of the semiconductor layer 17 increases. Therefore, in the second embodiment, the film thickness of the field plate layer 17b is preferably 20 nm or more and 200 nm or less, preferably 20 nm or more and 100 nm or less, more preferably, for the same reason as in the first embodiment. Is 25 nm or more and 80 nm or less.
  • the electron transit layer 15, the electron supply layer 16, and the field plate layer 17b constitute a semiconductor stacked body.
  • the 2DEG concentration inside the semiconductor multilayer body is reduced by the field plate layer 17b. That is, the 2DEG layer a having a low 2DEG concentration is generated in the lower region of the field plate layer 17b.
  • the 2DEG concentration of the 2DEG layer a is preferably 7 ⁇ 10 12 cm ⁇ 2 or less.
  • the 2DEG concentration of the 2DEG layer A having a relatively high 2DEG concentration is preferably higher than 7 ⁇ 10 12 cm ⁇ 2 .
  • the 2DEG concentration is set to be less than 3 ⁇ 10 13 cm ⁇ 2, for example.
  • the semiconductor stacked body may be composed of the electron transit layer 15 and the electron supply layer 16, and an etching sacrificial layer may be provided between the electron supply layer 16 and the semiconductor layer 17. It is.
  • a semiconductor stacked body is constituted by the field plate layer 17b obtained by etching the electron transit layer 15, the electron supply layer 16, the etching sacrificial layer, and the semiconductor layer 17 into a predetermined shape.
  • the drain electrode 21D as the second electrode and the source electrode 21S as the third electrode are provided on the electron supply layer 16, and are composed of, for example, a laminated structure of Ti / Al.
  • the drain electrode 21 ⁇ / b> D and the source electrode 21 ⁇ / b> S are in ohmic contact with the 2DEG layer A via the electron supply layer 16.
  • the gate electrode 21G as the first electrode is disposed between the drain electrode 21D and the source electrode 21S, and is provided on the field plate layer 17b and the insulating film 22.
  • the gate electrode 21G is formed of, for example, a Ni / Au laminated structure.
  • the gate electrode 21G is in Schottky contact with the 2DEG layer A in the electron transit layer 15 via the electron supply layer 16.
  • the gate electrode 21G is provided to extend in such a manner that the field plate portion protrudes in a stepped manner toward the both sides of the source electrode 21S and the drain electrode 21D.
  • a part of the gate electrode 21G is formed in contact with the electron supply layer 16, but the field plate layer 17b is interposed between the electron supply layer 16 and the gate electrode 21G. It is also possible to configure.
  • the insulating film 22 is made of the same material as the insulating film 19 in the first embodiment, for example, SiO 2 .
  • the insulating film 22 mainly protects the field plate layer 17b, the gate electrode 21G, the drain electrode 21D, the source electrode 21S, and the surface of the electron supply layer 16. As described above, the HEMT 2 according to the second embodiment is configured.
  • the pressure resistance measurement of the HEMT 2 according to the second embodiment is performed as follows. That is, first, the substrate 11 and the source electrode 21S are grounded. Then, a voltage is applied between the source electrode 21S and the gate electrode 21G so that the gate electrode 21G has a negative potential of ⁇ 10V and the source electrode 21S has a potential of 0, thereby turning off the HEMT2. In the off state of the HEMT 2, a voltage is applied between the source electrode 21S and the drain electrode 21D so that the drain electrode 21D has a positive potential of 600 V, which is a reference breakdown voltage, and the breakdown voltage is measured.
  • the same effect as that of the first embodiment can be obtained by using the same semiconductor multilayer substrate 10 as that of the first embodiment.
  • the planarizing layer 13 shown in FIGS. 1 and 3 an Al x Ga 1-x N layer having a single layer or a laminated structure in which carbon is doped at a low concentration. (0 ⁇ X ⁇ 1) is used.
  • the planarizing layer 13 is further doped with impurities composed of surfactant atoms.
  • the surfactant atom include magnesium (Mg), indium (In), zinc (Zn), silicon (Si), germanium (Ge), oxygen (O), and antimony (Sb).
  • the inventor sets the doping concentration of Mg, In, Zn, Si, Ge, O, and Sb as surfactant atoms to be doped in the above-described planarization layer 13 to 1.0 ⁇ 10 15 cm ⁇ 3 or more and 7
  • the pressure resistance of SBD1 was measured by variously changing between 0.0 ⁇ 10 18 cm ⁇ 3 and less.
  • the flattening layer 13 is composed of a GaN layer having an Al composition ratio X of 0 to have a thickness of, for example, 2900 nm, and an AlN layer having a thickness of 20 nm is interposed every time the GaN layer has a thickness of 700 nm.
  • the carbon concentration was 5.0 ⁇ 10 18 cm ⁇ 3 .
  • FIG. 7 is a graph showing the measurement result, showing the surfactant concentration dependency in the proportion of devices that are equal to or higher than the reference breakdown voltage of SBD1.
  • the ratio of the devices having the reference breakdown voltage or more can be set to 70% which is a preferable ratio in manufacturing. Further, it can be seen that the surfactant concentration is preferably 1.0 ⁇ 10 18 cm ⁇ 3 or less in order to make the ratio of the device having the reference breakdown voltage or more 70% or more.
  • the semiconductor layer is doped with surfactant atoms as impurities
  • the nitride semiconductor layer such as the Al x Ga 1-x N layer is oriented in a direction perpendicular to the stacking direction (lateral Direction). Therefore, the surface of the nitride semiconductor layer doped with surfactant atoms can be easily flattened, so that the above-described flattening layer 13 can be formed more efficiently. Furthermore, it becomes possible to reduce the upper limit of the carbon concentration of the planarization layer 13 by doping with surfactant atoms.
  • the carbon concentration of the planarizing layer 13 is set to a low concentration of 5.0 ⁇ 10 18 cm ⁇ 3 or less, and the surfactant concentration is 1.0 ⁇ 10 16 cm ⁇ 3 or more and 1.0 ⁇ 10 18 cm ⁇ 3 or less.
  • the proportion of devices that have a reference breakdown voltage or higher in the nitride semiconductor device can be increased to 70% or higher. This is the same even when the carbon concentration of the planarization layer 13 is 1.0 ⁇ 10 18 cm ⁇ 3 or higher and is higher than the carbon concentration in the first and second embodiments. That is, in the nitride semiconductor device, the proportion of devices having a reference breakdown voltage or higher can be increased to 70% or more, and the proportion of devices having a reference breakdown voltage or higher can be improved.
  • the electron supply layer 16 is an AlGaN superlattice layer.
  • a plurality of In p Al q Ga 1-pq N layers (0 ⁇ p ⁇ 1) are used. , 0 ⁇ q ⁇ 1, 0 ⁇ p + q ⁇ 1), and an InAlGaN superlattice layer formed as a superlattice layer can also be employed.
  • the anode electrode of the diode and the lower electrode layer of the gate electrode of the transistor are electrodes in Schottky contact with the electron supply layer. Therefore, besides nickel (Ni) and titanium (Ti) described above, for example, platinum (Pt), palladium (Pd), tungsten (W), gold (Au), silver (Ag), copper (Cu), tantalum ( Ta), a metal film containing at least one of aluminum (Al), or a metal film made of an alloy containing at least one of Ti, Ni, Pt, Pd, W, Au, Ag, Cu, Ta, and Al Of these, various metal materials satisfying the above conditions, such as a metal film containing at least one or a metal film made of a nitride alloy containing at least one of Ti, W, and Ta may be used. good.
  • the upper electrode layer of the anode electrode of the diode and the gate electrode of the transistor is made of a metal having a work function smaller than that of the lower electrode layer, and various materials may be used as long as the metal material satisfies this condition.
  • the cathode electrode of the diode and the source electrode and drain electrode of the transistor are electrodes that are in ohmic contact with the electron supply layer or in a state where the contact resistance is sufficiently small.
  • the present invention is not limited thereto.
  • a metal film including at least one of metal films made of a nitride alloy including at least one of them may be used.
  • a MIS-HEMT Metal Insulator Semiconductor HEMT
  • Recessed MIS-HEMT recessed MIS-HEMT
  • AlO aluminum oxide
  • MOS-HEMT Metal Oxide Semiconductor HEMT
  • MOSFE Metal Oxide Semiconductor FET
  • MOSFET Metal Insulator Semiconductor FET
  • an insulating film such as an oxide film can be provided between the gate electrode and the field plate layer.
  • the present invention can also be applied to at least one semiconductor element of a semiconductor device including a plurality of semiconductor elements, such as a transistor in which a HEMT and a MOSFET are cascode-connected in combination.
  • the electrodes are formed on the surfaces of the electron supply layer and the etching sacrificial layer.
  • the present invention is not necessarily limited thereto, and the electron transit layer, the electron supply layer, the etching sacrificial layer, and It is possible to provide an electrode on at least one layer of a semiconductor laminate including a semiconductor layer and a field plate layer and other layers as necessary. That is, an electrode may be provided on another layer constituting the semiconductor stacked body.
  • an anode electrode, a cathode electrode, a gate electrode, a drain electrode, or a source electrode is formed on the surface of the electron supply layer via a nitride-based semiconductor layer such as an insulating layer or a field plate layer, or a laminated film thereof. It is also possible to provide. Further, a part of the electrode formation region of the electron supply layer is removed by etching until reaching the electron transit layer to form a recess portion, and the surface of the recess portion, or the surface of the recess portion via a predetermined film, the anode electrode It is also possible to provide a cathode electrode, a gate electrode, a drain electrode, or a source electrode.

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Abstract

L'invention concerne un dispositif à semiconducteur de nitrure qui est pourvu : d'un substrat ; d'une couche tampon qui est disposée sur le dessus du substrat et est dopée avec du carbone ; d'un stratifié semiconducteur qui comprend une première couche semiconductrice, qui est disposée sur le dessus de la couche tampon et est constituée d'un semiconducteur de nitrure, et une deuxième couche semiconductrice, qui est disposée sur le dessus de la première couche semiconductrice et a en moyenne une bande interdite plus étendue que la première couche semiconductrice ; d'une première électrode qui est disposée sur au moins une couche parmi les couches constituant le stratifié semiconducteur ; et d'une seconde électrode qui est prévue à une certaine distance de la première électrode sur au moins une couche parmi les couches constituant le stratifié semiconducteur. Une troisième couche semiconductrice qui contient du carbone à une concentration inférieure ou égale à 1,0 × 1018 cm-3 est prévue entre le substrat et la couche tampon. La troisième couche semiconductrice a une épaisseur supérieure ou égale à 500 nm mais inférieure à 3 000 nm.
PCT/JP2015/060664 2014-04-04 2015-04-03 Dispositif à semiconducteur au nitrure, son procédé de fabrication, diode et transistor à effet de champ WO2015152411A1 (fr)

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