WO2014199886A1 - Appareil de communication et dispositif électronique - Google Patents

Appareil de communication et dispositif électronique Download PDF

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Publication number
WO2014199886A1
WO2014199886A1 PCT/JP2014/064909 JP2014064909W WO2014199886A1 WO 2014199886 A1 WO2014199886 A1 WO 2014199886A1 JP 2014064909 W JP2014064909 W JP 2014064909W WO 2014199886 A1 WO2014199886 A1 WO 2014199886A1
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WO
WIPO (PCT)
Prior art keywords
communication device
antenna
conductor pattern
insulating layers
laminate
Prior art date
Application number
PCT/JP2014/064909
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English (en)
Japanese (ja)
Inventor
用水邦明
Original Assignee
株式会社村田製作所
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Filing date
Publication date
Application filed by 株式会社村田製作所 filed Critical 株式会社村田製作所
Publication of WO2014199886A1 publication Critical patent/WO2014199886A1/fr

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q7/00—Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop
    • H01Q7/06—Loop antennas with a substantially uniform current distribution around the loop and having a directional radiation pattern in a plane perpendicular to the plane of the loop with core of ferromagnetic material
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07777—Antenna details the antenna being of the inductive type
    • G06K19/07779—Antenna details the antenna being of the inductive type the inductive antenna being a coil
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
    • G06K19/07773—Antenna details
    • G06K19/07792—Antenna details the antenna adapted for extending in three dimensions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49822—Multilayer substrates
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
    • H01L23/64—Impedance arrangements
    • H01L23/66—High-frequency adaptations
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01Q—ANTENNAS, i.e. RADIO AERIALS
    • H01Q1/00—Details of, or arrangements associated with, antennas
    • H01Q1/12—Supports; Mounting means
    • H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
    • H01Q1/2208—Supports; Mounting means by structural association with other equipment or articles associated with components used in interrogation type services, i.e. in systems for information exchange between an interrogator/reader and a tag/transponder, e.g. in Radio Frequency Identification [RFID] systems
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/20—Near-field transmission systems, e.g. inductive or capacitive transmission systems characterised by the transmission technique; characterised by the transmission medium
    • H04B5/24—Inductive coupling
    • H04B5/26—Inductive coupling using coils
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B5/00—Near-field transmission systems, e.g. inductive or capacitive transmission systems
    • H04B5/70—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes
    • H04B5/72—Near-field transmission systems, e.g. inductive or capacitive transmission systems specially adapted for specific purposes for local intradevice communication
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/165—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed inductors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
    • H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
    • H01L2223/64—Impedance arrangements
    • H01L2223/66—High-frequency adaptations
    • H01L2223/6661—High-frequency adaptations for passive devices
    • H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/16227—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15313—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a land array, e.g. LGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191—Disposition
    • H01L2924/19101—Disposition of discrete passive components
    • H01L2924/19105—Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0284—Details of three-dimensional rigid printed circuit boards
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H05K1/186—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or connecting to patterned circuits before or during embedding
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/08—Magnetic details
    • H05K2201/083—Magnetic materials
    • H05K2201/086—Magnetic materials for inductive purposes, e.g. printed inductor with ferrite core
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09209—Shape and layout details of conductors
    • H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/097—Alternating conductors, e.g. alternating different shaped pads, twisted pairs; Alternating components
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/06—Lamination
    • H05K2203/063—Lamination of preperforated insulating layer
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4614—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination
    • H05K3/4617—Manufacturing multilayer circuits by laminating two or more circuit boards the electrical connections between the circuit boards being made during lamination characterized by laminating only or mainly similar single-sided circuit boards

Definitions

  • the present invention relates to a communication apparatus and an electronic device used in, for example, an RFID (Radio Frequency Identification) system and a near field communication (NFC) system.
  • RFID Radio Frequency Identification
  • NFC near field communication
  • Patent Document 1 discloses a communication terminal device in which a communication function is modularized.
  • the communication terminal device of Patent Document 1 is such that an antenna element and a chip component are mounted on a flexible substrate, and the flexible substrate is housed in a casing.
  • the communication terminal device of Patent Document 1 has a structure in which an antenna element is mounted on a flexible substrate together with a chip component, there are many mounting processes, and the thickness is increased by the thickness of a bonding agent such as solder. Further, if there is solder or a conductor pattern on the mounting surface, the magnetic field is hindered by the solder or conductor pattern, so that the antenna characteristics deteriorate. For this reason, the antenna element mounting area of the flexible substrate cannot be effectively used and cannot be downsized.
  • An object of the present invention is to provide a communication device and an electronic apparatus that are provided with an antenna and a chip component on a substrate and can be further miniaturized.
  • a communication apparatus includes a substrate, an antenna and an IC provided on the substrate, and the substrate is a stacked body in which a plurality of insulating layers are stacked, and the antenna includes a plurality of layers inside the stacked body.
  • the coiled conductor pattern is formed over the upper layer side and the lower layer side than the height of the mounting surface of the IC in the multilayer body. .
  • the above configuration solves the problem of mounting the antenna element on the substrate. That is, the thickness and size can be reduced without degrading the antenna characteristics.
  • the IC is disposed within a formation range in the stacking direction of the coiled conductor pattern. This effectively reduces the thickness.
  • the coiled conductor pattern is composed of a planar conductor provided on the main surface of the insulating layer and an interlayer connection conductor penetrating the insulating layer.
  • the IC is mounted on the surface of the laminate or incorporated in the laminate. With this structure, the thickness of the IC can be reduced.
  • a magnetic core is built in the laminated body inside the formation area of the coiled conductor pattern.
  • a predetermined inductance can be set without increasing the size of the antenna portion.
  • the convergence of the magnetic flux is increased, and the degree of coupling with the communication partner antenna in short-range communication is increased.
  • the insulating layer is preferably made of LCP (liquid crystal polymer). As a result, the dielectric loss can be kept low.
  • an external connection terminal is formed on the laminate, and a cover that covers the laminate is provided.
  • a single laminate covered with a cover can be handled as, for example, a card-type communication device.
  • An electronic apparatus includes any one of the communication devices described above, and the communication device is housed in a housing.
  • an electronic device having a communication function can be configured by inserting or mounting a card-type communication device in a housing.
  • the problem in mounting the antenna element on the substrate is solved. That is, the thickness and size can be reduced without degrading the antenna characteristics.
  • FIG. 1 is a perspective view of a communication apparatus 101 according to the first embodiment.
  • 2A is a plan view of the communication apparatus 101
  • FIG. 2B is a cross-sectional view of the main part of the communication apparatus 101.
  • FIG. 3 is a circuit diagram of the main part of the communication apparatus 101.
  • FIG. 4 is an exploded perspective view of the communication apparatus 101.
  • FIG. 5 is an exploded cross-sectional view of the communication apparatus 101.
  • FIG. 6 is an exploded perspective view of the communication apparatus 102 according to the second embodiment.
  • FIG. 7 is an exploded cross-sectional view of the communication device 102.
  • FIG. 8 is an exploded perspective view of the communication device 103 according to the third embodiment.
  • FIG. 9 is an exploded cross-sectional view of the communication device 103.
  • FIG. 10 is an exploded perspective view of the communication device 104 according to the fourth embodiment.
  • FIG. 11 is an exploded cross-sectional view of the communication device 104.
  • FIG. 12 is an exploded perspective view of a communication apparatus 101A according to the fifth embodiment.
  • FIG. 13 is a perspective view of the electronic apparatus 201.
  • FIG. 1 is a perspective view of a communication apparatus 101 according to the first embodiment.
  • 2A is a plan view of the communication apparatus 101
  • FIG. 2B is a cross-sectional view of the main part of the communication apparatus 101.
  • the communication device 101 includes a resin multilayer substrate (hereinafter simply referred to as “substrate”) 10, an antenna 20, ICs 31 and 32, and other chip components 41 and 42 provided on the substrate 10.
  • substrate 10 is a laminate in which a plurality of insulating layers made of a thermoplastic resin such as LCP (liquid crystal polymer) are laminated and thermocompression bonded.
  • LCP liquid crystal polymer
  • the antenna 20 is a coiled conductor pattern formed over a plurality of layers inside the laminate.
  • the coiled conductor pattern is composed of planar conductors 21 and 22 provided on the main surface of the insulating layer, and interlayer connection conductors 23 and 24 penetrating the insulating layer. That is, a rectangular helical coil-shaped conductor pattern whose axis is in the in-plane direction of the insulating layer is configured. This coiled conductor pattern is formed over the upper layer side and the lower layer side than the height of the mounting surface of the ICs 31 and 32 in the multilayer body.
  • the antenna 20 is coupled to the communication partner antenna in such a manner that the magnetic flux passes in the in-plane direction of the insulating layer, and therefore, for example, some electrode is formed in the formation region of the antenna 20 of the insulating layer 11. Even so, there is little coupling with the magnetic flux passing through the coil opening. Therefore, if necessary, the formation area of the laminated antenna 20 can be used as a conductor pattern formation area other than the antenna.
  • FIG. 3 is a circuit diagram of the main part of the communication apparatus 101.
  • the IC 31 is an RFIC, and the IC 32 is a memory.
  • the antenna 20 is connected to an RF port of the IC 31 (RFIC) through a matching circuit including a chip component 41 and the like.
  • FIG. 4 is an exploded perspective view of the communication apparatus 101
  • FIG. 5 is an exploded sectional view of the communication apparatus 101.
  • each element is enlarged and particularly exaggerated in the thickness direction. The same applies to the second and subsequent embodiments.
  • the substrate is a laminate of insulating layers 11-16.
  • chip parts such as ICs 31 and 32 are mounted on the surface of the laminated body of the insulating layers 11, 12, and 13.
  • An antenna 20 is formed on the insulating layers 12 to 16 among the plurality of insulating layers.
  • An external connection terminal 51 is formed on the lower surface of the insulating layer 11.
  • the manufacturing method of the communication device 101 is as follows.
  • a hole for via formation is formed by laser processing from the surface opposite to the land formation surface, and a conductive paste such as Cu paste is applied to the hole with a squeegee and dried.
  • the antennas on the resin multilayer substrate together with the ICs 31 and 32 and arranging the ICs 31 and 32 within the formation range in the lamination direction of the coiled conductor pattern for example, compared to a structure in which the antenna element is mounted on the flexible substrate.
  • the coil opening of the coiled conductor pattern can be enlarged while being thin, high antenna radiation efficiency can be ensured.
  • the loss can be reduced by configuring the insulating layer with a low dielectric loss resin such as LCP (liquid crystal polymer).
  • a small communication device that does not have a housing, does not have a connector, and is not soldered can be configured with a simple process.
  • the handling becomes good.
  • FIG. 6 is an exploded perspective view of the communication apparatus 102 according to the second embodiment
  • FIG. 7 is an exploded cross-sectional view of the communication apparatus 102.
  • the substrate is a laminated body of insulating layers 11-15.
  • chip parts such as ICs 31 and 32 are mounted on the surface of the laminated body of the insulating layers 11 and 12.
  • An antenna 20 is formed on the insulating layers 12-15.
  • Insulating layers 13 and 14 are formed with openings for incorporating chip components such as ICs 31 and 32 into the laminate.
  • chip components such as ICs 31 and 32 are mounted on a laminate of insulating layers 11 and 12. At that time, chip components such as ICs 31 and 32 are not connected to the regular conductors by heating and pressing the interlayer connection conductors as shown by circles A in FIG. ).
  • cavities are formed by the openings of the insulating layers 13, 14.
  • a laminated body made of the insulating layers 11, 12 is laminated on the laminated body made of the insulating layers 13, 14, 15, and is heated and pressed to form a cavity in the laminated body. Built in.
  • a part of the antenna 20 is constituted by the laminated body composed of the insulating layers 13, 14 and 15, and the remaining part of the antenna 20 is constituted by the laminated body constituted by the insulating layers 11 and 12.
  • the antenna 20 is configured by laminating them.
  • FIG. 8 is an exploded perspective view of the communication device 103 according to the third embodiment
  • FIG. 9 is an exploded cross-sectional view of the communication device 103.
  • the substrate is a laminated body of insulating layers 11-15.
  • chip parts such as ICs 31 and 32 are mounted on the surface of the laminated body of the insulating layers 11 and 12.
  • An antenna 20 is formed on the insulating layers 12-15.
  • Insulating layers 13 and 14 are formed with openings for incorporating chip components such as ICs 31 and 32 into the laminate.
  • the communication device 103 has a magnetic core 61 built in the laminate inside the coiled conductor pattern formation region of the antenna 20.
  • the magnetic core 61 is mounted on the laminated body of the insulating layers 11 and 12 together with the chip components such as the ICs 31 and 32.
  • the laminated body of the insulating layers 13, 14, 15 cavities are formed by the openings of the insulating layers 13, 14.
  • chip components such as ICs 31, 32 and the magnetic core 61 are formed in the cavity. Is built-in.
  • a part of the antenna 20 is constituted by the laminated body composed of the insulating layers 13, 14 and 15, and the remaining part of the antenna 20 is constituted by the laminated body constituted by the insulating layers 11 and 12.
  • the antenna 20 is configured by laminating them.
  • the antenna portion can be set to a predetermined inductance without increasing the size.
  • the convergence of the magnetic flux is increased, and the degree of coupling with the communication partner antenna in short-range communication is increased.
  • FIG. 10 is an exploded perspective view of the communication device 104 according to the fourth embodiment
  • FIG. 11 is an exploded cross-sectional view of the communication device 104.
  • the substrate is a laminated body of insulating layers 11-15.
  • chip parts such as ICs 31 and 32 are mounted on the surface of the laminated body of the insulating layers 11 and 12.
  • An antenna 20 is formed on the insulating layers 12-15.
  • Insulating layers 13 and 14 are formed with openings for incorporating chip components such as ICs 31 and 32 into the laminate.
  • the antenna 20 of the communication device 104 includes a rectangular helical coil-shaped conductor pattern in which the coil winding axis is oriented in the stacking direction of the multilayer body by the planar conductors 25a to 25d and the interlayer connection conductor 26. Has been.
  • the antenna 20 can be coupled to the communication partner antenna by a usage method in which magnetic flux passes in the stacking direction of the stacked body.
  • a non-magnetic insulating layer is laminated.
  • a resin sheet in which ferrite powder is dispersed in LCP or other resin may be laminated.
  • the antenna can be set to a predetermined inductance without increasing the size of the antenna portion.
  • only the insulating layer above the insulating layer on which the IC or other chip component is mounted may be formed of the magnetic resin sheet. As a result, the cost can be reduced.
  • FIG. 12 is an exploded perspective view of the communication apparatus 101A according to the fifth embodiment
  • FIG. 13 is a perspective view of the electronic apparatus 201.
  • the communication device 101A of the present embodiment is formed by stacking and integrating the communication device 101 shown in the first embodiment so that the upper and lower sides of the communication device 101 are sandwiched between covers 71 and 72. .
  • a recess for forming a space for mounting the ICs 31, 32, etc. is formed on the lower surface of the cover 71.
  • a plurality of external connection terminals are formed on the lower surface of the laminated body of the communication device 101, and an opening AP that exposes the external connection terminals is formed in the cover 72 at a position facing the external connection terminals.
  • a card-type communication device such as an SD card or a SIM card, which is provided with a cover, is configured.
  • covers 71 and 72 may be provided by applying and forming a resin sealing layer on the laminated body and then heat-curing it.
  • the communication device 101A is housed, for example, in a casing 81 of a mobile terminal, and the external connection terminal electrode is connected to a circuit in the electronic device.
  • the electronic device 201 can also be thinned. Since the communication device 101A is thin, the electronic device 201 can also be thinned. Since the communication apparatus 101A includes a coil antenna instead of a dielectric antenna, there are few restrictions on the arrangement of the metal plate in the housing 81, and the degree of freedom in design is high, and accordingly, a thinner and smaller electronic device is more suitable. Can be configured.
  • Opening 10 Resin multilayer substrate (laminate) DESCRIPTION OF SYMBOLS 11-16 ... Insulating layer 20 ... Antenna 21, 22 ... Planar conductor 23, 24, 26 ... Interlayer connection conductor 25a-25d ... Planar conductor 31, 32 ... IC 41, 42 ... chip component 51 ... external connection terminal 61 ... magnetic core 71, 72 ... cover 81 ... housing 101 to 104 ... communication device 101A ... communication device 201 ... electronic device

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Power Engineering (AREA)
  • Theoretical Computer Science (AREA)
  • Signal Processing (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

Un appareil de communication (101) comprend : une carte (10) ; la carte (10) comportant une antenne (20) et des CI (31, 32). La carte (10) est un produit laminé dans lequel une pluralité de couches isolantes sont laminées, tandis que l'antenne (20) est un diagramme conducteur en forme de bobine formé de telle sorte qu'il s'étend à travers une pluralité de couches à l'intérieur du produit laminé. Le diagramme conducteur en forme de bobine est formé de telle sorte qu'il s'étend à travers des couches supérieures et inférieures à la hauteur du plan de montage des CI (31, 32) dans le produit laminé. De cette manière, d'autres appareils de communication et dispositifs électroniques de taille réduite ayant des antennes et des composants de puce équipant leurs cartes sont configurés.
PCT/JP2014/064909 2013-06-12 2014-06-05 Appareil de communication et dispositif électronique WO2014199886A1 (fr)

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JP2013-123309 2013-06-12

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EP3166181A1 (fr) * 2015-11-05 2017-05-10 Gemalto Sa Procede de fabrication d'antenne radiofrequence sur un support et antenne ainsi obtenue
WO2017179612A1 (fr) * 2016-04-13 2017-10-19 株式会社村田製作所 Module inducteur
WO2020162473A1 (fr) * 2019-02-05 2020-08-13 株式会社村田製作所 Substrat multicouche en résine et procédé de production de substrat multicouche en résine
JPWO2019069555A1 (ja) * 2017-10-05 2020-11-05 ソニー株式会社 コンタクトレンズおよびアクセサリ
KR20220125180A (ko) * 2021-03-04 2022-09-14 주하이 엑세스 세미컨덕터 컴퍼니., 리미티드 집적 인덕터의 임베디드 지지 프레임, 기판 및 그 제조 방법

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JP2011160110A (ja) * 2010-01-29 2011-08-18 Dainippon Printing Co Ltd アンテナ部品
JP2013093366A (ja) * 2011-10-24 2013-05-16 Yamaichi Electronics Co Ltd フレキシブル配線基板およびその製造方法

Patent Citations (3)

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JP2003218626A (ja) * 2002-01-17 2003-07-31 Sony Corp アンテナ回路、アンテナ回路装置及びその製造方法
JP2011160110A (ja) * 2010-01-29 2011-08-18 Dainippon Printing Co Ltd アンテナ部品
JP2013093366A (ja) * 2011-10-24 2013-05-16 Yamaichi Electronics Co Ltd フレキシブル配線基板およびその製造方法

Cited By (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP3166181A1 (fr) * 2015-11-05 2017-05-10 Gemalto Sa Procede de fabrication d'antenne radiofrequence sur un support et antenne ainsi obtenue
WO2017077010A1 (fr) * 2015-11-05 2017-05-11 Gemalto Sa Procede de fabrication d'antenne radiofrequence sur un support et antenne ainsi obtenue
US11799188B2 (en) 2015-11-05 2023-10-24 Thales Dis France Sas Method for manufacturing a radiofrequency antenna on a substrate and antenna thus obtained
WO2017179612A1 (fr) * 2016-04-13 2017-10-19 株式会社村田製作所 Module inducteur
JPWO2017179612A1 (ja) * 2016-04-13 2018-11-08 株式会社村田製作所 インダクタモジュール
JP7275036B2 (ja) 2017-10-05 2023-05-17 ソニーグループ株式会社 コンタクトレンズおよびアクセサリ
US11589817B2 (en) 2017-10-05 2023-02-28 Sony Corporation Contact lens and accessory
JPWO2019069555A1 (ja) * 2017-10-05 2020-11-05 ソニー株式会社 コンタクトレンズおよびアクセサリ
WO2020162473A1 (fr) * 2019-02-05 2020-08-13 株式会社村田製作所 Substrat multicouche en résine et procédé de production de substrat multicouche en résine
US11963294B2 (en) 2019-02-05 2024-04-16 Murata Manufacturing Co., Ltd. Multilayer resin substrate, and method of manufacturing multilayer resin substrate
KR20220125180A (ko) * 2021-03-04 2022-09-14 주하이 엑세스 세미컨덕터 컴퍼니., 리미티드 집적 인덕터의 임베디드 지지 프레임, 기판 및 그 제조 방법
JP2022136019A (ja) * 2021-03-04 2022-09-15 ズハイ アクセス セミコンダクター シーオー．，エルティーディー インダクタが集積された埋め込み支持フレーム、基板及びその製造方法
KR102601066B1 (ko) 2021-03-04 2023-11-10 주하이 엑세스 세미컨덕터 컴퍼니., 리미티드 집적 인덕터의 임베디드 지지 프레임, 기판 및 그 제조 방법
JP7378525B2 (ja) 2021-03-04 2023-11-13 ズハイ アクセス セミコンダクター シーオー．，エルティーディー インダクタが集積された埋め込み支持フレーム、基板及びその製造方法
TWI823278B (zh) * 2021-03-04 2023-11-21 大陸商珠海越亞半導體股份有限公司 集成電感的嵌埋支撐框架的製作方法

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