WO2014159752A1 - Transient suppession with lossless steady state operation - Google Patents

Transient suppession with lossless steady state operation Download PDF

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Publication number
WO2014159752A1
WO2014159752A1 PCT/US2014/024994 US2014024994W WO2014159752A1 WO 2014159752 A1 WO2014159752 A1 WO 2014159752A1 US 2014024994 W US2014024994 W US 2014024994W WO 2014159752 A1 WO2014159752 A1 WO 2014159752A1
Authority
WO
WIPO (PCT)
Prior art keywords
voltage
operational amplifier
transient
load condition
circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
PCT/US2014/024994
Other languages
English (en)
French (fr)
Inventor
Vikas Vinayak
Serge Francois Drogi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Quantance Inc
Original Assignee
Quantance Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Quantance Inc filed Critical Quantance Inc
Priority to HK16101367.5A priority Critical patent/HK1213368B/zh
Priority to KR1020157024694A priority patent/KR102259224B1/ko
Priority to EP14773369.5A priority patent/EP2973916B1/en
Priority to CN201480013247.5A priority patent/CN105075044B/zh
Priority to JP2016501710A priority patent/JP6227110B2/ja
Publication of WO2014159752A1 publication Critical patent/WO2014159752A1/en
Anticipated expiration legal-status Critical
Ceased legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F3/00Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
    • G05F3/02Regulating voltage or current
    • G05F3/08Regulating voltage or current wherein the variable is DC
    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current 
    • G05F1/46Regulating voltage or current  wherein the variable actually regulated by the final control device is DC
    • G05F1/613Regulating voltage or current  wherein the variable actually regulated by the final control device is DC using semiconductor devices in parallel with the load as final control devices
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J3/00Circuit arrangements for AC mains or AC distribution networks
    • H02J3/28Arrangements for balancing of the load in a network by storage of energy
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02JCIRCUIT ARRANGEMENTS OR SYSTEMS FOR SUPPLYING OR DISTRIBUTING ELECTRIC POWER; SYSTEMS FOR STORING ELECTRIC ENERGY
    • H02J7/00Circuit arrangements for charging or depolarising batteries or for supplying loads from batteries
    • H02J7/0068Battery or charger load switching, e.g. concurrent charging and load supply

Definitions

  • Embodiments disclosed herein relate to power supplies, and more specifically to managing transient load currents in a power supply.
  • Modern mobile devices such as laptops, smartphones and tablets typically include a re-chargeable battery to power the electronics inside.
  • the batteries are often kept as small as possible in order to make the mobile device smaller and lighter. As a consequence, these batteries have finite capacity and a finite ability to deliver current to the load.
  • a battery's ability to deliver current is quantified by the internal resistance of the battery. When the battery is not connected to any loading circuit, it will show a particular voltage across its terminals called the "open circuit voltage.” When a loading circuit is connected to the battery, current flows from the battery through the loading circuit. This increase in current causes the voltage across the terminals of the battery to droop below its open circuit voltage. Batteries with a larger internal resistance will produce a larger voltage droop for a given load current.
  • load currents may be particularly large in modern electronic devices that include multiple circuits operating from a single battery, such as for example, application processors, digital baseband processors, image processors, etc.
  • application processors digital baseband processors
  • image processors etc.
  • the battery's voltage may fall until the voltage is no longer sufficient to sustain the operation of the loading circuits, causing the entire device to reset.
  • FIG. 1 is a circuit diagram illustrating a first embodiment of a load transient suppression circuit.
  • FIG. 2 is a waveform diagram illustrating example waveforms associated with operation of a load transient suppression circuit.
  • FIG. 3 is a circuit diagram illustrating a second embodiment of a load transient suppression circuit.
  • FIG. 1 illustrates a first embodiment of a load transient suppression circuit 120 coupled in parallel with a battery 110 and an electronic device 130. Battery 110 is represented in FIG.
  • Load transient suppression circuit 120 ensures that voltage Vdd does not drop below a threshold voltage (e.g., a minimum operating voltage of electronic device 130) during transient load conditions.
  • the load transient suppression circuit 120 comprises an operational amplifier XI, capacitors C3-C4, resistor R3, and an operational amplifier input circuit 140 including capacitors C1-C2, resistors R1-R2 and voltage subtraction circuit 104.
  • Operational amplifier input circuit 140 produces differential voltage V+, V- provided to the operational amplifier XI to supply a positive differential voltage under transient conditions and a negative differential voltage under nominal conditions.
  • Voltage subtraction circuit 104 can be implemented using any conventional technique, such as, for example, a differential amplifier in a voltage subtraction configuration. During nominal load conditions, voltage V+ at the positive input node of operational amplifier XI is below voltage V- of the negative input node due to the voltage drop VI .
  • Vout 0V
  • operational amplifier XI does not deliver or consume any current other than its bias current.
  • the supply terminal of operational amplifier XI receives a supply voltage Vcc.
  • the supply voltage Vcc approaches Vdd under nominal conditions and both C4 and C3 are charged to approximately Vdd. Assuming R4 is small, Vdd is approximately Vo.
  • the current from operational amplifier XI come from the power supply voltage Vcc of operational amplifier XI .
  • C4 starts discharging.
  • Resistor R3 ensures that the current flowing from C3 boosts Vdd and does not charge C4.
  • C3 and C4 will continue to sustain the output voltage at Vdd until both capacitors are roughly Vo/2
  • C3 and C4 are selected such that the voltages across them do not reach Vo/2 until the end of the transient period. Once the transient period ends, capacitors C3 and C4 slowly charge back to approximately Vo.
  • R3 is generally larger than R4. If R3 is too small, charge pumped out by capacitor C3 may be dissipated in large portion by resistor R3. However, if R3 is large compared to R4, then most of the charge from capacitor C3 will flow to device 130. However, a larger value of R3 will increase the time it takes to recharge capacitor C4 after the transient event. Thus, the exact value of R3 may be determined based on the desired tradeoffs.
  • FIG. 2 illustrates example waveforms representing operation of load transient suppression circuit 120 of FIG. 1.
  • load current lout spikes up to 5A which causes Vdd to begin to drop.
  • the drop in Vdd causes voltage V+ to rise above voltage V-, which in turn causes Vout to begin to rise.
  • the rise in Vout stabilizes Vdd and prevents Vdd from dropping further.
  • the rising Vout increases current through capacitor C3 during the transient condition (between time ti and time t 2 in FIG. 2).
  • C3 furthermore discharges to provide current to device 130 and prevent Vdd from collapsing.
  • Vcc also drops between t] and t 2 as C4 discharges.
  • the transient period ends and output current lout drops back down to 100mA.
  • C3 and C4 begin to charge back up, thus causing Vout to drop and Vcc to increase back up to approximately 3V.
  • Vdd rises back up to approximately 3V once Vout reaches approximately 0V and capacitor C3 is fully charged at time t$.
  • FIG. 3 illustrates an alternative embodiment of a load transient suppression circuit 320.
  • resistor R3 is replaced with a switch SI (e.g., a transistor) that is controlled based on the detection of a transient event, but otherwise the embodiment of FIG. 3 is similar to that of FIG. 2.
  • SI e.g., a transistor
  • a sense circuit 322 senses a transient event by monitoring voltage Vdd or current lout. For example, sense circuit 322 detects a transient condition when Vdd drops below a threshold voltage or when a magnitude of a rate of change of Vdd exceeds below a threshold rate. Alternatively, sense circuit 322 may detect the transient condition when lout rises about a threshold current or when a magnitude of a rate of change of lout rises above a threshold rate. In response to detecting the transient condition, sense circuit 322 turns switch SI off, thus causing the Vcc node of operational amplifier XI to draw current from capacitor C4. When sense circuit senses 322 that the transient condition ends, switch SI is turned back on. Switch SI remains on during nominal conditions, thus allowing capacitor C4 to charge back up to approximately Vdd.

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • General Physics & Mathematics (AREA)
  • Radar, Positioning & Navigation (AREA)
  • Automation & Control Theory (AREA)
  • Charge And Discharge Circuits For Batteries Or The Like (AREA)
  • Continuous-Control Power Sources That Use Transistors (AREA)
  • Control Of Voltage And Current In General (AREA)
  • Amplifiers (AREA)
PCT/US2014/024994 2013-03-13 2014-03-12 Transient suppession with lossless steady state operation Ceased WO2014159752A1 (en)

Priority Applications (5)

Application Number Priority Date Filing Date Title
HK16101367.5A HK1213368B (zh) 2013-03-13 2014-03-12 利用無損穩態操作的瞬變抑制
KR1020157024694A KR102259224B1 (ko) 2013-03-13 2014-03-12 무손실 정상 상태 동작을 이용하는 과도 억제
EP14773369.5A EP2973916B1 (en) 2013-03-13 2014-03-12 Transient suppession with lossless steady state operation
CN201480013247.5A CN105075044B (zh) 2013-03-13 2014-03-12 利用无损稳态操作的瞬变抑制
JP2016501710A JP6227110B2 (ja) 2013-03-13 2014-03-12 ロスレス定常状態の動作を有する過渡抑制

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US201361780192P 2013-03-13 2013-03-13
US61/780,192 2013-03-13

Publications (1)

Publication Number Publication Date
WO2014159752A1 true WO2014159752A1 (en) 2014-10-02

Family

ID=51524725

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/US2014/024994 Ceased WO2014159752A1 (en) 2013-03-13 2014-03-12 Transient suppession with lossless steady state operation

Country Status (6)

Country Link
US (2) US9535441B2 (enExample)
EP (1) EP2973916B1 (enExample)
JP (2) JP6227110B2 (enExample)
KR (1) KR102259224B1 (enExample)
CN (1) CN105075044B (enExample)
WO (1) WO2014159752A1 (enExample)

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6227110B2 (ja) 2013-03-13 2017-11-08 クアンタンス, インコーポレイテッド ロスレス定常状態の動作を有する過渡抑制
JP6869966B2 (ja) * 2016-04-27 2021-05-12 三洋電機株式会社 管理装置および電源システム
US10250058B2 (en) * 2016-09-15 2019-04-02 Raytheon Company Charge management system
CN107993332A (zh) * 2017-12-07 2018-05-04 威海华菱光电股份有限公司 磁图像传感器
JP2021151023A (ja) * 2020-03-17 2021-09-27 Fdk株式会社 電池パック、充電システム、及び電池パックを充電する方法
US11855554B2 (en) 2021-09-09 2023-12-26 Stmicroelectronics S.R.L. Method of driving an electrical load and corresponding driver circuit

Citations (6)

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Publication number Priority date Publication date Assignee Title
US5166630A (en) * 1989-05-24 1992-11-24 Motorola, Inc. Low current switched capacitor circuit
US5822166A (en) * 1996-12-05 1998-10-13 Intel Corporation DC power bus voltage transient suppression circuit
EP0892332A1 (en) 1997-07-14 1999-01-20 STMicroelectronics S.r.l. Low power consumption linear voltage regulator having a fast response with respect to the load transients
US5963439A (en) * 1996-10-22 1999-10-05 Sgs-Thomson Microelectronics S.A. Device for limiting transient variations of a supply voltage
US6522111B2 (en) 2001-01-26 2003-02-18 Linfinity Microelectronics Linear voltage regulator using adaptive biasing
US20050242786A1 (en) * 2001-12-28 2005-11-03 Hewlett-Packard Development Company, L.P. Technique for conveying overload conditions from an AC adapter to a load powered by the adapter

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US7064613B2 (en) * 2002-03-25 2006-06-20 Lucent Technologies Inc. Amplifier bias system and method
JP3960327B2 (ja) * 2004-09-08 2007-08-15 コニカミノルタビジネステクノロジーズ株式会社 画像処理装置
US7710079B2 (en) * 2005-07-19 2010-05-04 Linear Technology Corporation Power manager and power managing method for battery-powered application
KR101121090B1 (ko) * 2007-09-04 2012-03-16 가부시키가이샤 어드밴티스트 전원 안정화 회로, 전자 디바이스 및 시험 장치
US7714553B2 (en) 2008-02-21 2010-05-11 Mediatek Inc. Voltage regulator having fast response to abrupt load transients
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JP6227110B2 (ja) 2013-03-13 2017-11-08 クアンタンス, インコーポレイテッド ロスレス定常状態の動作を有する過渡抑制
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US5166630A (en) * 1989-05-24 1992-11-24 Motorola, Inc. Low current switched capacitor circuit
US5963439A (en) * 1996-10-22 1999-10-05 Sgs-Thomson Microelectronics S.A. Device for limiting transient variations of a supply voltage
US5822166A (en) * 1996-12-05 1998-10-13 Intel Corporation DC power bus voltage transient suppression circuit
EP0892332A1 (en) 1997-07-14 1999-01-20 STMicroelectronics S.r.l. Low power consumption linear voltage regulator having a fast response with respect to the load transients
US6522111B2 (en) 2001-01-26 2003-02-18 Linfinity Microelectronics Linear voltage regulator using adaptive biasing
US20050242786A1 (en) * 2001-12-28 2005-11-03 Hewlett-Packard Development Company, L.P. Technique for conveying overload conditions from an AC adapter to a load powered by the adapter

Also Published As

Publication number Publication date
US20140266128A1 (en) 2014-09-18
KR20150128704A (ko) 2015-11-18
EP2973916A4 (en) 2016-04-06
HK1213368A1 (zh) 2016-06-30
US20170075376A1 (en) 2017-03-16
JP2017228309A (ja) 2017-12-28
JP6227110B2 (ja) 2017-11-08
CN105075044A (zh) 2015-11-18
EP2973916B1 (en) 2019-11-06
KR102259224B1 (ko) 2021-05-31
JP2016518649A (ja) 2016-06-23
US9535441B2 (en) 2017-01-03
JP6495983B2 (ja) 2019-04-03
US10466730B2 (en) 2019-11-05
EP2973916A1 (en) 2016-01-20
CN105075044B (zh) 2018-10-16

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