WO2014146469A1 - 一种封装基板及其制作方法和基板组件 - Google Patents

一种封装基板及其制作方法和基板组件 Download PDF

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Publication number
WO2014146469A1
WO2014146469A1 PCT/CN2013/090741 CN2013090741W WO2014146469A1 WO 2014146469 A1 WO2014146469 A1 WO 2014146469A1 CN 2013090741 W CN2013090741 W CN 2013090741W WO 2014146469 A1 WO2014146469 A1 WO 2014146469A1
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WO
WIPO (PCT)
Prior art keywords
substrate unit
package substrate
copper foil
foil layer
central area
Prior art date
Application number
PCT/CN2013/090741
Other languages
English (en)
French (fr)
Inventor
徐艺林
高成志
郑仰存
谷新
黄良松
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深南电路有限公司
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Application filed by 深南电路有限公司 filed Critical 深南电路有限公司
Publication of WO2014146469A1 publication Critical patent/WO2014146469A1/zh

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/18—Printed circuits structurally associated with non-printed electric components
    • H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0213—Electrical arrangements not otherwise provided for
    • H05K1/0216—Reduction of cross-talk, noise or electromagnetic interference
    • H05K1/0218—Reduction of cross-talk, noise or electromagnetic interference by printed shielding conductors, ground planes or power plane
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09—Shape and layout
    • H05K2201/09818—Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09981—Metallised walls
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/0011—Working of insulating substrates or insulating layers
    • H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
    • H05K3/0047—Drilling of holes

Definitions

  • the present invention relates to the field of circuit board processing technologies, and in particular, to a package substrate, a method for fabricating the same, and a substrate assembly.
  • the conventional buried circuit board is usually formed by slotting a circuit board, embedding an electronic component such as a chip or the like in the opened slot, and fixing it.
  • the electronic components buried in this type of circuit board are subject to external electromagnetic interference and cannot work optimally.
  • a shield is added to the circuit board to avoid electromagnetic interference.
  • the shield increases the thickness of the board and reduces the versatility of the product, which is not conducive to miniaturization, and the shield is not reliable enough, and there is a risk of failure such as displacement or shedding. Summary of the invention
  • Embodiments of the present invention provide a package substrate, a manufacturing method thereof, and a substrate assembly, which solve the defects caused by electromagnetic shielding of a circuit board by using a shield cover in the prior art.
  • a first aspect of the present invention provides a method of fabricating a package substrate, including: processing a hollow long groove on a periphery of each package substrate unit on the substrate; metallizing a sidewall of the hollow long groove; and the package substrate unit
  • the copper foil layer of the central region is etched away; a hollow square groove for securing the electronic component is processed in the central region where the copper foil layer is etched away.
  • a second aspect of the present invention provides a package substrate, wherein a central portion of the package substrate unit is provided with a hollow square slot for fixing the electronic component and insulating the electronic component from the package substrate unit, and the periphery of the package substrate unit A metallization layer for electromagnetically shielding the electronic component is processed on the sidewall.
  • a second aspect of the present invention provides a substrate assembly, comprising: a package substrate unit as described above, an electronic component embedded in a hollow square groove formed by the package substrate unit, and respectively pressed on both sides of the package substrate unit
  • the upper and lower substrates are electrically connected to the circuit pattern on the upper substrate or the lower substrate.
  • the embodiment of the invention adopts a technical solution of metallizing the sidewall of the periphery of the package substrate unit, embedding the electronic component in the central region of the package substrate, and utilizing the copper foil layer on the surface of the package substrate unit and the peripheral metallized sidewall as the metal shield layer.
  • the single tube reliably realizes electromagnetic shielding of electronic components without additional shielding, does not increase the thickness of the packaging substrate, does not reduce the versatility of the product, and has a reliable structure, reduces the risk of failure, and at the same time, the manufacturing cost is also more low.
  • FIG. 1 is a flow chart of a method for fabricating a package substrate according to an embodiment of the present invention
  • FIG. 2 is a schematic diagram of a package substrate unit planned on the board
  • FIG. 3 is a schematic view of a package substrate unit in which a hollowed slot is processed
  • FIG. 4 is a schematic view of a package substrate unit having processed through holes
  • FIG. 5 is a schematic view of a package substrate unit in which a hollowed slot and a through hole have been processed
  • FIG. 6 is a cross-sectional view of a packaged substrate unit after metallization
  • Figure 7 is a cross-sectional view of a package substrate unit in which a dry film is provided
  • Figure 8 is a cross-sectional view of a package substrate unit that has been etched
  • Figure 9 is a cross-sectional view of a package substrate unit in which a hollow square groove has been machined
  • Figure 10 is a schematic view of a separate package substrate unit
  • FIG. 11 is a schematic view of a substrate assembly including a package substrate unit.
  • Embodiment 1 provides a method for fabricating a package substrate, which can solve the defects of the existing electromagnetic shielding technology for the circuit board.
  • Embodiments of the present invention also provide corresponding package substrates. The details are described below separately.
  • an embodiment of the present invention provides a method for fabricating a package substrate, including:
  • the processing of the package substrate unit begins with a larger substrate, such as a double-sided copper clad laminate.
  • a plurality of regularly arranged package substrate units are planned on the larger substrate.
  • the plurality of package substrate units are arranged in an array, horizontally and vertically.
  • Figure 2 shows a package substrate unit 202 on a substrate 201, the dashed box in the figure is the package The boundary of the substrate unit 202.
  • the hollow long groove 203 may be separately processed along the dotted line frame at the periphery of the package substrate unit 202, and specifically, four hollow long grooves 203 respectively located around the periphery may be processed.
  • a hollow slot 203 processed between each two adjacent package units 202 is shared by the two package substrate units 202, and the two sidewalls of the hollow slot 102 become two package substrate units. Side wall of 202.
  • the hollow long groove 203 can be processed by a common milling cutter.
  • each package substrate unit 202 is separated on four edges, but connected at each vertex, and can still be processed as a whole. To improve processing efficiency.
  • a plurality of package substrate units are planned on the substrate, and the respective units are adjacent to each other, and the layout method of dividing the hollow long grooves can improve the utilization rate of the substrate and reduce the production cost.
  • the method before the step, further includes the following steps: processing the through hole 204 in the top corner portion of each of the package substrate units 202.
  • the through holes 204 are respectively processed at the four corner portions. , As shown in Figure 4.
  • These processed vias 204 can be used later as vias, alignment holes or tool holes between the layers.
  • the method of machining the through holes 204 may be a mechanical drilling process.
  • the through hole 204 is processed first, and the hollow long groove 203 is processed.
  • the semi-finished product after the two steps are processed is as shown in FIG.
  • the sidewall of the hollow long groove is metallized by a metallization process. If a through hole is machined between, the through hole is also metallized at the same time.
  • a cross-sectional view of a metallized package substrate unit is shown in Fig. 6, and it can be seen that a metallization layer 205 is attached to the sidewall of the hollow long trench 203. The metallized sidewalls will then serve as a shield to provide metal shielding for the electronic components embedded within the package substrate unit.
  • the metal layer formed during the metallization of the sidewall is electroplated with the copper foil layer on the surface of the substrate, and the reliability is very good, and no detachment or displacement occurs during use.
  • a pattern transfer process is used to open a window in the central portion of the package substrate unit, i.e., the copper foil layer in the central region is etched away.
  • the process of etching the copper foil layer includes:
  • a dry film 206 is disposed on the package substrate unit 202 except for the central portion, so that the dry film 206 covers the hollow long groove 203;
  • the process etches away the copper foil layer 207 of the central region. After the etching is completed, the dry film is removed, and as shown in Fig. 8, the insulating core layer 208 in the central region has been exposed.
  • the method further includes: plating the package substrate unit 202 on the copper foil layer 207 on the periphery of the central region and the sidewall of the hollow trench 203.
  • a layer of nickel gold or nickel palladium is plated to provide good solderability.
  • the hollow square groove 209 can be processed in the central region by mechanical milling or laser cutting.
  • the hollow square groove 206 penetrates the substrate up and down, and the side wall is made of an insulating material, which can be used for subsequent embedding of electronic components.
  • the hollowing may be performed according to the size of the central region, that is, slightly smaller than the size of the window opening region on the copper foil layer.
  • the square groove 209 has a certain size range of the edge of the hollow square groove 209, for example, no copper foil layer in the range of 0.5 mm, thereby achieving good insulation performance between the chip and the package substrate unit.
  • the following steps may be further included: cutting along the center line of the hollow slot 203 to cut the substrate 201 into a plurality of independent package substrate units 202.
  • the individual package substrate unit 202 after cutting is as shown in FIG.
  • the electronic component can be fixed in the hollow square groove. Since the electronic component and the metallized sidewall are separated by the insulating substrate, the insulation performance is very reliable, and the electronic component and the hollow square groove can be ensured.
  • the copper foil layer is completely insulated from the side walls of the hollowed trough.
  • the upper and lower surfaces of the package substrate unit 202 in which the electronic component 301 is embedded may be respectively pressed onto the upper and lower substrates 302, and the upper and lower substrates 302 are respectively processed with circuit patterns, and the electronic components are respectively processed.
  • the 301 can be electrically connected to the circuit pattern on the upper or lower substrate to constitute a practically applicable substrate assembly.
  • the embodiments of the present invention provide a method for fabricating a package substrate by metallizing a sidewall of a package substrate unit, embedding an electronic component in a central region of the package substrate, and utilizing a copper foil layer and a periphery of the surface of the package substrate unit.
  • the metalized sidewall acts as a technical solution for the metal shielding layer, and the single tube reliably realizes electromagnetic shielding of the electronic component without additionally adding a shielding cover, which does not increase the thickness of the packaging substrate, and does not reduce the versatility of the product, and the structure Reliable, reducing the risk of failure.
  • the present invention only needs to use common equipment such as image transfer equipment and electroplating equipment, and does not need to add special equipment, and has good versatility.
  • Embodiment 2 Embodiment 2
  • an embodiment of the present invention provides a package substrate unit 202.
  • the central portion of the package substrate unit 202 is provided with a hollow square slot 209 for fixing electronic components, and the sidewalls of the package substrate unit 202 are processed on the sidewall.
  • the four corner portions of the package substrate unit 202 may be respectively processed with metalized vias 204.
  • the copper foil layer on the sealing substrate unit 202 and the peripheral side walls may be plated with a layer of nickel gold or nickel palladium gold.
  • an embodiment of the present invention further provides a substrate assembly, comprising: the package substrate unit 202 as described above, embedding the electronic component 301 in the hollow square slot of the package substrate unit 202, and respectively pressing
  • the electronic component 301 is electrically connected to the upper and lower substrates 302 on both sides of the package substrate unit 202, and the circuit pattern on the upper substrate or the lower substrate.
  • the embodiment of the present invention provides a package substrate unit.
  • the sidewall of the package substrate unit is metallized, and the electronic component embedded in the central region of the package substrate can be electromagnetically shielded.
  • Increasing the thickness of the package substrate does not reduce the versatility of the product and has a low risk of failure.
  • the package substrate unit of the embodiment of the present invention only needs to use common equipment such as image transfer equipment and electroplating equipment during processing, and does not need to add special equipment, and has good versatility.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Electromagnetism (AREA)
  • Shielding Devices Or Components To Electric Or Magnetic Fields (AREA)

Abstract

一种封装基板的制作方法，包括：在基板上的每个封装基板单元的周边分别加工镂空长槽；将所述镂空长槽的侧壁金属化；将所述封装基板单元的中央区域的铜箔层蚀刻掉；在蚀刻掉铜箔层的所述中央区域加工用于固定电子元件的镂空方槽。本发明实施例还提供相应的封装基板单元和基板组件。本发明技术方案采用将封装基板单元周边的侧壁金属化作为金属屏蔽层的技术方案，简单可靠的实现了对电子元件进行电磁屏蔽，而不必另外增加屏蔽罩，不会增加封装基板厚度，不会降低产品的通用性，且结构可靠，降低了失效风险，同时成本低廉。

Description

一种封装基板及其制作方法和基板组件
本申请要求于 2013 年 3 月 20 日提交中国专利局、 申请号为 201310090177.0、 发明名称为 "一种封装基板及其制作方法和基板组件" 的中 国专利申请的优先权， 其全部内容通过引用结合在本申请中。
技术领域
本发明涉及电路板加工技术领域，具体涉及一种封装基板及其制作方法和 基板组件。
背景技术
现有的埋入式电路板通常采用在电路板上开槽，将电子元件例如芯片等嵌 入所开的槽中并固定等方法制成。该种电路板中埋入的电子元件会受到外界电 磁干扰， 不能工作在最佳状态。现有技术中一般采用在电路板上增加一个屏蔽 罩的方式来避免电磁干扰。 但是， 屏蔽罩会增加电路板的厚度， 降低产品的通 用性， 不利于向小型化发展， 且屏蔽罩不够可靠， 有移位或脱落等失效风险。 发明内容
本发明实施例提供一种封装基板及其制作方法和基板组件，以解决现有技 术中采用屏蔽罩对电路板进行电磁屏蔽带来的缺陷。
本发明第一方面提供一种封装基板的制作方法， 包括： 在基板上的每个封 装基板单元的周边加工镂空长槽； 将所述镂空长槽的侧壁金属化； 将所述封装 基板单元的中央区域的铜箔层蚀刻掉；在蚀刻掉铜箔层的所述中央区域加工用 于固定电子元件的镂空方槽。
本发明第二方面提供一种封装基板，所述封装基板单元的中央区域开设有 用于固定电子元件， 并使所述电子元件与所述封装基板单元绝缘的镂空方槽， 所述封装基板单元周边的侧壁上加工有用于对所述电子元件进行电磁屏蔽的 金属化层。
本发明第二方面提供一种基板组件， 包括： 如上文所述的封装基板单元， 埋入所述封装基板单元开设的镂空方槽中的电子元件，以及分別压合在所述封 装基板单元两面的上、 下基板， 所述电子元件与所述上基板或下基板上的电路 图形电连接。 本发明实施例采用将封装基板单元周边的侧壁金属化，在封装基板的中央 区域埋入电子元件，利用封装基板单元表面的铜箔层和周边金属化的侧壁作为 金属屏蔽层的技术方案， 筒单可靠的实现了对电子元件进行电磁屏蔽， 而不必 另外增加屏蔽罩， 不会增加封装基板厚度， 不会降低产品的通用性， 且结构可 靠， 降低了失效风险， 同时制作成本也更低廉。
附图说明
图 1是本发明实施例提供的封装基板的制作方法的流程图；
图 2^ ^板上规划的封装基板单元的示意图；
图 3是已加工镂空长槽的封装基板单元的示意图；
图 4是已加工通孔的封装基板单元的示意图；
图 5是已加工镂空长槽和通孔的封装基板单元的示意图；
图 6是金属化后的封装基板单元的截面图；
图 7是设置了干膜的封装基板单元的截面图；
图 8是已经过蚀刻的封装基板单元的截面图；
图 9是已加工镂空方槽的封装基板单元的截面图；
图 10是独立的封装基板单元的示意图；
图 11是包括封装基板单元的基板组件的示意图。
具体实施方式
本发明实施例提供本发明实施例提供一种封装基板的制作方法，可以解决 现有的对电路板电磁屏蔽技术的缺陷。 本发明实施例还提供相应的封装基板。 以下分別进行详细说明。 实施例一、
请参考图 1 , 本发明实施例提供一种封装基板的制作方法， 包括：
101、 在基板上的每个封装基板单元的周边加工镂空长槽。
本实施例中，对封装基板单元的加工从一张较大的基板， 例如双面覆铜板 开始。该较大的基板上规划出若干个规则排列的封装基板单元。所述的若干个 封装基板单元呈阵列式排列， 横成行， 竖成列。
图 2示出了基板 201上的一个封装基板单元 202, 图中的虚线方框为该封装 基板单元 202的边界。 本步骤中， 如图 3所示， 可以在封装基板单元 202的周边 沿着所述虚线方框分別加工镂空长槽 203 , 具体可以为加工四个分別位于四周 的镂空长槽 203。 实际应用中，每两个相邻的封装单元 202之间加工的一条镂空 长槽 203 , 被该两个封装基板单元 202共用， 该镂空长槽 102的两个侧壁分別成 为两个封装基板单元 202的侧壁。 实际应用中， 可以采用普通铣刀加工镂空长 槽 203 , 加工完毕后， 各个封装基板单元 202在四个边缘上被区分开， 但在各个 顶角处连接， 仍然可以作为一个整体进行后续加工， 以提高加工效率。 该种在 基板上规划多个封装基板单元， 各个单元紧邻， 以镂空长槽分割的布局方法， 可以提高基板的板材利用率， 降低生产成本。
一种实施方式中， 在本步骤之前， 还可以包括如下步骤： 在每个封装基板 单元 202的顶角部位加工通孔 204,本实施例中在四个顶角部位都分別加工有通 孔 204, 如图 4所示。 这些加工的通孔 204可以在后续作为层间的导通孔、 对位 孔或工具孔使用。 加工通孔 204的方法可以是机械钻工艺。 本实施方式中， 先 加工完通孔 204,再加工镂空长槽 203 , 这两个步骤加工完毕之后的半成品如图 5所示。
102、 将所述镂空长槽的侧壁金属化。
本步骤中采用金属化工艺将所述镂空长槽的侧壁金属化。如果之间加工了 通孔， 则同时将通孔也金属化。 金属化后的一个封装基板单元的截面图如 6所 示， 可以看出， 镂空长槽 203的侧壁上附着了一金属化层 205。 该被金属化的侧 壁后续将作为屏蔽层， 为封装基板单元内埋入的电子元件提供金属屏蔽作用。 本步骤中，侧壁金属化时形成的金属层与基板表面的铜箔层电镀相连， 可靠性 非常好， 使用过程中完全不会发生脱离或者移位现象。
103、 将所述封装基板单元的中央区域的铜箔层蚀刻掉。
本步骤中采用图形转移工艺在所述封装基板单元的中央区域开窗， 即，将 中央区域的铜箔层蚀刻掉。以便于后续在中央区域加工用于埋入电子元件的镂 空方槽。 蚀刻铜箔层的工艺包括：
如图 7所示，在所述封装基板单元 202上除所述中央区域以外的其它部分设 置一层干膜 206, 使所述干膜 206覆盖所述镂空长槽 203; 然后， 采用化学腐蚀 工艺将所述中央区域的铜箔层 207蚀刻掉。蚀刻完毕后，去除干膜，如图 8所示， 中央区域的绝缘芯板层 208已暴露出来。
一种实施方式中， 步骤 103之后， 还可以包括： 对所述封装基板单元 202 镀金，使所述中央区域周边未被蚀刻掉的铜箔层 207上和所述镂空长槽 203的侧 壁上镀一层镍金或镍钯金， 以便提供良好的可焊性。
104、 在蚀刻掉铜箔层的所述中央区域加工镂空方槽。
如图 9所示， 中央区域的铜箔层 207被蚀刻掉后， 可以采用机械铣或者激光 切割等工艺在中央区域加工镂空方槽 209。 该镂空方槽 206上下贯穿基板， 其侧 壁为绝缘材料， 可用于后续嵌入电子元件。 实际应用中， 为了避免后续嵌入的 电子元件接触中央区域周围的铜箔层 207造成短路， 可以按照略小于所述中央 区域的尺寸， 也就是略小于铜箔层上开窗区域的尺寸， 加工镂空方槽 209, 使 所述镂空方槽 209边缘一定尺寸范围， 例如 0.5mm范围内没有铜箔层， 从而实 现芯片与封装基板单元之间的良好绝缘性能。
本步骤之后， 还可以包括以下步骤： 沿所述镂空长槽 203的中心线进行切 割，将所述基板 201切割成为多个独立的封装基板单元 202。切割后独立的封装 基板单元 202, 如图 10所示。
后续， 可以将电子元件固定在所述镂空方槽中， 由于电子元件与金属化侧 壁之间是由绝缘基材隔离， 绝缘性能非常可靠， 可以保证所述电子元件与所述 镂空方槽周围的铜箔层和所述镂空长槽的侧壁完全绝缘。
如图 11所示， 实际应用中， 埋入了电子元件 301的封装基板单元 202的上下 两面可以分別压合上、 下基板 302, 上、 下基板 302上分別加工有电路图形， 所 述电子元件 301可以和所述上基板或下基板上的电路图形电连接， 从而构成可 实际应用的基板组件。
以上， 本发明实施例提供了一种封装基板的制作方法， 采用将封装基板单 元周边的侧壁金属化，在封装基板的中央区域埋入电子元件， 利用封装基板单 元表面的铜箔层和周边金属化的侧壁作为金属屏蔽层的技术方案，筒单可靠的 实现了对电子元件进行电磁屏蔽， 而不必另外增加屏蔽罩， 不会增加封装基板 厚度， 不会降低产品的通用性， 且结构可靠， 降低了失效风险。 另外， 本发明 实施例方法只需要采用图像转移设备、 电镀设备等常用设备即可， 无需新增特 殊的设备， 通用性好。 实施例二、
请参考图 10, 本发明实施例提供一种封装基板单元 202, 所述封装基板单 元 202的中央区域开设有用于固定电子元件的镂空方槽 209,所述封装基板单元 202周边的侧壁上加工有用于对所述电子元件进行电磁屏蔽的金属化层 205。
其它实施方式中， 所述封装基板单元 202的四个顶角部分可以分別加工有 金属化通孔 204。所述封转基板单元 202上的铜箔层和周边的侧壁上可以镀有一 层镍金或镍钯金。
请参考图 11 , 本发明实施例还提供一种基板组件， 包括： 如上文所述的封 装基板单元 202,埋入所述封装基板单元 202开设的镂空方槽中的电子元件 301 , 以及分別压合在所述封装基板单元 202两面的上、下基板 302,所述电子元件 301 与所述上基板或下基板上的电路图形电连接。
以上， 本发明实施例提供了一种封装基板单元， 该封装基板单元周边的侧 壁被金属化， 可以对封装基板中央区域埋入的电子元件进行电磁屏蔽， 该产品 结构筒单可靠，不会增加封装基板厚度，不会降低产品的通用性，失效风险低。 另夕卜， 本发明实施例的封装基板单元在加工时只需要采用图像转移设备、 电镀 设备等常用设备即可， 无需新增特殊的设备， 通用性好。
以上对本发明实施例所提供的封装基板及其制作方法进行了详细介绍，但 以上实施例的说明只是用于帮助理解本发明的方法及其核心思想，不应理解为 对本发明的限制。本技术领域的技术人员在本发明揭露的技术范围内， 可轻易 想到的变化或替换， 都应涵盖在本发明的保护范围之内。

Claims

o WO 2014/146469 PCT/CN2013/090741 -6- 权 利 要 求
1、 一种封装基板的制作方法， 其特征在于， 包括：
在基板上的每个封装基板单元的周边加工镂空长槽；
将所述镂空长槽的侧壁金属化；
将所述封装基板单元的中央区域的铜箔层蚀刻掉；
在蚀刻掉铜箔层的所述中央区域加工用于固定电子元件的镂空方槽。
2、根据权利要求 1所述的方法， 其特征在于， 所述的在基板上的每个封装 基板单元的周边加工镂空长槽之前还包括：
在每个封装基板单元的顶角部位加工通孔。
3、根据权利要求 1所述的方法， 其特征在于， 所述的将所述封装基板单元 的中央区域的铜箔层蚀刻掉包括：
在所述封装基板单元上除所述中央区域以外的其它部分设置一层干膜，使 所述干膜覆盖所述镂空长槽；
采用化学腐蚀工艺将所述中央区域的铜箔层蚀刻掉。
4、根据权利要求 1所述的方法， 其特征在于， 所述的将所述封装基板单元 的中央区域的铜箔层蚀刻掉之后， 还包括：
对所述封装基板单元镀金，使所述中央区域周边未被蚀刻掉的铜箔层上和 所述镂空长槽的侧壁上镀一层镍金或镍钯金。
5、根据权利要求 1所述的方法， 其特征在于， 所述的在蚀刻掉铜箔层的所 述中央区域加工用于固定电子元件的镂空方槽包括：
按照略小于所述中央区域的尺寸加工镂空方槽，使所述镂空方槽边缘一定 尺寸范围内没有铜箔层。
6、根据权利要求 1所述的方法， 其特征在于， 所述的在蚀刻掉铜箔层的所 述中央区域加工用于固定电子元件的镂空方槽之后还包括：
沿所述镂空长槽的中心线， 将所述基板切割成为多个独立的封装基板单 元。
7、 一种封装基板单元， 其特征在于： 所述封装基板单元的中央区域开设 有用于固定电子元件， 并使所述电子元件与所述封装基板单元绝缘的镂空方 槽，所述封装基板单元周边的侧壁上加工有用于对所述电子元件进行电磁屏蔽 的金属化层。
8、 根据权利要求 7所述的封装基板， 其特征在于：
所述封装基板单元的四个顶角部分分別加工有金属化通孔。
9、 根据权利要求 7所述的封装基板， 其特征在于：
所述封转基板单元上的铜箔层和周边的侧壁上镀有一层镍金或镍钯金。
10、 一种基板组件， 其特征在于， 包括： 如权利要求 7、 8或 9所述的封 装基板单元，埋入所述封装基板单元开设的镂空方槽中的电子元件， 以及分別 压合在所述封装基板单元两面的上、 下基板， 所述电子元件与所述上基板或下 基板上的电路图形电连接。
PCT/CN2013/090741 2013-03-20 2013-12-27 一种封装基板及其制作方法和基板组件 WO2014146469A1 (zh)

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