WO2014127590A1 - 显示装置 - Google Patents

显示装置 Download PDF

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Publication number
WO2014127590A1
WO2014127590A1 PCT/CN2013/076317 CN2013076317W WO2014127590A1 WO 2014127590 A1 WO2014127590 A1 WO 2014127590A1 CN 2013076317 W CN2013076317 W CN 2013076317W WO 2014127590 A1 WO2014127590 A1 WO 2014127590A1
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WO
WIPO (PCT)
Prior art keywords
data line
width
strip
electrode
display device
Prior art date
Application number
PCT/CN2013/076317
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English (en)
French (fr)
Inventor
王丽娜
童冉
钮曼萍
Original Assignee
合肥京东方光电科技有限公司
京东方科技集团股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
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Publication date
Application filed by 合肥京东方光电科技有限公司, 京东方科技集团股份有限公司 filed Critical 合肥京东方光电科技有限公司
Priority to US14/350,645 priority Critical patent/US9312286B2/en
Publication of WO2014127590A1 publication Critical patent/WO2014127590A1/zh

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits
    • H01L27/1244Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits for preventing breakage, peeling or short circuiting
    • GPHYSICS
    • G02OPTICS
    • G02FOPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333Constructional arrangements; Manufacturing methods
    • G02F1/1345Conductors connecting electrodes to cell terminals
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1214Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
    • H01L27/124Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits

Definitions

  • the present disclosure relates to the field of display technologies, and in particular, to a display device. Background technique
  • a common electrode mask Indium Tin Oxide Mask
  • ITO Mask ITO 2 is uniformly plated on the entire CF panel, and ITO is used as a common electrode.
  • ITO 2 covers the entire CF substrate. In this design, it is not possible to repair the defect caused by the disconnection of the data line 1 (Data Line) occurring in the peripheral circuit region on the array substrate and the short circuit of the data line 1 on the array substrate and the ITO 2 on the CF substrate.
  • the present disclosure provides a display device including an array substrate and a color filter substrate, the array substrate includes data lines in a peripheral circuit region, and the color filter substrate includes a common electrode, wherein The portion of the color film substrate corresponding to the common electrode region corresponding to the peripheral circuit region of the array substrate includes: a plurality of strip electrodes separated from each other and extending along the length direction of the data line, and The data lines overlap, and two of the plurality of strip electrodes overlapping each of the data lines are connected by a bypass electrode that does not substantially overlap the data line.
  • the pattern of each strip electrode of the plurality of strip electrodes is the same as the data line pattern overlapping therewith.
  • the width of the pattern of each strip electrode is greater than the width of the data line pattern overlapping therewith, and the pattern of each strip electrode and the data edge pattern of the data strip pattern overlapped with each other The projection of the center line in the longitudinal direction of the line on the color filter substrate completely coincides.
  • the width of the pattern of each strip electrode is 5/4 to 7/5 times the width of the data line overlapping the same, and the length of the strip electrode is the width of the data line. 18 ⁇ 25 times.
  • the width of the pattern of each strip electrode is 4/3 times the width of the data line with which it overlaps. In one example, for each data line, the spacing between two adjacent strip electrodes among the plurality of strip electrodes overlapping therewith is 2 to 3 times the width of the data line.
  • the width of the bypass electrode is 1/8 to 1/5 of the width of the data line, and the maximum distance between the bypass electrode and the data line is 1/5 of the width of the data line. ⁇ 1/3.
  • the width of the bypass electrode is 1/6 of the width of the data line, and the maximum distance between the bypass electrode and the data line is 1/4 of the width of the data line.
  • a plurality of strip electrodes corresponding to respective overlapping segments of the respective data lines are aligned at both ends in the width direction of the data line.
  • the color filter substrate further includes a plurality of connection electrodes connecting two strip electrodes corresponding to the adjacent two data lines and aligned at both ends in the width direction of the data line.
  • connection electrodes are strip-shaped and have a width of 1 to 2 times the data line.
  • the strip electrode, the bypass electrode, and the connection electrode are formed of a transparent conductive material.
  • the data line of the peripheral circuit region of the array substrate is provided with a first marker post whose position corresponds to the spacing of the strip electrodes corresponding to the data line.
  • a second marker post is also disposed between adjacent two first marker posts, the location of which corresponds to the connection electrode.
  • the first marker post and the second marker post have a width of 1/6 to 1/4 of the data line width and a length of 1/8 to 1/5 of the data line width.
  • the common electrode on the peripheral circuit region of the corresponding array substrate on the color filter substrate is designed as an independent strip electrode overlapping the data line, and the strip electrodes corresponding to the same data line pass through the side not overlapping the data line.
  • the road electrode is connected.
  • 1 is a peripheral circuit of a prior art color film substrate and an array substrate after an array on a substrate a data line of the area and a pattern of the common electrode on the color filter substrate;
  • FIG. 2 is a diagram showing a data line of a color film substrate and an array substrate of a first embodiment of the present disclosure on a data line of a peripheral circuit region of the array substrate and a common electrode on the color filter substrate;
  • FIG. 3 is a repairing principle diagram of a data line disconnection or a short circuit between a data line and a strip-shaped common electrode in a peripheral circuit region of the array substrate repaired by the strip-shaped common electrode of the color filter substrate of the first embodiment of the present disclosure;
  • Figure 4 is a partial enlarged view of A in Figure 2;
  • FIG. 5 is a diagram showing a data line of a color film substrate and an array substrate of a second embodiment of the present disclosure on a data line of a peripheral circuit region of the array substrate and a common electrode on the color filter substrate.
  • the repair can be performed when the data line of the peripheral circuit area is broken or the data line is short-circuited with the common electrode.
  • the color filter substrate and the corresponding array substrate (the color film substrate and the array substrate are formed into a liquid crystal cell) That is, the array substrate is designed to be similar to the common electrode of the portion corresponding to the data line in the circuit board region of the array substrate of the color filter substrate, and may be designed as an independent strip.
  • the electrode pattern that is, the portion of the common electrode corresponding to the pixel electrode region of the corresponding array substrate may remain in a block shape, and the portion of the common electrode corresponding to the peripheral circuit region of the corresponding array substrate and the data line pattern with the peripheral circuit region Similar and independent Several segments of the strip electrode pattern.
  • the common electrode portion corresponding to one data line 1 of the peripheral circuit region of the array substrate on the color filter substrate includes a plurality of divided strip electrodes 3, and each strip electrode 3 is along the length direction of the data line 1. Extending, and overlapping with the data line 1, that is, the projection portions of the data line 1 and the strip electrode 3 on the color filter substrate overlap. Since the array substrate and the color filter substrate are spaced apart by a certain distance, the data lines 1 on the array substrate and the strip electrodes 3 on the color filter substrate are not in contact. Three data lines 1 are exemplarily shown in FIG.
  • two adjacent strip electrodes 3 of the plurality of strip electrodes 3 overlapping therewith are connected by at least one bypass electrode 4 that does not substantially overlap the strip data line 1, for example by Two bypass electrodes 4 respectively disposed on both sides of the strip data line 1 are connected as shown in FIG.
  • the pattern of the common electrode in other regions on the color filter substrate may be a block shape in the prior art.
  • the strip electrodes 3 of the common electrode adjacent to the pixel electrode region may be integrally formed with the common electrode of the pixel electrode region, and the other strip electrodes 3 are connected to each other through the bypass electrode 4, so that the common electrodes on the color filter substrate are electrically connected as a whole.
  • the data line 1 is not cut, and the bypass electrode 4 preferably does not overlap the data line 1 at all.
  • the principle of repairing the data line line in the peripheral circuit region by using the strip electrode 3 on the color filter substrate of the present embodiment is as follows.
  • the data line 1 is broken at D, and the strip electrodes 3 corresponding to the break of the data line 1 are laser-welded by E and F at both ends of the break D.
  • the data line 1 is soldered so that the broken data line 1 is connected through the strip electrode 3.
  • the strip electrode 3 is separated from the other common electrode portions, for example, a bypass electrode connecting the strip electrode 3 and the adjacent two strip electrodes 3 by a laser. 4 is cut off, that is, the bypass electrode 4 at B and C in Fig. 3 is cut off, thereby completing the repair of the data line break.
  • the data line is short-circuited with the common electrode due to the contaminant, for example, as shown in FIG. 3, the data line 1 is short-circuited at D, then only the bypass electrode 4 at B and C is cut off, thereby avoiding the data line. 1 is in contact with the common electrode.
  • the pattern of each strip electrode 3 and the pattern of the data line 1 overlapping therewith may completely overlap the projection on the color filter substrate, that is, the width of the pattern of the strip electrodes 3 may be equal to the width of the pattern of the data line 1.
  • the width of the pattern of each strip electrode 3 may be greater than the width of the pattern of the data line 1 overlapping with it, so that When foreign matter is present between the data line 1 and the strip electrode 3, the two are not broken at the same time. As shown in FIG.
  • the width W1 of the pattern of each strip electrode 3 may be 5/4 to 7/5 times the width W of the data line 1.
  • the strip electrodes 3 corresponding to the adjacent two data lines 1 are prevented from overlapping or contacting each other.
  • the width W1 of the pattern of the strip electrodes 3 is 4/3 times the width W of the data lines 1.
  • the width W1 of the strip electrode 3 is larger than the width W of the data line 1, and the pattern of each strip electrode and the data line pattern overlapping therewith are along the length of the data line 1. Centering, that is, the projection of the center lines of the two on the color film substrate completely coincides.
  • the length L1 of the strip electrode 3 is, for example, 18 to 25 times the width W of the data line 1, for example, 20 times, and the length L1 can be determined according to the data line design of the array substrate of different types of products.
  • the distance L2 between two adjacent strip electrodes 3 of the plurality of strip electrodes 3 overlapping therewith is, for example, 2 to 3 times the width W of the data line 1. If the distance between the adjacent two strip electrodes 3 is too wide, it is difficult to repair the data line 1 when the data line 1 at the interval between the adjacent two strip electrodes 3 is broken.
  • the spacing L2 between two adjacent strip electrodes 3 is twice the width W of the data line 1.
  • the width W2 of the bypass electrode 4 is, for example, 1/8 to 1/5 of the width W of the data line 1.
  • the maximum distance W3 between the bypass electrode 4 and the data line 1 is, for example, 1/5 to 1/3 of the width W of the data line 1.
  • two strip electrodes of the plurality of strip electrodes overlapping therewith are respectively located in the width direction of the strip electrodes 3
  • the bypass electrodes 4 on both sides are connected.
  • the plurality of strip electrodes 3 corresponding to the respective overlapping portions of the respective data lines 1 are aligned in the width direction of the data line 1.
  • the plurality of strip electrodes 3 corresponding to the respective overlapping sections of the respective data lines 1 are not only identical in shape but equal in length, and are aligned in the width direction of the data line 1.
  • all of the strip electrodes 3 have the same shape and equal length. This facilitates the pattern design of the mask in the mask process for fabricating the strip electrodes 3.
  • the color filter substrate further includes Connect the electrodes 6.
  • the connection electrode 6 is connected to two strip electrodes 3 respectively corresponding to the adjacent two data lines 1 and aligned in the width direction of the data line 1, and their positions do not overlap with the bypass electrodes 4.
  • the connection points of the connection electrodes 6 connecting the two strip electrodes 3 are respectively located at the intermediate positions of the strip electrodes 3.
  • the connection electrode 6 may be in the form of a strip and may have a width of 1 to 2 times that of the data line.
  • connection electrode 6 With the color filter substrate having the connection electrode 6 in Fig. 5, it is only necessary to cut off the connection electrode 6 corresponding to the strip electrode 3 used as the repair line when repairing the wiring.
  • the present disclosure also provides a display device including an array substrate and the color filter substrate of the cartridge aligned with the array substrate.
  • a first marker post 5 is disposed on the data line 1 in the peripheral circuit region of the array substrate at a position corresponding to the interval between the strip electrodes 3.
  • the first mark pillar 5 and the data line 1 are formed in the same mask process, and may be formed of the same material as the data line 1, for example, formed of an opaque metal.
  • a strip electrode 3 and a bypass electrode 4 connected to the strip electrode 3 are positioned by finding the position of the first marker post 5 during the repair process. As shown in FIG.
  • the width W4 of the first marking post 5 may be 1/6 ⁇ 1/4 of the width W of the data line 1, such as 1/5, and the length L4 of the first marking post 5 may be the width W of the data line 1. 1/8 ⁇ 1/5, such as 1/6.
  • a second marking post 7 may be provided between adjacent two first marking posts 5 to facilitate positioning of the position of the connecting electrode 6.
  • the second label column 7 and the first label column 5 may have the same size and shape.
  • the positions of the first mark column 5, the second mark column 7, the strip electrodes 3, the bypass electrodes 4, and the connection electrodes 6 are passed through a mask process. It is determined in advance, and it is ensured that the electrode pattern as shown in FIG. 2 or 4 can be formed after the cartridge is formed.
  • the display device may be: a liquid crystal panel, an electronic paper, an OLED panel, a mobile phone, a tablet computer, a television, a display, a notebook computer, a digital photo frame, a navigation device, and the like, or any display product or component.

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
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Abstract

一种显示装置,包括阵列基板和彩膜基板,所述阵列基板包括外围电路区域中的数据线(1),所述彩膜基板包括公共电极,所述彩膜基板的与对应阵列基板的外围电路区域对应的所述公共电极的部分包括:多条条状电极(3),所述条状电极(3)相互分开,且沿所述数据线长度方向延伸,且与所述数据线(1)交叠,与每条数据线(1)交叠的多条条状电极(3)中相邻两条条状电极(3)通过与该条数据线(1)基本不交叠的旁路电极(4)连接。当数据线(1)断路或与公共电极短路时,可利用独立的条状电极(3)对数据线(1)进行修复,以使电路正常运行。

Description

显示装置 技术领域
本公开涉及显示技术领域, 特别涉及一种显示装置。 背景技术
在制造薄膜晶体管液晶显示装置 (Thin Film Transistor-Liquid Crystal Displays , TFT-LCD )工艺的彩膜(Color Filter , CF )基板工艺段中, 利 用传统 CF基板的公共电极掩膜 ( Indium Tin Oxide Mask, ITO Mask ), 在整 体 CF面板上均匀镀覆 ITO 2, ITO作为公共电极。 如图 1所示, ITO 2覆盖 整个 CF基板。 在这种设计中, 不可对阵列基板上的外围电路区域发生的数 据线 1 ( Data Line ) 断开以及阵列基板上的数据线 1与 CF基板上的 ITO 2 短路导致的不良进行修复。 发明内容
为解决上述技术问题,本公开提供了一种显示装置, 包括阵列基板和彩 膜基板, 所述阵列基板包括外围电路区域中的数据线, 所述彩膜基板包括公 共电极, 其特征在于, 所述彩膜基板的与对应阵列基板的外围电路区域对应 的所述公共电极的部分包括: 多条条状电极, 所述条状电极相互分开, 且沿 所述数据线长度方向延伸, 且与所述数据线交叠, 与每条数据线交叠的多条 条状电极中相邻两条条状电极通过与该条数据线基本不交叠的旁路电极连 接。
在一个示例中,对于每条数据线, 多条条状电极中每条条状电极的图形 和与其交叠的数据线图形相同。
在一个示例中,所述每条条状电极的图形的宽度大于与其交叠的数据线 图形的宽度,且所述每条条状电极的图形和与其交叠的数据线图形各自的在 沿数据线长度方向的中心线在所述彩膜基板上的投影完全重合。
在一个示例中,所述每条条状电极的图形的宽度为所述与其交叠的数据 线宽度的 5/4 ~ 7/5倍,所述条状电极的长度为所述数据线宽度的 18 ~ 25倍。
在一个示例中,所述每条条状电极的图形的宽度为与其交叠的所述数据 线宽度的 4/3倍。 在一个示例中,对于每条数据线, 与其交叠的多条条状电极中相邻两条 条状电极之间的间距为所述数据线宽度的 2 ~ 3倍。
在一个示例中, 所述旁路电极的宽度为所述数据线宽度的 1/8 ~ 1/5 , 所 述旁路电极与数据线之间的最大距离为所述数据线宽度的 1/5 ~ 1/3。
在一个示例中, 所述旁路电极的宽度为所述数据线宽度的 1/6, 所述旁 路电极与数据线之间的最大距离为所述数据线宽度的 1/4。
在一个示例中,对于相邻数据线, 与各数据线相应交叠段对应的多条条 状电极在沿所述数据线宽度方向上两端对齐。
在一个示例中,彩膜基板上还包括多个连接电极,连接相邻两条数据线 对应的且沿所述数据线宽度方向上两端对齐的两个条状电极。
在一个示例中,所述连接电极为条状,其宽度为所述数据线的 1 ~ 2倍。 在一个示例中,所述条状电极、旁路电极和连接电极由透明导电材料形 成。
在一个示例中,所述阵列基板外围电路区域的数据线上设置有第一标记 柱, 其位置对应于与该数据线对应的所述条状电极的间隔处。
在一个示例中, 相邻两个第一标记柱的之间还设有第二标记柱,, 其位 置对应于连接电极。
在一个示例中, 所述第一标记柱和第二标记柱的宽度为数据线宽度的 1/6 ~ 1/4, 长度为数据线宽度的 1/8 ~ 1/5。
本公开通过将彩膜基板上对应阵列基板外围电路区域的公共电极设计 成独立的与数据线交叠的条状电极, 同一条数据线对应的各条状电极通过与 数据线不交叠的旁路电极连接。 当数据线断路或与公共电极短路时可利用独 立的条状电极对数据线进行修复, 以使电路正常运行。 附图说明
为了更清楚地说明本公开或现有技术中的技术方案,下面将对本公开提 供的技术方案或现有技术描述中所需要使用的附图作筒单地介绍,显而易见 地,下面描述中的附图仅仅是本公开的技术方案的部分具体实施方式图示说 明, 对于本领域普通技术人员来讲, 在不付出创造性劳动的前提下, 还可以 根据这些附图获得其他的附图。
图 1 是现有技术的彩膜基板和阵列基板对盒后在阵列基板的外围电路 区域的数据线和彩膜基板上公共电极的图形;
图 2是本公开的第一实施例的一种彩膜基板和阵列基板对盒后在阵列 基板的外围电路区域的数据线和彩膜基板上公共电极的图形;
图 3 是利用本公开的第一实施例的彩膜基板的条形公共电极修复阵列 基板的外围电路区域的数据线断路或数据线与条形公共电极短路的修复原 理图;
图 4是图 2中 A处的局部放大图;
图 5 是本公开的第二实施例的一种彩膜基板和阵列基板对盒后在阵列 基板的外围电路区域的数据线和彩膜基板上公共电极的图形。 具体实施方式
下面将结合本公开实施例中的附图,对本公开实施例中的技术方案进行 清楚、 完整地描述, 显然, 所描述的实施例仅仅是本公开一部分实施例, 而 不是全部的实施例。基于本公开中的实施例, 本领域普通技术人员在没有作 出创造性劳动前提下所获得的所有其他实施例, 都属于本公开保护的范围。
除非另作定义,此处使用的技术术语或者科学术语应当为本公开所属领 域内具有一般技能的人士所理解的通常意义。本公开专利申请说明书以及权 利要求书中使用的 "第一"、 "第二" 以及类似的词语并不表示任何顺序、 数 量或者重要性, 而只是用来区分不同的组成部分。 同样, "一个" 或者 "一" 等类似词语也不表示数量限制, 而是表示存在至少一个。 "连接" 或者 "相 连"等类似的词语并非限定于物理的或者机械的连接, 而是可以包括电性的 连接, 不管是直接的还是间接的。 "上"、 "下"、 "左"、 "右" 等仅用于表示 相对位置关系, 当被描述对象的绝对位置改变后, 则该相对位置关系也相应 地改变。
为了在外围电路区域的数据线断路或该数据线与公共电极短路时能够 进行修复, 本实施例中, 将彩膜基板上的与对应的阵列基板(彩膜基板和阵 列基板对盒形成液晶盒, 即该阵列基板为将与彩膜基板对盒的阵列基板)上 夕卜围电路区域中的数据线相对应的该部分的公共电极设计为图形相似,例如 可以设计为独立的若干段条状电极图形,即公共电极与对应的阵列基板像素 电极区域相对应的部分可仍保持为块状,而公共电极与对应的阵列基板外围 电路区域相对应的部分则与与外围电路区域的数据线图形相似,且具有独立 的若干段条状电极图形。 如图 2所示, 彩膜基板上与阵列基板外围电路区域 的一条数据线 1相对应的公共电极部分包括多条分割的条状电极 3 , 每个条 状电极 3均沿数据线 1长度方向延伸, 且与数据线 1上下交叠, 即数据线 1 和条状电极 3在彩膜基板上的投影部分重叠。由于阵列基板和彩膜基板间隔 有一定距离, 阵列基板上数据线 1与彩膜基板上的条状电极 3不会接触。 在 图 2中示例性地显示了三条数据线 1。 对于每条数据线 1 , 与其交叠的多条 条状电极 3中相邻两条条状电极 3通过与该条数据线 1基本不交叠的至少一 个旁路电极 4连接,例如通过在该条数据线 1的两侧分别设置的两个旁路电 极 4连接, 如图 2所示。 彩膜基板上其它区域中的公共电极的图形可以为现 有设计中的块状。靠近像素电极区域的公共电极的条状电极 3可与像素电极 区域的公共电极一体形成, 其它条状电极 3通过旁路电极 4相互连接, 从而 彩膜基板上的公共电极整体电性连接。
为了方便在修复线路时切割旁路电极 4的过程中不会切割到数据线 1 , 旁路电极 4优选和数据线 1完全不交叠。
如图 3所示,采用本实施例的彩膜基板上的条状电极 3修复外围电路区 域中的数据线线路的原理如下。
对于数据线断路的情况, 例如如图 3所示, 数据线 1在 D处断裂, 则 在断裂处 D两端的 E和 F,利用激光焊接将与该数据线 1断裂处对应的条状 电极 3和数据线 1焊接起来, 使该断裂的数据线 1通过条状电极 3连通。 同 时为了避免数据线 1和公共电极接触,将该段条状电极 3与其他公共电极部 分分开,例如通过激光将连接该段条状电极 3与相邻的两条条状电极 3的旁 路电极 4切断, 即图 3中 B和 C处的旁路电极 4切断, 从而完成数据线断 路的修复。
对于例如由于污染物引起的数据线与公共电极短路的情况, 例如如图 3 所示, 数据线 1在 D处短路, 则只需将 B和 C处的旁路电极 4切断, 从而 避免数据线 1与公共电极接触。
每条条状电极 3的图形和与之交叠的数据线 1的图形在彩膜基板上的投 影可以完全重叠,即条状电极 3的图形的宽度可以等于数据线 1的图形的宽 度。 在这种情况下, 若数据线 1和条状电极 3之间存在异物, 则可能导致两 者同时断裂, 从而无法用条状电极 3修复数据线 1。 因此, 进一步地, 每条 条状电极 3的图形的宽度可大于与之交叠的数据线 1的图形的宽度,以至于 在数据线 1和条状电极 3之间存在异物时, 两者不同时断裂。 如图 4所示, 每条条状电极 3的图形的宽度 W1可为数据线 1宽度 W的 5/4 ~ 7/5倍。 为 了方便焊接, 且在制作条状电极 3时, 避免相邻两条数据线 1对应的条状电 极 3相互重叠或接触。 优选地, 条状电极 3的图形的宽度 W1为数据线 1宽 度 W的 4/3倍。 更近一步地, 为了方便焊接, 条状电极 3的宽度 W1大于数 据线 1的宽度 W,且每条条状电极的图形和与该之交叠的数据线图形在沿数 据线 1长度方向上对中, 即两者的中心线在彩膜基板上的投影完全重合。
条状电极 3的长度 L1例如为数据线 1宽度 W的 18 ~ 25倍, 例如 20 倍, 其长度 L1可以根据不同型号产品的阵列基板的数据线设计而定。 对于 每条数据线 1 , 与其交叠的多条条状电极 3中相邻两条条状电极 3之间的间 距 L2例如为数据线 1宽度 W的 2 ~ 3倍。 若相邻两条条状电极 3之间的间 距太宽, 则在相邻两条条状电极 3间隔处的数据线 1断裂时, 4艮难修复数据 线 1。 优选地, 相邻两条条状电极 3之间的间距 L2为数据线 1宽度 W的 2 倍。
进一步地, 旁路电极 4的宽度 W2例如为数据线 1宽度 W的 1/8 ~ 1/5。 旁路电极 4与数据线 1之间的最大距离 W3例如为数据线 1宽度 W的 1/5 ~ 1/3。 在制作旁路电极 4时, 优选避免旁路电极 4与其对应的数据线 1完全 交叠, 从而不便于后续切割, 而且优选避免旁路电极 4与相邻的数据线 1交 叠, 及与相邻的数据线 1连接的旁路电极 4重叠或接触。 基于以上的因此, 优选地, 旁路电极 4的宽度 W2为数据线 1宽度 W的 1/6, 旁路电极 4与数 据线 1之间的最大距离 W3为数据线 1宽度 W的 1/4。
进一步地, 为了使两条条状电极 3连接更加稳定, 对于每条数据线, 与 其交叠的多条条状电极中相邻两条条状电极通过两个分别位于条状电极 3 宽度方向上两侧的旁路电极 4连接。
进一步地, 对于阵列基板上相邻数据线 1 , 与各数据线 1相应交叠段对 应的多条条状电极 3在沿数据线 1宽度方向上对齐。如图 2中虚线条对齐线 所示, 与各数据线 1相应交叠段对应的多条条状电极 3不但形状相同、 长度 相等, 而且在沿数据线 1宽度方向上对齐。 优选地, 所有条状电极 3的形状 相同、 长度相等。 这样可以在制作条状电极 3的掩膜工艺中方便掩膜板的图 形设计。
进一步地,为了避免修复完成后由于切割导致某条数据线 1上的条状电 极 3和其相邻的条状电极 3断开,使得与该条数据线 1交叠且靠近面板边缘 的条状电极 3无法连接到公共电极, 如图 5所示, 彩膜基板还包括多个连接 电极 6。 连接电极 6连接与相邻两条数据线 1分别对应的且沿数据线 1宽度 方向上对齐的两个条状电极 3 , 其位置不与旁路电极 4重叠。 为了在制作条 状电极 3的掩膜工艺中方便掩膜板的图形设计, 优选地, 连接电极 6连接两 个条状电极 3的连接点分别位于各条状电极 3的中间位置。连接电极 6可以 为条状, 其宽度可以为数据线的 1 ~ 2倍。
对于图 5中的具有连接电极 6的彩膜基板,在修复线路时只需再切断与 用作修复线路用的条状电极 3相应的连接电极 6即可。
本公开还提供了一种显示装置, 包括阵列基板, 以及与所述阵列基板对 盒的上述彩膜基板。
由于制作公共电极的材料通常是透明材料, 所以条状电极 3、 旁路电极 4和连接电极 6可以都是透明的。 因此如图 2所示, 为了在修复线路的过程 中易于定位上述透明的电极的位置。 在阵列基板外围电路区域中的数据线 1 上在与条状电极 3之间的间隔相对应的位置设置有第一标记柱 5。 第一标记 柱 5和数据线 1在同一次掩膜工艺中形成,且可以用与数据线 1相同材料形 成, 例如用不透明金属形成。 在修复过程中通过查找第一标记柱 5的位置来 定位一段条状电极 3及与该条状电极 3连接的旁路电极 4。 如图 4所示, 第 一标记柱 5的宽度 W4可为数据线 1宽度 W的 1/6~1/4, 如 1/5 , 第一标记 柱 5的长度 L4可为数据线 1宽度 W的 1/8 ~ 1/5 , 如 1/6。
为了便于识别上述连接电极 6的位置,如图 5所示,相邻两个第一标记 柱 5的之间还可设有第二标记柱 7, 以便于定位连接电极 6的位置。 第二标 记柱 7和第一标记柱 5的大小形状均可相同。
在制作阵列基板和彩膜基板各自的电极图形的过程中, 对第一标记柱 5、 第二标记柱 7的位置、 条状电极 3、 旁路电极 4和连接电极 6的位置通 过掩膜工艺事先确定, 且保证对盒后能够形成如图 2或 4的电极图形。
所述显示装置可以为: 液晶面板、 电子纸、 OLED面板、 手机、 平板电 脑、 电视机、 显示器、 笔记本电脑、 数码相框、 导航仪等任何具有显示功能 的产品或部件。
以上实施方式仅用于说明本公开, 而并非对本公开的限制,有关技术领 域的普通技术人员, 在不脱离本公开的精神和范围的情况下, 还可以做出各 种变化和变型, 因此所有等同的技术方案也属于本公开的范畴, 本公开的专 利保护范围应由权利要求限定。

Claims

权利要求书
1、 一种显示装置, 包括阵列基板和彩膜基板, 所述阵列基板包括外围 电路区域中的数据线, 所述彩膜基板包括公共电极, 其特征在于, 所述彩膜 基板的与对应阵列基板的外围电路区域对应的所述公共电极的部分包括: 多 条条状电极, 所述条状电极相互分开, 且沿所述数据线长度方向延伸, 且与 所述数据线交叠,与每条数据线交叠的多条条状电极中相邻两条条状电极通 过与该条数据线基本不交叠的旁路电极连接。
2、 如权利要求 1所述的显示装置, 其特征在于, 对于每条数据线, 多 条条状电极中每条条状电极的图形和与其交叠的该数据线的图形相同。
3、 如权利要求 2所述的显示装置, 其特征在于, 所述每条条状电极的 图形的宽度大于与其交叠的数据线图形的宽度,且所述每条条状电极的图形 和与其交叠的数据线图形各自的在沿数据线长度方向的中心线在所述彩膜 基板上的投影完全重合。
4、 如权利要求 1~3中任一项所述的显示装置, 其特征在于, 所述每条 条状电极的图形的宽度为所述与其交叠的数据线宽度的 5/4 ~ 7/5倍,所述条 状电极的长度为所述其交叠的数据线宽度的 18 ~ 25倍。
5、 如权利要求 4所述的显示装置, 其特征在于, 所述每条条状电极的 图形的宽度为所述其交叠的数据线宽度的 4/3倍。
6、 如权利要求 1所述的显示装置, 其特征在于, 对于每条数据线, 与 的 2 ~ 3倍。
7、 如权利要求 1所述的显示装置, 其特征在于, 所述旁路电极的宽度 为所述数据线宽度的 1/8 ~ 1/5 , 所述旁路电极与数据线之间的最大距离为所 述数据线宽度的 1/5 ~ 1/3。
8、 如权利要求 7所述的显示装置, 其特征在于, 所述旁路电极的宽度 为所述数据线宽度的 1/6, 所述旁路电极与数据线之间的最大距离为所述数 据线宽度的 1/4。
9、 如权利要求 1所述的显示装置, 其特征在于, 对于相邻数据线, 与 各数据线交叠的多条条状电极在沿所述数据线宽度方向上两端对齐。
10、 如权利要求 9所述的显示装置, 其特征在于, 彩膜基板还包括多个 连接电极,其连接相邻两条数据线对应的且沿所述数据线宽度方向上两端对 齐的两个条状电极。
11、 如权利要求 10所述的显示装置, 其特征在于, 所述连接电极为条 状, 其宽度为所述数据线的 1 ~ 2倍。
12、 如权利要求 10所述的显示装置, 其特征在于, 所述条状电极、 旁 路电极和连接电极由透明导电材料形成。
13、 如权利要求 12所述的显示装置, 其特征在于, 所述阵列基板的外 围电路区域的数据线上设置有第一标记柱,其位置对应于与该数据线对应的 所述条状电极的间隔处。
14、 如权利要求 13所述的显示装置, 其特征在于, 相邻两个第一标记 柱的之间还设有第二标记柱, 其位置对应于连接电极。
15、 如权利要求 14所述的显示装置, 其特征在于, 所述第一标记柱和 第二标记柱的宽度为数据线宽度的 1/6 ~ 1/4,长度为数据线宽度的 1/8 ~ 1/5。
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CN201886251U (zh) * 2010-12-24 2011-06-29 京东方科技集团股份有限公司 薄膜晶体管阵列基板及已修复的薄膜晶体管阵列基板
CN102937768A (zh) * 2012-11-13 2013-02-20 京东方科技集团股份有限公司 一种阵列基板及其制作方法和显示装置
CN103116234A (zh) * 2013-02-21 2013-05-22 合肥京东方光电科技有限公司 彩膜基板及显示装置

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