WO2014127581A1 - 下部电极及其制作方法 - Google Patents

下部电极及其制作方法 Download PDF

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Publication number
WO2014127581A1
WO2014127581A1 PCT/CN2013/074644 CN2013074644W WO2014127581A1 WO 2014127581 A1 WO2014127581 A1 WO 2014127581A1 CN 2013074644 W CN2013074644 W CN 2013074644W WO 2014127581 A1 WO2014127581 A1 WO 2014127581A1
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WIPO (PCT)
Prior art keywords
lower electrode
substrate
insulating layer
metal substrate
ceramic
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PCT/CN2013/074644
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English (en)
French (fr)
Inventor
蒋晓纬
肖红玺
刘华锋
陈皓
朱孝会
Original Assignee
京东方科技集团股份有限公司
北京京东方光电科技有限公司
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Application filed by 京东方科技集团股份有限公司, 北京京东方光电科技有限公司 filed Critical 京东方科技集团股份有限公司
Priority to US14/386,979 priority Critical patent/US20150044424A1/en
Publication of WO2014127581A1 publication Critical patent/WO2014127581A1/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H01J37/32541—Shape
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/13439—Electrodes characterised by their electrical, optical, physical properties; materials therefor; method of making
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/32—Gas-filled discharge tubes
    • H01J37/32431—Constructional details of the reactor
    • H01J37/32532—Electrodes
    • H01J37/3255—Material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00—Metal working
    • Y10T29/49—Method of mechanical manufacture
    • Y10T29/49002—Electrical device making
    • Y10T29/49117—Conductor or circuit manufacturing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T428/00—Stock material or miscellaneous articles
    • Y10T428/24—Structurally defined web or sheet [e.g., overall dimension, etc.]
    • Y10T428/24479—Structurally defined web or sheet [e.g., overall dimension, etc.] including variation in thickness
    • Y10T428/24612—Composite web or sheet

Definitions

  • Embodiments of the present invention relate to the field of dry etching, and more particularly to a lower electrode for dry etching and a method of fabricating the same. Background technique
  • a conventional display includes an array substrate, a color filter substrate, and a liquid crystal filled between the array substrate and the color filter substrate.
  • the array substrate and the color filter substrate respectively comprise a glass substrate and a laminated structure including a certain pattern on the glass substrate.
  • the layer structure is formed on a glass substrate by a process such as plating, exposure, etching, etc., wherein the etching includes dry etching and wet etching.
  • the dry etching is generally performed in a vacuum environment, and the glass substrate is etched by supporting the glass substrate through a lower electrode.
  • the conventional lower electrode 01 includes a metal substrate 02, a ceramic layer 3 disposed on the upper surface of the metal substrate 02, and a ceramic dot 4 protruding from the ceramic layer 3.
  • the metal substrate is subjected to static electricity during the etch process, and electrostatic adsorption is performed to bring the glass substrate into close contact with the lower electrode.
  • the dry etching is generally performed by plasma etching and under a certain electric field, the ceramic layer is used to avoid interference of the metal substrate with the electric field.
  • the ceramic dots serve on the one hand to support the glass substrate and on the other hand facilitate the circulation of gas between the glass substrate and the lower electrode.
  • the metal substrate has a certain temperature, and the etching time is relatively short. Since the distance between the ceramic point and the surface of the metal substrate is greater than the distance between the ceramic layer and the metal surface, the temperature at the ceramic point is 4 in the ceramic. The temperature of the layer forms embossed spots on the glass substrate, which affects the display effect.
  • the prior art ceramic layer and ceramic dots are deposited by two processes, that is, a ceramic layer is first deposited on the metal substrate, and then ceramic dots are deposited on the ceramic layer, which is complicated. Moreover, since the ceramic dots and the ceramic layer are formed in different processes, the bonding strength between the ceramic dots and the ceramic layer is not high, and the ceramic dots are easily detached from the ceramic layer. Summary of the invention Embodiments of the present invention provide a lower electrode and a method of fabricating the same.
  • a lower electrode includes a metal substrate and an insulating layer disposed on the metal substrate, wherein the metal substrate includes: a substrate; and a plurality of protrusions disposed on the substrate, An insulating layer covers the substrate and a plurality of protrusions.
  • the thickness of the insulating layer on the upper surface of the substrate is equal to the thickness of the insulating layer on the upper surface of the projection.
  • the material forming the insulating layer is ceramic, alumina or mica.
  • the upper surface of the projection is a flat surface or a curved surface.
  • the projections are arranged in a matrix on the substrate.
  • the projection is integrally formed with the base.
  • the protruding portion and the base are separately formed and then fixed together.
  • a method of fabricating a lower electrode includes: forming a metal substrate having a plurality of protrusions; and
  • An insulating layer covering the metal substrate is formed.
  • the metal substrate further includes a substrate, and the plurality of protrusions are disposed on the substrate.
  • the base and the plurality of projections are integrally formed.
  • the base and the plurality of projections are separately formed and then fixed together.
  • FIG. 1 is a schematic cross-sectional structural view of a portion of a lower electrode in the prior art
  • FIG. 2 is a cross-sectional structural view showing a portion of a lower electrode according to an embodiment of the present invention
  • FIG. 3 is a cross-sectional structural view showing a portion of a metal substrate of the lower electrode shown in FIG.
  • FIG. 4 is a cross-sectional structural view showing another portion of a lower electrode according to an embodiment of the present invention
  • FIG. 5 is a cross-sectional structural view showing a protruding portion according to an embodiment of the present invention
  • FIG. 6 is a schematic diagram of a method for fabricating a lower electrode according to an embodiment of the present invention.
  • An embodiment of the present invention provides a lower electrode 1 as shown in FIG. 2, comprising: a metal substrate 2 and an insulating layer 5 disposed on the metal substrate, wherein the metal substrate 2 comprises: a substrate 21 and a set a plurality of protrusions 22 on the substrate 21, as shown in FIG. 3; the insulating layer 5 covers the substrate 21 and the protrusions 22, thereby forming a protruding insulating point 51 at the protrusions 22. .
  • the substrate 21 may also be stepped as shown in Fig. 4, and a projection 22 is provided on the upper surface of the substrate 21 for carrying the object.
  • the substrate 21 may have other shapes. The embodiment of the present invention is described in detail by taking the substrate 21 as a rectangle as shown in FIG.
  • the protruding insulating dots 51 and the insulating layer are formed by one process and the bonding strength is high, it is not easily peeled off from the ceramic layer as the ceramic dots in the background art.
  • the lower electrode 1 is also Can be used in other processes such as coating.
  • the material forming the substrate 21 and the projections 22 is generally the same, and is preferably a metal.
  • the insulating layer 5 may be formed of an insulating material such as ceramic, alumina or mica, and preferably, in the present embodiment, the material forming the insulating layer 5 is ceramic.
  • the thickness of the insulating layer on the upper surface of the substrate 21 is equal to the thickness of the insulating layer on the surface of the protruding portion 22.
  • the distance between the upper surface of the insulating layer and the upper surface of the reverse surface of the metal 1 is equal at both the convex portion 51 and the flat portion 52 of the insulating layer. Therefore, when the metal substrate 2 has a certain temperature, the temperatures of the convex portion 51 and the flat portion 52 are the same.
  • the lower electrode 1 can be used for dry etching to support the substrate to be etched, thereby avoiding the problem of embossed spots on the surface of the substrate due to the difference in temperature between the convex portion 51 and the flat portion 52, thereby improving the display effect.
  • the upper surface of the protruding portion 22 is a flat surface.
  • the thickness of the insulating layer on the surface of the projection 22 is the same as the thickness of the metal 1 reverse surface insulating layer.
  • the temperature of the upper surface of the flat portion 52 of the insulating layer is the same as the temperature of the upper surface of the protruding portion 51 of the insulating layer.
  • the upper surface of the projection may also be a curved or rough surface 11', and is preferably a curved or rough surface, for example, the surface may be serrated, as shown in FIG.
  • the protruding portion 22' When the protruding portion 22' is a serrated surface, the upper surface of the protruding insulating dot formed on the metal substrate 2 is the same as the upper surface of the protruding portion 22', and is also shown in the drawing. Jagged surface.
  • the advantage of such a serrated surface is: On the one hand, in the dry etching process, the protruding insulating dots are in contact with the glass substrate to reduce the contact area. On the other hand, the plating of the insulating layer on the protruding portion 22' can increase the adhesion of the insulating layer and is less likely to fall off.
  • the projections 22 are preferably arranged in a lattice on the base 21. This on the one hand facilitates the circulation of gas between the glass substrate and the lower electrode 1 during the dry etching process. On the other hand, the glass substrate placed on the lower electrode 1 is uniformly stressed, and the glass substrate is not damaged by uneven stress.
  • the protruding portion 22 and the base 21 may be integrally formed, or may be separately formed, but it is preferably the former, which can reduce the manufacturing steps and costs.
  • the "integral molding" is formed by one process without subsequent processing. For example, it may be formed by stamping or a mold at a time.
  • the "forming separately” means that the projection 22 and the substrate 21 are formed by two processes, for example, the projection 22 is formed on the substrate 21 by providing other layers.
  • the protrusions 22 may be formed by welding or other means on the upper surface of the substrate 21.
  • the insulating layer 5 further covers a side surface of the substrate 21 adjacent to the surface of the protrusion 22 .
  • the insulating layer 5 also covers the side surface of the substrate 21 adjacent to the surface on which the projections 22 are provided, and covers only the upper surface of the metal substrate 2 with respect to the insulating layer 5, so that the falling of the insulating layer 5 can be avoided.
  • Another embodiment of the present invention provides a method for fabricating a lower electrode, as shown in FIG. 6, including:
  • Step S101 forming a metal substrate having a protruding portion.
  • the metal substrate as shown in FIG. 3, includes: a substrate 21 and a plurality of protrusions 22, and the plurality of protrusions 22 are disposed on the substrate 21.
  • the substrate 21 and the projections 22 form the metal substrate by a single process.
  • it may be formed by one press, or may be formed by a single mold.
  • the substrate 21 and the projections 22 are formed separately by different processes, and then the two are fixed together by means of splicing or the like.
  • Step S102 forming an insulating layer covering the metal substrate.
  • the insulating layer 5 covers only the substrate 21 and the protrusions 22, thereby forming a protruding insulating point 51 at the protruding portion 22, as shown in FIG. 2; in another example It is also possible to provide the insulating layer 5 on the side of the metal substrate 2, which is advantageous in avoiding the falling off of the insulating layer 5.

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  • Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Analytical Chemistry (AREA)
  • Nonlinear Science (AREA)
  • Mathematical Physics (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Gas-Filled Discharge Tubes (AREA)

Abstract

一种下部电极及其制作方法，涉及干法刻蚀领域，解决了现有技术中下部电极的陶瓷点和陶瓷层经不同工序形成，陶瓷点与陶瓷层结合强度不高，陶瓷点容易从陶瓷层上脱落的问题。一种下部电极（1），包括：金属基板（2）和绝缘层（5），其中，金属基板（2）包括：基板本体（21）以及多个设置在所述基板本体（21）上表面的凸出部（22），绝缘层设置在基板本体的上表面以及基板本体上表面的凸出部，且在凸出部处形成凸出绝缘点（51）。其适用于刻蚀装置零部件的设计及制造。

Description

下部电极及其制作方法 技术领域
本发明的实施例涉及干法刻蚀领域， 尤其涉及一种用于干法刻蚀的下部 电极及其制作方法。 背景技术
现有的显示器包括阵列基板、 彩膜基板以及填充在阵列基板和彩膜基板 之间的液晶。 其中， 阵列基板和彩膜基板上分别包括玻璃基板以及设置在所 述玻璃基板上包括一定图案的叠层结构。 现有技术中， 在玻璃基板上通过镀 膜、 曝光、 刻蚀等工序形成所述层结构， 其中， 刻蚀包括干法刻蚀和湿法刻 蚀。
干法刻蚀一般在真空环境中进行， 并通过一个下部电极支撑玻璃基板， 对所述玻璃基板进行刻蚀。 如图 1所示， 现有的下部电极 01包括： 金属基板 02和设置在所述金属基板 02上表面的陶瓷层 3和凸出于所述陶瓷层 3的陶 瓷点 4。 其中在千法刻蚀过程中对所述金属基板传导静电， 通过静电吸附作 用， 使得玻璃基板与下部电极紧密接触。 又由于干法刻蚀一般是通过等离子 体刻蚀，且在一定电场下进行，所述陶瓷层用于避免金属基板对电场的干扰。 所述陶瓷点一方面用于支撑所述玻璃基板， 另一方面方便玻璃基板与下部电 极之间的气体的流通。
但在干法刻蚀过程中， 金属基板具有一定温度， 且刻蚀时间比较短， 由 于陶瓷点与金属基板表面的距离大于陶瓷层与金属表面的距离， 致使陶瓷点 处的温度 4氏于陶瓷层的温度， 在玻璃基板上形成压纹斑点， 影响显示效果。 此外， 现有技术陶瓷层与陶瓷点通过两道工序沉积而成， 即先在金属基板上 沉积一层陶瓷层， 然后在该陶瓷层上沉积陶瓷点， 工序比较复杂。 而且由于 陶瓷点与陶瓷层在不同工序中形成， 陶瓷点与陶瓷层结合强度不高， 陶瓷点 容易从陶瓷层上脱落。 发明内容 本发明的实施例提供一种下部电极及其制作方法。
根据本发明的一个方面， 提供一种下部电极， 包括金属基板和设置于金 属基板上的绝缘层， 其中所述金属基板包括： 基底以及设置在所述基底上的 多个凸出部， 所述绝缘层覆盖所述基底以及多个凸出部。
在一个示例中， 所述基底上表面的绝缘层厚度与所述凸出部上表面的绝 缘层厚度相等。
在一个示例中， 形成所述绝缘层的材料为陶瓷、 氧化铝或云母。
在一个示例中， 所述凸出部的上表面为平面或曲面。
在一个示例中， 所述凸出部以点阵形式排布在所述基底上。
在一个示例中， 所述凸出部与所述基底一体成型。 或者， 所述凸出部与 所述基底分别成型后再固定在一起。
根据本发明的另一个方面， 提供一种下部电极的制作方法， 包括： 形成具有多个凸出部的金属基板； 和
形成覆盖所述金属基板的绝缘层。
在一个示例中， 所述金属基板还包括基底， 所述多个凸出部设置在所述 基底上。
在一个示例中， 所述基底和所述多个凸出部一体成型。 或者， 所述基底 和所述多个凸出部分别成型后再固定在一起。 附图说明
为了更清楚地说明本发明实施例的技术方案， 下面将对实施例的附图作 简单地介绍，显而易见地， 下面描述中的附图仅仅涉及本发明的一些实施例， 而非对本发明的限制。
图 1为现有技术中的一种下部电极局部的剖视结构示意图；
图 2为本发明实施例提供的一种下部电极局部的剖视结构示意图； 图 3为图 2所示下部电极的金属基板局部的剖视结构示意图；
图 4为本发明实施例提供的另一种下部电极局部的剖视结构示意图； 图 5为本发明实施例提供的一种凸出部剖视结构示意图；
图 6为本发明实施例提供的一种下部电极的制作方法；
附图标记： 01、 1-下部电极； 02、 2-金属基板； 3-陶瓷层； 4-陶瓷点； 5-绝缘层； 21- 基底； 22,22' -凸出部； 51-凸出绝缘点或绝缘层凸出部分； 52-绝缘层平坦部
具体实施方式
为使本发明实施例的目的、 技术方案和优点更加清楚， 下面将结合本发 明实施例的附图， 对本发明实施例的技术方案进行清楚、 完整地描述。 显然， 所描述的实施例是本发明的一部分实施例， 而不是全部的实施例。 基于所描 述的本发明的实施例， 本领域普通技术人员在无需创造性劳动的前提下所获 得的所有其他实施例， 都属于本发明保护的范围。
除非另作定义， 此处使用的技术术语或者科学术语应当为本发明所属领 域内具有一般技能的人士所理解的通常意义。 本发明专利申请说明书以及权 利要求书中使用的 "第一" 、 "第二" 以及类似的词语并不表示任何顺序、 数量或者重要性，而只是用来区分不同的组成部分。同样， "一个"或者 "一" 等类似词语也不表示数量限制， 而是表示存在至少一个。 "包括" 或者 "包 含" 等类似的词语意指出现在 "包括 " 或者 "包含" 前面的元件或者物件涵 盖出现在 "包括" 或者 "包含" 后面列举的元件或者物件及其等同， 并不排 除其他元件或者物件。 "连接" 或者 "相连" 等类似的词语并非限定于物理 的或者机械的连接， 而是可以包括电性的连接， 不管是直接的还是间接的。 "上" 、 "下" 、 "左" 、 "右" 等仅用于表示相对位置关系， 当被描述对 象的绝对位置改变后， 则该相对位置关系也可能相应地改变。
本发明的一个实施例提供了一种下部电极 1， 如图 2所示， 包括： 金属 基板 2和设置于金属基板上的绝缘层 5， 其中所述金属基板 2包括： 基底 21 以及设置在所述基底 21上的多个凸出部 22， 如图 3所示； 所述绝缘层 5覆 盖所述基底 21以及凸出部 22， 由此在所述凸出部 22处形成凸出绝缘点 51。 如图 4所示， 所述基底 21也可以是如图 4所示的台阶状， 且在基底 21 用于承载物体的上表面设置凸出部 22。 当然， 所述基底 21还可以是其他形 状， 本发明实施例以所述基底 21为图 3所示的矩形为例进行详细说明。
由于凸出绝缘点 51与绝缘层是通过一次工艺形成，结合强度高，所以不 像背景技术中的陶瓷点那么容易从陶瓷层上脱落。 当然， 所述下部电极 1还 可以用于镀膜等其他工艺过程中。
通常形成所述基底 21和所述凸出部 22的材料是相同的， 并且优选为金 属。 所述绝缘层 5可以是由诸如陶瓷、 氧化铝或云母等绝缘材料形成， 且优 选的， 在本实施例中， 形成所述绝缘层 5的材料为陶瓷。
在本实施例中， 所述基底 21上表面的绝缘层厚度与所述凸出部 22上表 面的绝缘层厚度相等。这样，无论在绝缘层的凸出部分 51和平坦部分 52处， 绝缘层上表面与所述金属 1 反 2上表面的距离均相等。 因此， 当所述金属基 板 2具有一定温度时， 凸出部分 51和平坦部分 52的温度相同。 所述下部电 极 1可用于干法刻蚀， 支撑待刻蚀的基板，避免了因凸出部分 51和平坦部分 52处的温度不同， 在基板表面形成压纹斑点的问题， 进而提升显示效果。
本实施例中， 所述凸出部 22的上表面为平面。 这样在所述凸出部 22表 面的绝缘层的厚度与金属 1 反 2表面绝缘层的厚度相同。 进而当金属基板 2 具有一定温度时，所述绝缘层平坦部分 52的上表面的温度与所述绝缘层凸出 部分 51上表面的温度相同。在另一个实施例中，所述凸出部的上表面也可以 为曲面或粗糙面 11' , 而且优选为曲面或粗糙面， 例如表面可以是锯齿状， 如图 5所示。 当所述凸出部 22' 为锯齿状表面时， 在所述金属基板 2上形成 的凸出绝缘点的上表面与所述凸出部 22' 的上表面相同，也为图中所示的锯 齿状表面。 这种锯齿状表面的优点是： 一方面， 在干法刻蚀过程中， 所述凸 出绝缘点通过与所述玻璃基板为多点接触， 减小接触面积。 且另一方面， 在 所述凸出部 22' 上再镀绝缘层能增加绝缘层的粘附力， 不易脱落。
在本实施例中，所述凸出部 22在所述基底 21的上优选以点阵形式排布。 这样一方面有利于在干法刻蚀过程中， 玻璃基板与下部电极 1之间的气体的 流通。 另一方面放置在所述下部电极 1上的玻璃基板受力均匀， 不会因应力 不均而损毁玻璃基板。
在本实施例中， 所述凸出部 22与所述基底 21可以一体成型， 也可以分 别成型， 但优选为前者， 这样可以降低制造步骤及成本。 所述 "一体成型" 即通过一次工艺形成， 而无需后续加工。 例如， 可以是通过冲压或模具一次 形成。 所述 "分别成型"指的是凸出部 22与所述基底 21通过两次工艺形成， 例如所述凸出部 22通过设置其他层形成在所述基底 21上。 例如， 可以是在 所述基底 21的上表面通过焊接或其他方式形成所述凸出部 22。 可选的， 所述绝缘层 5还覆盖于基底 21设置有凸出部 22的表面相邻的 侧面。 为进一步避免干法刻蚀过程中金属基板 2对电场的影响。 绝缘层 5还 覆盖所述基底 21与设置有凸出部 22的表面相邻的侧面， 相对于绝缘层 5仅 覆盖所述金属基板 2上表面的情况， 这样可以避免绝缘层 5的脱落。
本发明的另一个实施例提供了一种下部电极的制作方法， 如图 6所示， 包括：
步驟 S101、 形成具有凸出部的金属基板。
在一个示例中， 所述金属基板如图 3所示， 包括： 基底 21以及多个凸出 部 22 , 所述多个凸出部 22设置在所述基底 21上。
在一个示例中， 所述基底 21和所述凸出部 22通过一次工艺形成所述金 属基板。 例如可以是通过一次冲压形成， 也可以是通过模具一次成型。 或者， 经不同工艺分別先形成所述基底 21和所述凸出部 22, 然后再通过悍接等方 式使二者固定在一起。
步骤 S102、 形成覆盖所述金属基板的绝缘层。
在一个示例中， 所述绝缘层 5仅覆盖所述基底 21以及凸出部 22, 由此 在所述凸出部 22处形成凸出绝缘点 51 , 如图 2所示； 在另一示例中， 还可 以在所述金属基板 2的侧面设置绝缘层 5，这样有利于避免绝缘层 5的脱落。
以上所述仅是本发明的示范性实施方式， 而非用于限制本发明的保护范 围， 本发明的保护范围由所附的权利要求确定。

Claims

权利要求书
1、 一种下部电极， 包括金属基板和设置于金属基板上的绝缘层， 其中所 述金属基板包括： 基底以及设置在所述基底上的多个凸出部， 所述绝缘层覆 盖所述基底以及多个凸出部。
2、根据权利要求 1所述的下部电极，其中所述基底上表面的绝缘层厚度 与所述凸出部上表面的绝缘层厚度相等。
3、根据权利要求 1或 2所述的下部电极，其中形成所述绝缘层的材料为 陶瓷、 氧化铝或云母。
4、根据权利要求 1-3任一项所述的下部电极， 其中所述凸出部的上表面 为平面或曲面。
5、根据权利要求 1-4任一项所述的下部电极， 其中所述凸出部以点阵形 式排布在所述基底上。
6、根据权利要求 1-5任一项所述的下部电极， 其中所述凸出部与所述基 底一体成型。
7、根据权利要求 1-5任一项所述的下部电极， 其中所述凸出部与所述基 底分别成型后再固定在一起。
8、 一种下部电极的制作方法， 包括：
形成具有多个凸出部的金属基板； 和
形成覆盖所述金属基板的绝缘层。
9、根据权利要求 8所述的制作方法， 其中所述金属基板还包括基底， 所 述多个凸出部设置在所述基底上。
10、 根据权利要求 9所述的制作方法， 其中所述基底和所述多个凸出部 一体成型。
11、 根据权利要求 9所述的制作方法， 其中所述基底和所述多个凸出部 分别成型后再固定在一起。
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