WO2013159526A1 - 发光二极管器件及其制造方法 - Google Patents

发光二极管器件及其制造方法 Download PDF

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Publication number
WO2013159526A1
WO2013159526A1 PCT/CN2012/085722 CN2012085722W WO2013159526A1 WO 2013159526 A1 WO2013159526 A1 WO 2013159526A1 CN 2012085722 W CN2012085722 W CN 2012085722W WO 2013159526 A1 WO2013159526 A1 WO 2013159526A1
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Prior art keywords
emitting diode
layer
diode device
type electrode
light emitting
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PCT/CN2012/085722
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English (en)
French (fr)
Inventor
王磊
李国琪
余志炎
浦荣生
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无锡华润华晶微电子有限公司
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Application filed by 无锡华润华晶微电子有限公司 filed Critical 无锡华润华晶微电子有限公司
Priority to US14/376,080 priority Critical patent/US9172002B2/en
Publication of WO2013159526A1 publication Critical patent/WO2013159526A1/zh
Priority to US14/862,978 priority patent/US9356213B2/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/08Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a plurality of light emitting regions, e.g. laterally discontinuous light emitting layer or photoluminescent region integrated within the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0062Processes for devices with an active region comprising only III-V compounds
    • H01L33/0075Processes for devices with an active region comprising only III-V compounds comprising nitride compounds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22Roughened surfaces, e.g. at the interface between epitaxial layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/385Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending at least partially onto a side surface of the semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0016Processes relating to electrodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Definitions

  • the present invention relates to a light emitting diode device and a method of fabricating the same, and more particularly to a high power light emitting diode device having improved light efficiency and a method of fabricating the same.
  • a light emitting diode device typically includes a diode region (generally referred to as an epitaxial layer) including an n-type layer, a p-type layer, and a pn junction therein, and the anode contact ohmically contacts the p-type layer The cathode contact ohmically contacts the n-type layer.
  • the diode region i.e., epitaxial layer
  • the epitaxial layer can be epitaxially formed on a substrate, and the epitaxial layer is typically made of a gallium nitride-based material.
  • sapphire is typically selected as the growth substrate of the epitaxial layer due to the limitation of the crystal structure and growth conditions of gallium nitride.
  • the existing technical solutions have the following problems: Since the thermal conductivity and the electrical conductivity of the sapphire are both poor, the GaN-based LED device has poor heat dissipation, short life, and complicated manufacturing process, thereby limiting the high. The application of power (ie high brightness) LEDs.
  • the P-type electrode blocks light, the P-type electrode needs to have a good ITO expansion layer, thereby making it low in light efficiency. And the manufacturing process is complicated.
  • one of the existing improvements employs silicon carbide (SiC) as a substrate and uses upper and lower electrode structures.
  • SiC silicon carbide
  • the improved solution effectively solves the above problems of heat dissipation and light blocking, the silicon carbide material is difficult to process, and its cost is higher than that of sapphire, thus restricting the scheme. Use and promote.
  • the existing improvement scheme uses a combination of bonding technology and lift-off technology to transfer the epitaxial layer of the gallium nitride-based light-emitting diode device to other substrates having high electrical conductivity and high thermal conductivity (for example, Based on Si, Cu and A1 alloy materials).
  • This improvement eliminates the adverse effects of sapphire substrates on GaN-based LED devices.
  • the bonded substrate has a low reflectance, in order to improve the light-emitting efficiency, it is necessary to vapor-deposit a reflective metal layer outside the ITO expanded layer of the LED chip.
  • the improved solution has the following problems: increased process difficulty and cost; fabrication of the light emitting diode device using a chip having a positive electrode structure; the area of the electrode in the light exiting surface blocks the light output , thereby reducing the light extraction efficiency; the LED chip is difficult to wire.
  • the present invention proposes a light emitting diode device and a method of fabricating the same.
  • a light emitting diode device comprising:
  • An epitaxial layer on one side of the substrate comprising an N-type layer, a P-type layer, and an active layer between the N-type layer and the P-type layer;
  • N-type electrode ohmically contacting the side of the N-type layer with respect to the substrate; ohmically contacting the side of the P-type layer opposite to the substrate a P-type electrode; one side and one side of the P-type electrode being electrically bonded to a side of the P-type layer;
  • the patterned substrate is electrically bonded to the other side of the adhesive layer; wherein the light emitting diode device is further included in the N-type electrode and the P-type electrode Room
  • the insulating layer electrically insulates the N-type electrode from the P-type electrode.
  • the substrate is a sapphire substrate.
  • the N-type layer is composed of an N-type gallium nitride material.
  • the P-type layer is composed of a P-type gallium nitride material.
  • the thickness of the N-type electrode ranges from 500 nm to 2 ⁇ m.
  • the thickness of the P-type electrode ranges from 500 nm to 2 ⁇ m.
  • the thickness of the insulating layer ranges from 50 nm to 500 nm.
  • the N-type electrode is in the form of a grid.
  • the P-type electrode is inside each grid cell of the grid-shaped N-type electrode, the P-type electrode and the N-type electrode It is electrically insulated by the insulating layer.
  • the light emitting diode device further includes at least one pad for the outer lead, and the at least one pad for the outer lead is located on the patterned substrate.
  • the patterned substrate is bonded to the P-type electrode and the N-type electrode through the adhesive layer.
  • a method for fabricating a light emitting diode device comprising the steps of:
  • A2 forming an N-type electrode, an insulating layer, and a P-type electrode on one side of the epitaxial layer, wherein the N-type electrode is electrically insulated from the P-type electrode by the insulating layer ;
  • the patterned substrate is bonded to the N-type electrode and the P-type electrode through an adhesive layer formed thereon.
  • the step (A1) further comprises: (B) cleaning the substrate on which the epitaxial structure is grown in a standard solution; the epitaxial layer of the pattern layer, the active layer, and the P-type layer.
  • step (A2) further comprises:
  • step (C4) A P-type electrode is evaporated onto the exposed P-type layer and forms an ohmic contact.
  • the step (A3) further comprises:
  • the patterned substrate is bonded to the N-type electrode and the P-type electrode through the adhesive layer by a flip chip technique.
  • the substrate is a sapphire substrate.
  • the N-type layer is composed of an N-type gallium nitride material.
  • the P-type layer is composed of a P-type gallium nitride material.
  • the thickness of the N-type electrode ranges from 500 nm to 2 ⁇ m.
  • the thickness of the P-type electrode ranges from 500 nm to 2 ⁇ m.
  • the insulating layer thickness in the range of 50nm-500nm t in the above disclosed embodiment preferably, the N- type electrode is a grid-like form.
  • the P-type electrode is inside each grid cell of the grid-shaped N-type electrode, the P-type electrode and the N-type electrode It is electrically insulated by the insulating layer.
  • the patterned substrate includes at least one pad for an outer lead, and the at least one pad for the outer lead is located on the patterned substrate.
  • the patterned substrate is bonded to the P-type electrode and the N-type electrode through the adhesive layer.
  • the light emitting diode device and the manufacturing method thereof have the following advantages: (1) Since the mirror-shaped P-type electrode having high reflectivity is used as the reflective layer, the luminous efficiency of the light emitting diode device is improved; Since the N-type electrode is in the form of a grid and the P-type electrode is inside each grid cell of the grid-shaped N-type electrode, a large area can be omitted Wire electrode, thereby improving the light extraction efficiency; (3) Since the pad is located on the patterned substrate instead of being located on the LED chip, it is easier to wire than the conventional chip; (4) It is high due to the use of a large area The reflectivity of the P-type electrode, so no additional expansion layer (such as ITO, ⁇ , etc.) is needed, thereby optimizing the manufacturing process; (5) The ⁇ electrode and the ⁇ electrode distribution structure are favorable for the ⁇ -type GaN above The current is expanded, thereby increasing the external quantum efficiency and increasing the light efficiency.
  • FIG. 1 is a schematic cross-sectional view of a light emitting diode device in accordance with an embodiment of the present invention
  • FIG. 2 is a schematic plan view of a light emitting diode device in accordance with an embodiment of the present invention
  • FIG. 3 is a flow chart of a method for fabricating a light emitting diode device in accordance with an embodiment of the present invention. detailed description
  • the light emitting diode device disclosed in the present invention comprises: a substrate 1; an epitaxial layer on one side of the substrate 1, the epitaxial layer comprising a ⁇ -type layer 2, a ⁇ -type layer 4 And an active layer 3 between the ⁇ -type layer and the ⁇ -type layer; ⁇ -type electrode 5 ohmically contacting the side of the ⁇ -type layer with respect to the substrate; ohmic ⁇ -type in contact with one side of the ⁇ -type layer with respect to the substrate Electrode 7; adhesive layer 8, one side of the adhesive layer 8 and the side of the N-type electrode 5 opposite to the N-type layer 2 and the P-type electrode 7 respectively One side of the P-type layer 4 is electrically bonded; the patterned substrate 9 is electrically bonded to the other side of the adhesive layer 8; wherein the light emitting diode
  • the device further includes an epitaxial layer on one side of the substrate 1, the epitaxial layer comprising a ⁇ -type layer 2, a ⁇ -type layer 4 And
  • the substrate 1 is a sapphire substrate (which has high light transmittance).
  • the N-type layer 2 is composed of an N-type gallium nitride material.
  • the P-type layer 4 is composed of a P-type gallium nitride material.
  • the active layer is a multiple quantum well active layer.
  • the N-type electrode 5 may be composed of one of the following or any combination thereof: Ni/Ag (nickel/silver) alloy, Ni/Au (nickel) / Gold) Alloy, Ti/Au (titanium/gold) alloy, Ti/Al/Ti/Au (titanium/aluminum/titanium/gold) alloy and Cr/Pt/Au (chromium/platinum/gold) alloy.
  • the Ni/Ag (nickel/silver) alloy includes a nickel layer and a silver layer, and so on.
  • the P-type electrode 7 may be composed of one of the following or any combination thereof: Ni/Ag (nickel/silver) alloy, Ni/Au (nickel) / Gold) Alloy, Ti/Au (titanium/gold) alloy, Ti/Al/Ti/Au (titanium/aluminum/titanium/gold) alloy and Cr/Pt/Au (chromium/platinum/gold) alloy.
  • the Ni/Ag (nickel/silver) alloy includes a nickel layer and a silver layer, and so on.
  • the P-type electrode 7 has a high reflectance.
  • the insulating layer is composed of a SiO 2 (silicon dioxide) material, or a SiN (silicon nitride) material, or a SiON (silicon oxynitride) material.
  • the insulating layer has high light transmittance
  • the adhesive layer 8 is an anisotropic conductive paste.
  • the anisotropic conductive paste has high thermal conductivity and high electrical conductivity.
  • the patterned substrate 9 has a surface metal conductive layer and has high thermal conductivity and electrical conductivity.
  • the thickness of the N-type electrode 5 ranges from 500 nm to 2 ⁇ m.
  • the thickness of the ⁇ -type electrode 7 ranges from 500 nm to 2 ⁇ m.
  • the thickness of the insulating layer ranges from 50 nm to 500 nm.
  • FIG. 2 is a schematic plan view of a light emitting diode device in accordance with an embodiment of the present invention.
  • the N-type electrode 5 is in the form of a mesh.
  • the P-type electrode 7 is inside each grid unit of the grid-shaped N-type electrode 5 ( The P-type electrode 7 and the N-type electrode 5 are electrically insulated by the insulating layer 6).
  • the light emitting diode device disclosed in the present invention further includes at least one pad 10 for the outer lead (exemplarily, in the embodiment shown in FIG. 2, the light emitting diode device includes two Pads) are located on the patterned substrate 9.
  • the patterned substrate 9 passes through the adhesive layer 8 and the P-type electrode 7 and the N- The type electrode 5 is bonded.
  • the mirror-shaped P-type electrode 7 having high reflectance is used as the reflective layer, the luminous efficiency of the light emitting diode device is improved.
  • the N-type electrode 5 is in the form of a grid and the P-type electrode 7 is inside each grid unit of the grid-like N-type electrode 5, Therefore, the wire electrode having a large area can be omitted, thereby improving the light extraction efficiency.
  • the pad 10 on the patterned substrate 9 after bonding is used for wire bonding (ie, the pad is on the patterned substrate 9 instead of being located on the LED chip), it is more conventional than the conventional chip. It is easy to make a line.
  • the method for fabricating a light emitting diode device disclosed by the present invention comprises the steps of: (A1) forming an epitaxial layer on a substrate; (A2) forming an N-type on one side of the epitaxial layer. An electrode, an insulating layer, and a P-type electrode, wherein the N-type electrode is electrically insulated from the P-type electrode by the insulating layer; (A3) passing the patterned substrate through a paste formed thereon A layer is bonded to the N-type electrode and the P-type electrode.
  • the step (A1) further includes: (B1) cleaning the substrate grown with the epitaxial structure in a standard solution; The epitaxial layer of the layer and the P-type layer.
  • the step (A2) further includes: (C1) vapor-depositing an N-type electrode to the N-type layer and forming An ohmic contact; (C2) depositing an insulating material over the epitaxial layer to form the insulating layer; (C3) etching the insulating layer material on the surface of the P-type layer using an etching solution, To expose the P-type layer; (C4) to deposit a P-type electrode onto the exposed P-type layer and form an ohmic contact.
  • the step (A3) further includes: (D1) patterning a surface metal conductive layer on the substrate using an etching solution, Forming the patterned substrate; (D2) coating an anisotropic conductive paste on the patterned substrate to form the adhesive layer; (D3) passing the patterned substrate through a flip chip technique
  • the adhesive layer is bonded to the N-type electrode and the P-type electrode.
  • the substrate is a sapphire substrate (which has high light transmittance).
  • the N-type layer is composed of an N-type gallium nitride material.
  • the P-type layer is composed of a P-type gallium nitride material.
  • the active layer is a multiple quantum well active layer.
  • the N-type electrode may be composed of one of the following or any combination thereof: Ni/Ag (nickel/silver) alloy, Ni /Au (nickel/gold) alloy, Ti/Au (titanium/gold) alloy, Ti/Al/Ti/Au (titanium/aluminum/titanium/gold) alloy and Cr/Pt/Au (chromium/platinum/gold) alloy .
  • the Ni/Ag (nickel/silver) alloy includes a nickel layer and a silver layer, and so on.
  • the P-type electrode may be composed of one of the following or any combination thereof: Ni/Ag (nickel/silver) alloy, Ni /Au (nickel/gold) alloy, Ti/Au (titanium/gold) alloy, Ti/Al/Ti/Au (titanium/aluminum/titanium/gold) alloy and Cr/Pt/Au (chromium/platinum/gold) alloy .
  • the Ni/Ag (nickel/silver) alloy includes a nickel layer and a silver layer, and so on.
  • the P-type electrode 7 has a high reflectance.
  • the insulating layer is made of a SiO 2 (silicon dioxide) material, or a SiN (silicon nitride) material, or a SiON (silicon oxynitride) material. Composition.
  • the insulating layer has high light transmittance
  • the adhesive layer has high thermal conductivity and high electrical conductivity.
  • the patterned substrate has high thermal conductivity and electrical conductivity.
  • the thickness of the N-type electrode ranges from 500 ⁇ to 2 ⁇ .
  • the thickness of the ⁇ -type electrode ranges from 500 ⁇ ⁇ to 2 ⁇ ⁇ .
  • the thickness of the insulating layer ranges from 50 nm to 500 nm.
  • the N-type electrode is in the form of a grid.
  • the P-type electrode is inside each grid cell of the grid-shaped N-type electrode (wherein the P -type electricity
  • the pole and the N-type electrode are electrically insulated by the insulating layer).
  • the patterned substrate includes at least one pad 10 for an outer lead (exemplarily, including two pads), which is located On the patterned substrate.
  • the patterned substrate is bonded to the P-type electrode and the N-type electrode through the adhesive layer.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
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Abstract

一种发光二极管器件及其制造方法。发光二极管器件包括:衬底(1);在衬底(1)的一侧上的外延层,外延层包括N-型层(2)、P-型层(4)和N-型层(2)和P-型层(4)之间的有源层(3);N-型电极(5);P-型电极(7);粘合层(8)以及图案化的基板(9);其中,发光二极管器件还包括在N-型电极(5)和P-型电极(7)之间的绝缘层(6),绝缘层(6)将N-型电极(5)和P-型电极(7)电性绝缘。发光二极管器件及其制造方法可以提高发光二极管器件的发光效率以及出光效率,且比常规的芯片打线容易,并可以优化制造工艺。

Description

发光二极管器件及其制造方法 本申请要求在 2012年 04月 27日提交中国专利局、 申请号为 201210127827.X、 发明名称 为 "发光二极管器件及其制造方法" 的中国专利申请的优先权, 其全部内容通过引用结合 在本申请中。
技术领域
本发明涉及发光二极管器件及其制造方法, 更具体地, 涉及具有提高的 光效的大功率发光二极管器件及其制造方法。 背景技术
发光二极管 (LED ) 器件是公知的固态照明元件, 一旦向其施加电压, 其能够产生光。 发光二极管器件通常包括二极管区域, 所述二极管区域(通 常称为外延层) 包括在其中的 n-型层、 P-型层和 p-n结, 并且阳极触点欧姆性 地接触所述 P-型层而阴极触点欧姆性地接触所述 n-型层。 典型地, 所述二极管 区域(即外延层)可以在衬底上被外延地形成, 并且所述外延层通常由基于 氮化镓的材料制成。 此外, 由于氮化镓的晶体结构和生长条件的限制, 典型 地选择蓝宝石作为所述外延层的生长衬底。
然而, 现有的技术方案存在如下问题: 由于蓝宝石的热导率和电导率均 较差, 故导致基于氮化镓的发光二极管器件散热差、 寿命短并且其制造工艺 较为复杂, 因而限制了高功率 (即高亮度)发光二极管的应用。 此外, 针对 水平正装电极结构的基于氮化镓的发光二极管器件而言,由于 P-型电极会遮挡 光, 故该 P-型电极需要具有良好的 ITO扩展层, 由此使其光效较低并且制造工 艺复杂。
为了解决上述问题, 现有的改进方案之一釆用碳化硅( SiC )作为衬底并 使用上下电极结构。 然而, 虽然该改进方案有效地解决了上述散热和挡光问 题, 但碳化硅材料难于加工, 且其成本比蓝宝石更高, 故制约了该方案的使 用和推广。
此外, 现有的改进方案之二釆用相结合的键合技术和剥离技术, 从而将 基于氮化镓的发光二极管器件的外延层转移到其它具有高电导率和高热导率 的基板(例如由基于 Si、 Cu和 A1的合金材料制成)上。 该改进方案消除了蓝 宝石衬底对基于氮化镓的发光二极管器件带来的不利影响。 然而, 由于键合 基板具有较低的反射率, 故为了提高出光效率, 必须在 LED芯片的 ITO扩展层 之外蒸镀反射金属层。 但是, 由于使用了反射金属层和键合技术, 故该改进 方案存在如下问题: 增加了工艺难度和成本; 不能使用具有正装电极结构的 芯片制造发光二极管器件; 出光面中电极的面积阻挡了出光, 从而降低了出 光效率; LED芯片的打线难度高。
因此, 存在如下需求: 提供一种具有提高的光效和改进的电极结构的发 光二极管器件(尤其是大功率发光二极管器件)及其制造方法。 发明内容
为了解决上述现有技术方案中所存在的问题, 本发明提出了一种发光二 极管器件及其制造方法。
本发明的目的是通过以下技术方案实现的:
一种发光二极管器件, 所述发光二极管器件包括:
衬底;
在所述衬底的一侧上的外延层, 所述外延层包括 N-型层、 P-型层和所述 N-型层和 P-型层之间的有源层;
欧姆性地与所述 N-型层的相对于所述衬底的一侧相接触的 N-型电极; 欧姆性地与所述 P-型层的相对于所述衬底的一侧相接触的 P-型电极; 一侧和所述 P-型电极的相对于所述 P-型层的一侧电性粘合;
图案化的基板, 所述图案化的基板与所述粘合层的另一侧电性粘合; 其中, 所述发光二极管器件还包括在所述 N-型电极和所述 P-型电极之间 的绝缘层, 所述绝缘层将所述 N-型电极和所述 P-型电极电性绝缘。
在上面所公开的方案中, 优选地, 所述衬底是蓝宝石衬底。
在上面所公开的方案中, 优选地, 所述 N-型层由 N-型氮化镓材料构成。 在上面所公开的方案中, 优选地, 所述 P-型层由 P-型氮化镓材料构成。 在上面所公开的方案中, 优选地, 所述 N-型电极的厚度的范围为 500nm-2 μ m。
在上面所公开的方案中, 优选地, 所述 P-型电极的厚度的范围为 500nm-2 μ m。
在上面所公开的方案中,优选地,所述绝缘层的厚度的范围为 50nm-500nm。 在上面所公开的方案中, 优选地, 所述 N-型电极是网格状的形式。
在上面所公开的方案中, 优选地, 所述 P-型电极在所述网格状的 N-型电 极的每个网格单元的内部, 所述 P-型电极和所述 N-型电极被所述绝缘层电性 绝缘。
在上面所公开的方案中, 优选地, 所述发光二极管器件还包括至少一个 用于外引线的焊盘, 并且所述至少一个用于外引线的焊盘位于所述图案化的 基板上。
在上面所公开的方案中, 优选地, 所述图案化的基板通过所述粘合层而 与所述 P-型电极和所述 N-型电极键合。
本发明的目的还可以通过以下技术方案实现:
一种用于制造发光二极管器件的方法, 所述用于制造发光二极管器件的 方法包括如下步骤:
( A1 )在衬底上形成外延层;
( A2 )在所述外延层的一侧上形成 N-型电极、绝缘层和 P-型电极,其中, 所述 N-型电极通过所述绝缘层而与所述 P-型电极电性绝缘;
( A3 )将图案化的基板通过形成于其上的粘合层键合到所述 N-型电极和 所述 P-型电极上。
在上面所公开的方案中, 优选地, 所述步骤(A1 )进一步包括: ( Bl )将生长有外延结构的衬底在标准溶液中清洗; 型层、 有源层和 P-型层的外延层。
在上面所公开的方案中, 优选地, 所述步骤(A2 )进一步包括:
( C1 )将 N-型电极蒸镀到所述 N-型层并形成欧姆性的接触;
( C2 )将绝缘材料沉积于所述外延层之上以形成所述绝缘层;
( C3 )使用腐蚀液将所述 P-型层的表面上的绝缘层材料刻蚀掉, 以暴露 出所述 P-型层;
( C4 )将 P-型电极蒸镀到所述被暴露的 P-型层上并形成欧姆性的接触。 在上面所公开的方案中, 优选地, 所述步骤(A3 )进一步包括:
( D1 )使用腐蚀液将所述基板上的表面金属导电层图案化, 以形成所述 图案化的基板;
( D2 )在所述图案化的基板上涂敷异性导电胶以形成所述粘合层;
( D3 )釆用倒装技术将所述图案化的基板通过所述粘合层键合到所述 N- 型电极和所述 P-型电极上。
在上面所公开的方案中, 优选地, 所述衬底是蓝宝石衬底。
在上面所公开的方案中, 优选地, 所述 N-型层由 N-型氮化镓材料构成。 在上面所公开的方案中, 优选地, 所述 P-型层由 P-型氮化镓材料构成。 在上面所公开的方案中, 优选地, 所述 N-型电极的厚度的范围为 500nm-2 μ m。
在上面所公开的方案中, 优选地, 所述 P-型电极的厚度的范围为 500nm-2 μ m。
在上面所公开的方案中,优选地,所述绝缘层的厚度的范围为 50nm-500nmt 在上面所公开的方案中, 优选地, 所述 N-型电极是网格状的形式。
在上面所公开的方案中, 优选地, 所述 P-型电极在所述网格状的 N-型电 极的每个网格单元的内部, 所述 P-型电极和所述 N-型电极被所述绝缘层电性 绝缘。 在上面所公开的方案中, 优选地, 所述图案化的基板包括至少一个用于 外引线的焊盘, 所述至少一个用于外引线的焊盘位于所述图案化的基板上。
在上面所公开的方案中, 优选地, 所述图案化的基板通过所述粘合层而 与所述 P-型电极和所述 N-型电极键合。
本发明所公开的发光二极管器件及其制造方法具有如下优点: (1 ) 由于 使用了镜面化的具有高反射率的 P-型电极作为反射层,故提高了发光二极管器 件的发光效率; (2 ) 由于所述 N-型电极是网格状的形式并且所述 P-型电极在 所述网格状的 N-型电极的每个网格单元的内部, 故可以省去具有较大面积的 打线电极, 从而提高了出光效率; (3 ) 由于焊盘位于图案化的基板上, 而不 是位于 LED芯片上, 故比常规的芯片打线容易; (4 ) 由于使用了大面积的具 有高的反射率的 P-型电极, 故不需要附加的扩展层(例如 ITO、 ΖηΟ等), 从而 优化了制造工艺; (5 ) Ν电极和 Ρ电极分布结构有利于 Ρ-型氮化镓上面的电流 扩展, 从而提高了外部量子效率, 增加了光效。 附图说明
结合附图, 本发明的技术特征以及优点将会被本领域技术人员更好地理 解, 其中:
图 1是根据本发明的实施例的发光二极管器件的示意性横截面视图; 图 2是根据本发明的实施例的发光二极管器件的示意性平面图;
图 3是根据本发明的实施例的用于制造发光二极管器件的方法的流程图。 具体实施方式
图 1 是根据本发明的实施例的发光二极管器件的示意性横截面视图。 如 图 1所示, 本发明所公开的发光二极管器件包括: 衬底 1 ; 在所述衬底 1的一 侧上的外延层, 所述外延层包括 Ν-型层 2、 Ρ-型层 4和所述 Ν-型层和 Ρ-型层 之间的有源层 3; 欧姆性地与所述 Ν-型层的相对于所述衬底的一侧相接触的 Ν-型电极 5; 欧姆性地与所述 Ρ-型层的相对于所述衬底的一侧相接触的 Ρ-型 电极 7; 粘合层 8, 所述粘合层 8的一侧分别与所述 N-型电极 5的相对于所述 N-型层 2的一侧和所述 P-型电极 7的相对于所述 P-型层 4的一侧电性粘合; 图案化的基板 9, 所述图案化的基板 9与所述粘合层 8的另一侧电性粘合; 其 中, 所述发光二极管器件还包括在所述 N-型电极 5和所述 P-型电极 7之间的 绝缘层 6, 所述绝缘层 6将所述 N-型电极 5和所述 P-型电极 7电性绝缘。
优选地, 在本发明所公开的发光二极管器件中, 所述衬底 1 是蓝宝石衬 底(其具有高的透光率)。
优选地, 在本发明所公开的发光二极管器件中, 所述 N-型层 2由 N-型氮 化镓材料构成。
优选地, 在本发明所公开的发光二极管器件中, 所述 P-型层 4由 P-型氮 化镓材料构成。
优选地, 在本发明所公开的发光二极管器件中, 所述有源层是多量子阱 有源层。
优选地, 在本发明所公开的发光二极管器件中, 所述 N-型电极 5可以由 下列项中的一个或其任意组合而构成: Ni/Ag (镍 /银)合金、 Ni/Au (镍 /金) 合金、 Ti/Au (钛 /金)合金、 Ti/Al/Ti/Au (钛 /铝 /钛 /金)合金和 Cr/Pt/Au (铬 / 铂 /金)合金。 例如, 所述 Ni/Ag (镍 /银)合金包括镍层和银层, 以此类推。
优选地, 在本发明所公开的发光二极管器件中, 所述 P-型电极 7可以由 下列项中的一个或其任意组合而构成: Ni/Ag (镍 /银)合金、 Ni/Au (镍 /金) 合金、 Ti/Au (钛 /金)合金、 Ti/Al/Ti/Au (钛 /铝 /钛 /金)合金和 Cr/Pt/Au (铬 / 铂 /金)合金。 例如, 所述 Ni/Ag (镍 /银)合金包括镍层和银层, 以此类推。 此外, 所述 P-型电极 7具有高的反射率。
优选地, 在本发明所公开的发光二极管器件中, 所述绝缘层由 Si02 (二 氧化硅)材料, 或 SiN (氮化硅)材料, 或 SiON (氮氧化硅)材料构成。 此 外, 所述绝缘层具有高的透光率
优选地, 在本发明所公开的发光二极管器件中, 所述粘合层 8是异性导 电胶。 所述异性导电胶具有高的导热率和高的导电率。 优选地, 在本发明所公开的发光二极管器件中, 所述图案化的基板 9具 有表面金属导电层, 并且具有高的导热率和导电率。
优选地, 在本发明所公开的发光二极管器件中, 所述 N-型电极 5的厚度 的范围为 500nm-2 μ πι。
优选地, 在本发明所公开的发光二极管器件中, 所述 Ρ-型电极 7的厚度 的范围为 500nm-2 μ πι。
优选地, 在本发明所公开的发光二极管器件中, 所述绝缘层的厚度的范 围为 50nm-500nm。
图 2是根据本发明的实施例的发光二极管器件的示意性平面图。如图 1-2 所示, 优选地, 在本发明所公开的发光二极管器件中, 所述 N-型电极 5是网 格状的形式。
如图 1-2所示, 优选地, 在本发明所公开的发光二极管器件中, 所述 P- 型电极 7在所述网格状的 N-型电极 5的每个网格单元的内部(其中, 所述 P- 型电极 7和所述 N-型电极 5被所述绝缘层 6电性绝缘)。
如图 2所示, 优选地, 本发明所公开的发光二极管器件还包括至少一个 用于外引线的焊盘 10 (示例性地, 在图 2所示的实施例中, 该发光二极管器 件包括两个焊盘), 其位于所述图案化的基板 9上。
如图 1-2所示, 优选地, 在本发明所公开的发光二极管器件中, 所述图案 化的基板 9通过所述粘合层 8而与所述 P-型电极 7和所述 N-型电极 5键合。
由上可见,由于使用了镜面化的具有高反射率的 P-型电极 7作为反射层, 故提高了发光二极管器件的发光效率。 此外, 由于釆用了如下结构: 所述 N- 型电极 5是网格状的形式并且所述 P-型电极 7在所述网格状的 N-型电极 5的 每个网格单元的内部, 故可以省去具有较大面积的打线电极, 从而提高了出 光效率。 另外, 由于使用键合后的所述图案化的基板 9上的所述焊盘 10进行 打线(即焊盘位于图案化的基板 9上, 而不是位于 LED芯片上), 故比常规 的芯片打线容易。
图 3是根据本发明的实施例的用于制造发光二极管器件的方法的流程图。 如图 3所示, 本发明所公开的用于制造发光二极管器件的方法包括如下步骤: ( A1 )在衬底上形成外延层; (A2 )在所述外延层的一侧上形成 N-型电极、 绝缘层和 P-型电极, 其中, 所述 N-型电极通过所述绝缘层而与所述 P-型电极 电性绝缘; (A3 )将图案化的基板通过形成于其上的粘合层键合到所述 N-型 电极和所述 P-型电极上。
如图 3 所示, 在本发明所公开的用于制造发光二极管器件的方法中, 所 述步骤( A1 )进一步包括:(B1 )将生长有外延结构的衬底在标准溶液中清洗; 有源层和 P-型层的外延层。
如图 3 所示, 在本发明所公开的用于制造发光二极管器件的方法中, 所 述步骤(A2 )进一步包括: (C1 )将 N-型电极蒸镀到所述 N-型层并形成欧姆 性的接触;(C2 )将绝缘材料沉积于所述外延层之上以形成所述绝缘层; ( C3 ) 使用腐蚀液将所述 P-型层的表面上的绝缘层材料刻蚀掉, 以暴露出所述 P-型 层; ( C4 )将 P-型电极蒸镀到所述被暴露的 P-型层上并形成欧姆性的接触。
如图 3 所示, 在本发明所公开的用于制造发光二极管器件的方法中, 所 述步骤(A3 )进一步包括: (D1 )使用腐蚀液将所述基板上的表面金属导电 层图案化, 以形成所述图案化的基板; (D2 )在所述图案化的基板上涂敷异性 导电胶以形成所述粘合层; (D3 )釆用倒装技术将所述图案化的基板通过所述 粘合层键合到所述 N-型电极和所述 P-型电极上。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述衬 底是蓝宝石衬底(其具有高的透光率)。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 N- 型层由 N-型氮化镓材料构成。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 P- 型层由 P-型氮化镓材料构成。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述有 源层是多量子阱有源层。 优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 N- 型电极可以由下列项中的一个或其任意组合而构成: Ni/Ag (镍 /银)合金、 Ni/Au (镍 /金)合金、 Ti/Au (钛 /金)合金、 Ti/Al/Ti/Au (钛 /铝 /钛 /金)合金 和 Cr/Pt/Au (铬 /铂 /金)合金。 例如, 所述 Ni/Ag (镍 /银)合金包括镍层和银 层, 以此类推。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 P- 型电极可以由下列项中的一个或其任意组合而构成: Ni/Ag (镍 /银)合金、 Ni/Au (镍 /金)合金、 Ti/Au (钛 /金)合金、 Ti/Al/Ti/Au (钛 /铝 /钛 /金)合金 和 Cr/Pt/Au (铬 /铂 /金)合金。 例如, 所述 Ni/Ag (镍 /银)合金包括镍层和银 层, 以此类推。 此外, 所述 P-型电极 7具有高的反射率。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述绝 缘层由 Si02 (二氧化硅 )材料, 或 SiN (氮化硅)材料, 或 SiON (氮氧化硅) 材料构成。 此外, 所述绝缘层具有高的透光率
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述粘 合层具有高的导热率和高的导电率。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述图 案化的基板具有高的导热率和导电率。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 N- 型电极的厚度的范围为 500ηπι-2 μ πι。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 Ρ- 型电极的厚度的范围为 500ηΐΉ-2 μ πι。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述绝 缘层的厚度的范围为 50nm-500nm。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 N- 型电极是网格状的形式。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述 P- 型电极在所述网格状的 N-型电极的每个网格单元的内部(其中, 所述 P-型电 极和所述 N-型电极被所述绝缘层电性绝缘)。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述图 案化的基板包括至少一个用于外引线的焊盘 10 (示例性地, 包括两个焊盘), 其位于所述图案化的基板上。
优选地, 在本发明所公开的用于制造发光二极管器件的方法中, 所述图 案化的基板通过所述粘合层而与所述 P-型电极和所述 N-型电极键合。
由上可见, 由于使用了大面积的具有高的反射率的 P-型电极, 故不需要 附加的扩展层(例如 ITO、 ΖηΟ等), 从而优化了制造工艺。
尽管本发明是通过上述的优选实施方式进行描述的, 但是其实现形式并 不局限于上述的实施方式。 应该认识到: 在不脱离本发明主旨和范围的情况

Claims

权 利 要 求
1、 一种发光二极管器件, 所述发光二极管器件包括:
衬底;
在所述衬底的一侧上的外延层, 所述外延层包括 N-型层、 P-型层和所述 N-型层和 P-型层之间的有源层;
欧姆性地与所述 N-型层的相对于所述衬底的一侧相接触的 N-型电极; 欧姆性地与所述 P-型层的相对于所述衬底的一侧相接触的 P-型电极; 一侧和所述 P-型电极的相对于所述 P-型层的一侧电性粘合;
图案化的基板, 所述图案化的基板与所述粘合层的另一侧电性粘合; 其中, 所述发光二极管器件还包括在所述 N-型电极和所述 P-型电极之间 的绝缘层, 所述绝缘层将所述 N-型电极和所述 P-型电极电性绝缘。
2、 根据权利要求 1所述的发光二极管器件, 其特征在于, 所述衬底是蓝 宝石^ "底。
3、根据权利要求 2所述的发光二极管器件, 其特征在于, 所述 N-型层由 N-型氮化镓材料构成。
4、 根据权利要求 3所述的发光二极管器件, 其特征在于, 所述 P-型层由 P-型氮化镓材料构成。
5、根据权利要求 4所述的发光二极管器件, 其特征在于, 所述 N-型电极 的厚度的范围为 500nm-2 μ m。
6、 根据权利要求 5所述的发光二极管器件, 其特征在于, 所述 P-型电极 的厚度的范围为 500nm-2 μ m。
7、 根据权利要求 6所述的发光二极管器件, 其特征在于, 所述绝缘层的 厚度的范围为 50nm-500nm。
8、根据权利要求 7所述的发光二极管器件, 其特征在于, 所述 N-型电极 是网格状的形式。
9、 根据权利要求 8所述的发光二极管器件, 其特征在于, 所述 P-型电极 在所述网格状的 N-型电极的每个网格单元的内部, 所述 P-型电极和所述 N- 型电极被所述绝缘层电性绝缘。
10、 根据权利要求 9所述的发光二极管器件, 其特征在于, 所述发光二 极管器件还包括至少一个用于外引线的焊盘, 并且所述至少一个用于外引线 的焊盘位于所述图案化的基板上。
11、 根据权利要求 10所述的发光二极管器件, 其特征在于, 所述图案化 的基板通过所述粘合层而与所述 P-型电极和所述 N-型电极键合。
12、 一种用于制造发光二极管器件的方法, 所述用于制造发光二极管器 件的方法包括如下步骤:
( A1 )在衬底上形成外延层;
( A2 )在所述外延层的一侧上形成 N-型电极、绝缘层和 P-型电极,其中, 所述 N-型电极通过所述绝缘层而与所述 P-型电极电性绝缘;
( A3 )将图案化的基板通过形成于其上的粘合层键合到所述 N-型电极和 所述 P-型电极上。
13、 根据权利要求 12所述的用于制造发光二极管器件的方法, 其特征在 于, 所述步骤(A1 )进一步包括:
( B1 )将生长有外延结构的衬底在标准溶液中清洗; 型层、 有源层和 P-型层的外延层。
14、 根据权利要求 13所述的用于制造发光二极管器件的方法, 其特征在 于, 所述步骤(A2 )进一步包括:
( C1 )将 N-型电极蒸镀到所述 N-型层并形成欧姆性的接触;
( C2 )将绝缘材料沉积于所述外延层之上以形成所述绝缘层;
( C3 )使用腐蚀液将所述 P-型层的表面上的绝缘层材料刻蚀掉, 以暴露 出所述 P-型层;
( C4 )将 P-型电极蒸镀到所述被暴露的 P-型层上并形成欧姆性的接触。
15、 根据权利要求 14所述的用于制造发光二极管器件的方法, 其特征在 于, 所述步骤(A3 )进一步包括:
( D1 )使用腐蚀液将所述基板上的表面金属导电层图案化, 以形成所述 图案化的基板;
( D2 )在所述图案化的基板上涂敷异性导电胶以形成所述粘合层; ( D3 )釆用倒装技术将所述图案化的基板通过所述粘合层键合到所述 N- 型电极和所述 P-型电极上。
16、 根据权利要求 15所述的用于制造发光二极管器件的方法, 其特征在 于, 所述衬底是蓝宝石衬底。
17、 根据权利要求 16所述的用于制造发光二极管器件的方法, 其特征在 于, 所述 N-型层由 N-型氮化镓材料构成。
18、 根据权利要求 17所述的用于制造发光二极管器件的方法, 其特征在 于, 所述 P-型层由 P-型氮化镓材料构成。
19、 根据权利要求 18所述的用于制造发光二极管器件的方法, 其特征在 于, 所述 N-型电极的厚度的范围为 500nm-2 μ m。
20、 根据权利要求 19所述的用于制造发光二极管器件的方法, 其特征在 于, 所述 P-型电极的厚度的范围为 500nm-2 μ m。
21、 根据权利要求 20所述的用于制造发光二极管器件的方法, 其特征在 于, 所述绝缘层的厚度的范围为 50nm-500nm。
22、 根据权利要求 21所述的用于制造发光二极管器件的方法, 其特征在 于, 所述 N-型电极是网格状的形式。
23、 根据权利要求 22所述的用于制造发光二极管器件的方法, 其特征在 于, 所述 P-型电极在所述网格状的 N-型电极的每个网格单元的内部, 所述 P- 型电极和所述 N-型电极被所述绝缘层电性绝缘。
24、 根据权利要求 23所述的用于制造发光二极管器件的方法, 其特征在 于, 所述图案化的基板包括至少一个用于外引线的焊盘, 所述至少一个用于 外引线的焊盘位于所述图案化的基板上。
25、 根据权利要求 24所述的用于制造发光二极管器件的方法, 其特征在 于, 所述图案化的基板通过所述粘合层而与所述 P-型电极和所述 N-型电极键 合。
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