WO2013125172A1 - 不揮発性記憶装置およびその製造方法 - Google Patents
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- WO2013125172A1 WO2013125172A1 PCT/JP2013/000753 JP2013000753W WO2013125172A1 WO 2013125172 A1 WO2013125172 A1 WO 2013125172A1 JP 2013000753 W JP2013000753 W JP 2013000753W WO 2013125172 A1 WO2013125172 A1 WO 2013125172A1
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
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- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/22—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the deposition of inorganic material, other than metallic material
- C23C16/30—Deposition of compounds, mixtures or solid solutions, e.g. borides, carbides, nitrides
- C23C16/40—Oxides
- C23C16/405—Oxides of refractory metals or yttrium
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/20—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices comprising selection components having two electrodes, e.g. diodes
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- H—ELECTRICITY
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- H10B—ELECTRONIC MEMORY DEVICES
- H10B63/00—Resistance change memory devices, e.g. resistive RAM [ReRAM] devices
- H10B63/80—Arrangements comprising multiple bistable or multi-stable switching components of the same type on a plane parallel to the substrate, e.g. cross-point arrays
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- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/011—Manufacture or treatment of multistable switching devices
- H10N70/021—Formation of the switching material, e.g. layer deposition
- H10N70/023—Formation of the switching material, e.g. layer deposition by chemical vapor deposition, e.g. MOCVD, ALD
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- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/20—Multistable switching devices, e.g. memristors
- H10N70/24—Multistable switching devices, e.g. memristors based on migration or redistribution of ionic species, e.g. anions, vacancies
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/821—Device geometry
- H10N70/826—Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
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- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N—ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10N70/00—Solid-state devices without a potential-jump barrier or surface barrier, and specially adapted for rectifying, amplifying, oscillating or switching
- H10N70/801—Constructional details of multistable switching devices
- H10N70/881—Switching materials
- H10N70/883—Oxides or nitrides
- H10N70/8833—Binary metal oxides, e.g. TaOx
Definitions
- the present invention relates to a nonvolatile memory device using a resistance change element, and more particularly, to a nonvolatile memory device having a laminated structure of variable resistance layers having different film densities and a method for manufacturing the same.
- Patent Document 1 discloses a resistance change element including a first electrode layer, a resistance change layer, and a second electrode layer.
- the resistance change layer is formed by stacking two tantalum oxide layers having different oxygen contents. That is, the resistance change layer is composed of a laminated structure of the first tantalum oxide layer and the second tantalum oxide layer, and the oxygen content of the second tantalum oxide material layer constituting the second tantalum oxide layer. The rate is higher than the oxygen content of the first tantalum oxide material layer constituting the first tantalum oxide layer. It is disclosed that the second tantalum oxide layer having a high oxygen content is formed by oxygen plasma treatment of the first tantalum oxide layer.
- Non-Patent Document 1 discloses a nonvolatile memory device including a resistance change element using two transition metal oxide layers formed using a transition metal oxide as a material.
- transition metal oxides four types of NiO, TiO, HfO 2 and ZrO 2 are disclosed.
- the variable resistance element is manufactured in order to allow a layer formed by stacking two tantalum oxide layers having different oxygen contents to function as a variable resistance layer that transitions between a high resistance state and a low resistance state. Thereafter, there is a case where an initial break operation (initial breakdown operation) for applying a high initial break voltage is required once in the initial stage. When this initial break voltage is applied, a part of the tantalum oxide layer having a high resistance value with a high oxygen content is short-circuited locally (breaks to form a conductive path). Transition to a state in which a resistance change occurs.
- the voltage value of the initial break voltage described above is generally larger than the voltage value of the voltage pulse applied to change the resistance state of the resistance change layer during normal operation of the nonvolatile memory device.
- a second tantalum oxide layer having a high oxygen content is formed by oxygen plasma treatment.
- oxygen plasma treatment oxygen ions or the like are implanted from the film surface, and oxygen diffuses between defects and atoms. Therefore, in principle, the number of atoms constituting the thin film increases.
- the second tantalum oxide layer (metal oxide layer, second resistance change layer) formed by the oxygen plasma treatment has few defects, is dense, and has a high film density. For this reason, the initial break voltage applied to the variable resistance element in the initial break operation increases.
- the metal oxide layer is formed by a film forming process such as a sputtering method, there are more defects in the film than in the case of oxygen plasma treatment. For this reason, the initial break voltage is lower than in the case of the oxygen plasma treatment, but there is a problem that the reliability is lowered.
- an object of the present invention is to reduce the initial break voltage and prevent the deterioration of reliability in a nonvolatile memory device including a resistance change element having two metal oxide layers having different degrees of oxygen deficiency.
- a nonvolatile memory device includes an upper electrode layer, a lower electrode layer, and the upper electrode layer and the lower electrode layer, the upper electrode layer, A nonvolatile memory device comprising a resistance change element having a resistance change layer that reversibly changes based on an electric pulse applied between the lower electrode layer and continues to hold the state.
- the variable resistance layer includes a first variable resistance layer composed of an oxygen-deficient first metal oxide and a second metal oxide having a different degree of oxygen deficiency from the first metal oxide.
- the second resistance change layer includes a non-metallic element A different from oxygen, and the first metal constituting the first metal oxide is M.
- composition MO x the composition of the second resistance variable layer when expressed as NO y A z, x ⁇ ( y + z) satisfies the said resistivity of the second resistance variable layer, the first resistance variable layer
- the film density of the second variable resistance layer is greater than the resistivity, and is smaller than the theoretical film density in the stoichiometric composition of the second metal oxide.
- the nonvolatile memory device of the present invention it is possible to reduce the initial break voltage and prevent deterioration of reliability. Furthermore, according to the method for manufacturing a nonvolatile memory device of the present invention, it is possible to manufacture a nonvolatile memory device capable of reducing the initial break voltage and preventing the decrease in reliability.
- FIG. 1 is a cross-sectional view illustrating a configuration example of the variable resistance nonvolatile memory device according to the first embodiment.
- FIG. 2 is a cross-sectional view illustrating a partial configuration example of an evaluation apparatus including a resistance change element for evaluation.
- FIG. 3 is a diagram illustrating the relationship between the number of pulse applications and the resistance value in the normal operation of the variable resistance nonvolatile memory device according to the first embodiment.
- FIG. 4 is a diagram illustrating the relationship between the initial resistance value of the nonvolatile memory device including the evaluation variable resistance element and the voltage value of the initial break voltage.
- FIG. 5 is a diagram illustrating the relationship between the film density and the initial break voltage value of the nonvolatile memory device including the resistance change element for evaluation.
- FIG. 1 is a cross-sectional view illustrating a configuration example of the variable resistance nonvolatile memory device according to the first embodiment.
- FIG. 2 is a cross-sectional view illustrating a partial configuration example of an evaluation apparatus including a resistance change
- FIG. 6A is a cross-sectional view illustrating a configuration example of the variable resistance nonvolatile memory device according to Embodiment 2.
- FIG. 6B is a cross-sectional view illustrating a configuration example of a variable resistance nonvolatile memory device according to a modification of Embodiment 2.
- FIG. 7A is a plan view showing the configuration of the nonvolatile memory device according to Embodiment 3.
- FIG. 7B is a cross-sectional view showing the configuration of the nonvolatile memory device according to Embodiment 3.
- FIG. 8A is an enlarged plan view showing portions related to the resistance change element and the non-ohmic element in the nonvolatile memory device according to Embodiment 3.
- FIG. 8B is a cross-sectional view showing, in an enlarged manner, portions related to the resistance change element and the non-ohmic element in the nonvolatile memory device according to Embodiment 3.
- FIG. 9 is a schematic circuit diagram illustrating a circuit configuration example of the nonvolatile memory device according to the third embodiment.
- FIG. 10 is a cross-sectional view showing a state in which the lower electrode wiring and the interlayer insulating layer are formed on the substrate on which the active element is formed in the method for manufacturing the nonvolatile memory device according to the third embodiment.
- FIG. 11A is a plan view showing a state where contact holes are formed in the interlayer insulating layer in the method for manufacturing the nonvolatile memory device according to Embodiment 3.
- FIG. 11B is a cross-sectional view corresponding to 3A-3A ′ of FIG. 11A.
- FIG. 12 is a cross-sectional view showing a state in which the lower electrode material constituting the lower electrode layer is deposited in the method for manufacturing the nonvolatile memory device according to the third embodiment.
- FIG. 13A is a plan view (top view) showing a state where a lower electrode layer is embedded in a contact hole in the method for manufacturing a nonvolatile memory device according to Embodiment 3.
- FIG. 13B is a cross-sectional view corresponding to 4A-4A ′ of FIG. 13A.
- FIG. 14A shows a method of manufacturing a nonvolatile memory device according to Embodiment 3, in which a first metal oxide constituting the first resistance change layer and a second metal oxide constituting the second resistance change layer are continuously formed. It is a top view (top view) which shows the state laminated
- FIG. 14B is a cross-sectional view corresponding to 5A-5A ′ of FIG. 14A.
- FIG. 15A is a plan view (top view) showing a state after the resistance change element and the non-ohmic element are formed in the manufacturing method of the nonvolatile memory device according to Embodiment 3.
- FIG. 15B is a cross-sectional view corresponding to 6A-6A ′ of FIG. 15A.
- the nonvolatile memory device according to the present embodiment is interposed between an upper electrode layer, a lower electrode layer, and the upper electrode layer and the lower electrode layer, and between the upper electrode layer and the lower electrode layer.
- the nonvolatile memory device having the above-described configuration is configured by a stacked structure of a first resistance change layer made of an oxygen-deficient metal oxide and a second resistance change layer having a higher resistivity than the first resistance change layer. Since the second resistance change layer is configured to include the nonmetallic element A different from oxygen, defects in the second resistance change layer increase, and the conductive path (filament) starts from the defects. Therefore, the initial break voltage of the resistance change element can be reduced.
- the atomic radius of the non-metallic element may be larger than the atomic radius of oxygen.
- the atomic weight of the nonmetallic element may be smaller than the atomic weight of oxygen.
- the film density of the second variable resistance layer is changed to a stoichiometric metal oxide theoretical film. It becomes possible to make the density lower than the density.
- the film density of the second resistance change layer is lower than the theoretical film density of the metal oxide having the stoichiometric composition.
- nonmetallic element may be any of boron, nitrogen, and carbon.
- the nonmetallic element may be carbon, and the carbon content of the second resistance change layer may be 2 [atm%] or more and 45 [atm%] or less.
- the film density of the second variable resistance layer can be made lower than the theoretical film density of the stoichiometric metal oxide.
- the conductive path can be formed in the second resistance change layer at a lower voltage than before, the initial break voltage of the resistance change element can be reduced.
- the film density of the second variable resistance layer may be 4 [g / cm 3 ] or more and 7 [g / cm 3 ] or less.
- the film density of the second resistance change layer and the initial break voltage have a relationship that the initial break voltage decreases as the film density of the second resistance change layer decreases, and the film density is 4 [g / cm 3 ] or more and 7 [g / Cm 3 ] or less, the initial break voltage can be effectively lowered.
- the first metal oxide may be a transition metal oxide or an aluminum oxide.
- the first metal oxide may be a tantalum oxide.
- a nonvolatile memory device capable of stable operation can be realized using a conventional semiconductor process.
- first metal and the second metal may be the same metal, or the first metal and the second metal may be different metals.
- the variable resistance element further includes a non-ohmic element having a first electrode layer, a semiconductor layer formed on the first electrode layer, and a second electrode layer formed on the semiconductor layer.
- the lower electrode layer or the upper electrode layer may be in direct contact with the first electrode layer or the second electrode layer of the non-ohmic element.
- the resistance change element By configuring the electrode layer of the non-ohmic element having current on / off characteristics and the electrode layer of the variable resistance element to directly contact each other, when a plurality of variable resistance elements are provided, the resistance change element is not selected. Leakage current can be suppressed, and stable operation can be realized.
- the method for manufacturing a nonvolatile memory device is a method for manufacturing a nonvolatile memory device including a resistance change element having a resistance change layer in which a resistance state is changed by application of an electric pulse and keeps the state.
- An element formation comprising: a first step of forming a lower electrode layer; a step of forming the resistance change layer on the lower electrode layer; and a fourth step of forming an upper electrode layer on the resistance change layer.
- the step of forming the variable resistance layer includes a second step of forming a first variable resistance layer composed of an oxygen-deficient first metal oxide, and the first metal oxide.
- a second metal oxide having a different degree of oxygen deficiency containing a non-metallic element A different from oxygen
- M constituting the first metal constituting the first metal oxide and the second metal oxidation.
- the second metal constituting the object is N
- the first resistance change The composition of the layers MO x, the composition of the second resistance variable layer when expressed as NO y A z, x ⁇ ( y + z) satisfies a higher resistivity than said first variable resistance layer, and film Forming a second variable resistance layer having a density lower than the theoretical film density in the stoichiometric composition of the second metal oxide.
- the second resistance change layer can contain the nonmetallic element A, and defects in the second resistance change layer increase. Since the conductive path in the variable resistance layer can be formed at a lower voltage than in the prior art, the initial break voltage can be reduced.
- a non-ohmic element forming step having a seventh step of forming a layer, and the non-ohmic element forming step may be performed before or after the element forming step.
- the resistance change element and the non-ohmic element whose initial break voltage is reduced by including the nonmetallic element A are connected to the electrode of the resistance change element and the non-resistance element. Since it can be formed in a state in which the electrode of the ohmic element is in direct contact with each other, a current to an unselected element can be suppressed, and a stable operation of the memory device can be realized.
- the second resistance change layer may be formed by a CVD method or an ALD method.
- the non-metallic element A can be contained in the second variable resistance layer satisfactorily.
- first metal and the second metal may be the same metal, or the first metal and the second metal may be different metals.
- the “oxygen content” is a ratio of the number of oxygen atoms contained to the total number of atoms constituting the metal oxide.
- the oxygen content of Ta 2 O 5 is the ratio of oxygen atoms to the total number of atoms (O / (Ta + O)), which is 71.4 atm%. Therefore, the oxygen-deficient tantalum oxide has an oxygen content greater than 0 and less than 71.4 atm%.
- the oxygen content has a corresponding relationship with the degree of oxygen deficiency. That is, when the oxygen content of the second metal oxide is greater than the oxygen content of the first metal oxide, the oxygen deficiency of the second metal oxide is greater than the oxygen deficiency of the first metal oxide. small.
- Oxygen deficiency refers to an oxide having a stoichiometric composition (the stoichiometric composition having the highest resistance value in the case where there are a plurality of stoichiometric compositions) in a metal oxide. Is the ratio of oxygen deficiency to the amount of oxygen constituting. A metal oxide having a stoichiometric composition is more stable and has a higher resistance value than a metal oxide having another composition.
- the oxide having the stoichiometric composition according to the above definition is Ta 2 O 5 , and can be expressed as TaO 2.5 .
- the degree of oxygen deficiency of TaO 2.5 is 0%.
- the oxygen excess metal oxide has a negative oxygen deficiency.
- the oxygen deficiency is described as including a positive value, 0, and a negative value.
- An oxide with a low degree of oxygen deficiency has a high resistance value because it is closer to a stoichiometric oxide, and an oxide with a high degree of oxygen deficiency has a low resistance value because it is closer to the metal constituting the oxide.
- Oxygen-deficient metal oxide is a metal with a low oxygen content (atomic ratio: the ratio of the number of oxygen atoms to the total number of atoms) compared to a metal oxide having a stoichiometric composition. Means oxide.
- a metal oxide having a stoichiometric composition refers to a metal oxide having an oxygen deficiency of 0%.
- tantalum oxide it refers to Ta 2 O 5 which is an insulator.
- a metal oxide comes to have electroconductivity by making it an oxygen-deficient type.
- Standard electrode potential is generally one index of the ease of oxidation. If this value is large, it means that it is difficult to oxidize, and if it is small, it means that it is easily oxidized.
- “Initial resistance value” indicates the resistance value of the resistance change element when the conductive path is not formed in the second resistance change layer before executing the initial break operation, and the low resistance state and the high resistance state after the initial break operation.
- the resistance value is larger than the resistance value corresponding to the high resistance state transitioning between
- Embodiment 1 The nonvolatile memory device and the manufacturing method thereof according to Embodiment 1 will be described with reference to FIGS.
- FIG. 1 is a cross-sectional view showing a configuration example of a variable resistance nonvolatile memory device 100 according to the present embodiment.
- the nonvolatile memory device 100 is formed on a lower electrode layer 102 formed on a substrate 101, a resistance change layer 103 formed on the lower electrode layer 102, and the resistance change layer 103.
- the variable resistance element 108 having the upper electrode layer 104 is provided.
- the nonvolatile memory device of the present embodiment includes the resistance change element 108. That is, the substrate 101 is not an essential component of the present invention, but will be described as constituting a more preferable form.
- the variable resistance element 108 is formed over the substrate 101.
- the present invention is not limited to this, and a semiconductor circuit layer such as an integrated circuit is formed over the substrate 101 so that the semiconductor circuit It may be formed on the layer.
- the lower electrode layer 102 is made of a lower electrode material having a standard electrode potential lower than that of the upper electrode layer 104 described later.
- the lower electrode material tantalum nitride (TaN) is assumed in the present embodiment.
- the lower electrode material is assumed to be tantalum nitride (TaN), but is not limited to this.
- copper (Cu), titanium (Ti), tungsten (W), A metal containing at least one selected from tantalum (Ta) and nitrides thereof is preferable.
- the resistance change layer 103 is interposed between the lower electrode layer 102 and the upper electrode layer 104, and the resistance value reversibly changes based on an electrical signal applied between the lower electrode layer 102 and the upper electrode layer 104. It is a layer to do.
- the resistance change layer 103 is a layer that reversibly transits between a high resistance state and a low resistance state according to the polarity of a voltage applied between the lower electrode layer 102 and the upper electrode layer 104, for example.
- the resistance change layer 103 is configured by stacking at least two layers of a first resistance change layer 103 a connected to the lower electrode layer 102 and a second resistance change layer 103 b connected to the upper electrode layer 104.
- the resistance change layer 103 includes a first resistance change layer 103a made of an oxygen-deficient first metal oxide, a non-metal element A other than oxygen, One metal oxide is formed by laminating a second resistance change layer 103b made of a second metal oxide having a different oxygen deficiency in this order.
- the first metal and the second metal may be the same material or different materials.
- the first metal and the second metal include tantalum (Ta), hafnium (Hf), zirconium (Zr), nickel (Ni), titanium (Ti), vanadium (V), cobalt (Co), and zinc. Transition metals such as (Zn), niobium (Nb), and tungsten (W), aluminum (Al), and the like can be used.
- composition of the first resistance change layer 103 a is expressed as MO x and the composition of the second resistance change layer 103 b is expressed as NO y A z , x ⁇ (y + z) is expressed.
- the resistivity of the second resistance change layer 103b is set larger than the resistivity of the first resistance change layer.
- the resistivity of the second variable resistance layer higher than that of the first variable resistance layer, a large voltage is applied to the second variable resistance layer when a voltage is applied during normal write processing. .
- an oxidation / reduction reaction is likely to occur in a region near the interface with the upper electrode layer in the second resistance change layer.
- a resistance change phenomenon can be easily developed, and a resistance change element that can be driven at a low voltage can be obtained.
- the film density of the second resistance change layer is smaller than the theoretical film density of the metal oxide having the stoichiometric composition.
- the first metal oxide constituting the first resistance change layer 103a is assumed to be an oxygen-deficient tantalum oxide (TaO x ) in this embodiment.
- the oxygen content of the first resistance change layer 103a is set to, for example, 50 to 65 [atm%].
- an oxygen-deficient tantalum oxide (TaO y A z ) containing the nonmetallic element A is assumed as the second metal oxide constituting the second resistance change layer 103b.
- the total content ((y + z) / (1 + y + z)) of oxygen and nonmetallic element A in the second resistance change layer 103b is set to 65 to 80 [atm%].
- the oxygen content is 71.4% (Ta 2 O 5 ) in the stoichiometric composition.
- oxygen and the nonmetallic element A are in excess of the second content. It is assumed that it is included in the film of the resistance change layer 103b.
- the nonmetallic element A for example, carbon can be used.
- the upper electrode layer 104 is made of an upper electrode material having a higher standard electrode potential than the lower electrode layer 102 described above.
- iridium (Ir) can be used as the upper electrode material.
- the upper electrode material is not limited to this, and may be a noble metal such as platinum (Pt) or palladium (Pd).
- the standard electrode potential of platinum or iridium is 1.0 [eV] or more. Since the standard electrode potential of tantalum is ⁇ 0.6 [eV], the standard electrode potential of the resistance change layer 103 is lower than the standard electrode potential of the upper electrode. From this, it is inferred that an oxidation / reduction reaction occurs at the interface between the upper electrode layer 104 and the second resistance change layer 103b in the second resistance change layer 103b, and oxygen is exchanged to cause a resistance change phenomenon. Is done.
- a lower electrode material is deposited on a substrate 101 such as a silicon (Si) wafer by sputtering to form a lower electrode layer 102 (corresponding to a first step).
- a tantalum nitride film is formed.
- the tantalum nitride film is formed by a reactive sputtering method in a nitrogen gas atmosphere using a Ta target, for example, at room temperature, with a chamber pressure of 0.03 [Pa] to 3 [Pa].
- the film is formed by setting the Ar / N 2 flow rate to 20 [sccm] / 5 [sccm] to 20 [sccm] / 30 [sccm].
- a TaO x film as an example of the first metal oxide is deposited on the lower electrode layer 102 by a reactive sputtering method to form the first resistance change layer 103a (second step).
- the TaO x film has an Ar / O 2 flow rate in an oxygen gas atmosphere using a Ta target, for example, at room temperature and a chamber pressure of 0.03 [Pa] to 3 [Pa].
- a Ta target for example, at room temperature and a chamber pressure of 0.03 [Pa] to 3 [Pa].
- the film formation method of the first resistance change layer 103a is not limited to the sputtering method, and a CVD method, an ALD method, or the like may be used.
- a tantalum oxide thin film (TaO y C z film) containing a nonmetallic element A (here, carbon) is deposited on the first resistance change layer 103a by a CVD (chemical vapor deposition) method, and the second resistance The change layer 103b is formed (corresponding to the third step).
- the oxygen content of the second resistance change layer 103b and the carbon content of the nonmetallic element A can be controlled by the type of the reactive gas, the supply time, and the substrate temperature. For example, if oxygen is used as the reactive gas, the degree of progress of the autolysis reaction can be controlled by the oxygen gas flow rate and the substrate temperature.
- a substrate heated from 300 [° C.] to 420 [° C.] is held in the film forming chamber.
- the source material is introduced into the film forming chamber by bubbling with a carrier gas such as nitrogen while the source material is filled in the source container and heated (first sub-process).
- a carrier gas such as nitrogen
- TBTDET Used tertiary butylimide trisdiethylamide tantalum
- the Ta source gas is introduced into the deposition chamber by heating the Ta source from 85 ° C. to 110 ° C. and bubbling with nitrogen gas. As a result, the self-decomposed raw material is adsorbed on the substrate surface to form a several atomic layer.
- the supply time of the Ta source gas is set to 2 [s] to 10 [s].
- the deposition chamber is purged with nitrogen gas for 15 to 30 seconds to remove excess source gas (second sub-process).
- O 2 is introduced as a reactive gas to oxidize Ta to oxidize Ta, and the source ligand is oxidized and removed as a by-product (third sub-step).
- the supply time of the reactive gas O 2 is set in the range of 3 [s] to 20 [s].
- reaction chamber is purged with nitrogen gas for 3 to 10 seconds to remove excess reactive gas and by-products (fourth sub-process).
- the first sub-step to the fourth sub-step are used as basic cycles, and the second resistance change layer 103b is formed by repeating this basic cycle a number of times according to the film thickness.
- the upper electrode material is deposited on the second variable resistance layer 103b by DC sputtering to form the upper electrode layer 104 (corresponding to the fourth step).
- Ir is deposited as the upper electrode material.
- the Ir film is formed using an Ir target, for example, at room temperature, with a chamber pressure of 0.03 [Pa] to 3 [Pa], and an Ar flow rate of 20 [sccm] to 100 [sccm]. Film.
- tantalum oxide is described as an example of the first metal oxide constituting the first resistance change layer 103a and the second metal oxide constituting the second resistance change layer 103b.
- first metal oxide and the second metal oxide include transitions such as hafnium oxide, zirconium oxide, nickel oxide, titanium oxide, vanadium oxide, cobalt oxide, zinc oxide, niobium oxide, and tungsten oxide (W).
- Metal oxide or aluminum oxide may be used.
- the first resistance change layer 103a using hafnium oxide can be generated, for example, by a reactive sputtering method using an Hf target and performing sputtering in argon gas and oxygen gas.
- the second resistance change layer 103b using hafnium oxide can be generated by, for example, a CVD method using tetra (ethylmethylamino) hafnium (Hf (NCH 3 C 2 H 5 ) 4 ) as a source.
- the first resistance change layer 103a using zirconium oxide can be generated by, for example, a reactive sputtering method using a Zr target and performing sputtering in argon gas and oxygen gas.
- the second resistance change layer 103b using zirconium oxide can be generated by, for example, a CVD method using zirconium chloride (ZiCl 4 ) as a source.
- the first resistance change layer 103a can be formed by a reactive sputtering method
- the second resistance change layer 103b can be formed by a CVD method.
- Ni (C 7 H 16 NO) nickel 1-dimethylamino-2methyl-2-butanolate
- Ti (OC 3 H 7 ) 4 titanium oxide
- vanadium oxide, cobalt oxide, zinc oxide, and niobium oxide are not described in detail, they are suitable as the first metal oxide and the second metal oxide similarly to the tantalum oxide.
- the CVD method using an organometallic compound as a raw material has been described as an example of a method of forming the second resistance change layer 103b.
- it may be formed by an ALDALD method for growing each monoatomic layer, a sputtering process using a target containing carbon, or a sputtering method for simultaneously discharging a plurality of targets.
- composition and film density of the second variable resistance layer and characteristics of the variable resistance element Composition and film density of the second variable resistance layer and characteristics of the variable resistance element
- Table 1 shows a thin film formed of a metal oxide formed by changing the conditions by an ALD method, a CVD method, and a sputtering method (indicated as a sputtering method in the table), and the formed thin film was evaluated. Results are shown.
- the sputtering method here forms a thin film that does not contain carbon, particularly when a target that does not contain carbon is used, and is shown as a comparative example. Therefore, it is considered that the results shown in Table 1 are different in the case of using a target containing carbon or in the sputtering method in which a plurality of targets are simultaneously discharged.
- a thin film is formed as the oxidizing gas type (O 2 and O 3 ) at the substrate heating temperature [° C.] (310 [° C.]), and in the CVD method, the substrate heating temperature is used as a condition.
- a thin film was formed for each oxidizing gas type (O 2 and O 3 ) by [° C.] (310 [° C.], 355 [° C.]).
- the composition analysis was performed by Rutherford backscattering method (RBS).
- the content of oxygen contained in the second resistance change layer 103b depends on the film forming method and the type of oxidizing gas at the time of film formation.
- O 2 is used as the oxidizing gas
- the content of carbon (an example of the nonmetallic element A) in the second resistance change layer 103b can be controlled by controlling the progress of the self-decomposition reaction of the source. For this reason, it can be inferred that carbon is detected in the thin films (samples Nos. 1 to 3) formed using O 2 as the oxidizing gas among the thin films prepared by the ALD method and the CVD method.
- the thin film formed using O 3 as the oxidizing gas is difficult to control the progress of the self-decomposition reaction of the source. Is completely decomposed, it is assumed that carbon in the film is not detected.
- the composition of oxygen and carbon analyzed by the RBS method includes ⁇ 4 [%] in units of [atm%] and includes a relatively large error. For this reason, errors also occur in the x value, the y value, and the z value.
- the value of (y + z) is preferably in the range of 0.71 ⁇ y + z ⁇ 0.93.
- carbon it is desirable that it is the range of 2 [atm%] or more and 45 [atm%] or less.
- Table 2 shows the results of evaluating the film density for each of Sample Nos. 1 to 6 shown in Table 1.
- the film density was evaluated by measuring the X-ray reflectivity (XRR; X-ray reflectance).
- the X-ray reflectivity measurement is performed with the reflectivity data and simulation obtained by detecting the intensity of the reflected X-ray by making it incident at an angle of 0.3 ° to 6 ° to the thin film surface to be evaluated for X-rays Compare models. “Global Fit” software manufactured by Rigaku Corporation is used for the simulation.
- the thin film (sample Nos. 4 to 5) formed using O 3 gas as the oxidizing gas among the thin films (samples No. 1 to 5) prepared by the ALD method and the CVD method has a film density of 7.51.
- the thin film was formed by sputtering (sample No6) is, 7.94 [g / cm 3], and the it can be seen that almost the same film density.
- a thin film composed of oxygen-deficient tantalum oxide was formed by plasma oxidation under the conditions of a wafer temperature of 250 to 350 [° C.] and a DC power of 150 to 250 [W].
- the film density of the thin film formed by plasma oxidation was 7.98 [g / cm 3 ]. From this result, it is understood that the film density can be reduced more effectively by including the nonmetallic element A in the film.
- the film density decreases as the carbon content in the metal oxide constituting the thin film increases. This is because the mass in the unit cell, that is, the film density is reduced in order to replace some of the atoms (elements) constituting the thin film with carbon atoms having a smaller atomic weight (in other words, the atomic radius is larger than oxygen). It is thought to decrease.
- the metal Ta has a tetragonal crystal structure, and its density is 16.6 [g / cm 3 ].
- the density of TaO 2 having a rutile-type crystal structure is 9.95 [g / cm 3 ], which is greatly reduced compared to the density of metal Ta crystals not containing oxygen atoms.
- the density of the oxidized Ta 2 O 5 is further lowered to 8.735 [g / cm 3 ]. The same applies to elements other than Ta element.
- the density of metal hafnium (Hf) is 13.29 [g / cm 3 ], but the density of hafnium oxide (HfO 2 ) is greatly reduced to 9.68 [g / cm 3 ]. That is, when a part of metal atoms constituting a metal crystal is replaced with an oxygen atom having an atomic weight smaller than that of the metal atom (the atomic radius is larger than oxygen), the density decreases as the number of oxygen atoms in the crystal increases. To do.
- a metal atom or an oxygen atom is replaced with a nonmetallic element A other than oxygen, specifically, boron (atomic weight of about 11), carbon (atomic weight of about 12) having a smaller atomic weight than oxygen (atomic weight of about 16). ), Nitrogen (atomic weight of about 14), etc., it is considered that the density can be further reduced.
- a metal atom or an oxygen atom is replaced with a nonmetallic element A other than oxygen.
- boron atomic radius of about 0
- having a larger atomic radius than oxygen atomic radius of about 0.73 A (angstrom)
- the density can be further reduced.
- boron or nitrogen can be contained in the thin film by supplying borane gas or NH 3 gas as a source gas.
- carbon and nitrogen can be supplied from elements contained in the source gas.
- FIG. 2 shows a partial configuration example of the evaluation apparatus 200 including the resistance change element 209 actually created in the evaluation.
- the evaluation apparatus 200 has a planar structure, and is formed so as to cover the Si wafer 201, the wiring 202 formed on the Si wafer 201, and the Si wafer 201 and the wiring 202.
- a SiN film 203 having a thickness of 100 [nm] and a plug 205 formed in the contact hole 204 that reaches the wiring 202 through the SiN film 203 are provided.
- the evaluation apparatus 200 includes a lower electrode layer 206 formed on the SiN film 203 so as to cover the plug 205, a first resistance change layer 207a formed on the lower electrode layer 206, and a first resistance change.
- a resistance change element 209 having a second resistance change layer 207b formed on the layer 207a and an upper electrode layer 208 formed on the second resistance change layer 207b is provided.
- the first variable resistance layer 207a and the second variable resistance layer 207b constitute the variable resistance layer 207.
- the evaluation apparatus 200 is formed in the SiN film 210 formed so as to cover the resistance change element 209 and the contact hole 211 that penetrates the SiN film 210 and reaches the upper electrode layer 208 of the resistance change element 209.
- the plug 212 and the wiring 213 formed on the SiN film 210 so as to cover the plug 212 are provided.
- the lower electrode layer 206 was formed using a TaN film.
- the first resistance change layer 207a was formed by depositing TaO x to a thickness of 30 [nm] by sputtering.
- the second variable resistance layer 207b is by CVD, as a condition of the substrate temperature 355 [° C.], was formed by depositing TaO y A z with a thickness of 8 [nm].
- the upper electrode layer 208 was formed by depositing Ir to a thickness of 50 [nm] by sputtering.
- FIG. 3 shows the relationship between the number of applied voltage pulses (number of pulses) and the resistance value when a normal write operation is executed (common to samples 1 to 7 shown in Tables 1 and 2).
- the resistance state is changed between a high resistance state and a low resistance state by applying two kinds of voltage pulses having different polarities between the electrodes between the upper electrode layer and the lower electrode layer of the resistance change element 209. Change reversibly between. More specifically, when the resistance state is changed from the low resistance state to the high resistance state, a negative voltage pulse (voltage: ⁇ 1.5 [V] is applied between the upper electrode layer and the lower electrode layer of the resistance change element 209. , Pulse width: 100 [ns]).
- a positive voltage pulse (voltage: 2.4 [V], pulse width: 100 [ns]) is provided between the electrodes of the resistance change element 209. Is applied.
- the resistance value of the resistance change element 209 is higher by about one digit in the high resistance state than in the low resistance state. Note that the resistance value on the vertical axis in FIG. 3 is displayed in arbitrary units [au].
- the voltage component of the voltage pulse applied to the resistance change element 209 includes a first resistance change layer 207a which is a high density layer having a relatively high film density and a low density layer having a relatively low film density. And the second resistance change layer 207b.
- the voltage component distributed to the second resistance change layer 207b contributes to the resistance change operation. is there. Therefore, by making the resistivity of the second resistance change layer 207b higher than the resistivity of the first resistance change layer 207a, the voltage component of the voltage pulse distributed to the second resistance layer is increased, and the nonvolatile memory device is reduced. It will be possible to operate with voltage. In the case of FIG. 3, the resistance change operation is possible with a voltage of 2.4 [V] or less.
- FIG. 4 is a graph showing the relationship between the initial resistance value [ ⁇ ] and the initial break voltage value [V] of Samples 1, 2, 3, 4, 5, and 6 shown in Tables 1 and 2.
- the initial resistance values of the samples 1, 2, and 3 using O 2 as the oxidizing gas are 3 ⁇ 10 7. [ ⁇ ] or less, among the samples in which the second resistance change layer is formed by the ALD method or the CVD method, the sample using O 3 as the oxidizing gas and the second resistance change layer by the sputtering method.
- the initial resistance values of the formed samples 4, 5 and 6 are 10 8 [ ⁇ ] or more. That is, it can be seen that the initial resistance values of Samples 1, 2, and 3 using O 2 as the oxidizing gas are one digit or more lower than the other samples.
- the initial break voltages of the samples 1, 2, and 3 are about V1 [V], whereas the initial break voltages of the other samples 4, 5, and 6 are larger than V1.
- the relationship between the film density of the second variable resistance layer 207b, which is a low-density layer, and the initial break voltage is examined.
- the value of the initial break voltage is larger than the voltage value applied between the electrodes of the resistance change element in the normal resistance change operation shown in FIG.
- FIG. 5 is a graph showing the relationship between the film density [g / cm 3 ] and the initial break voltage of Samples 1, 2, 3, 4, 5, and 6 shown in Tables 1 and 2.
- FIG. 5 shows that the initial break voltage decreases as the film density decreases.
- the second variable resistance layer (TaO y film, which does not include the nonmetallic element A) is formed by a plasma oxidation method. In this case, the film density is XRR. The evaluation was 7.98 [g / cm 3 ].
- the nonmetallic element A having an atomic weight smaller than that of oxygen atoms to the second metal oxide (here, tantalum oxide) constituting the second resistance change layer from the graphs shown in FIGS. It can be seen that the film density can be reduced more effectively.
- the film density of the second resistance change layer is preferably 4 [g / cm 3 ] or more and 7 [g / cm 3 ] or less.
- the film density by XRR evaluation is larger than 7 [g / cm 3 ]
- almost no decrease in the initial break voltage is recognized.
- the film density is lower than 4 [g / cm 3 ]
- the non-metallic element A has been described using carbon as an example, but is not limited thereto. From the viewpoint of reducing the density by replacing the oxygen atom with the nonmetallic element A, the nonmetallic element A is preferably an element having an atomic weight smaller than that of the oxygen atom. That is, for example, nitrogen or boron may be used.
- the substrate on which the first resistance change layer is formed in the first sub-step is 325.
- Ta source TBTDET
- O 2 is introduced as a reactive gas.
- the second resistance change layer was formed using nitrogen as the nonmetallic element A, and the second resistance change layer was analyzed by RBS. Tantalum was 36.6 [atm%], oxygen was 11.5 [atm%], and nitrogen was 51.9 [atm%]. It was confirmed that the second resistance change layer contained nitrogen in the layer. Formed film is an insulating, by using a TaO y N z film as the second resistance variable layer, the same effect as the present embodiment contains carbon is expected.
- boron is added to the second resistance change layer by adding B 2 H 6 gas when forming the second resistance change layer by the ALD method or the CVD method. Can be included.
- Embodiment 2 A nonvolatile memory device and a manufacturing method thereof according to Embodiment 2 will be described with reference to FIG. 6A.
- the non-volatile memory device 300A of the present embodiment is different from the non-volatile memory device 100 of the first embodiment in that a non-ohmic element 309 is further stacked on the variable resistance element 308. .
- FIG. 6A is a cross-sectional view showing a configuration example of the variable resistance nonvolatile memory device 300A according to the present embodiment.
- a nonvolatile memory device 300A includes a substrate 301, a lower electrode layer 302, an upper electrode layer 304, and a resistance change layer 303 sandwiched between the two electrodes.
- the device 308 includes a first electrode layer 305, a semiconductor layer 306, and a non-ohmic element 309 configured by stacking a second electrode layer 307 in this order.
- the non-ohmic element 309 is assumed to be a diode element (current control element).
- the first electrode layer 305 is described using a tantalum nitride film as an example, but is not limited thereto.
- the first electrode layer 305 is preferably composed of a metal nitride composed of the metal in the resistance change layer 303 composed of a metal oxide.
- tantalum nitride is preferable.
- the semiconductor layer 306 is described as an example of a nitrogen-deficient silicon nitride film, but is not limited thereto.
- the semiconductor layer 306 may be formed using, for example, tantalum oxide (TaO), alumina (AlO), or titania (TiO).
- an insulator layer may be used instead of the semiconductor layer 306, instead of the semiconductor layer 306, an insulator layer may be used.
- the second electrode layer 307 is described as an example of a tantalum nitride film, but is not limited thereto.
- the second electrode layer 307 may be made of tantalum (Ta), aluminum (Al), or a material containing these elements, or made of a material containing titanium (Ti), chromium (Cr), or the like. May be.
- Ti titanium
- Cr chromium
- the non-ohmic element 309 is formed on the resistance change element 308, but the manufacturing method of the resistance change element 308 is the same as the manufacturing method of the resistance change element 108 of the first embodiment. .
- the resistance change element 308 After forming the resistance change element 308 (after the execution of the first step to the fourth step), tantalum nitride is deposited on the upper electrode layer 304 constituting the resistance change element 308 to a thickness of 20 to 100 [nm]. Then, the first electrode layer 305 is formed (corresponding to the fifth step). More specifically, in the present embodiment, the first electrode layer 305 is formed by a reactive sputtering method in which a metal tantalum target is sputtered under a mixed gas atmosphere of argon and nitrogen.
- the pressure is set to 0.08 to 2 [Pa]
- the substrate temperature is set to 20 to 300 [° C.]
- the flow rate ratio of nitrogen gas ratio of the flow rate of nitrogen to the total flow rate of argon and nitrogen
- the DC power is set to 100 to 1300 [W] at ⁇ 40 [%]
- the film formation time is adjusted so that the thickness of the tantalum nitride film is 20 to 100 [nm].
- a nitrogen-deficient silicon nitride film is deposited on the first electrode layer 305 in a heat of 5 to 20 [nm] to form a semiconductor layer 306 (corresponding to the sixth step).
- the semiconductor layer 306 is formed by a reactive sputtering method in which a polycrystalline silicon target is sputtered in a mixed gas atmosphere of argon and nitrogen.
- the pressure is set to 0.08 to 2 [Pa]
- the substrate temperature is set to 20 to 300 [° C.]
- the flow rate ratio of nitrogen gas (ratio of the flow rate of nitrogen to the total flow rate of argon and nitrogen) is 0.
- the DC power is set to 100 to 1300 [W] at ⁇ 40 [%], and the deposition time is adjusted so that the thickness of the silicon nitride film is 5 to 20 [nm].
- tantalum nitride is deposited to a thickness of 20 to 100 [nm] on the semiconductor layer 306 to form the second electrode layer 307 (corresponding to the seventh step).
- the method for forming the second electrode layer 307 is the same as the method for forming the first electrode layer 305.
- the work function of tantalum nitride is 4.6 [eV]
- the electron affinity of silicon is 3.8 [eV]. Since the work function of tantalum nitride is sufficiently higher than the electron affinity of silicon, a Schottky barrier is formed at the interface between the semiconductor layer 306 and the second electrode layer 307.
- the non-ohmic element 309 functions as a bidirectional MSM diode.
- the upper electrode layer 304 in contact with the second resistance change layer 303b made of the second metal oxide containing the nonmetallic element A is in contact with the resistance change element 308.
- the non-ohmic element 309 was formed, it is not restricted to this.
- the non-ohmic element 309 may be formed first, and the variable resistance element 308 may be formed on the non-ohmic element 309 to configure the nonvolatile memory device 300B.
- a Ta film is formed and then oxidized by a dry thermal oxidation method, a wet thermal oxidation method or a plasma oxidation method, or directly TaO x by a reactive sputtering method. It can be formed by a method of forming a film. Further, although alumina (AlO) and titania (TiO) are not described in detail, they can be similarly generated using a general technique.
- Embodiment 3 A nonvolatile memory device and a manufacturing method thereof according to Embodiment 3 will be described with reference to FIGS. 7A to 15B.
- the nonvolatile memory device 100 includes the resistance change element 108
- the nonvolatile memory device 300A and the nonvolatile memory device 300B according to the second embodiment include the resistance change element 308 and the non-ohmic element 309.
- the case where the nonvolatile memory device 400 of this embodiment includes a plurality of memory cells including the resistance change element 417 and the non-ohmic element 421 will be described.
- FIG. 7A is a plan view (top view) showing the configuration of the nonvolatile memory device 400 according to the present embodiment.
- FIG. 7B is a cross-sectional view showing the configuration of the nonvolatile memory device 400, and is a cross-sectional view of the cross section corresponding to the line 1A-1A ′ of FIG.
- a part of the uppermost insulating protective film is notched for easy understanding.
- FIG. 8A is a partial enlarged cross-sectional view in which a part of the nonvolatile memory device 400 for explaining the configuration of the memory unit 17 and the non-ohmic element 421 is enlarged.
- FIG. 8B is a cross-sectional view corresponding to FIG. 8A.
- the nonvolatile memory device 400 of this embodiment includes a semiconductor circuit layer in which active elements 412 such as transistors are integrated on a substrate 411 formed of, for example, a silicon single crystal substrate, and resistance change is performed on the semiconductor circuit layer.
- a memory array (matrix region) including a plurality of memory cells including the element 417 and the non-ohmic element 421 is formed.
- the semiconductor circuit layer of the nonvolatile memory device 400 includes a substrate 411, an active element 412, an interlayer insulating layer 413 formed so as to cover the substrate 411 and the active element 412, and an interlayer insulating layer 413.
- a plurality of embedded conductors 427 formed and a plurality of semiconductor electrode wirings 428 formed in the interlayer insulating layer 413 are configured.
- the active element 412 is a transistor, and gate insulation is formed on a source region 412a and a drain region 412b formed in the substrate 411 and on a region between the source region 412a and the drain region 412b.
- a film 412c and a gate electrode 412d are provided.
- a transistor is exemplified as the active element 412, but an element necessary for a general memory circuit such as a DRAM may be used.
- the interlayer insulating layer 413 is made of a fluorine-containing oxide (for example, SiOF) in this embodiment, but is not limited thereto.
- a material such as a carbon-containing nitride (for example, SiCN) or an organic resin material (for example, polyimide) that can reduce parasitic capacitance between wirings may be used.
- the plurality of buried conductors 427 are formed corresponding to the source region 412a and the drain region 412b of the active element 412, respectively.
- the plurality of semiconductor electrode wirings 428 are formed so as to be connected to an arbitrary embedded conductor 427 depending on the circuit configuration.
- the plurality of semiconductor electrode wirings 428 are assumed to be copper (Cu) in this embodiment, but may be aluminum or the like.
- the memory array of the nonvolatile memory device 400 includes an interlayer insulating layer 414 formed on the interlayer insulating layer 413 and a buried conductor 426 formed in the interlayer insulating layer 414 so as to be in contact with one of the plurality of buried conductors 427.
- An upper electrode wiring 429 (in a stripe shape) and a buried conductor 430 electrically connected to the upper electrode wiring 429 are provided.
- interlayer insulating layer 414 is the same as that of the interlayer insulating layer 413 in this embodiment.
- the configuration (material, composition, film thickness, etc.) of the resistance change element 417 is the same as that of the resistance change element 108 of the first embodiment.
- the configuration (material, composition, film thickness, etc.) of the non-ohmic element 421 is the same as that of the non-ohmic element 309 of the second embodiment.
- the lower electrode wiring 415 is described as an example of a Ti—Al—N alloy, but may be formed by stacking Cu, Al, Ti—Al alloy or the like.
- the interlayer insulating layer 416 is described using a TEOS-SiO film as an example; however, a silicon oxide (SiO) film or a silicon nitride (SiN) film may be used, or silicon carbon which is a low dielectric constant material.
- a nitride (SiCN) film, a silicon carbonate (SiOC) film, a silicon fluorine oxide (SiOF) film, or the like may be used.
- the upper electrode wiring 429 is made of the same material as the lower electrode wiring 415 in the present embodiment, but other materials may be used.
- FIG. 9 is a circuit diagram schematically showing an equivalent circuit of the nonvolatile memory device 400 shown in FIGS. 7A to 8B and its peripheral circuit.
- the nonvolatile memory device 400 includes a memory array in which memory cells in which a resistance change element 417 and a non-ohmic element 421 are connected in series are arranged in a matrix, and a bit that is a peripheral circuit.
- a line decoder 406, a word line decoder 405, and a read circuit 407 are provided.
- the resistance change element 417 has one end connected to one end (anode terminal) of the non-ohmic element 421 and the other end connected to the lower electrode wiring 415.
- the non-ohmic element 421 has one end (anode terminal) connected to one end of the resistance change element 417 and the other end (cathode terminal) connected to the upper electrode wiring 429.
- the lower electrode wiring 415 is connected to the bit line decoder 406 and the read circuit 407.
- the upper electrode wiring 429 is connected to the word line decoder 405. That is, the lower electrode wiring 415 corresponds to the bit line, and the upper electrode wiring 429 corresponds to the word line.
- the peripheral circuit is configured by an active element 412 made of, for example, a MOSFET.
- FIG. 10 is a cross-sectional view showing a state in which the lower electrode wiring 415 and the interlayer insulating layers 414 and 416 are formed on the substrate 411 on which the active element 412 is formed.
- FIG. 11A shows the inside of the interlayer insulating layer 416.
- FIG. 11B is a cross-sectional view of the cross section corresponding to 3A-3A ′ of FIG. 11A viewed in the direction of the arrow.
- FIG. 12 is a cross-sectional view showing a state in which a lower electrode material is deposited on the contact hole 431 and the interlayer insulating layer 416.
- FIG. 13A, FIG. 14A, and FIG. 15A are plan views (top views) in a process of forming a resistance change element and a non-ohmic element.
- 13B is a cross-sectional view of the cross section corresponding to 4A-4A ′ of FIG.
- FIG. 14B is a cross-sectional view of the cross section corresponding to 5A-5A ′ of FIG. 14A viewed in the direction of the arrow
- FIG. 15B is a cross-sectional view of the cross section corresponding to 6A-6A ′ of FIG. It is.
- SiOF is deposited on a substrate 411 on which a semiconductor circuit layer including a plurality of active elements 412, buried conductors 427, semiconductor electrode wirings 428, an interlayer insulating layer 413, and the like is formed. Then, an interlayer insulating layer 414 is formed, and a plurality of (stripe-like) lower electrode wirings 415 extending in the column direction are embedded in the interlayer insulating layer 414 (corresponding to the eighth step). Further, an interlayer insulating layer 416 is formed on the lower electrode wiring 415 and the interlayer insulating layer 414 (corresponding to the ninth step).
- the lower electrode wiring 415 is formed by first forming a stripe-shaped groove for embedding the lower electrode wiring 415 in the interlayer insulating layer 414 and a contact hole for connecting to the semiconductor electrode wiring 428. It is formed using a technique used in a semiconductor process. After forming such stripe-shaped grooves and contact holes, and depositing a Ti—Al—N alloy material which is a wiring material of the lower electrode wiring 415, for example, by performing CMP, the shape shown in FIG. Lower electrode wiring 415 is formed.
- the method of forming the lower electrode wiring 415 is not limited to this, and the lower electrode wiring 415 may be formed by sputtering using the wiring material of the lower electrode wiring 415, and may be formed by an exposure process and an etching process.
- an interlayer insulating layer 416 made of TEOS-SiO is formed on the lower electrode wiring 415 and the interlayer insulating layer 414 using the CVD method.
- contact holes 431 reaching the lower electrode wiring 415 are formed in the interlayer insulating layer 416 at a constant arrangement pitch by a general semiconductor process (corresponding to the tenth step). ).
- the contact hole 431 is formed at a position corresponding to an intersection with an upper electrode wiring 429 described later.
- the contact hole 431 is a square with rounded corners whose one side is shorter than the width of the lower electrode wiring 415.
- the shape of the contact hole 431 in plan view may be any shape such as a circle, an ellipse, or a rectangle.
- tantalum nitride as a lower electrode material constituting the lower electrode layer 418 is laminated on the interlayer insulating layer 416 including the contact hole 431 by sputtering, and a tantalum nitride film 4181 is formed. Form.
- the tantalum nitride film 4181 has an Ar / N 2 flow rate in a nitrogen gas atmosphere using a Ta target, for example, at room temperature under a chamber pressure of 0.03 [Pa] to 3 [Pa]. Is set to 20 [sccm] / 5 [sccm] to 20 [sccm] / 30 [sccm]. Note that the deposition method of the tantalum nitride film 4181 is not limited to the sputtering method, and a CVD method, an ALD method, or the like may be used.
- the tantalum nitride film 4181 other than the tantalum nitride film 4181 formed in the contact hole 431 is removed by CMP, and the lower electrode layer 418 is embedded in the contact hole 431.
- Form (corresponding to the first step).
- a TaO x film (tantalum oxide film) as an example of a first metal oxide constituting the first resistance change layer 419a is formed on the lower electrode layer 418 and the interlayer insulating layer 416.
- stacked corresponds to the second TaO y a z laminated film (tantalum oxide film) of an example of a metal oxide (third step constituting the second resistance variable layer 419b ).
- a TaO x film is deposited on the lower electrode layer 418 and the interlayer insulating layer 416 by reactive sputtering.
- the conditions for forming the TaO x film are the same as those in the first embodiment.
- a TaO y A z film is formed on the TaO x film by a CVD method.
- carbon is assumed as the nonmetallic element A.
- the conditions for forming the TaO y A z film are the same as those in the first embodiment.
- the upper electrode material constituting the upper electrode layer 420 and the first electrode constituting the first electrode layer 422 constituting the non-ohmic element 421 are formed on the TaO y A z film.
- the material, the semiconductor material constituting the semiconductor layer 423, and the second electrode material constituting the second electrode layer 424 are deposited in this order, and the upper electrode material layer, the first electrode material layer, the semiconductor material layer, and the second electrode material layer Form.
- the TaO x film, the TaO y C z film, the upper electrode material layer, the first electrode material layer, the semiconductor material layer, and the second electrode material layer are processed into a desired shape by a dry etching process to change the first resistance.
- a layer 419a, a second resistance change layer 419b, an upper electrode layer 420, a first electrode layer 422, a semiconductor layer 423, and a second electrode layer 424 are formed (corresponding to the fifth to seventh steps).
- the upper electrode material is formed of, for example, iridium by DC sputtering as in the first embodiment.
- the first electrode material layer and the second electrode material layer are formed by stacking tantalum nitride by a reactive sputtering method, as in the second embodiment.
- the semiconductor material layer is formed by depositing a nitrogen-deficient silicon nitride film (SiN) by reactive sputtering.
- an interlayer insulating layer 425 is deposited on the interlayer insulating layer 416, and a plurality of (stripe-shaped) upper electrode wirings 429 extending in the column direction are formed on the interlayer insulating layer 425 and the non-ohmic element 421.
- an insulating protective layer covering the upper electrode wiring 429 is formed. Thereby, the nonvolatile memory device 400 shown in FIG. 7A can be manufactured.
- variable resistance nonvolatile element realized by making various modifications conceived by those skilled in the art without departing from the gist of the present invention, or by arbitrarily combining the components in the embodiment, and a method for manufacturing the variable resistance nonvolatile element are also included in the present invention.
- the variable resistance layer is a planar type is illustrated, but this is only an example.
- a structure in which a memory cell hole is provided and a resistance change layer is embedded therein may be used.
- the present invention provides a variable resistance nonvolatile memory device and a nonvolatile memory device including the same, and realizes a nonvolatile memory capable of reducing an initial break voltage and initializing at a low voltage. Therefore, it is useful for various electronic devices using a nonvolatile memory.
Abstract
Description
本実施の形態に係る不揮発性記憶装置は、上部電極層と、下部電極層と、前記上部電極層と前記下部電極層との間に介在し、前記上部電極層と前記下部電極層との間に印加される電気パルスに基づいて可逆的に抵抗状態が変化し、その状態を保持し続ける抵抗変化層と、を有する抵抗変化素子を備える不揮発性記憶装置であって、前記抵抗変化層は、酸素不足型の第一の金属酸化物で構成される第一抵抗変化層と、前記第一の金属酸化物とは酸素不足度の異なる第二の金属酸化物で構成される第二抵抗変化層と、を有し、前記第二抵抗変化層は、酸素とは異なる非金属元素Aを含有し、前記第一の金属酸化物を構成する前記第一の金属をM、前記第二の金属酸化物を構成する前記第二の金属をN、前記第一抵抗変化層の組成をMOx、前記第二抵抗変化層の組成をNOyAzと表した場合に、x<(y+z)を満たし、前記第二抵抗変化層の抵抗率は、前記第一抵抗変化層の抵抗率よりも大きく、かつ、前記第二抵抗変化層の膜密度は、前記第二の金属酸化物の化学量論組成における理論膜密度よりも小さい。
実施形態において、「酸素含有率」は、金属酸化物を構成する総原子数に対する含有酸素原子数の比率である。例えば、Ta2O5の酸素含有率は、総原子数に占める酸素原子の比率(O/(Ta+O))であり、71.4atm%となる。したがって、酸素不足型のタンタル酸化物は、酸素含有率は0より大きく、71.4atm%より小さいことになる。例えば、第1の金属酸化物層を構成する金属と、第2の金属酸化物層を構成する金属とが同種である場合、酸素含有率は酸素不足度と対応関係にある。すなわち、第2の金属酸化物の酸素含有率が第1の金属酸化物の酸素含有率よりも大きいとき、第2の金属酸化物の酸素不足度は第1の金属酸化物の酸素不足度より小さい。
実施の形態1に係る不揮発性記憶装置およびその製造方法について、図1~図5を基に説明する。
先ず、本実施の形態における不揮発性記憶装置100の構成について、図1を基に説明する。ここで、図1は、本実施の形態に係る抵抗変化型の不揮発性記憶装置100の構成例を示した断面図である。
次に、本実施の形態の不揮発性記憶装置の製造方法について説明する。
なお、本実施の形態では、第一抵抗変化層103aを構成する第一の金属酸化物および第二抵抗変化層103bを構成する第二の金属酸化物として、タンタル酸化物を例として説明を行ったが、これに限るものではない。第一の金属酸化物及び第二の金属酸化物としては、例えば、酸化ハフニウム、酸化ジルコニウム、酸化ニッケル、酸化チタン、酸化バナジウム、酸化コバルト、酸化亜鉛、酸化ニオブ、酸化タングステン(W)等の遷移金属酸化物、または、アルミニウム酸化物を用いても良い。
次に、第二抵抗変化層103bの組成および膜密度と抵抗変化素子の特性(初期抵抗値および初期ブレーク電圧)との関係について説明する。
ここで、表1は、金属酸化物で構成される薄膜を、ALD法、CVD法及びスパッタリング法(表中では、スパッタ法と表記)により、条件を変えて形成し、形成した薄膜を評価した結果を示している。尚、ここでのスパッタリング法は、特に、炭素を含まないターゲットを用いる場合等、炭素を含まない薄膜を形成するものであり、比較例として示している。従って、炭素を含むターゲットを用いた場合や複数のターゲットを同時放電させるスパッタリング法では、表1に示す結果とは異なる結果になると考えられる。
次に、表1および表2で示した試料No1~7を、第二抵抗変化層として用いた抵抗変化素子を実際に作成し、膜密度と初期ブレーク電圧との関係を評価した。
実施の形態2に係る不揮発性記憶装置およびその製造方法について、図6Aを基に説明する。
先ず、本実施の形態における不揮発性記憶装置300Aの構成について、図6Aを基に説明する。
次に、本実施の形態における不揮発性記憶装置300Aの製造方法について説明する。
尚、図6Aに示す不揮発性記憶装置300Aでは、抵抗変化素子308上に、非金属元素Aを含む第二の金属酸化物で構成される第二抵抗変化層303bに接する上部電極層304と接するように、非オーミック性素子309を形成したが、これに限るものではない。図6Bに示すように、先に、非オーミック性素子309を形成し、非オーミック性素子309上に抵抗変化素子308を形成して、不揮発性記憶装置300Bを構成してもよい。
実施の形態3に係る不揮発性記憶装置およびその製造方法について、図7A~図15Bを基に説明する。
先ず、本実施の形態における不揮発性記憶装置400の構成について、図7A~図9を基に説明する。
次に、図10から図15Bを用いて本実施の形態の不揮発性記憶装置400の製造方法について説明する。
101,301 基板
102,206,302 下部電極層
103,207,303 抵抗変化層
103a,207a,303a 第一抵抗変化層
103b,207b,303b 第二抵抗変化層
104,208,304 上部電極層
108,209,308 抵抗変化素子
200 評価用装置
201 Siウェハ
202,213 配線
203,210 SiN膜
204,211 コンタクトホール
205,212 プラグ
305 第一電極層
306 半導体層
307 第二電極層
309,421 非オーミック性素子
405 ワード線デコーダ
406 ビット線デコーダ
407 読み出し回路
411 基板
412 能動素子
412a ソース領域
412b ドレイン領域
412c ゲート絶縁膜
412d ゲート電極
413,414 層間絶縁層
415 下部電極配線
416 層間絶縁層
417 抵抗変化素子
418 下部電極層
419 抵抗変化層
419a 第一抵抗変化層
419b 第二抵抗変化層
420 上部電極層
422 第一電極層
423 半導体層
424 第二電極層
425 層間絶縁層
426,427 埋め込み導体
428 半導体電極配線
429 上部電極配線
430 埋め込み導体
431 コンタクトホール
Claims (17)
- 上部電極層と、
下部電極層と、
前記上部電極層と前記下部電極層との間に介在し、前記上部電極層と前記下部電極層との間に印加される電気パルスに基づいて可逆的に抵抗状態が変化し、その状態を保持し続ける抵抗変化層と、を有する抵抗変化素子を備える不揮発性記憶装置であって、
前記抵抗変化層は、酸素不足型の第一の金属酸化物で構成される第一抵抗変化層と、前記第一の金属酸化物とは酸素不足度の異なる第二の金属酸化物で構成される第二抵抗変化層と、を有し、
前記第二抵抗変化層は、酸素とは異なる非金属元素Aを含有し、
前記第一の金属酸化物を構成する第一の金属をM、前記第二の金属酸化物を構成する第二の金属をN、前記第一抵抗変化層の組成をMOx、前記第二抵抗変化層の組成をNOyAzと表した場合に、x<(y+z)を満たし、
前記第二抵抗変化層の抵抗率は、前記第一抵抗変化層の抵抗率よりも大きく、かつ、
前記第二抵抗変化層の膜密度は、前記第二の金属酸化物の化学量論組成における理論膜密度よりも小さい
不揮発性記憶装置。 - 前記非金属元素の原子半径は、酸素の原子半径よりも大きい
請求項1に記載の不揮発性記憶装置。 - 前記非金属元素の原子量は、酸素の原子量よりも小さい
請求項1または2に記載の不揮発性記憶装置。 - 前記非金属元素は、ホウ素、窒素および炭素のいずれかである
請求項1または2に記載の不揮発性記憶装置。 - 前記非金属元素は、炭素であり、前記第二抵抗変化層の炭素の含有率が2[atm%]以上45[atm%]以下である
請求項1~3の何れか1項に記載の不揮発性記憶装置。 - 前記第一の金属酸化物は、遷移金属酸化物またはアルミニウム酸化物である
請求項1~5の何れか1項に記載の不揮発性記憶装置。 - 前記第一の金属酸化物は、タンタル酸化物である
請求項6に記載の不揮発性記憶装置。 - 前記第二抵抗変化層の膜密度は、4[g/cm3]以上7[g/cm3]以下である
請求項7に記載の不揮発性記憶装置。 - 前記第一の金属と前記第二の金属とは同一の金属である
請求項1~8の何れか1項に記載の不揮発性記憶装置。 - 前記第一の金属と前記第二の金属とは異なる金属である
請求項1~8の何れか1項に記載の不揮発性記憶装置。 - 第一電極層と、前記第一電極層上に形成される半導体層と、前記半導体層上に形成される第二電極層を有する非オーミック性素子を更に備え、
前記抵抗変化素子の前記下部電極層または前記上部電極層と、前記非オーミック性素子の前記第一電極層または前記第二電極層が直接接する
請求項1~8の何れか1項に記載の不揮発性記憶装置。 - 電気パルスの印加によって抵抗状態が変化し、その状態を保持し続ける抵抗変化層を有する抵抗変化素子を備える不揮発性記憶装置の製造方法であって、
下部電極層を形成する第一工程と、
前記下部電極層上に前記抵抗変化層を形成する工程と、
前記抵抗変化層上に上部電極層を形成する第四工程とを有する素子形成工程を含み、
前記抵抗変化層を形成する工程では、酸素不足型の第一の金属酸化物で構成される第一抵抗変化層を形成する第二工程と、前記第一の金属酸化物とは酸素不足度が異なる第二の金属酸化物を材料とし、酸素とは異なる非金属元素Aを含有し、前記第一の金属酸化物を構成する第一の金属をM、前記第二の金属酸化物を構成する第二の金属をN、前記第一抵抗変化層の組成をMOx、前記第二抵抗変化層の組成をNOyAzと表した場合に、x<(y+z)を満たし、前記第一抵抗変化層よりも抵抗率が高く、かつ、膜密度が前記第二の金属酸化物の化学量論組成における理論膜密度よりも小さい第二抵抗変化層を形成する第三工程と、を含む
不揮発性記憶装置の製造方法。 - 第一電極層を形成する第五工程と、
前記第一電極層上に、半導体層もしくは絶縁体層を形成する第六工程と、
前記半導体層もしくは前記絶縁体層上に、第二電極層を形成する第七工程と、を有する非オーミック性素子形成工程とを、さらに含み、
前記非オーミック性素子形成工程は、前記素子形成工程の前または後に行う
請求項12に記載の不揮発性記憶装置の製造方法。 - 第一の方向に延伸する複数の下部電極配線を形成する第八工程と、
前記複数の下部電極配線上に、層間絶縁層を形成する第九工程と、
前記層間絶縁層内であって、前記第一の方向とは交差する第二の方向に延伸する複数の上部電極配線と前記複数の下部電極配線との交差部の夫々に対応する位置に、前記複数の下部電極配線に到達するコンタクトホールを形成する第十工程とを有する前工程を、さらに含み、
前記前工程の後に、前記コンタクトホール内に前記抵抗変化素子の前記下部電極層を埋め込み形成する
請求項12または13に記載の不揮発性記憶装置の製造方法。 - 前記第三工程では、CVD法あるいはALD法により、前記第二抵抗変化層を形成する
請求項12~14の何れか1項に記載の不揮発性記憶装置の製造方法。 - 前記第一の金属と前記第二の金属とは同一の金属である
請求項12~15の何れか1項に記載の不揮発性記憶装置の製造方法。 - 前記第一の金属と前記第二の金属とは異なる金属である
請求項12~15の何れか1項に記載の不揮発性記憶装置の製造方法。
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