WO2013107066A2 - 一种硅外延层过渡区的无损检测方法 - Google Patents

一种硅外延层过渡区的无损检测方法 Download PDF

Info

Publication number
WO2013107066A2
WO2013107066A2 PCT/CN2012/071191 CN2012071191W WO2013107066A2 WO 2013107066 A2 WO2013107066 A2 WO 2013107066A2 CN 2012071191 W CN2012071191 W CN 2012071191W WO 2013107066 A2 WO2013107066 A2 WO 2013107066A2
Authority
WO
WIPO (PCT)
Prior art keywords
thickness
epitaxial layer
silicon
silicon epitaxial
silicon substrate
Prior art date
Application number
PCT/CN2012/071191
Other languages
English (en)
French (fr)
Inventor
赵丽霞
陈秉克
Original Assignee
河北普兴电子科技股份有限公司
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 河北普兴电子科技股份有限公司 filed Critical 河北普兴电子科技股份有限公司
Priority to KR1020137028215A priority Critical patent/KR20140089479A/ko
Publication of WO2013107066A2 publication Critical patent/WO2013107066A2/zh

Links

Classifications

    • G—PHYSICS
    • G01—MEASURING; TESTING
    • G01B—MEASURING LENGTH, THICKNESS OR SIMILAR LINEAR DIMENSIONS; MEASURING ANGLES; MEASURING AREAS; MEASURING IRREGULARITIES OF SURFACES OR CONTOURS
    • G01B21/00—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant
    • G01B21/02—Measuring arrangements or details thereof, where the measuring technique is not covered by the other groups of this subclass, unspecified or not relevant for measuring length, width, or thickness

Definitions

  • the invention relates to the technical field of silicon epitaxial growth, and in particular to a non-destructive testing method for a transition region of a silicon epitaxial layer.
  • Silicon epitaxial wafer is a semiconductor material widely used in various semiconductor devices and modules. It is in the front-end position of the integrated circuit manufacturing chain, which is regarded as the 'food of the information industry', and is widely used in wind energy, solar energy, and automobiles. , high-end electronic consumer products such as mobile phones and home appliances.
  • Silicon epitaxial products are generally processed by using heavily doped arsenic, heavily doped phosphorus, heavily doped yttrium, and heavily doped borosilicate polished sheets as substrates.
  • the silicon epitaxial wafer has excellent properties such as crystal perfect crystal-free primary defects, epitaxial layer resistivity and thickness controllable, and adjustable transition region.
  • the epitaxial layer is widely used in integrated circuits and discrete devices to meet production power. Requirements for field effect devices, insulated gate bipolar transistors, Schottky diodes, microprocessors, charge coupled devices, and flash memories.
  • the length and effective thickness of the transition layer of the silicon epitaxial layer directly affect the key parameters such as breakdown voltage, forward voltage drop, reverse voltage drop, and reverse recovery time of the final product.
  • the method for measuring the transition zone is obtained by measuring the longitudinal distribution curve by using the extended resistance method.
  • the method is a destructive measurement. Generally, it is difficult to do quantitative measurement, and the measurement area is small, and the measurement needs to be cut from the silicon epitaxial wafer. The next small square area is pasted on a fixed angle grinding block, and the inclined section is ground by grinding, and then the longitudinal section of the section is measured at a fixed interval, and the thickness and resistivity distribution are calculated. Therefore, it is imperative to develop a non-destructive, fast and efficient detection method.
  • the invention provides a non-destructive testing method for a transition region of a silicon epitaxial layer, which has the advantages of non-destructive, high accuracy and fast detection speed.
  • a non-destructive testing method for a transition region of a silicon epitaxial layer includes the following steps:
  • the measurement position corresponds to the position at which the thickness of the silicon substrate sheet is measured before epitaxy
  • the value is negative, that is, the total thickness of the substrate sheet Tsub + silicon epitaxial layer thickness Tepi ⁇ total thickness of the silicon wafer after epitaxy Ttot, which means that the epitaxial layer is expanded to the substrate.
  • the value is positive, ie: total thickness of the substrate sheet Tsub+thickness of the silicon epitaxial layer Tepi > total thickness of the silicon wafer after epitaxy Ttot is extended from the substrate to the epitaxial layer.
  • the detection method of the invention has high accuracy, fast detection speed and improved inspection efficiency.
  • Infrared film thickness tester model used in the examples ACCENT STRATUS; Capacitive displacement sensor model: ADE ULTRASCAN 9600.
  • the substrate resistivity was 0.012 ohm.cm
  • the epitaxial layer resistivity was 14.2 ohm.cm.
  • the measurement position corresponds to the position at which the thickness of the silicon substrate sheet is measured before epitaxy
  • the substrate resistivity was 0.0036 ohm.cm
  • the epitaxial layer resistivity was 14.2 ohm.cm.
  • the detection method of this embodiment is the same as that of the embodiment 1, and the test data and the result statistics are as shown in Table 2.
  • the substrate resistivity was 0.0023 ohm.cm
  • the epitaxial layer resistivity was 14.2 ohm.cm.
  • the detection method of this embodiment is the same as that of the embodiment 1, and the test data and the result statistics are shown in Table 3.

Landscapes

  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Length Measuring Devices With Unspecified Measuring Means (AREA)

Description

一种硅外延层过渡区的无损检测方法
技术领域
本发明涉及硅外延生长技术领域，尤其涉及一种硅外延层过渡区的无损检测方法。
背景技术
硅外延片是一种广泛应用于各种半导体器件及模块的半导体材料，在被视为'信息工业的粮食'的集成电路制造链条中，处于前端基础地位，被广泛应用于风能、太阳能、汽车、手机、家电等高档电子消费产品中。
硅外延产品一般是以重掺砷、重掺磷、重掺锑、重掺硼硅抛光片作为衬底加工而成。硅外延片具有结晶完美无晶体原生缺陷、外延层电阻率和厚度精确可控、过渡区可调等优良的特性，其外延层被广泛用于集成电路及分立器件等制作中，可以满足生产功率场效应器件、绝缘栅双极晶体管、肖特基二极管、微处理器、电荷藕合器件和快闪存储器等的要求。而硅外延层过渡区的长短、有效厚度的大小直接影响到了最终产品的击穿电压、正向压降、反向压降、反向恢复时间等关键参数。
而目前测量过渡区的方法是利用扩展电阻法测量纵向分布曲线来获得，该方法是破坏性测量，一般只能做定性测量很难做到定量，测量区域小，测量时需从硅外延片上切下一小方块区域，粘贴在有固定角度的磨块上，研磨得到倾斜的剖面，然后对这个剖面纵向以固定的间隔进行测量，通过计算得到厚度和电阻率的分布。因此开发一种无损、快捷、高效的检测方法势在必行。
发明内容
本发明提供一种硅外延层过渡区的无损检测方法 ，具有无损、准确率高、检测速度快的优点。
本发明所采取的技术方案是：
一种硅外延层过渡区的无损检测方法，包括下述步骤：
（ 1）生长前利用电容位移传感器的方法先测量硅衬底片总厚度 Tsub；
（ 2）将此片外延生长，取片后利用红外膜厚测试仪测量硅外延层厚度 Tepi，测量位置和外延前测量硅衬底片厚度的位置相对应；
（ 3）然后利用电容位移传感器的方法再测量此片的总厚度 Ttot，其测量位置和衬底片测量厚度的位置相对应；
（ 4）利用公式 : (硅衬底片总厚度 Tsub+硅外延层厚度 Tepi) -外延后硅片的总厚度 Ttot，得到过渡区长度。
如果该值为负 , 即衬底片总厚度 Tsub+硅外延层厚度 Tepi <外延后硅片的总厚度 Ttot,即表示为外延层向衬底外扩。
该值为正时 , 即：衬底片总厚度 Tsub+硅外延层厚度 Tepi >外延后硅片的总厚度 Ttot,则是由衬底扩至外延层。
采用上述技术方案所产生的有益效果在于：
1.因为本方法不具破坏性，对检测部位无损伤 ,因此可以外延片上多个位置的 100%检验。
2.本发明的检测方法准确率高，检测速度快，提高了检验效率。
具体实施方式
实施例中所用红外膜厚测试仪型号： ACCENT STRATUS；电容位移传感器型号： ADE ULTRASCAN 9600。
实施例 1
本实施例中，衬底电阻率为 0.012 ohm.cm,外延层电阻率为 14.2 ohm.cm。
取中心点及其他部位的四个点按照下述步骤进行检测：
（ 1）生长前利用电容位移传感器的方法先测量硅衬底片总厚度 Tsub；
（ 2）将此片外延生长，取片后利用红外膜厚测试仪测量硅外延层厚度 Tepi，测量位置和外延前测量硅衬底片厚度的位置相对应；
（ 3）然后利用电容位移传感器的方法再测量此片的总厚度 Ttot，其测量位置和衬底片测量厚度的位置相对应；
（ 4）利用公式 : (硅衬底片总厚度 Tsub+硅外延层厚度 Tepi) -外延后硅片的总厚度 Ttot，得到过渡区长度，检测数据及结果统计如表 1。
表 1 检测数据及结果统计（单位：μ m）
中心点厚度 第二点厚度 第三点厚度 第四点厚度 第五点厚度
Tsub 724.925 724.084 725.503 725.872 724.711
Ttot 780.543 777.426 780.029 779.019 778.627
Tepi 55.395 53.956 55.240 53.997 54.297
Tepi+Tsub-Ttot -0.223 0.614 0.714 0.850 0.381
实施例 2
本实施例中，衬底电阻率为 0.0036 ohm.cm,外延层电阻率为 14.2 ohm.cm。
本实施例的检测方法同实施例 1，检测数据及结果统计如表 2。
表 2 检测数据及结果统计（单位：μ m）
中心点厚度 第二点厚度 第三点厚度 第四点厚度 第五点厚度
Tsub 681.066 679.624 680.658 681.178 681.122
Ttot 736.297 733.659 735.164 735.290 735.508
Tepi 55.558 55.923 56.146 55.102 54.73
Tepi+Tsub-Ttot 0.327 1.888 1.64 0.99 0.344
实施例 3
本实施例中，衬底电阻率为 0.0023 ohm.cm,外延层电阻率为 14.2 ohm.cm。
本实施例的检测方法同实施例 1，检测数据及结果统计如表 3。
表 3 检测数据及结果统计（单位：μ m）
中心点厚度 第二点厚度 第三点厚度 第四点厚度 第五点厚度
Tsub 728.248 728.361 728.036 728.101 728.133
Ttot 783.329 781.931 781.551 782.629 782.017
Tepi 56.619 55.61 55.941 55.588 55.146
Tepi+Tsub-Ttot 1.538 2.04 2.426 1.06 1.262

Claims (1)

  1. 一种硅外延层过渡区的无损检测方法，其特征在于包括下述步骤：
    （ 1）生长前利用电容位移传感器的方法先测量硅衬底片总厚度 Tsub；
    （ 2）将硅衬底片外延生长，取片后利用红外膜厚测试仪测量硅外延层厚度 Tepi，测量位置和外延前测量硅衬底片厚度的位置相对应；
    （ 3）然后利用电容位移传感器测量外延后的硅片的总厚度 Ttot，其测量位置和硅衬底片测量厚度的位置相对应；
    （ 4）利用公式 : (硅衬底片总厚度 Tsub+硅外延层厚度 Tepi) -外延后硅片的总厚度 Ttot，得到过渡区长度。
PCT/CN2012/071191 2012-01-17 2012-02-16 一种硅外延层过渡区的无损检测方法 WO2013107066A2 (zh)

Priority Applications (1)

Application Number Priority Date Filing Date Title
KR1020137028215A KR20140089479A (ko) 2012-01-17 2012-02-16 실리콘 외연층 과도영역의 무손상 검측방법

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
CN2012100139015A CN102538732A (zh) 2012-01-17 2012-01-17 一种硅外延层过渡区的无损检测方法
CN201210013901.5 2012-01-17

Publications (1)

Publication Number Publication Date
WO2013107066A2 true WO2013107066A2 (zh) 2013-07-25

Family

ID=46346231

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/CN2012/071191 WO2013107066A2 (zh) 2012-01-17 2012-02-16 一种硅外延层过渡区的无损检测方法

Country Status (3)

Country Link
KR (1) KR20140089479A (zh)
CN (1) CN102538732A (zh)
WO (1) WO2013107066A2 (zh)

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5355083A (en) * 1988-11-16 1994-10-11 Measurex Corporation Non-contact sensor and method using inductance and laser distance measurements for measuring the thickness of a layer of material overlaying a substrate
JP4655935B2 (ja) * 2003-10-01 2011-03-23 信越半導体株式会社 シリコンエピタキシャルウェーハの製造方法
CN1688015A (zh) * 2005-04-11 2005-10-26 浙江大学 以Ge－B共掺直拉硅片作为衬底的P/P+硅外延片
CN100485873C (zh) * 2007-04-11 2009-05-06 河北普兴电子科技股份有限公司 重掺砷衬底上外延层过渡区的控制方法
CN201449246U (zh) * 2009-07-07 2010-05-05 苏州工业园区瑞新自动化设备有限公司 非接触式硅片测厚装置

Also Published As

Publication number Publication date
KR20140089479A (ko) 2014-07-15
CN102538732A (zh) 2012-07-04

Similar Documents

Publication Publication Date Title
CN103575998B (zh) 一种无结晶体管的电阻测试方法
ES2193992T3 (es) Aparato para localizar defectos de fabricacion en un elemento fotovoltaico.
JP2013008936A5 (ja) 半導体装置
JP2017201422A5 (ja) 半導体装置の作製方法
EP2590233A3 (en) Photovoltaic device and method of manufacturing the same
GB2484605A (en) Silicon wafer based structure for heterostructure solar cells
ATE535019T1 (de) Verfahren zur herstellung einer waferanordnung mit mittels pn-übergang isolierten vias
EP2626905A3 (en) Silicon carbide semiconductor device and method for manufacturing silicon carbide semiconductor device
WO2008093789A1 (ja) バイポーラ型半導体装置、その製造方法およびツェナー電圧の制御方法
CN103050423A (zh) 晶圆温度的检测方法
EP2584596A3 (en) Testing device for testing wafers for electronic circuits and related method
CN106328592A (zh) 薄膜晶体管及其制作方法、阵列基板和显示装置
CN101290946A (zh) 减小霍尔集成电路失调电压方法及其装置
WO2013107066A2 (zh) 一种硅外延层过渡区的无损检测方法
CN1327564A (zh) 薄膜晶体管的电学性能模型
CN103412272B (zh) 用于确定校正汞探针电阻率量测仪的标准片的方法及校正汞探针电阻率量测仪的方法
CN102866303A (zh) 纳米器件沟道超薄栅介质电容测试方法
CN110349875A (zh) 一种测量晶圆表面电荷密度变化的方法
Hassan et al. Packaging challenges associated with warpage of ultra-thin chips
CN102564627A (zh) 半导体衬底的自热测量装置及其测试方法
CN106328554A (zh) 对位结构、显示装置及利用对位结构测量对位精度的方法
CN106990368A (zh) 一种led灯具的结温测量方法
CN102176421A (zh) Mos管栅极氧化层累积厚度的测量方法
EP2573803A4 (en) SILICON NITRIDE FILM FOR A SEMICONDUCTOR COMPONENT AND METHOD AND DEVICE FOR PRODUCING THE SILICON NITRIDE FILM
CN2938404Y (zh) 一种测量pn结电流的测试装置

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12866285

Country of ref document: EP

Kind code of ref document: A2

ENP Entry into the national phase in:

Ref document number: 20137028215

Country of ref document: KR

Kind code of ref document: A

NENP Non-entry into the national phase in:

Ref country code: DE

122 Ep: pct app. not ent. europ. phase

Ref document number: 12866285

Country of ref document: EP

Kind code of ref document: A2