WO2013086748A1 - 液晶显示装置 - Google Patents

液晶显示装置 Download PDF

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Publication number
WO2013086748A1
WO2013086748A1 PCT/CN2011/084233 CN2011084233W WO2013086748A1 WO 2013086748 A1 WO2013086748 A1 WO 2013086748A1 CN 2011084233 W CN2011084233 W CN 2011084233W WO 2013086748 A1 WO2013086748 A1 WO 2013086748A1
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Prior art keywords
substrate
liquid crystal
display device
crystal display
transparent electrode
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PCT/CN2011/084233
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English (en)
French (fr)
Inventor
董成才
许哲豪
薛景峰
姚晓慧
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TCL China Star Optoelectronics Technology Co Ltd
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Shenzhen China Star Optoelectronics Technology Co Ltd
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Priority to US13/380,897 priority Critical patent/US8873007B2/en
Publication of WO2013086748A1 publication Critical patent/WO2013086748A1/zh
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    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/1343—Electrodes
    • G02F1/134309—Electrodes characterised by their geometrical arrangement
    • G02F1/134336—Matrix
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/1333—Constructional arrangements; Manufacturing methods
    • G02F1/133388—Constructional arrangements; Manufacturing methods with constructional differences between the display region and the peripheral region
    • G—PHYSICS
    • G02—OPTICS
    • G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
    • G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
    • G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour 
    • G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour  based on liquid crystals, e.g. single liquid crystal display cells
    • G02F1/133—Constructional arrangements; Operation of liquid crystal cells; Circuit arrangements
    • G02F1/136—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit
    • G02F1/13606—Liquid crystal cells structurally associated with a semi-conducting layer or substrate, e.g. cells forming part of an integrated circuit having means for reducing parasitic capacitance

Definitions

  • the present invention relates to the field of liquid crystal display, and more particularly to a liquid crystal display device capable of reducing parasitic capacitance on a gate line.
  • FIG. 1 is a schematic structural diagram of a liquid crystal display device of the prior art, wherein the liquid crystal display device 100 includes a first substrate 110, a second substrate 120, and a liquid crystal layer 130 disposed between the first substrate 110 and the second substrate 120.
  • the first substrate 110 includes a gate line 111 (gate And a first transparent electrode
  • the second substrate 120 includes a second transparent electrode 121.
  • the parasitic capacitance on the gate line 111 is the main cause of signal delay. If the parasitic capacitance is too large, the signal delay is severe, causing defects such as mura in the liquid crystal display device 100.
  • the parasitic capacitance on the existing gate line 111 mainly includes the following two types:
  • the gate line 111 and the data line data a parasitic capacitance formed between line (not shown) (the dielectric film between the gate line 111 and the data line is a dielectric);
  • An object of the present invention is to provide a liquid crystal display device capable of reducing parasitic capacitance formed between a gate line and a transparent electrode on the other substrate to solve parasitic capacitance on a gate line of a conventional liquid crystal display device Too large a technical problem that makes the signal delay severe.
  • the present invention relates to a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer disposed between the first substrate and the second substrate, the first substrate including a gate line and a first transparent An electrode, the second substrate includes a second transparent electrode, wherein the second substrate is divided into a first region and a second region with respect to an inner surface of the first substrate, wherein the first region is a gate line a corresponding area on the two substrates, the second area is an area outside the corresponding area on the second substrate, the second transparent electrode is disposed in the second area; the second The substrate further includes a color filter layer, and the second transparent electrode is disposed on the color filter layer.
  • the present invention also relates to a liquid crystal display device including a first substrate, a second substrate, and a liquid crystal layer disposed between the first substrate and the second substrate, the first substrate including a gate line and the first a transparent electrode, the second substrate includes a second transparent electrode, wherein the second substrate is divided into a first region and a second region with respect to an inner surface of the first substrate, wherein the first region is a gate line a corresponding area on the second substrate, the second area is an area outside the corresponding area on the second substrate, and the second transparent electrode is disposed in the second area.
  • the second substrate includes a third transparent electrode, and the third transparent electrode is disposed on the first region.
  • the third transparent electrode is connected to a signal terminal of the corresponding gate line.
  • the third transparent electrode is connected to the gate line.
  • the third transparent electrode is connected to the gate line by a conduction means.
  • the conduction means is provided in a non-display area of the liquid crystal display device.
  • the third transparent electrode is connected to the gate line through a conductive pillar.
  • the conductive pillar is provided in a display region of the liquid crystal display device.
  • the conductive pillar is a conductive polymer material.
  • the parasitic capacitance between the gate line and the second transparent electrode can be better reduced, thereby reducing the signal delay phenomenon on the gate line, and preventing the liquid crystal display device from causing color spots and the like due to excessive parasitic capacitance on the gate line. phenomenon.
  • FIG. 1 is a schematic structural view of a liquid crystal display device of the prior art
  • FIG. 2 is a schematic structural view of a first preferred embodiment of a liquid crystal display device of the present invention
  • FIG. 3 is a schematic structural view of a second preferred embodiment of a liquid crystal display device of the present invention.
  • FIG. 4 is a schematic structural view of a third preferred embodiment of a liquid crystal display device of the present invention.
  • Figure 5 is a schematic view showing the structure of a fourth preferred embodiment of the liquid crystal display device of the present invention.
  • the liquid crystal display device 200 includes a first substrate 110, a second substrate 120, and a liquid crystal layer 130 disposed between the first substrate 110 and the second substrate 120.
  • the first substrate 110 includes a gate line 111 and a first A transparent electrode (not shown), the second substrate 120 includes a second transparent electrode 121.
  • the inner surface of the second substrate 120 opposite to the first substrate 110 may be divided into a first region 122 and a second region: wherein the first region 122 is an area on the second substrate 120 and the gate line 111 on the first substrate 110 Corresponding regions (which are defined in the present invention as corresponding regions of the gate lines on the second substrate 120), and the second regions are regions outside the corresponding regions on the second substrate 120 of the gate lines 111.
  • the second transparent electrode 121 is not disposed in the first region 122, and the second transparent electrode 121 is disposed on the second region of the second substrate 120.
  • the first substrate 110 may be a thin film transistor (Thin Film Transistor, TFT) a glass substrate of a matrix or a substrate of other materials
  • the second substrate 120 may have a color filter layer (Color) Filter, CF) glass substrate or substrate of other materials.
  • TFT Thin Film Transistor
  • the color filter layer and the TFT matrix may also be disposed on the same substrate.
  • no transparent electrode is disposed on the first region 122 of the second substrate 120 corresponding to the gate line 111, which reduces the parasitic capacitance between the gate line 111 and the second transparent electrode 121 (increased gate).
  • the spacing between the epipolar line 111 and the second transparent electrode 121) further reduces the total parasitic capacitance on the gate line 111, thereby weakening the signal delay phenomenon on the gate line 111, and avoiding the liquid crystal display device 200 from being gated. Excessive parasitic capacitance on the pole line 111 causes undesirable phenomena such as color spots.
  • FIG 3 is a schematic structural view of a second preferred embodiment of the liquid crystal display device of the present invention, and the liquid crystal display device 300 of the second preferred embodiment is different from the first preferred embodiment in that the second substrate 120 is in the first region thereof.
  • the third transparent electrode 210 is disposed on the 122, and the third transparent electrode 210 is connected to the signal end of the corresponding gate line 111.
  • the second transparent electrode 121 is also not disposed in the first region 122 of the second substrate 120 corresponding to the gate line 111, and the parasitic capacitance between the gate line 111 and the second transparent electrode 121 is reduced.
  • a third transparent electrode 210 is disposed on the first region 122 of the second substrate 120 corresponding to the gate line 111, and the third transparent electrode 210 and the second transparent electrode 121 are completely separated by photolithography.
  • the signal end of the signal line provided by the pole line 111 provides a corresponding signal to the third transparent electrode 210 such that the third transparent electrode 210 is at the same potential as the corresponding gate line 111, thereby eliminating the gap between the third transparent electrode 210 and the gate line 111.
  • the third transparent electrode 210 is disposed such that the liquid crystal of the liquid crystal layer 130 is not charged into the first region 122 of the second substrate 120, so that the normal display effect of the liquid crystal display device 300 is not affected.
  • FIG. 4 is a schematic structural view showing a third preferred embodiment of the liquid crystal display device of the present invention, and the liquid crystal display device 400 of the third preferred embodiment is different from the second preferred embodiment in that the third transparent electrode 210 is not connected to the gate electrode.
  • the signal terminal of the line 111 is connected, but is connected to the gate line 111.
  • the third transparent electrode 210 is connected to the gate line 111 through the conduction device 310, and the conduction device 310 is generally disposed in the non-display area of the liquid crystal display device 400 (the display area thereof is active) Area).
  • the second transparent electrode 121 is also not disposed in the first region 122 of the second substrate 120 corresponding to the gate line 111, and the parasitic capacitance between the gate line 111 and the second transparent electrode 121 is reduced.
  • a third transparent electrode 210 is disposed on the first region 122 of the second substrate 120 corresponding to the gate line 111, and the third transparent electrode 210 passes through the conducting device 310 (ie, transfer, generally used for common signals of the first substrate 110).
  • the conductive device 310 is disposed in the non-display area of the liquid crystal display device 400, in this embodiment, after the first substrate 110, the second substrate 120, and the corresponding liquid crystal layer 130 are formed, the gate lines 111 and the first The three transparent electrodes 210 are connected such that the third transparent electrode 210 is at the same potential as the corresponding gate line 111. Since the fabrication process of the conduction device 310 is mature, the implementation process of the embodiment is simple.
  • FIG. 5 is a schematic structural view showing a fourth preferred embodiment of the liquid crystal display device of the present invention.
  • the liquid crystal display device 500 of the fourth preferred embodiment is different from the second preferred embodiment in that the third transparent electrode 210 is not connected to the gate.
  • the signal terminal of the line 111 is connected, but is connected to the gate line 111.
  • the third transparent electrode 210 is connected to the gate line 111 through the conductive pillar 410, and the conductive pillar 410 can be used to make a spacer (PS: Photo The process of the Spacer is generally performed. Therefore, the conductive pillars 410 are generally disposed in the display region of the liquid crystal display device 500.
  • the material for forming the conductive pillars 410 is generally a conductive polymer material (such as polyphenylene sulfide, polyaniline, etc.).
  • the second transparent electrode 121 is also not disposed in the first region 122 of the second substrate 120 corresponding to the gate line 111, and the parasitic capacitance between the gate line 111 and the second transparent electrode 121 is reduced.
  • a third transparent electrode 210 is disposed on the first region 122 of the second substrate 120 corresponding to the gate line 111.
  • the third transparent electrode 210 is connected to the gate line 111 through the conductive pillar 410, so that the third transparent electrode 210 and the corresponding The gate line 111 is at the same potential, so the parasitic capacitance between the third transparent electrode 210 and the gate line 111 is almost zero, thus reducing the total parasitic capacitance on the gate line 111.
  • the conductive pillars 410 are disposed in the display area of the liquid crystal display device 500, that is, the conductive pillars 410 cannot be disposed after the liquid crystal display device 500 is completed, the conductive pillars 410 must be fabricated simultaneously with the color filter layer, thus making the conductive The pillars 410 are not affected by subsequent processes, and the conductive pillars 410 can be ensured to have good electrical conductivity.

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Liquid Crystal (AREA)
  • Geometry (AREA)
  • Mathematical Physics (AREA)
  • Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • General Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)

Abstract

一种液晶显示装置（200，300，400，500），包括第一基板（110）、第二基板（120）以及液晶层（130）。第一基板（110）包括栅极线（111）以及第一透明电极。第二基板（120）包括第二透明电极（121）。第二基板（120）相对于第一基板（110）的内表面分为第一区域（122）和第二区域，第一区域（122）为栅极线（111）在第二基板（120）上的对应区域，第二区域为栅极线（111）在第二基板（120）上的对应区域之外的区域，第二透明电极（121）设置在第二区域内。该液晶显示装置（200，300，400，500）能较好地减少栅极线（111）上的寄生电容，从而减弱栅极线（111）上的信号延迟现象。

Description

液晶显示装置 技术领域
本发明涉及液晶显示领域，特别是涉及一种可降低栅极线上寄生电容的液晶显示装置。
 背景技术
如图1所示为现有技术的液晶显示装置的结构示意图，其中液晶显示装置100包括第一基板110、第二基板120以及设置在第一基板110以及第二基板120之间的液晶层130，第一基板110包括栅极线111（gate line）和第一透明电极，第二基板120包括第二透明电极121。
目前的液晶显示装置中，栅极线111上的寄生电容是造成其信号延迟的主要原因。如果寄生电容过大，会使得信号延迟严重，造成液晶显示装置100出现色斑（mura）等不良。
现有的栅极线111上的寄生电容主要包括以下两种：
一、栅极线111与数据线（data line，图中未示出）之间形成的寄生电容（以栅极线111与数据线之间的绝缘层薄膜为电介质）；
二、栅极线111与第二基板120上的第二透明电极121之间形成的寄生电容（以液晶层130为电介质）。
因此减小以上两种栅极线上的寄生电容是液晶显示装置设计人员一直努力的方向。
故，有必要提供一种液晶显示装置，以解决现有技术所存在的问题。
 技术问题
本发明的目的在于提供一种可减小栅极线和另一侧基板上的透明电极之间形成的寄生电容的液晶显示装置，以解决现有的液晶显示装置的栅极线上的寄生电容过大使得信号延迟严重的技术问题。
 技术解决方案
本发明涉及一种液晶显示装置，包括第一基板、第二基板以及设置在所述第一基板和所述第二基板之间的液晶层，所述第一基板包括栅极线以及第一透明电极，所述第二基板包括第二透明电极，其中所述第二基板相对于所述第一基板的内表面分为第一区域和第二区域，所述第一区域为栅极线在第二基板上的对应区域，所述第二区域为所述栅极线在第二基板上的对应区域之外的区域，所述第二透明电极设置在所述第二区域内；所述第二基板还包括彩色滤光层，所述第二透明电极设置在所述彩色滤光层上。
本发明还涉及一种液晶显示装置，包括第一基板、第二基板以及设置在所述第一基板和所述第二基板之间的液晶层，所述第一基板包括栅极线以及第一透明电极，所述第二基板包括第二透明电极，其中所述第二基板相对于所述第一基板的内表面分为第一区域和第二区域，所述第一区域为栅极线在第二基板上的对应区域，所述第二区域为所述栅极线在第二基板上的对应区域之外的区域，所述第二透明电极设置在所述第二区域内。
在本发明所述的液晶显示装置中，所述第二基板包括第三透明电极，所述第一区域上设置有所述第三透明电极。
在本发明所述的液晶显示装置中，所述第三透明电极与相应的所述栅极线的信号端连接。
在本发明所述的液晶显示装置中，所述第三透明电极与所述栅极线连接。
在本发明所述的液晶显示装置中，所述第三透明电极通过传导装置与所述栅极线连接。
在本发明所述的液晶显示装置中，所述传导装置设置在所述液晶显示装置的非显示区域。
在本发明所述的液晶显示装置中，所述第三透明电极通过导电柱与所述栅极线连接。
在本发明所述的液晶显示装置中，所述导电柱设置在所述液晶显示装置的显示区域。
在本发明所述的液晶显示装置中，所述导电柱为导电的高分子材料。
 有益效果
能较好的减小栅极线与第二透明电极之间的寄生电容，从而减弱栅极线上的信号延迟现象，避免液晶显示装置由于栅极线上的寄生电容过大产生色斑等不良现象。
 附图说明
图1为现有技术的液晶显示装置的结构示意图；
图2为本发明的液晶显示装置的第一优选实施例的结构示意图；
图3为本发明的液晶显示装置的第二优选实施例的结构示意图；
图4为本发明的液晶显示装置的第三优选实施例的结构示意图；
图5为本发明的液晶显示装置的第四优选实施例的结构示意图。
 本发明的最佳实施方式
以下各实施例的说明是参考附加的图式，用以例示本发明可用以实施的特定实施例。
图2所示为本发明的液晶显示装置的第一优选实施例的结构示意图。在本实施例中，液晶显示装置200包括第一基板110、第二基板120以及设置在第一基板110和第二基板120之间的液晶层130，第一基板110包括栅极线111以及第一透明电极（图中未示出），第二基板120包括第二透明电极121。第二基板120与第一基板110相对的内表面可分为第一区域122和第二区域：其中第一区域122是第二基板120上与第一基板110上的栅极线111分布的区域对应的区域（本发明中将其定义为栅极线在第二基板120上的对应区域），第二区域为该栅极线111在第二基板120上的对应区域之外的区域。在第一区域122内没有设置第二透明电极121，第二透明电极121均设置在第二基板120的第二区域上。在本实施例中，第一基板110可为具有薄膜晶体管(Thin Film Transistor，TFT) 矩阵的玻璃基板或其它材质的基板，而第二基板120可为具有彩色滤光层(Color Filter，CF)的玻璃基板或其它材质的基板。值得注意的是，在一些实施例中，彩色滤光层和TFT矩阵亦可配置在同一基板上。
在本实施例中栅极线111对应的第二基板120的第一区域122上没有设置任何透明电极，这样减小了栅极线111与第二透明电极121之间的寄生电容（增加了栅极线111与第二透明电极121之间的间距），进而减小了栅极线111上总的寄生电容，从而减弱了栅极线111上的信号延迟现象，避免了液晶显示装置200由于栅极线111上的寄生电容过大产生色斑等不良现象。
图3所示为本发明的液晶显示装置的第二优选实施例的结构示意图，第二优选实施例的液晶显示装置300和第一优选实施例的区别在：第二基板120在其第一区域122上设置有第三透明电极210，该第三透明电极210与相应的栅极线111的信号端连接。
在本实施例中，第二透明电极121同样没有设置在栅极线111对应的第二基板120的第一区域122，减小了栅极线111与第二透明电极121之间的寄生电容。同时在栅极线111对应的第二基板120的第一区域122上设置有第三透明电极210，并将第三透明电极210和第二透明电极121通过光刻的方式彻底分离，通过给栅极线111提供信号的信号端对第三透明电极210提供相应的信号，使得第三透明电极210与相应的栅极线111同电位，从而消除第三透明电极210和栅极线111之间的电容，这样减小了栅极线111上总的寄生电容。并且第三透明电极210的设置使得液晶层130的液晶不会充入到第二基板120的第一区域122内，从而不会影响到液晶显示装置300的正常显示效果。
图4所示为本发明的液晶显示装置的第三优选实施例的结构示意图，第三优选实施例的液晶显示装置400和第二优选实施例的区别在：第三透明电极210不是与栅极线111的信号端连接，而是与栅极线111连接。在该实施例中，第三透明电极210通过传导装置310与栅极线111连接，传导装置310一般设置在液晶显示装置400的非显示区域（其中的显示区域为active area）。
在本实施例中，第二透明电极121同样没有设置在栅极线111对应的第二基板120的第一区域122，减小了栅极线111与第二透明电极121之间的寄生电容。同时在栅极线111对应的第二基板120的第一区域122上设置有第三透明电极210，第三透明电极210通过传导装置310（即transfer，一般用于将第一基板110的公共信号（com）传导至第二基板120的透明电极（如第二透明电极121）上）与栅极线111连接，使得第三透明电极210与相应的栅极线111同电位，因此第三透明电极210与栅极线111之间的寄生电容几乎为零，这样减小了栅极线111上总的寄生电容。由于传导装置310设置在液晶显示装置400的非显示区域，本实施例可以在第一基板110、第二基板120以及相应的液晶层130制作完毕后，通过传导装置310将栅极线111和第三透明电极210连接起来，使得第三透明电极210与相应的栅极线111同电位，由于传导装置310的制作工艺成熟，所以本实施例实施过程简单。
图5所示为本发明的液晶显示装置的第四优选实施例的结构示意图，第四优选实施例的液晶显示装置500和第二优选实施例的区别在：第三透明电极210不是与栅极线111的信号端连接，而是与栅极线111连接。在该实施例中，第三透明电极210通过导电柱410与栅极线111连接，导电柱410可采用制作衬垫（PS：Photo Spacer）的工艺进行制作，因此导电柱410一般设置在液晶显示装置500的显示区域，制作导电柱410的材料一般为导电的高分子材料（如聚苯硫醚、聚苯胺等）。
在本实施例中，第二透明电极121同样没有设置在栅极线111对应的第二基板120的第一区域122，减小了栅极线111与第二透明电极121之间的寄生电容。同时在栅极线111对应的第二基板120的第一区域122上设置有第三透明电极210，第三透明电极210通过导电柱410与栅极线111连接，使得第三透明电极210与相应的栅极线111同电位，因此第三透明电极210与栅极线111之间的寄生电容几乎为零，这样减小了栅极线111上总的寄生电容。由于导电柱410设置在液晶显示装置500的显示区域，即不能在液晶显示装置500制作完成后再进行导电柱410的设置，因此导电柱410的制作必须和彩色滤光层同时进行，这样使得导电柱410不会受到后续工序的影响，可以确保导电柱410良好的导电性。
综上所述，虽然本发明已以优选实施例揭露如上，但上述优选实施例并非用以限制本发明，本领域的普通技术人员，在不脱离本发明的精神和范围内，均可作各种更动与润饰，因此本发明的保护范围以权利要求界定的范围为准。
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  1. 一种液晶显示装置，包括第一基板、第二基板以及设置在所述第一基板和所述第二基板之间的液晶层，所述第一基板包括栅极线以及第一透明电极，所述第二基板包括第二透明电极，其特征在于，所述第二基板相对于所述第一基板的内表面分为第一区域和第二区域，所述第一区域为栅极线在第二基板上的对应区域，所述第二区域为所述栅极线在第二基板上的对应区域之外的区域，所述第二透明电极设置在所述第二区域内；所述第二基板还包括彩色滤光层，所述第二透明电极设置在所述彩色滤光层上。
  2. 根据权利要求1所述的液晶显示装置，其特征在于，所述第二基板包括第三透明电极，所述第一区域上设置有所述第三透明电极。
  3. 根据权利要求2所述的液晶显示装置，其特征在于，所述第三透明电极与相应的所述栅极线的信号端连接。
  4. 根据权利要求2所述的液晶显示装置，其特征在于，所述第三透明电极与所述栅极线连接。
  5. 根据权利要求4所述的液晶显示装置，其特征在于，所述第三透明电极通过传导装置与所述栅极线连接。
  6. 根据权利要求5所述的液晶显示装置，其特征在于，所述传导装置设置在所述液晶显示装置的非显示区域。
  7. 根据权利要求4所述的液晶显示装置，其特征在于，所述第三透明电极通过导电柱与所述栅极线连接。
  8. 根据权利要求7所述的液晶显示装置，其特征在于，所述导电柱设置在所述液晶显示装置的显示区域。
  9. 根据权利要求7所述的液晶显示装置，其特征在于，所述导电柱为导电的高分子材料。
  10. 一种液晶显示装置，包括第一基板、第二基板以及设置在所述第一基板和所述第二基板之间的液晶层，所述第一基板包括栅极线以及第一透明电极，所述第二基板包括第二透明电极，其特征在于，所述第二基板相对于所述第一基板的内表面分为第一区域和第二区域，所述第一区域为栅极线在第二基板上的对应区域，所述第二区域为所述栅极线在第二基板上的对应区域之外的区域，所述第二透明电极设置在所述第二区域内。
  11. 根据权利要求10所述的液晶显示装置，其特征在于，所述第二基板包括第三透明电极，所述第一区域上设置有所述第三透明电极。
  12. 根据权利要求11所述的液晶显示装置，其特征在于，所述第三透明电极与相应的所述栅极线的信号端连接。
  13. 根据权利要求11所述的液晶显示装置，其特征在于，所述第三透明电极与所述栅极线连接。
  14. 根据权利要求13所述的液晶显示装置，其特征在于，所述第三透明电极通过传导装置与所述栅极线连接。
  15. 根据权利要求14所述的液晶显示装置，其特征在于，所述传导装置设置在所述液晶显示装置的非显示区域。
  16. 根据权利要求13所述的液晶显示装置，其特征在于，所述第三透明电极通过导电柱与所述栅极线连接。
  17. 根据权利要求16所述的液晶显示装置，其特征在于，所述导电柱设置在所述液晶显示装置的显示区域。
  18. 根据权利要求16所述的液晶显示装置，其特征在于，所述导电柱为导电的高分子材料。
PCT/CN2011/084233 2011-12-14 2011-12-19 液晶显示装置 Ceased WO2013086748A1 (zh)

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