WO2013084429A1 - Procédé de fabrication d'une grille métallique, grille métallique et appareil d'imagerie à rayons x - Google Patents

Procédé de fabrication d'une grille métallique, grille métallique et appareil d'imagerie à rayons x Download PDF

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Publication number
WO2013084429A1
WO2013084429A1 PCT/JP2012/007448 JP2012007448W WO2013084429A1 WO 2013084429 A1 WO2013084429 A1 WO 2013084429A1 JP 2012007448 W JP2012007448 W JP 2012007448W WO 2013084429 A1 WO2013084429 A1 WO 2013084429A1
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Prior art keywords
insulating layer
metal
silicon substrate
manufacturing
film
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PCT/JP2012/007448
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English (en)
Japanese (ja)
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光 横山
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コニカミノルタ株式会社
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    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D5/00—Electroplating characterised by the process; Pretreatment or after-treatment of workpieces
    • C25D5/02—Electroplating of selected surface areas
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00—Apparatus or devices for radiation diagnosis; Apparatus or devices for radiation diagnosis combined with radiation therapy equipment
    • A61B6/42—Arrangements for detecting radiation specially adapted for radiation diagnosis
    • A61B6/4291—Arrangements for detecting radiation specially adapted for radiation diagnosis the detector being combined with a grid or grating
    • A—HUMAN NECESSITIES
    • A61—MEDICAL OR VETERINARY SCIENCE; HYGIENE
    • A61B—DIAGNOSIS; SURGERY; IDENTIFICATION
    • A61B6/00—Apparatus or devices for radiation diagnosis; Apparatus or devices for radiation diagnosis combined with radiation therapy equipment
    • A61B6/48—Diagnostic techniques
    • A61B6/484—Diagnostic techniques involving phase contrast X-ray imaging
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D1/00—Electroforming
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/04—Anodisation of aluminium or alloys based thereon
    • C—CHEMISTRY; METALLURGY
    • C25—ELECTROLYTIC OR ELECTROPHORETIC PROCESSES; APPARATUS THEREFOR
    • C25D—PROCESSES FOR THE ELECTROLYTIC OR ELECTROPHORETIC PRODUCTION OF COATINGS; ELECTROFORMING; APPARATUS THEREFOR
    • C25D11/00—Electrolytic coating by surface reaction, i.e. forming conversion layers
    • C25D11/02—Anodisation
    • C25D11/32—Anodisation of semiconducting materials
    • G—PHYSICS
    • G02—OPTICS
    • G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
    • G02B5/00—Optical elements other than lenses
    • G02B5/18—Diffraction gratings
    • G02B5/1847—Manufacturing methods
    • G02B5/1857—Manufacturing methods using exposure or etching means, e.g. holography, photolithography, exposure to electron or ion beams

Definitions

  • the present invention relates to a metal grating manufacturing method for manufacturing a grating that can be suitably used for, for example, a Talbot interferometer or a Talbot-Lau interferometer.
  • the present invention relates to a metal grid manufactured by this manufacturing method and an X-ray imaging apparatus using the metal grid.
  • Diffraction gratings are used in optical systems of various devices as spectroscopic elements having a large number of parallel periodic structures, and in recent years, application to X-ray imaging devices has also been attempted.
  • the diffraction gratings are classified into transmission diffraction gratings and reflection diffraction gratings when classified by the diffraction method.
  • the transmission diffraction gratings periodically arrange light absorbing portions on a substrate that transmits light.
  • absorption means that more than 50% of light is absorbed by the diffraction grating
  • transmission means that more than 50% of light passes through the diffraction grating.
  • Near-infrared, visible light, or ultraviolet diffraction gratings can be manufactured relatively easily because near-infrared, visible light, and ultraviolet light are sufficiently absorbed by a very thin metal.
  • a metal is deposited on a substrate such as glass to form a metal film on the substrate, and the metal film is patterned into a grating, whereby an amplitude diffraction grating using a metal grating is manufactured.
  • the transmittance for visible light about 400 nm to about 800 nm
  • Patent Document 1 proposes a method of manufacturing a diffraction grating having such a high aspect ratio structure.
  • the method for manufacturing a microstructure disclosed in Patent Document 1 includes a first step of forming a first insulating film on a Si substrate, and a first step of removing a part of the first insulating film to expose the Si surface. Two steps; a third step of etching the Si substrate from the exposed Si surface to form a recess; a fourth step of forming a second insulating film on the sidewall and bottom of the recess; and A fifth step of forming an exposed surface of Si by removing at least a part of the second insulating film formed on the bottom, and a sixth step of filling the recess from the exposed surface of Si with metal by electrolytic plating And have.
  • the fifth step in the method of manufacturing a fine structure disclosed in Patent Document 1 is intended to remove only the second insulating film formed at the bottom of the recess.
  • the edge portion of the recess (the boundary portion between the substrate surface and the side surface of the recess) is also etched relatively strongly by dry etching, so the method for manufacturing the microstructure disclosed in Patent Document 1 As shown in FIG. 23, not only the second insulating film formed on the bottom of the recess, but also the second insulating film on the ridge of the recess is etched, and the ridge of the recess can be energized. May end up in a bad state.
  • the present invention has been made in view of the above-described circumstances, and the object thereof is to provide a method for manufacturing a metal lattice that can form a metal portion of the lattice more densely by electroforming using a silicon substrate, and It is to provide a metal grid. Another object of the present invention is to provide an X-ray imaging apparatus using this metal grating.
  • the method for manufacturing a metal grid according to the present invention includes forming a recess on a main surface of a silicon substrate, forming a first insulating layer on a surface on which the recess is formed, and forming a first insulating layer on a bottom of the recess. Then, the recess is filled with metal by electroforming.
  • a second insulating layer is formed at a portion corresponding to the ridge of the recess. In such a metal grating manufacturing method, since the second insulating layer is formed, the metal is more reliably deposited and grows from the bottom portion of the recess.
  • the metal portion of the grid can be formed more densely by electroforming.
  • lattice are provided.
  • FIG. 3 It is sectional drawing which shows another example of the mode of the insulating layer formed into a film by the said vapor deposition method. It is a figure for demonstrating the modification of the manufacturing method of the said metal grating
  • FIG. 24A is a general view
  • FIG. 24B and FIG. FIG. 24B is a partially enlarged view of FIG. 24A.
  • FIG. 1 is a perspective view showing a configuration of a metal grid in the embodiment.
  • the metal lattice DG of the present embodiment includes a first silicon portion 11 and a lattice 12 formed on the first silicon portion 11.
  • the first silicon portion 11 has a plate shape or a layer shape along the DxDy plane when a DxDyDz orthogonal coordinate system is set as shown in FIG.
  • the lattice 12 has a predetermined thickness H (the length in the Dz direction perpendicular to the lattice plane DxDy (the normal direction of the lattice plane DxDy)) and a plurality of second silicon portions 12a extending linearly in one direction Dx.
  • a plurality of metal portions 12b having the predetermined thickness H and extending linearly in the one direction Dx.
  • the plurality of second silicon portions 12a and the plurality of metal portions 12b are alternately arranged in a direction Dy orthogonal to the one direction Dx and parallel to a DxDz plane having the direction Dy as a normal line.
  • the plurality of metal portions 12b are respectively disposed at predetermined intervals in a direction Dy orthogonal to the one direction Dx.
  • the plurality of second silicon layers 12a are respectively arranged at predetermined intervals in a direction Dy orthogonal to the one direction Dx.
  • the predetermined interval (pitch) P is constant in this embodiment.
  • the plurality of metal portions 12b are arranged at equal intervals P in the direction Dy orthogonal to the one direction Dx.
  • the second silicon portion 12a has a plate shape or a layer shape along the DxDz surface orthogonal to the DxDy surface.
  • the metal portion 12b includes a plate-like or layered lattice portion 12ba along the DxDz plane sandwiched between the second silicon portions 12a adjacent to each other, and a growth extending from one end of the lattice portion 12ba into the first silicon portion 11 And a start end portion 12bb.
  • a plurality of first insulating layers 12c are further provided between the plurality of second silicon portions 12a and the lattice portions 12ba of the plurality of metal portions 12b, respectively. That is, the first insulating layer 12c is formed on both side surfaces of the second silicon portion 12a. In other words, the first insulating layer 12c is formed on both side surfaces of the lattice portion 12ba in the metal portion 12b.
  • the first insulating layer 12c functions to electrically insulate the second silicon layer 12a and the lattice portion 12ba in the metal portion 12b, and is formed of, for example, an oxide film.
  • the oxide film is, for example, a silicon oxide film (SiO 2 film, silicon oxide film) or an alumina film (Al 2 O 3 film, aluminum oxide film).
  • the insulating layer as described above is not formed between the plurality of second silicon portions 12a and the growth start end portions 12bb of the plurality of metal portions 12b, and the second silicon portions 12a and the metal portions 12b are not formed. Is electrically connected to the growth start end portion 12bb.
  • the growth start end portion 12bb is a portion where the metal portion 12b starts to grow in the electroforming process.
  • a second insulating layer 12d is further provided on the upper surfaces (tops) of the plurality of second silicon portions 12a.
  • the second insulating layer 12d is a layer formed by an insulating layer forming step and an insulating layer reinforcing step described later.
  • the second insulating layer 12d functions to electrically insulate the second silicon layer 12a by an electroforming method described later.
  • the second insulating layer 12d is formed of, for example, an oxide film or a photosensitive resin layer (photoresist film). Examples of the oxide film include a silicon oxide film and an alumina film.
  • the first silicon portion 11, the plurality of second silicon portions 12a, the plurality of first insulating layers 12c, and the plurality of second insulating layers 12d function to transmit X-rays
  • the plurality of metal portions 12b Functions to absorb lines.
  • the lattice portion 12ba of the metal portion 12b functions so as to mainly absorb X-rays. Therefore, as an aspect, the metal grating DG functions as a diffraction grating by appropriately setting the predetermined interval P according to the wavelength of the X-ray.
  • the metal of the metal portion 12b is preferably selected to absorb X-rays.
  • a metal or a noble metal having a relatively heavy atomic weight more specifically, for example, gold (Au), platinum (platinum, Pt ), Rhodium (Rh), ruthenium (Ru) and iridium (Ir).
  • the lattice portion 12ba of the metal portion 12b has an appropriate thickness H so that, for example, X-rays can be sufficiently absorbed according to specifications.
  • the ratio of the thickness H to the width W in the lattice portion 12ba of the metal portion 12b is, for example, a high aspect ratio of 5 or more.
  • the width W of the lattice portion 12ba in the metal portion 12b is the length of the lattice portion 12ba in the metal portion 12b in the direction (width direction) Dy orthogonal to the one direction (long direction) Dx.
  • the thickness H of the lattice portion 12ba in the metal portion 12b is such that the lattice portion 12ba in the metal portion 12b in the normal direction (depth direction) Dz of the plane DxDy constituted by the one direction Dx and the direction Dy perpendicular to the one direction Dx. Is the length of
  • the metal lattice DG having such a high aspect ratio metal portion 12b includes a resist layer forming step of forming a resist layer on the main surface of the silicon substrate, and the resist layer in the patterned portion by patterning the resist layer. Forming a recess having a predetermined depth by etching the silicon substrate corresponding to the portion from which the resist layer has been removed by dry etching, and forming the recess in the silicon substrate.
  • An insulating layer forming step (an example of a first insulating layer forming step) for forming an insulating layer (an example of a first insulating layer) on the side surface (the original surface of the substrate and the surface of the concave portion), and the bottom of the concave portion
  • a voltage is applied to the silicon substrate by a removal step of removing a portion of the insulating layer formed on the substrate and an electroforming method.
  • the insulating layer is reinforced by a forming method different from the insulating layer forming step at a portion corresponding to the ridge portion of the concave portion (a boundary portion between the substrate surface and the side surface of the concave portion).
  • an insulating layer reinforcing step (an example of a second insulating layer forming step) for forming (an example of a second insulating layer).
  • the concave portion is, for example, a slit groove in a one-dimensional lattice, and a columnar hole (columnar hole) in a two-dimensional lattice.
  • a manufacturing method of the metal lattice DG in which the concave portion is a slit groove will be described in detail. The same applies even if the recess has another shape such as a columnar hole.
  • FIG. 5 is a perspective view showing the silicon substrate during the manufacturing process of the metal grid in the embodiment.
  • FIG. 6 is a view showing a state of the silicon substrate after the removal and surface area increasing step.
  • FIG. 7 is a view for explaining an insulating layer reinforcing step by a sputtering method.
  • FIG. 8 is a cross-sectional view showing an example of the state of the insulating layer 28 minutes after film formation by sputtering.
  • FIG. 9 is a cross-sectional view showing an example of the state of the insulating layer 112 minutes after film formation by sputtering.
  • FIG. 10 is a diagram showing each state of the silicon substrate before and after the insulating layer reinforcement step by the sputtering method.
  • FIG. 10A shows a state before the insulating layer reinforcing step
  • FIG. 10B shows a state after the insulating layer reinforcing step. Note that the silicon substrate of FIG. 10A and the silicon substrate of FIG. 10B are manufactured in the same batch, but are different substrates for convenience of taking a photograph of a cross section.
  • FIG. 10A and the silicon substrate of FIG. 10B are manufactured in the same batch, but are different substrates for convenience of taking a photograph of a cross section.
  • FIG. 11 is a diagram for explaining an insulating layer reinforcing step by a vapor deposition method.
  • FIG. 11A shows an overall view
  • FIG. 11B shows a state of the first film formation
  • FIG. 11C shows a state of the second film formation.
  • 12 and 13 are cross-sectional views illustrating an example of a state of an insulating layer formed by an evaporation method.
  • 12 shows one ridge (shoulder) of the wall portion 32
  • FIG. 12A shows the vicinity of the upper portion of the wall portion 32 (near the opening of the slit groove)
  • FIG. 12B shows the wall portion shown in FIG. 12A.
  • the enlarged view of the ridge part in 32 is shown.
  • 13 shows the other ridge (shoulder) of the wall 32, FIG.
  • FIG. 13A shows the vicinity of the top of the wall 32 (near the opening of the slit groove), and FIG. 13B shows the wall shown in FIG. 13A.
  • the enlarged view of the ridge part in 32 is shown. 6
  • FIG. 8, FIG. 9, FIG. 11B and FIG. 11C are drawings of photographs.
  • a silicon substrate 30 is prepared (FIG. 2A).
  • the silicon substrate 30 is n-type silicon whose majority carriers are electrons.
  • n-type silicon has abundant conductor electrons
  • the silicon substrate 30 has a plating solution 46 and So-called ohmic contact. For this reason, in this case, an electric current flows and the reduction reaction easily occurs, and as a result, the metal is more easily deposited.
  • a resist layer 33 is formed on the main surface of the silicon substrate 30 (resist layer forming step), and the resist layer 33 is patterned to remove the patterned portion of the resist layer 33 (patterning step, FIG. 2B). 2C, 2D, 3A).
  • the resist layer is a layer that functions as a protective film against etching during etching.
  • the resist layer 33 may be a material that is resistant to the etching process in the next etching step. Tolerance does not have to mean that the etching process is not etched at all, it means that it is relatively difficult to etch, and it should not be etched while the part to be etched is etched. This means that it functions as a protective film that protects the target portion.
  • the resist layer 33 may be made of, for example, the same material as an insulating layer 34 to be described later. (SiO 2 ) film) 33a.
  • the silicon oxide film 33a is used as a patterned resist layer 33, and a photosensitive resin layer (photoresist film) 40 is used to pattern the silicon oxide film 33a.
  • the resist layer 33 may be made of a material different from that of the insulating layer 34. It may be an insulating metal oxide film 33b.
  • a metal oxide film 33b is, for example, an alumina film (Al 2 O 3 film) or the like.
  • the metal oxide film 33b is used as a patterned resist layer 33, and the photosensitive resin layer 40 is used to pattern the metal oxide film 33b.
  • Such a silicon oxide film 33a and a metal oxide film 33b have insulating properties and become layers that can remain after the etching step and the removal surface area increasing step.
  • the resist layer 33 may be made of a material different from that of the insulating layer 34, and may be, for example, an oxidizable metal film 33c having resistance to the etching process in the etching process.
  • a metal film 33c is, for example, an aluminum film (Al film) or the like.
  • the metal film 33c is used as a patterned resist layer 33, and the photosensitive resin layer 40 is used to pattern the metal film 33c.
  • the metal film 33c is oxidized and has an insulating property in a later step. At this time, even if a metal portion remains inside the metal oxide film, the entire metal film 33c becomes a metal oxide film. Also good.
  • Such an oxidizable metal film 33c also has an insulating property by thermal oxidation in the insulating layer forming process, and becomes a layer that can remain after the etching process and the removal surface area increasing process.
  • Such a resist layer 33 can be formed by various methods. More specifically, for example, when the resist layer 33 is the silicon oxide film 33 a, the silicon oxide film 33 a is formed as the resist layer 33 on the surface of the silicon substrate 30.
  • the silicon oxide film 33a is formed by various film forming methods such as a thermal oxidation method, a chemical vapor deposition method (CVD), an anodic oxidation method, and a sputtering method, which are known conventional means.
  • CVD chemical vapor deposition method
  • an anodic oxidation method anodic oxidation method
  • a sputtering method which are known conventional means.
  • the thermal oxidation method first, an oxygen atmosphere (which may include an inert gas) or water vapor is introduced into a quartz tube in which the silicon substrate 30 is disposed.
  • the silicon substrate 30 is heated to a high temperature by heating the quartz tube with a heater in the oxygen atmosphere or the gas atmosphere of water vapor, and a silicon oxide film having a predetermined thickness (for example, about 200 nm) is formed on the surface thereof. 33a is formed.
  • TEOS tetraethoxysilane
  • the TEOS gas is mixed with an oxidizing gas such as oxygen or ozone and a diluent gas such as helium to generate a raw material gas.
  • This source gas is introduced into a CVD apparatus such as a plasma CVD apparatus or a room temperature ozone CVD apparatus, and a silicon oxide film 33a having a predetermined thickness (for example, 200 nm) is formed on the surface of the silicon substrate 30 in the CVD apparatus.
  • a silicon oxide film 33a having a predetermined thickness for example, 200 nm
  • the anode of the power source is connected to the silicon substrate 30, and the cathode electrode and the silicon substrate 30 connected to the cathode of the power source are immersed in the electrolytic solution.
  • a silicon oxide film 33 a having a predetermined thickness for example, about 200 nm
  • the silicon oxide film 33a is formed on at least the upper surface of the silicon substrate 30, but may also be formed on the back surface and side surfaces. Since the silicon oxide film 33a is used as the resist layer 33 in this manner, various film forming methods such as a known and conventional thermal oxidation method, chemical vapor deposition method, anodic oxidation method, and sputtering method can be used. Therefore, the silicon oxide film 33a can be formed relatively easily.
  • the thickness (film thickness) t1 of the resist layer 33 is appropriately adjusted according to the material of the resist layer 33 so as to remain after the subsequent etching step and the removal surface area increasing step described later. Further, in the insulating layer reinforcing step described later, in the sputtering method and vapor deposition method, the reinforcing insulating layer 35 is formed on the surface of the silicon substrate 30, that is, on the resist layer 33. Layer 35 may also be considered.
  • a photosensitive resin layer 40 is formed on the silicon oxide film 33a formed on the silicon substrate 30 by, for example, spin coating (FIG. 2B).
  • the photosensitive resin layer 40 is patterned by a lithography method (FIG. 2C), and the patterned photosensitive resin layer 40 is removed (FIG. 2D). More specifically, a lithography mask 41 is pressed against the photosensitive resin layer 40, and the photosensitive resin layer 40 is irradiated with ultraviolet rays 42 through the lithography mask 41, and the photosensitive resin layer 40 is subjected to pattern exposure and development. (FIG. 2C). And the photosensitive resin layer 40 of the part which was not exposed (or exposed part) is removed (FIG. 2D).
  • the silicon oxide film 33a in the portion where the photosensitive resin layer 40 has been removed is removed by etching, and the silicon oxide film 33a is patterned (FIG. 3A). More specifically, for example, the silicon oxide film 33a is patterned by reactive reactive etching (RIE) of CHF 3 gas. For example, the silicon oxide film 33a is patterned by wet etching with hydrofluoric acid. The etching of the silicon oxide film 33a as the resist layer 33 in this patterning step may be another etching method.
  • RIE reactive reactive etching
  • the metal oxide film 33b is formed by, for example, chemical vapor deposition or sputtering.
  • the film is formed by a film forming method such as Further, RIE using an appropriate reactive gas is used for patterning the metal oxide film 33b in the patterning step.
  • the metal oxide film 33b is the alumina film 33b
  • the alumina film 33b is formed with a thickness of about 150 nm by sputtering, and the alumina film 33b is patterned by RIE using chlorine gas.
  • the metal film 33c is formed by, for example, a vacuum deposition method or a sputtering method. The film is formed by the method.
  • RIE using an appropriate reactive gas is used for patterning the metal film 33c in the patterning step.
  • the metal film 33c is the aluminum film 33c
  • the aluminum film 33c is formed with a thickness of about 150 nm by sputtering, and the aluminum film 33c is patterned by RIE using chlorine gas.
  • FIG. 3B shows an example of the structure of the silicon substrate 30 after the etching step.
  • FIG. 3B shows a cross section of the silicon substrate 30 along the line AA ′ shown in FIG. Has been.
  • the silicon substrate 30 is etched by ICP (Inductively Coupled Plasma) dry etching from the surface of the silicon substrate 30 to a predetermined depth H using the patterned photosensitive resin layer 40 and the resist layer 33 as a mask.
  • ICP Inductively Coupled Plasma
  • This ICP dry etching is preferably an ASE process using an ICP apparatus.
  • This ASE (Advanced Silicon Etch) process includes etching a silicon substrate by RIE (reactive ion etching) using F radicals and F ions in SF 6 plasma, CF x radicals in C 4 F 8 plasma, and A process of depositing a polymer film having a composition close to Teflon (registered trademark) on the wall surface and acting as a protective film by a polymerization reaction of these ions is repeatedly performed.
  • RIE reactive ion etching
  • the vertical etching can be performed at a high aspect ratio, more preferably, this step is performed in a state in which the SF 6 plasma is rich and a state in which the C 4 F 8 plasma is rich as in the Bosch process.
  • the side wall protection and the bottom surface etching may be alternately performed.
  • the dry etching method is not limited to ICP dry etching, and other methods may be used. For example, so-called parallel plate type reactive ion etching (RIE), magnetic neutral line plasma (NLD) dry etching, chemical assisted ion beam (CAIB) etching, electron cyclotron resonance type reactive ion beam (ECRIB) etching, etc. It may be technology.
  • the photosensitive resin layer 40 is removed by this ICP dry etching. Further, the resist layer 33 may be slightly etched.
  • the thickness of the silicon oxide film 33a is reduced from about 200 nm to about 170 nm by ICP dry etching.
  • the thickness of the alumina film 33b is reduced from about 150 nm to about 130 nm by ICP dry etching, for example.
  • the resist layer 33 is the aluminum film 33c as the metal film 33c, the thickness of the aluminum film 33c is reduced from about 150 nm to about 130 nm, for example, by ICP dry etching.
  • the plate-like portion (layer-like portion, wall portion) 32 of the silicon substrate 30 that has been etched and remains along the DxDz plane becomes the second silicon portion 12a, and the silicon substrate that has been etched and remains along the DxDy plane.
  • the 30 plate-like portions (base portions) 31 are the first silicon portions 11.
  • the insulating layer 34 having a predetermined thickness is formed (FIG. 3C, insulating layer forming step).
  • the insulating layer 34 is a silicon oxide film 34a because the silicon substrate 30 is used, and the silicon oxide film 34a as the insulating layer 34 is formed with a thickness of about 40 nm, for example.
  • the silicon oxide film 34 a is formed on at least the inner surface of the slit groove SD of the silicon substrate 30, but may also be formed on the back surface or side surface of the silicon substrate 30.
  • this thermal oxidation method an oxide film is grown from the surface of the material by heating the material to be oxidized (in this embodiment, the inner surface of the recess of the silicon substrate 30) in a gas atmosphere of oxygen or water vapor. It is possible to obtain an oxide film that is dense and has good adhesion and is integrated with the material. In this thermal oxidation method, the thickness of the film can be accurately controlled by adjusting the flow rate of the gas atmosphere and the heating time. A film can be easily obtained. Therefore, this thermal oxidation method is suitable as a method for forming the insulating film 34 in the electroforming method of the electroforming process.
  • the slit is formed by heating at 1000 ° C. for 60 minutes in an oxygen atmosphere introduced at a rate of 200 ml / min.
  • a substantially uniform silicon oxide film 34a having a thickness of about 40 nm was formed over the entire inner surface of the trench SD.
  • a silicon oxide film 34a having a thickness of about 40 nm that is substantially uniform over the entire inner surface of the slit groove is formed. Been formed.
  • the resist layer 33 is a metal oxide film 33b (in this example, an alumina film 33b), it is heated at 1150 ° C. for 4 minutes in an atmosphere of water vapor introduced at a rate of 1 liter / min.
  • a substantially uniform silicon oxide film 34a having a thickness of about 40 nm was formed over the entire inner surface of the slit groove SD.
  • the resist layer 33 is a metal film 33c (in this example, an aluminum film 33c)
  • a metal film 33c in this example, an aluminum film 33c
  • an oxygen atmosphere introduced at a rate of 200 ml / min
  • a substantially uniform silicon oxide film 34a having a thickness of about 40 nm was formed over the entire inner surface of the slit groove SD.
  • the oxide film 33 is not substantially formed on the surface by the thermal oxidation in the insulating layer forming step.
  • the thickness of the silicon oxide film 33a is changed from about 170 nm to about 180 nm by the thermal oxidation in the insulating layer forming step.
  • the thickness of the alumina film 33b is changed from about 130 nm to about 140 nm by the thermal oxidation in the insulating layer forming step.
  • the resist layer 33 is the metal film 33c
  • a metal oxide film is formed on the surface by thermal oxidation in the insulating layer forming step.
  • the metal film 33c as the resist layer 33 acquires resistance to the removal process in the removal process and also obtains insulation in the electroforming process of the electroforming process.
  • the metal film 33c is an aluminum film
  • an alumina film as a non-moving body film is formed. In the above example, an alumina film of about 80 nm was formed.
  • the thermal oxidation method is used to form the insulating layer 34 in the insulating layer forming step.
  • an anodic oxidation method or a deposition method may be used.
  • the insulating layer 34 is the silicon substrate 30, it is a silicon oxide film 34a, and the silicon oxide film 34a as the insulating layer 34 is formed with a thickness of about 20 nm, for example. More specifically, in order to perform anodic oxidation, the anode of the power source is connected to the silicon substrate 30, and the cathode electrode connected to the cathode of the power source and the silicon substrate 30 are immersed in the electrolytic solution. When energized, a silicon oxide film 34a having a predetermined thickness is formed on the surface of the silicon substrate 30, and an insulating layer 34 is formed. The silicon oxide film 34 a is formed on at least the inner surface of the slit groove SD of the silicon substrate 30, but may be formed on the back surface and side surfaces of the silicon substrate 30.
  • a conductive material to be oxidized in this embodiment, the silicon substrate 30
  • the material is energized as an anode (positive electrode, positive electrode), so that the surface of the material is in the electrolytic solution.
  • an oxide film is grown from the surface of the material by combining with oxygen.
  • the anodic oxidation method is very dense because the film formation proceeds as described above. An oxide film with good adhesion integrated with the material can be obtained.
  • the progress of the oxidation is stopped by the conductivity being inhibited by the oxide formed on the material surface as the oxidation proceeds. Therefore, even if there is a portion where oxidation has progressed and a portion where oxidation is delayed during the progress of the oxidation, by continuing energization, the portion where oxidation is delayed is also oxidized at the end of the oxidation. Since the film is oxidized by the same film thickness as the other parts that have been completed, the anodic oxidation method can finally form an oxide film that is uniform in thickness and thickness over the entire surface of the material.
  • this anodic oxidation method since the thickness of the oxide film is proportional to the applied voltage, the thickness of the oxide film can be accurately controlled by adjusting the voltage. To an oxide film having a thickness of several ⁇ m can be easily obtained. Therefore, this anodic oxidation method is suitable as a method for forming the insulating film 34 in the electroforming process of the electroforming process.
  • the electrolyte is an acidic solution having a strong oxidizing power and not dissolving the oxide film generated by anodization, such as nitric acid, hydrochloric acid, sulfuric acid
  • a solution of oxalic acid and phosphoric acid is preferable, and a neutral salt such as ammonium borate, ammonium tartrate, or ammonium citrate may be used.
  • the resist layer 33 is a metal film 33c, for example, an aluminum film 33c
  • the electrolyte is an acid having strong oxidizing power such as boric acid that does not corrode aluminum oxide, or dilute oxide having low corrosion of aluminum oxide. Examples include weak acids such as acids and dilute phosphoric acid, and neutral salts such as ammonium borate, ammonium tartrate, and ammonium citrate.
  • the cathode electrode is preferably formed of a metal that does not dissolve in the electrolytic solution, such as gold (Au) and platinum (Pt).
  • the resist layer 33 is a silicon oxide film 33a
  • the voltage 40V is applied with nitric acid having a concentration of 68% and platinum as a cathode
  • the energization is substantially stopped after about 15 minutes
  • a substantially uniform silicon oxide film 34a with a thickness of about 20 nm was formed over the entire inner surface of the slit groove SD.
  • the resist layer 33 is a metal oxide film 33b (in this example, an alumina film 33b), for example, it is immersed in hydrochloric acid with a concentration of 35%, and when a voltage of 40 V is applied using platinum as a cathode, energization is performed after about 15 minutes.
  • the silicon oxide film 34a having a thickness of approximately 20 nm was formed substantially uniformly over the entire inner surface of the slit groove SD.
  • the resist layer 33 is a metal film 33c (in this example, an aluminum film 33c)
  • a metal film 33c in this example, an aluminum film 33c
  • the resist layer 33 is immersed in an oxalic acid aqueous solution having a concentration of 0.5 mol% and a voltage of 40 V is applied using platinum as a cathode, about 10 minutes. Later, the energization was substantially stopped, and a substantially uniform silicon oxide film 34a having a thickness of about 20 nm was formed over the entire inner surface of the slit groove, and an alumina film having a thickness of about 55 nm was formed on the surface of the aluminum film 33c.
  • the oxide film 33 is not substantially formed on the surface by the anodic oxidation in the insulating layer forming step.
  • the resist layer 33 is the metal film 33c, as described above, a metal oxide film is formed on the surface by the anodic oxidation in this insulating layer forming step.
  • the metal film 33c as the resist layer 33 acquires resistance to the removal process in the removal process and also obtains insulation in the electroforming process of the electroforming process.
  • the metal film 33c is an aluminum film, an alumina film as a non-moving body film is formed. In the above example, an alumina film of about 55 nm was formed.
  • an alumina film having a thickness of about 30 nm was formed after about 5.
  • the deposition method is a method of forming the insulating layer 34 into a film by a deposition action, for example, chemical vapor deposition.
  • the insulating layer 34 formed by such a deposition method include a silicon oxide film 34a and a metal oxide film 34b.
  • An example of the metal oxide film 34b is an alumina film 34b. Since this insulating layer 34 is formed by the deposition method from the main surface side where the slit grooves SD are formed in the silicon substrate 30, it is formed over the entire surface on the main surface side.
  • the insulating layer 34 is the entire inner surface of the slit groove SD (the wall surface (inner side surface and bottom surface) of the slit groove SD) and the wall portion of the slit groove SD that remains in the etching process. It is formed on the upper surface portion (top portion) of the wall portion.
  • the insulating layer 34 may also be formed on the back surface or side surface of the silicon substrate 30.
  • this deposition method forms a film by a deposition action, a dense film can be formed. Therefore, this deposition method is suitable as a method of forming the insulating film 34 in the electroforming method of the electroforming process. More specifically, when the insulating layer 34 is deposited and formed by chemical vapor deposition on the entire surface of the silicon substrate 30 on which the slit groove SD is formed, for example, as described above, First, tetraethoxysilane (TEOS) is heated and bubbled with a carrier gas to generate TEOS gas. Next, the TEOS gas is mixed with an oxidizing gas such as oxygen or ozone and a diluent gas such as helium to generate a raw material gas.
  • TEOS tetraethoxysilane
  • this source gas is introduced into a CVD apparatus such as a plasma CVD apparatus or a room temperature ozone CVD apparatus, and a silicon oxide film 34a having a predetermined thickness (for example, about 40 nm) is formed on the surface of the silicon substrate 30 in the CVD apparatus.
  • a CVD apparatus such as a plasma CVD apparatus or a room temperature ozone CVD apparatus
  • a silicon oxide film 34a having a predetermined thickness for example, about 40 nm
  • an alumina film 34b having a predetermined thickness for example, about 30 nm
  • this CVD is a surface chemical reaction of the source gas, it is possible to form a dense film on the inner wall of the structure (in this embodiment, the inner surface of the slit groove SD) without any special measures.
  • a film thickness of several nm to several ⁇ m can be relatively easily formed.
  • the combination of the resist layer 33 and the insulating layer 34 in each of these processes is as follows.
  • the resist layer 33 is a silicon oxide film 33a formed by a thermal oxidation method, an anodic oxidation method, and a deposition method
  • the insulating layer 34 is formed by a thermal oxidation method, an anodic oxidation method, and a deposition method.
  • the insulating layer 34 is a silicon oxide film 34a (in the case of CVD, which is formed by a thermal oxidation method, an anodic oxidation method, and a deposition method). (TEOS) and a second B aspect that is an alumina film 34b formed by a deposition method.
  • TEOS TEOS
  • the insulating layer 34 is a silicon oxide film 34a formed by a film forming method of a thermal oxidation method and an anodic oxidation method.
  • the portion of the insulating layer 34 formed on the bottom BT of the slit groove SD is removed, and the plate-like portion (base) 31 of the silicon substrate 30 in the bottom BT of the slit groove SD is replaced with the first.
  • the surface area of the bottom portion of the slit groove SD is made wider than before the etching (FIG. 3D, FIG. 4A; removal widening surface area step).
  • the removal step of removing the portion of the insulating layer 34 formed on the bottom BT of the slit groove SD may be used.
  • the silicon substrate 30 at the bottom of the slit groove SD is further etched to increase the surface area of the bottom portion of the slit groove SD.
  • a removal surface area increasing step is performed in which a surface area increasing step is performed to make it wider than before etching.
  • the portion of the insulating layer 34 formed on the bottom BT of the slit groove SD is removed (FIG. 3D, removal step), and then, the base 31 of the silicon substrate 30 at the bottom BT of the slit groove SD. Is further etched at a second predetermined depth h (FIG. 4A, surface area increasing step).
  • the surface area of the bottom portion of the slit groove SD becomes wider than before the etching.
  • the portion of the insulating layer 34 formed on the bottom BT of the slit groove SD is etched and removed by ICP dry etching using CHF 3 gas (FIG. 3D).
  • the gas is changed to a gas suitable for silicon etching, for example, SF 6, and the plate-like portion of the silicon substrate 30 at the bottom BT of the slit groove SD (by ICP dry etching using SF 6 gas) (The base 31 is further etched (FIG. 4A).
  • a gas suitable for silicon etching for example, SF 6
  • the Bosch process ICP dry etching is performed in which the SF 6 plasma rich state and the C 4 F 8 plasma rich state are alternately repeated.
  • the time for the state in which the C 4 F 8 plasma is rich (deposition property) is longer than the time for the state in which the SF 6 plasma is rich (etching property)
  • the side wall protection becomes excessive, and FIG. 4A and FIG.
  • the side surface of the new growth start end recess AP formed by etching the plate-like portion 31 of the silicon substrate 30 in the bottom BT of the slit groove SD is tapered.
  • the base 31 of the silicon substrate 30 was etched by 7720 nm.
  • the state of the silicon substrate 30 after this removal broadening process is shown in FIG. 6 as a photograph of one specific example.
  • the insulating layer 34 formed on the inner side surface of the slit groove SD (the insulating layer 34 formed on both wall surfaces (both side surfaces) of the wall portion 32 of the silicon substrate 30) is:
  • the portion of the insulating layer 34 formed on the bottom portion BT of the slit groove SD is removed, it remains with a sufficient thickness to function as an insulating layer.
  • the insulating layer 34 formed on the inner side surface of the slit groove SD functions to block the voltage applied to the plate-like portion 32 of the silicon substrate 30 in the next electroforming process by cooperating with the insulating resist layer 33.
  • the thickness may be sufficient to achieve (the function of electrically insulating the wall portion 32), and may be, for example, about 10 nm or more.
  • ICP dry etching is performed by using a chlorine-based gas containing boron such as BCl 3 that can etch alumina.
  • Each insulating layer 34 formed on the inner side surface of each slit groove SD includes a plurality of second silicon.
  • a plurality of first insulating layers 12c are formed between the portion 12a and the plurality of metal portions 12b. Further, the resist layer 33 on the upper surfaces (top portions) of the plurality of second silicon portions 12a remaining after the removal broadening process becomes a plurality of second insulating layers 12d.
  • the gas type is changed in the removal step and the surface area increasing step in order to use a gas suitable for the etching target, but the thickness of the insulating layer 34 formed on the bottom portion BT of the slit groove SD is different. If it is relatively thin, a gas suitable for etching silicon used in the surface area increasing step may be used in the removing step. Even when the gas is suitable for etching the silicon, ionized molecules collide with the insulating layer 34, so that the insulating layer 34 is gradually moved by the kinetic energy of the gas suitable for etching the silicon. Can be removed. Conversely, the gas used in the removal step may be used as it is in the surface area increasing step, and silicon can be etched gradually. In this way, by using the same gas in the removing step and the surface area increasing step, it is not necessary to change the gas type between the steps, so that the steps are simplified.
  • etching is used, but wet etching may be used.
  • a (100) substrate is selected as the silicon substrate 30, the slit groove SD is formed so that the longitudinal direction of the slit groove SD is the [110] direction, and potassium hydroxide or TMAH (tetramethylammonium hydroxide, for example) is formed.
  • the base 31 of the silicon substrate 30 is etched so that the side surface of the growth start recess AP is tapered. By such a surface area increasing step, for example, the base 31 of the silicon substrate 30 was etched by 1000 nm.
  • a reinforcing insulating layer 35 is formed on the ridge portion of the slit groove SD (the boundary portion between the original surface of the silicon substrate 30 and the side surface of the slit groove SD, both shoulder portions of the wall portion 32) (insulation).
  • Layer reinforcement step, FIG. 4B Such an insulating layer reinforcing step is performed by a film forming method such as a sputtering method and a vapor deposition method.
  • a target of a substance (for example, quartz or alumina) to be deposited as a reinforcing insulating layer 35 is placed relatively close to the silicon substrate 30 in the vacuum chamber of the sputtering deposition apparatus.
  • a rare gas element such as argon ionized by applying a high voltage (usually using argon) is irradiated and collided with the negatively charged target. By this collision, atoms on the surface of the target are repelled (sputtered).
  • the sputtered atoms reach the ridge portion (the ridge portion of the wall portion 32) of the slit groove SD, so that the sputtering is applied to the portion corresponding to the ridge portion (the ridge portion of the wall portion 32) of the slit groove SD. Particles accumulate and deposit to form a film.
  • argon plasma (2) argon nuclei collide with the target, and (3) the target material bounces back and adheres to the substrate surface.
  • the sputtered particles blown off from the surface of the target fly isotropically from the target to the silicon substrate 30 with little directivity in the flight direction as shown in FIG.
  • the sputtered particles do not reach the bottom of the slit groove SD, and as a result, the top and both shoulders of the wall portion 32 forming the slit groove SD. Only the (ridge) and its vicinity are reached, and sputtering particles are deposited.
  • a slit groove SD (with a pitch P of about 5.3 ⁇ m, a slit formed with no insulating layer 34 from which the resist film 33 has been removed).
  • a silicon substrate 30 having only a groove width of about 2.65 ⁇ m and a depth of about 100 ⁇ m, a silicon oxide film is formed by sputtering under sputtering conditions of RF power of 500 W, argon gas of 32 sccm, oxygen of 8 sccm, and film forming pressure of 0.5 Pa. In this case, after 28 minutes, as shown in FIG.
  • the silicon oxide film was formed only on the top portion of the wall portion 32 and both shoulder portions (ridge portions) and the vicinity thereof in the silicon substrate 30.
  • a silicon oxide film is formed with a thickness of about 331 nm on the top of the wall 32, and a silicon oxide film with a thickness of about 234 nm is formed on both shoulders (ridges) of the wall 32.
  • the thickness of the silicon oxide film becomes thinner as it becomes deeper in the depth direction.
  • FIG. 9 even if a silicon oxide film having a thickness of about 1.45 ⁇ m is formed on the top of the wall portion 32 (after 112 minutes), as shown in FIG.
  • the sputtering method can locally form a silicon oxide film only near the upper portion of the wall portion 32 (near the opening end of the slit groove SD).
  • the sputtering conditions of the insulating layer reinforcing step are RF power 500 W, argon gas 32 sccm, oxygen 8 sccm, film forming pressure 0.5 Pa, film forming time 28 minutes, and the reinforcing insulating layer 35 is a silicon oxide film.
  • the resist layer 33 and the insulating layer 34 at the ridge portion of the slit groove SD are etched, and the wall portion It is in the state which can be electrically supplied in 32 ridge parts.
  • the thickness of the insulating layer 34 in the vicinity of the ridge portion of the wall portion 32 is about 67.5 nm
  • the resist layer 33 on the top portion of the wall portion 32 has a thickness of about 67.5 nm.
  • the thickness was about 526 nm.
  • Reinforcing silicon oxide film 35 is deposited on the portion corresponding to (part), insulation at the ridge of wall 32 is achieved, and the entire wall 32 is in an insulated state.
  • the thickness of the insulating layer 34 in the vicinity of the ridge portion of the wall portion 32 is about 268 nm, and the thickness of the resist layer 33 at the top portion of the wall portion 32. was about 893 nm.
  • the reinforcing insulating layer 35 is formed on the portion corresponding to the ridge portion of the slit groove SD by the sputtering method. Further, in the sputtering method, an insulating layer is formed not only on the portion corresponding to the ridge portion of the slit groove SD but also on the portion corresponding to the top portion of the wall portion 32.
  • the silicon substrate 30 is disposed so as to face a material layer (vapor deposition source) to be deposited as the reinforcing insulating layer 35 in the vacuum chamber VC of the vacuum deposition apparatus.
  • a material layer vapor deposition source
  • the film-forming substance DM in the vapor deposition source VS composed of a crucible or the like with the electron beam IB of the electron gun IG, the film-formation substance evaporates into a gaseous state and flies.
  • the vapor deposition material When this vapor deposition material reaches the ridge portion (ridge portion of the wall portion 32) of the slit groove SD, the vapor deposition material deposits on the portion corresponding to the ridge portion (ridge portion of the wall portion 32) of the slit groove SD. A film is formed.
  • an ion beam assisted deposition IAD-beam Assisted Deposition: IAD
  • IAD ion beam assisted deposition
  • the silicon substrate 30 may be heated by the heater SH.
  • the vacuum deposition method is usually carried out under a low pressure of about 10 ⁇ 2 to 10 ⁇ 4 Pa, the mean free path of the deposited material is as long as about several tens of centimeters to several tens of meters and almost collides. Therefore, the vapor deposition material vaporized from the vapor deposition source becomes the vapor deposition flow VDS and has a very good directivity. For this reason, since the directivity of the vapor deposition material is extremely high in the vacuum vapor deposition method, in order to form the reinforcing insulating layer 35 on the portion corresponding to the ridge portion of the slit groove SD (the ridge portion of the wall portion 32), FIG.
  • a positive direction insulating layer forming step and a negative direction insulating layer forming step shown in FIG. 11C are sequentially performed.
  • this forward direction insulating layer forming step as shown in FIG. 11B, when the deposition source is arranged in the normal direction of the silicon substrate 30 so that the deposition material flying from the deposition source can be received from the forward direction, This is a first film forming step in which the reinforcing insulating layer 35 is formed by a vapor deposition method with the silicon substrate 30 inclined at a predetermined angle clockwise. Subsequent to this, as shown in FIG.
  • the negative-direction insulating layer forming step tilts the silicon substrate 30 as opposed to the first film formation, that is, the vapor deposition material flying from the vapor deposition source.
  • the vapor deposition material does not reach the bottom of the slit groove SD, and as a result, reaches only the top and both shoulders (ridges) of the wall portion 32 forming the slit groove SD and the vicinity thereof. A vapor deposition material will be deposited.
  • a slit groove SD (with a pitch P of about 5.3 ⁇ m, a slit formed with no insulating layer 34 from which the resist film 33 has been removed).
  • the silicon substrate 30 having only a groove width of about 2.65 ⁇ m and a depth of about 100 ⁇ m is used, and the silicon substrate 30 is tilted +45 degrees and the first deposition of about 100 nm is performed in the positive direction.
  • the second deposition of about 100 nm is performed in the negative direction with a tilt of ⁇ 45 degrees, as shown in FIGS. 12 and 13, the silicon oxide film has a top portion of the wall portion 32 in the silicon substrate 30 and both of them.
  • the film was formed only on the shoulder (ridge) and its vicinity.
  • a silicon oxide film is formed on the side surface of the wall portion 32 from the opening end of the slit groove SD to about 3 ⁇ m, and a silicon oxide film is formed on the bottom of the slit groove SD.
  • the silicon substrate 30 it is possible to form a silicon oxide film locally only near the upper portion of the wall portion 32 (near the opening end of the slit groove SD) by inclining the silicon substrate 30.
  • the length from the opening end of the slit groove SD in the silicon oxide film formed on the wall 32 is approximately the width of the slit groove SD when the vapor deposition material flies linearly upward from the vapor deposition source. And it depends on the inclination of the silicon substrate 30.
  • the reinforcing insulating layer 35 is formed on the portion corresponding to the ridge portion of the slit groove SD by the evaporation method of tilting the substrate. Further, in the substrate-tilted vapor deposition method, an insulating layer is formed not only on the portion corresponding to the ridge portion of the slit groove SD but also on the portion corresponding to the top portion of the wall portion 32.
  • the slit groove SD is filled with metal by applying a voltage to the silicon substrate 30 by electroforming (electroplating) (electroforming process, FIG. 4C). More specifically, the cathode of the power supply 44 is connected to the silicon substrate 30, and the anode electrode 45 and the silicon substrate 30 connected to the anode of the power supply 44 are immersed in the plating solution 46. At this time, pretreatment may be performed in order to ensure that the plating solution 46 penetrates through the grooves SD having a high aspect ratio.
  • the surface of the silicon substrate 30 that is an object to be plated is made hydrophilic by a method such as alkali treatment, or ultrasonic vibration is applied in a state where the silicon substrate 30 is immersed in the plating solution 46, for example,
  • a method such as alkali treatment, or ultrasonic vibration is applied in a state where the silicon substrate 30 is immersed in the plating solution 46, for example,
  • the air in the groove SD is removed.
  • the silicon substrate 30 is immersed in the plating solution 46 in the state after the pretreatment, or vacuum deaeration is performed in the state where the silicon substrate 30 is immersed in the plating solution 46 to remove air in the groove SD. Processing may be performed.
  • the metal deposits and grows from the silicon substrate 30 (plate-like portion 31) side in the growth start end recess AP connected to the slit groove SD by such an electroforming method. Then, when this metal fills the growth start end recess AP and the slit groove SD, the electroforming is finished. As a result, the metal fills the growth start end recess AP and further grows by the same thickness H as the plate-like portion 32 of the silicon substrate 30. In this way, the growth start end recess AP and the slit groove SD are filled with metal, and the growth start end portion 12bb and the lattice portion 12ba in the metal portion 12b are formed.
  • the metal grid DG having the configuration shown in FIG. 1 is manufactured through these manufacturing steps.
  • the insulating layer reinforcing step is performed after the removal widening surface area step, but may be performed before the removal widening step.
  • FIG. 14 is a diagram for explaining a modification of the method for manufacturing the metal grid shown in FIGS. 3 and 4. That is, after the insulating layer forming step (FIG. 14A, which corresponds to FIG. 3C), the insulating layer reinforcing step (FIG. 14B) is performed, and thereafter, the removing step (FIG. 14C) and the surface area increasing step (FIG. 14D).
  • the insulating layer reinforcing step uses, for example, the silicon substrate 30 after the insulating layer forming step, and performs the first deposition of about 100 nm in the positive direction by tilting the silicon substrate 30 by, for example, +60 degrees. Subsequently, the silicon substrate 30 is inclined by ⁇ 60 degrees, for example, and the second deposition of about 100 nm is performed in the negative direction (negative direction insulating layer reinforcing step).
  • an inclination adjusting mechanism capable of adjusting the inclination of the silicon substrate 30 by an operation from the outside may be provided in the chamber of the vacuum evaporation apparatus. With this configuration, the insulating layer forming step and the insulating layer reinforcing step can be performed in a vacuum state without opening to the atmosphere.
  • the reinforcing insulating layer 35 is first etched in the removing step (or removing wide surface area step). Since the denser insulating layer 34 remains at the ridges of the slit grooves SD (the ridges of the wall 32), in the electroforming process, the insulating layer forming process, the removing process (or removing the surface area increasing process), and the insulating layer reinforcement More reliable insulation can be expected as compared with the process order.
  • the insulating layer reinforcing step may be performed both before and after the removal widening surface area step, that is, before and after the removal widening surface area step.
  • such a manufacturing method of the metal lattice DG can manufacture the metal lattice DG having the lattice portion 12ba of the high aspect ratio metal portion 12b by filling the slit groove SD with the high aspect ratio with metal. it can.
  • the slit groove SD is filled with metal by electroforming in the electroforming process
  • an insulating layer is formed on the inner surface of the slit groove SD and in some cases on the surface of the resist layer 33 as described above. 34 is formed, and the portion of the insulating layer 34 formed on the bottom portion BT of the slit groove SD is removed in the removal step of the removal and surface area increasing step.
  • the plate-like portion 31 of the silicon substrate 30 exposed at the bottom of the slit groove SD is etched to form the growth start end recess AP having the second depth h,
  • the surface area of the bottom portion of the slit groove SD is made wider than before the etching (before the surface area increasing step).
  • the ridges of the slit grooves SD each plate-like portion 32 of the silicon substrate 30.
  • a reinforcing insulating layer 35 is formed in a portion corresponding to the above.
  • the entire surface of the wall portion 32 (each plate-like portion 32 of the silicon substrate 30) of the silicon substrate 30 remaining in the etching process, which is the wall portion 32 constituting the slit groove SD, is an insulating layer (the insulating layer 34 and the reinforcing layer).
  • the insulating layer 35) is in an insulating state, and the bottom portion of the slit groove SD is in a state where it can be energized.
  • the insulating layer formed on the ridge portion of the slit groove SD (each plate-like portion 32 of the silicon substrate 30) in the insulating layer forming step is reinforced by the reinforcing insulating layer 35, and the slit groove SD
  • the ridges are also more reliably insulated. For this reason, the metal does not precipitate and grow more reliably from the wall surface (inner side surface) of the slit groove SD, and the metal precipitates and grows more reliably from the bottom portion of the slit groove SD.
  • the manufacturing method of the metal lattice DG having such a configuration since the metal is selectively grown from the bottom portion of the slit groove SD in this way, generation of voids can be effectively suppressed.
  • the metal portion 12b of the grid can be formed more densely by electroforming.
  • the diffraction grating used in the X-ray Talbot interferometer and the X-ray Talbot-Lau interferometer requires a high aspect ratio of the grating portion 12ba of the metal portion 12b, but the manufacturing method of the metal grating DG in this embodiment is as follows.
  • the silicon substrate 30 is dry etched by the Bosch process, so that the side surface of the slit groove SD becomes flat, and as a result, the highly accurate metal lattice DG is formed. Can do.
  • the metal grating DG functions as a diffraction grating, the entrance surface or the exit surface is more flat, which is preferable.
  • the insulating layer forming step is performed by any one of a deposition method, a thermal oxidation method, and an anodization method, so that the inner surface of the slit groove SD in the silicon substrate 30 is obtained. Since the insulating layer 34 is formed on the insulating layer 34, the method for manufacturing the metal lattice DG in this embodiment is an insulating film having a predetermined film thickness that is excellent in denseness and can ensure electrical insulation with respect to the electroforming method in the electroforming process. Since the layer 34 can be formed, electrical insulation can be ensured with respect to the electroforming method in the electroforming process.
  • the deposition method can form an insulating layer with excellent denseness, and compare the film thicknesses. Can be controlled easily.
  • the thermal oxidation method can form a dense and excellent silicon oxide film, and the film thickness can be controlled relatively easily.
  • the anodic oxidation method can form a silicon oxide film excellent in denseness, adhesion and film thickness uniformity, and the film thickness can be controlled relatively easily. can do. Therefore, such a method for manufacturing a metal grid can form a dense insulating layer having a predetermined thickness that can ensure electrical insulation with respect to the electroforming method in the electroforming process.
  • an insulating layer made of a silicon oxide film can be formed by introducing oxygen into an inductively coupled plasma processing apparatus.
  • the film thickness is thin as described above, and in reality, it is not dense enough to function as an electrical insulating film in the electroforming process. Therefore, it cannot be said to be an accurate film in the electroforming process. Therefore, compared with the formation of the insulating layer by the inductively coupled plasma processing apparatus, the formation of the insulating layer by the deposition method, the thermal oxidation method and the anodic oxidation method in this embodiment is superior.
  • the manufacturing method of the metal grid DG in the present embodiment can manufacture the metal grid DG having a substantially uniform growth length of the metal in each slit groove SD by electroforming.
  • FIG. 15 illustrates the difference in metal growth between the case where the electroforming process is performed after the removal surface area increasing process and the case where the electroforming process is performed after the removal process of removing only the insulating layer formed on the bottom of the recess.
  • FIG. FIG. 15A is a diagram schematically showing the state of the metal grown in each slit groove SD when the electroforming process is performed after the removal surface area increasing process
  • FIG. 15B is a photograph as an example thereof. It has become.
  • FIG. 15C is a diagram schematically showing the state of the metal grown in each slit groove SD when the electroforming process is performed after the removing process
  • FIG. 15D is a photograph of an example thereof It is.
  • metal is selectively grown from the bottom of the slit groove SD by covering both sides of the slit groove SD with the insulating layer 34 and allowing the bottom of the slit groove SD to be energized. Therefore, the generation of voids can be effectively suppressed, and as a result, the metal lattice 12b is formed more densely.
  • FIG. 15A and FIG. 15B with FIG. 15C and FIG. 15D, when the electroforming process is performed after the removal process (FIG. 15C and FIG. 15D), a slight condition between the slit grooves is obtained.
  • the manufacturing method of the metal lattice DG in the present embodiment can improve the yield and can manufacture the metal lattice DG at a lower cost.
  • both side surfaces (both side walls) of the growth start end recess AP are substantially perpendicular to the slit groove SD (an aspect in which the bottom surface and the side surface of the growth start end recess AP are orthogonal to each other, and the wall surface of the slit groove SD is flush with the growth start end recess.
  • a void is generated in the growth start end portion 12bb.
  • both side surfaces (both side walls) of the growth start end recess AP are tapered as in the present embodiment.
  • the tapered shape is a mode in which the bottom surface and the side surface of the growth start end recess AP are obliquely crossed, or a mode in which both side surfaces of the growth start end recess AP (including virtual both virtual extension surfaces extending from both side surfaces) intersect each other.
  • the angle formed by the wall surface of the slit groove SD and the wall surface of the growth start end recess AP is an angle smaller than 180 degrees.
  • FIG. 16 is a diagram for explaining a difference in metal growth in the electroforming process due to a difference in cross-sectional shape of the bottom portion in the recess.
  • 16A to 16C show a case where both side surfaces of the growth start end recess APa are tapered
  • FIG. 16A schematically shows a state at the start of metal growth in the growth start end recess APa
  • FIG. 16C schematically shows a state in the middle of metal growth in the start end recess APa
  • FIG. 16C schematically shows a state in the end of metal growth in the growth start end recess APa.
  • 16D to 16F show a case where both side surfaces of the growth start end recess APb are vertical
  • FIG. 16D schematically shows a state at the start of metal growth in the growth start end recess APb
  • FIG. FIG. 16F schematically shows a state in the middle of metal growth in the growth start end recess APb
  • FIG. 16F schematically shows a state at the end of metal growth in the growth start end recess APb.
  • the metal growth is continuously performed in the slit groove SD.
  • both side surfaces of the growth start end recess APb are substantially vertical, as shown in FIGS. 16D to 16F, the electric field strength is slightly higher at the upper part than the bottom of the growth start end recess APb.
  • the growth rate of the metal is faster at the top than at the bottom.
  • the upper part may be blocked before the metal is filled in the part in the bottom direction from the top. May occur.
  • both side surfaces of the growth start end recess APa are tapered as in this embodiment, voids generated in the growth start end portion 12bb are prevented as shown in FIG. 16C through FIGS. 16A to 16B.
  • the growth start end portion 12bb can also be regarded as a part of the lattice portion 12ba, and the metal lattice DG in which the growth start end portion 12bb and the lattice portion 12ba are integrated can be designed.
  • the manufacturing method of the metal grating DG having such a configuration can shorten the process time, and the depth H of the slit groove SD is made shallow by a depth corresponding to the depth h of the growth start recess APa.
  • the workability of the slit groove SD can be facilitated.
  • the metal grating DG is used as an X-ray diffraction grating, X-ray incidence is avoided from the viewpoint of avoiding unnecessary X-ray scattering that is not originally intended due to voids in the growth start portion 12bb.
  • the surface is preferably not on the growth start end portion 12bb side but on the surface side of the lattice portion 12ba facing the growth start end portion 12bb side (the side on which the slit groove SD is opened).
  • the X-ray incident surface is on the growth start end portion 12bb side. It may also be the surface side of the lattice portion 12ba facing the growth start end portion 12bb side (the side on which the slit groove SD is opened).
  • the surface is easily roughened.
  • the X-ray incident surface is preferably on the growth start end portion 12bb side, and the surface of the first silicon portion 11 serving as the direct X-ray incident surface is more preferably mirror-polished.
  • FIG. 17 is a diagram illustrating another shape of the bottom portion of the recess.
  • the growth start end recess AP is a growth start end recess APb whose both side surfaces (both side walls) are substantially vertical, and preferably a growth start end recess APa whose both side surfaces (both side walls) are tapered. As shown in FIG. 17, it may be a growth start end recess APc having a curved side surface.
  • the growth starting end recess APc shown in FIG. 17 has a spherical shape with both side surfaces convex outward, and the cross-sectional shape is a shape like that of a so-called fruit apple.
  • the growth start end recess APc having such a shape can be formed by performing ICP dry etching using, for example, a gas suitable for etching silicon, for example, SF 6 in the widening step. Further, for example, the growth start end recess APc can be formed by performing isotropic wet etching with a mixed solution of nitric acid and hydrofluoric acid in the surface widening step. Forming the growth start end recess APc having such a shape also increases the area where the silicon substrate 30 is exposed. As a result, the energization area in the electroforming process is increased, and the growth rate of the metal in each slit groove SD varies. Is reduced. As a result, the second method for manufacturing the metal grid DG in the present embodiment can manufacture the metal grid DG having a substantially uniform growth length of the metal in each slit groove SD by electroforming.
  • the resist layer 33 is the silicon oxide film 33a, the metal oxide film 33b, or the oxidizable metal film 33c.
  • the photosensitive resin layer 33d is used as the resist layer 33. May be.
  • FIG. 18 and FIG. 19 are diagrams for explaining another method of manufacturing the metal grid in the embodiment.
  • a silicon substrate 30 is prepared (FIG. 18A).
  • the silicon substrate 30 is n-type silicon whose majority carriers are electrons.
  • a photosensitive resin layer (photoresist layer) 33d is formed as a resist layer 33 on the main surface of the silicon substrate 30 (resist layer forming step, FIG. 18B), and the photosensitive resin layer 33d is patterned to perform the patterning.
  • the exposed portion of the photosensitive resin layer 33d is removed (patterning step, FIGS. 18C and 19A).
  • the photosensitive resin layer 33d is formed with a thickness that remains after the etching process and the removal surface area increasing process in the subsequent process.
  • the reinforcing insulating layer 35 is also formed on the surface of the silicon substrate 30, that is, the photosensitive resin layer 33d, in the sputtering method and the vapor deposition method. Insulating layer 35 may also be considered.
  • a photosensitive resin layer 33d is formed on the silicon substrate 30 by, for example, spin coating (FIG. 18B).
  • This photosensitive resin layer 33d is formed by the plate-like portion 32 (wall portion 32, second silicon portion 12a) of the silicon substrate 30 in the etching process (FIG. 19B) in the subsequent etching process and the removal process in the removal widening surface area process.
  • the film is formed with a predetermined film thickness that functions as a protective film for protecting the film, for example, about 2 ⁇ m.
  • the photosensitive resin layer 33d is a material that is used in lithography and whose physical properties such as solubility are changed by light (including not only visible light but also ultraviolet rays), an electron beam, and the like.
  • the present invention is not limited to this.
  • a resist for electron beam exposure may be used instead of the photosensitive resin layer 33d.
  • the photosensitive resin layer 33d is patterned by a lithography method (FIG. 18C), and the patterned photosensitive resin layer 33d is removed (FIG. 19A). More specifically, the lithography mask 41 is pressed against the photosensitive resin layer 33d, and the photosensitive resin layer 33d is irradiated with ultraviolet rays 42 through the lithography mask 41, and the photosensitive resin layer 33d is subjected to pattern exposure and development. (FIG. 18C). And the photosensitive resin layer 33d of the part which was not exposed (or exposed part) is removed (FIG. 19A).
  • the silicon substrate 30 corresponding to the portion where the photosensitive resin layer 33d has been removed by the dry etching method is etched to the first predetermined depth H in the normal direction Dz.
  • a slit groove SD is formed (FIG. 19B, etching step). More specifically, the silicon substrate 30 is etched by ICP dry etching from the surface of the silicon substrate 30 to the first predetermined depth H using the patterned photosensitive resin layer 33d as a mask.
  • the photosensitive resin layer 33d is reduced by this ICP dry etching, the photosensitive resin layer 33d functions as a protective film that protects the plate-like portion 32 (second silicon portion 12a) of the silicon substrate 30 with respect to a removal and surface area increasing step in a later step. It remains with a predetermined film thickness.
  • the photosensitive resin layer 33d is reduced from about 2 ⁇ m to about 1 ⁇ m and remains about 1 ⁇ m.
  • This ICP dry etching is preferably an ASE process using an ICP apparatus, and more preferably a Bosch process, because vertical etching can be performed with a high aspect ratio.
  • An insulating layer 34 having a predetermined thickness is formed (FIG. 19C, insulating layer forming step).
  • the above-described removal process or removal surface area increasing process is performed, and the electroforming method is performed.
  • the reinforcing insulating layer 35 is provided before the electroforming process.
  • the above-described insulating layer reinforcing step is performed (FIG. 19D).
  • the photosensitive resin layer 33d is also etched by the ICP dry etching.
  • the ICP dry etching is performed.
  • the photosensitive resin layer 33d remains even after dry etching.
  • the thickness is 1 ⁇ m to 700 nm.
  • the metal grid DG having the configuration shown in FIG. 1 is manufactured as described above.
  • the diffraction grating DG has a one-dimensional periodic structure, but is not limited thereto.
  • the diffraction grating DG may be, for example, a two-dimensional periodic structure diffraction grating.
  • the diffraction grating DG having a two-dimensional periodic structure is configured such that dots serving as diffraction members are arranged at equal intervals with a predetermined interval in two linearly independent directions.
  • a diffraction grating having such a two-dimensional periodic structure has a high-aspect-ratio hole formed in a plane with a two-dimensional period, and the hole is filled with a metal as described above, or a high-aspect-ratio cylinder is formed in a plane in two dimensions. It can be formed by standing up with a period and filling the periphery with metal in the same manner as described above.
  • the metal grating DG of the above embodiment can form a metal portion with a high aspect ratio, it can be suitably used for an X-ray Talbot interferometer and a Talbot-low interferometer.
  • An X-ray Talbot interferometer and an X-ray Talbot-low interferometer using the metal grating DG will be described.
  • FIG. 20 is a perspective view showing a configuration of an X-ray Talbot interferometer in the embodiment.
  • FIG. 21 is a top view showing a configuration of an X-ray Talbot-Lau interferometer in the embodiment.
  • an X-ray Talbot interferometer 100A includes an X-ray source 101 that emits X-rays having a predetermined wavelength, and a phase type that diffracts X-rays emitted from the X-ray source 101.
  • a first diffraction grating 102 and an amplitude-type second diffraction grating 103 that forms an image contrast by diffracting X-rays diffracted by the first diffraction grating 102 are provided.
  • the first and second diffraction gratings 102 and 103 are set to conditions that constitute the X-ray Talbot interferometer.
  • X-rays having image contrast caused by the second diffraction grating 103 are detected by, for example, an X-ray image detector 105 that detects X-rays.
  • an X-ray image detector 105 that detects X-rays.
  • at least one of the first diffraction grating 102 and the second diffraction grating 103 is the metal grating DG.
  • Equation 2 assumes that the first diffraction grating 102 is a phase type diffraction grating.
  • l ⁇ / (a / (L + Z1 + Z2)) (Formula 1)
  • Z1 (m + 1/2) ⁇ (d 2 / ⁇ ) (Formula 2)
  • l is the coherence distance
  • ⁇ is the wavelength of X-rays (usually the center wavelength)
  • a is the aperture diameter of the X-ray source 101 in the direction substantially perpendicular to the diffraction member of the diffraction grating.
  • L is the distance from the X-ray source 101 to the first diffraction grating 102
  • Z 1 is the distance from the first diffraction grating 102 to the second diffraction grating 103
  • Z 2 is from the second diffraction grating 103.
  • the distance to the X-ray image detector 105, m is an integer, and d is the period of the diffraction member (the period of the diffraction grating, the grating constant, the distance between the centers of adjacent diffraction members, the pitch P). .
  • X-rays are irradiated from the X-ray source 101 toward the first diffraction grating 102.
  • This irradiated X-ray produces a Talbot effect at the first diffraction grating 102 to form a Talbot image.
  • This Talbot image is acted on by the second diffraction grating 103 to form an image contrast of moire fringes. Then, this image contrast is detected by the X-ray image detector 105.
  • the Talbot effect means that when light enters the diffraction grating, the same image as the diffraction grating (self-image of the diffraction grating) is formed at a certain distance. Good, this self-image is called the Talbot image.
  • the diffraction grating is a phase type diffraction grating
  • the moire fringes are modulated by the subject S, and the modulation amount is caused by the refraction effect by the subject S. It is proportional to the angle at which the X-ray is bent. For this reason, the subject S and its internal structure are detected by analyzing the moire fringes.
  • the X-ray source 101 is a single point light source, and such a single point light source forms a single slit (single slit).
  • the X-ray radiated from the X-ray source 101 passes through the single slit of the single slit plate and is directed toward the first diffraction grating 102 via the subject S. Is emitted.
  • the slit is an elongated rectangular opening extending in one direction.
  • the Talbot-Lau interferometer 100B includes an X-ray source 101, a multi-slit plate 104, a first diffraction grating 102, and a second diffraction grating 103, as shown in FIG. That is, the Talbot-Lau interferometer 100B further includes a multi-slit plate 104 having a plurality of slits formed in parallel on the X-ray emission side of the X-ray source 101 in addition to the Talbot interferometer 100A shown in FIG. .
  • the multi-slit plate 104 may be a lattice manufactured by the method for manufacturing the metal lattice DG in the above-described embodiment.
  • X-rays pass through the slit (the plurality of second silicon portions 12a) and more reliably the plurality of metal portions. Blocked by 12b. For this reason, since transmission and non-transmission of X-rays can be more clearly distinguished, the multi-slit plate 104 can more reliably use X-rays emitted from the X-ray source 101 as a multi-light source. .
  • the Talbot-Lau interferometer 100B By using the Talbot-Lau interferometer 100B, the X-ray dose radiated toward the first diffraction grating 102 via the subject S is increased compared to the Talbot interferometer 100A, so that a better moire fringe can be obtained. It is done.
  • Examples of the first diffraction grating 102, the second diffraction grating 103, and the multi-slit plate 104 used in the Talbot interferometer 100A and the Talbot-low interferometer 100B are as follows.
  • the second silicon portion 12a and the metal portion 12b are formed to have the same width, and the metal portion 12b is formed of gold.
  • the distance R1 from the X-ray source 101 or the multi-slit plate 104 to the first diffraction grating 102 is 2 m
  • the distance R2 from the X-ray source 101 or the multi-slit plate 104 to the second diffraction grating 103 is 2.
  • the first diffraction grating 102 has a pitch P of 5 ⁇ m
  • the metal portion 12 b has a thickness of 3 ⁇ m
  • the second diffraction grating 103 has a pitch P of 6 ⁇ m
  • the multi-slit plate 104 has a pitch P of 30 ⁇ m and a thickness of the metal portion 12b of 100 ⁇ m.
  • the distance R1 from the X-ray source 101 or the multi-slit plate 104 to the first diffraction grating 102 is 1.8 m, and the X-ray source 101 or the multi-slit plate 104 to the second diffraction grating 103.
  • the pitch P of the first diffraction grating 102 is 7 ⁇ m
  • the thickness of the metal portion 12b is 3 ⁇ m
  • the pitch P of the second diffraction grating 103 is 10 ⁇ m
  • the multi-slit plate 104 has a pitch P of 20 ⁇ m and a thickness of the metal portion 12 b of 100 ⁇ m. is there.
  • the metal grating DG can be used in various optical devices. However, since the metal portion 12b can be formed with a high aspect ratio, the metal grating DG can be suitably used for an X-ray imaging device, for example.
  • an X-ray imaging apparatus using an X-ray Talbot interferometer treats X-rays as waves and detects a phase shift of the X-rays caused by passing through the subject to obtain a phase contrast method for obtaining a transmission image of the subject. one of.
  • the X-ray imaging apparatus using this X-ray Talbot interferometer is expected to improve the sensitivity by about 1000 times compared to the absorption contrast method for obtaining an image with the contrast of the X-ray absorption by the subject as a contrast. There is an advantage that the irradiation amount can be reduced to, for example, 1/100 to 1/1000.
  • an X-ray imaging apparatus provided with an X-ray Talbot interferometer using the diffraction grating DG will be described.
  • FIG. 22 is an explanatory diagram illustrating a configuration of the X-ray imaging apparatus according to the embodiment.
  • an X-ray imaging apparatus 200 includes an X-ray imaging unit 201, a second diffraction grating 202, a first diffraction grating 203, and an X-ray source 204. Furthermore, in this embodiment, an X-ray source is provided.
  • An X-ray power supply unit 205 that supplies power to 204, a camera control unit 206 that controls the imaging operation of the X-ray imaging unit 201, a processing unit 207 that controls the overall operation of the X-ray imaging apparatus 200, and an X-ray power supply And an X-ray control unit 208 that controls the X-ray emission operation in the X-ray source 204 by controlling the power supply operation of the unit 205.
  • the X-ray source 204 is a device that emits X-rays by being supplied with power from the X-ray power supply unit 205 and emits X-rays toward the first diffraction grating 203.
  • the X-ray source 204 emits X-rays when, for example, a high voltage supplied from the X-ray power supply unit 205 is applied between the cathode and the anode, and electrons emitted from the cathode filament collide with the anode.
  • Device for example, a high voltage supplied from the X-ray power supply unit 205 is applied between the cathode and the anode, and electrons emitted from the cathode filament collide with the anode.
  • the first diffraction grating 203 is a transmission type diffraction grating that generates a Talbot effect by X-rays emitted from the X-ray source 204.
  • the first diffraction grating 203 is, for example, a diffraction grating manufactured by the method for manufacturing the metal grating DG in the above-described embodiment.
  • the first diffraction grating 203 is configured so as to satisfy the conditions for causing the Talbot effect, and is a grating sufficiently coarser than the wavelength of X-rays emitted from the X-ray source 204, for example, a grating constant (period of the diffraction grating).
  • d is a phase type diffraction grating in which the wavelength of the X-ray is about 20 or more.
  • the first diffraction grating 203 may be such an amplitude type diffraction grating.
  • the second diffraction grating 202 is a transmission-type amplitude diffraction grating that is disposed at a position approximately away from the first diffraction grating 203 by a substantially Talbot distance L and diffracts the X-rays diffracted by the first diffraction grating 203.
  • the second diffraction grating 202 is also a diffraction grating manufactured by the method for manufacturing the metal grating DG in the above-described embodiment, for example.
  • first and second diffraction gratings 203 and 202 are set to conditions that constitute the Talbot interferometer represented by the above-described Expression 1 and Expression 2.
  • the X-ray imaging unit 201 is an apparatus that captures an X-ray image diffracted by the second diffraction grating 202.
  • the X-ray imaging unit 201 is, for example, a flat panel detector (FPD) including a two-dimensional image sensor in which a thin film layer including a scintillator that emits fluorescence by absorbing X-ray energy is formed on a light receiving surface.
  • the X-ray imaging unit 201 converts incident photons into electrons on the photocathode, doubles the electrons with a microchannel plate, and causes the doubled electrons to collide with a phosphor to emit light.
  • an image intensifier camera comprising a two-dimensional image sensor that images the output light of the image intensifier unit.
  • the X-ray imaging unit 201 such a flat panel detector, an image intensifier camera, or the like is used.
  • the processing unit 207 is a device that controls the overall operation of the X-ray imaging apparatus 200 by controlling each unit of the X-ray imaging apparatus 200.
  • the processing unit 207 includes a microprocessor and its peripheral circuits.
  • An image processing unit 271 and a system control unit 272 are provided.
  • the system control unit 272 controls the X-ray emission operation in the X-ray source 204 via the X-ray power supply unit 205 by transmitting and receiving control signals to and from the X-ray control unit 208, and the camera control unit 206.
  • the imaging operation of the X-ray imaging unit 201 is controlled by transmitting and receiving control signals to and from the X-ray imaging unit 201.
  • X-rays are emitted toward the subject S, an image generated thereby is captured by the X-ray imaging unit 201, and an image signal is input to the processing unit 207 via the camera control unit 206.
  • the image processing unit 271 processes the image signal generated by the X-ray imaging unit 201 and generates an image of the subject S.
  • the subject S is placed between the X-ray source 204 and the first diffraction grating 203 by placing the subject S on, for example, an imaging stand provided with the X-ray source 204 inside (rear surface).
  • an imaging stand provided with the X-ray source 204 inside (rear surface).
  • the system control unit 272 of the processing unit 207 performs X-ray control to irradiate the subject S with X.
  • a control signal is output to the unit 208.
  • the X-ray control unit 208 causes the X-ray power source unit 205 to supply power to the X-ray source 204, and the X-ray source 204 emits X-rays and irradiates the subject S with X-rays.
  • a Talbot image T is formed.
  • the formed X-ray Talbot image T is diffracted by the second diffraction grating 202, and moire is generated to form an image of moire fringes.
  • This moire fringe image is captured by the X-ray imaging unit 201 whose exposure time is controlled by the system control unit 272, for example.
  • the X-ray imaging unit 201 outputs an image signal of the moire fringe image to the processing unit 207 via the camera control unit 206. This image signal is processed by the image processing unit 271 of the processing unit 207.
  • the subject S is disposed between the X-ray source 204 and the first diffraction grating 203, the X-rays that have passed through the subject S are out of phase with the X-rays that do not pass through the subject S. For this reason, the X-rays incident on the first diffraction grating 203 include distortion in the wavefront, and the Talbot image T is deformed accordingly. For this reason, the moire fringes of the image generated by the superposition of the Talbot image T and the second diffraction grating 202 are modulated by the subject S, and the X-rays are bent by the refraction effect by the subject S. Proportional to angle.
  • the subject S and its internal structure can be detected by analyzing the moire fringes.
  • a tomographic image of the subject S can be formed by X-ray phase CT (computed tomography).
  • the second diffraction grating 202 of the present embodiment is the metal grating DG in the above-described embodiment having the high-aspect-ratio metal portion 12b, good moire fringes can be obtained and a highly accurate image of the subject S can be obtained. can get.
  • the metal grating DG is dry-etched on the plate-like portion 32 (second silicon portion 12a) of the silicon substrate 30 by the Bosch process, the side surface of the slit groove SD becomes flatter, and the second diffraction grating 202 is formed with high accuracy. Can be formed. For this reason, better moire fringes can be obtained, and a more accurate image of the subject S can be obtained.
  • a Talbot interferometer is configured by the X-ray source 204, the first diffraction grating 203, and the second diffraction grating 202.
  • the X-ray imaging apparatus 200 is configured as a multi-slit on the X-ray emission side of the X-ray source 204.
  • the Talbot-Lau interferometer may be configured by further arranging the metal grating DG in the above-described embodiment.
  • the subject S is disposed between the X-ray source 204 and the first diffraction grating 203, but the subject S is disposed between the first diffraction grating 203 and the second diffraction grating 202. May be arranged.
  • an X-ray image is captured by the X-ray imaging unit 201 and electronic data of the image is obtained, but may be captured by an X-ray film.
  • a method for manufacturing a metal lattice includes a resist layer forming step of forming a resist layer on a main surface of a silicon substrate, and a patterning step of patterning the resist layer to remove the resist layer in the patterned portion. Etching the silicon substrate corresponding to the portion from which the resist layer has been removed by dry etching to form a recess having a predetermined depth; and a first surface on the surface of the silicon substrate on which the recess is formed.
  • a first insulating layer forming step for forming an insulating layer, a removing step for removing a portion of the first insulating layer formed at the bottom of the recess, and a voltage is applied to the silicon substrate by electroforming.
  • the above-described metal grid manufacturing method reinforces the insulating layer formed on the ridge portion of the concave portion by the insulating layer forming step before or after the removing step, or both before and after the removing step.
  • a second insulating layer forming step of forming a reinforcing insulating layer in a portion corresponding to the ridge portion of the concave portion is provided.
  • the second insulating layer forming step is performed before the removing step, which is a step before the electroforming step.
  • the method of manufacturing a metal grid can manufacture a metal grid having a metal portion with a high aspect ratio by filling the recess with metal.
  • the recess is filled with metal by electroforming in the electroforming process
  • the first surface is formed on the inner surface of the recess (and in some cases, the surface of the resist layer).
  • An insulating layer is formed, and the bottom portion of the recess in the insulating layer is removed in the removing step.
  • a second insulating layer for reinforcement is provided at a portion corresponding to the ridge portion of the recess (a boundary portion between the substrate surface and the side surface of the recess). It is formed.
  • an insulating layer such as a silicon oxide film (SiO 2 film, silicon dioxide film) having a predetermined film thickness can be formed, which is a wall portion that forms a recess and is formed in the etching step.
  • the entire surface of the remaining wall portion of the silicon substrate is insulative by the insulating layer, and the bottom portion of the recess is in an energized state.
  • the first insulating layer formed on the ridge portion of the concave portion by the first insulating layer forming step is reinforced by the reinforcing second insulating layer, and the ridge portion of the concave portion is also formed. More reliably insulated.
  • such a method for manufacturing a metal grid can effectively suppress the generation of voids because the metal grows selectively from the bottom portion of the recess more reliably.
  • such a metal grid manufacturing method can form the metal portion of the grid more densely by electroforming.
  • the second insulating layer forming step is a step of forming the second insulating layer by a sputtering method.
  • the reinforcing second insulating layer can be easily formed by using a sputtering method which is a general film forming technique.
  • the second insulating layer forming step sandwiches a vapor deposition material flying from the vapor deposition source with a normal direction on a main surface of the silicon substrate 2
  • the second insulating layer is formed by a vapor deposition method with the silicon substrate inclined in order so as to be received in order from each direction.
  • the second insulating layer forming step is performed by an evaporation method by inclining the silicon substrate so that an evaporation material flying from an evaporation source can be received from a positive direction.
  • a second insulating layer by forming the positive insulating layer; and forming the second insulating layer by the vapor deposition method by inclining the silicon substrate so that the vapor deposition material flying from the vapor deposition source can be received from the negative direction.
  • a negative direction insulating layer forming step That is, in the second insulating layer forming step, the first normal direction of the vapor deposition source intersects the second normal direction of the main surface of the silicon substrate at a predetermined angle in a counterclockwise direction.
  • a positive direction insulating layer forming step of forming a positive direction insulating layer as the second insulating layer by a vapor deposition method, and a first normal direction of the vapor deposition source is a second direction on the main surface of the silicon substrate.
  • the reinforcing second insulating layer can be formed at a low cost by using a vapor deposition method that can be performed with a cheaper facility.
  • the removing step removes a portion of the first insulating layer formed at the bottom of the recess, and the silicon substrate at the bottom of the recess Is a step of removing and increasing the surface area of the bottom portion of the recess by further etching.
  • the first insulating layer at the bottom of the recess is not removed in the removal widening surface area step of the removal step, and the silicon substrate exposed at the bottom of the recess is not removed. Further, the surface area of the bottom portion of the recess is made wider than before the etching. For this reason, in such a manufacturing method of the metal lattice, the area where the silicon substrate is exposed becomes wider. As a result, the current-carrying area in the electroforming process becomes wider, and variations in the growth rate of the metal in each recess are reduced. Therefore, such a method for producing a metal grid can produce a metal grid having a substantially uniform growth length of metal in each recess by electroforming.
  • the first insulating layer forming step is performed on the silicon substrate by any one of a deposition method, a thermal oxidation method, and an anodization method. It is a step of forming the first insulating layer on the surface on the side where the concave portion is formed.
  • a metal lattice manufacturing method for example, when a deposition method such as a chemical vapor deposition method, a sputtering method, or a vapor deposition method is used, an insulating layer having excellent denseness is formed, and the film thickness is increased. It can be controlled relatively easily.
  • a thermal oxidation method is used, a dense and excellent silicon oxide film is formed, and the film thickness can be controlled relatively easily.
  • the anodic oxidation method is used, a silicon oxide film excellent in denseness, adhesion, and film thickness uniformity is formed, and the film thickness can be controlled relatively easily. Therefore, such a method for manufacturing a metal grid can form a dense insulating layer having a predetermined thickness that can ensure electrical insulation with respect to the electroforming method in the electroforming process.
  • the dry etching method is RIE (Reactive Ion Etching, reactive ion etching).
  • a silicon substrate can be etched along the depth direction (direction perpendicular to the main surface (surface)). Therefore, the concave portion can be formed easily.
  • the dry etching method is a Bosch process.
  • the silicon substrate is dry-etched by the Bosch process, so that the side surface of the recess becomes flat and the metal grid can be formed with high accuracy.
  • the silicon substrate is the n-type silicon.
  • the above-described metal grating manufacturing method is used when a metal grating used in an X-ray Talbot interferometer or an X-ray Talbot-low interferometer is manufactured.
  • an X-ray Talbot interference having a high-aspect-ratio metal portion that is more densely formed by using the above-described metal grating manufacturing method. It is possible to manufacture a diffraction grating or a multi-slit plate metal grating used in a meter or an X-ray Talbot-Lau interferometer.
  • the metal grid according to another embodiment of the present invention is manufactured by any one of the above-described metal grid manufacturing methods.
  • the metal grid manufactured by the above-described method for manufacturing a metal grid can include a metal portion having a high aspect ratio formed more densely. For this reason, such a metal grating can be suitably used for X-rays, for example, and in particular, can be suitably used for an X-ray Talbot interferometer or an X-ray Talbot-Lau interferometer.
  • An X-ray imaging apparatus includes an X-ray source that emits X-rays, and a Talbot interferometer or a Talbot-low interferometer that is irradiated with X-rays emitted from the X-ray source. And an X-ray imaging device that captures an X-ray image by the Talbot interferometer or the Talbot-Lau interferometer, and the Talbot interferometer or the Talbot-Lau interferometer includes the above-described metal grating.
  • the above-described metal grating having a denser metal portion is used for the metal grating constituting the Talbot interferometer or the Talbot-Lau interferometer. An X-ray image can be obtained.
  • a metal grating manufacturing method, a metal grating, and an X-ray imaging apparatus can be provided.

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Abstract

La présente invention se rapporte à un procédé permettant la fabrication d'une grille métallique, qui consiste à former un creux dans la face principale d'un substrat en silicium, à former une première couche isolante sur la surface de la face sur laquelle est formé le creux, à enlever la première couche isolante formée sur la partie inférieure du creux et à incorporer un métal dans le creux au moyen d'un procédé d'électroformage. Ainsi, avant que le métal ne soit incorporé dans le creux au moyen du procédé d'électroformage, une seconde couche isolante est formée dans une partie voisine d'une partie périphérique du creux. Par conséquent, ce procédé pour fabriquer une grille métallique permet à la partie métallique de la grille d'être formée de manière plus compacte par le procédé d'électroformage. La présente invention se rapporte également à une grille métallique fabriquée par ce procédé permettant de fabriquer une grille métallique et concerne un appareil d'imagerie à rayons X qui utilise la grille métallique.
PCT/JP2012/007448 2011-12-09 2012-11-20 Procédé de fabrication d'une grille métallique, grille métallique et appareil d'imagerie à rayons x WO2013084429A1 (fr)

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Cited By (4)

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Publication number Priority date Publication date Assignee Title
CN104152901A (zh) * 2014-08-05 2014-11-19 南昌大学 将光纤光栅嵌入金属基体制成耐高温智能金属结构的方法
JP2021022579A (ja) * 2016-04-22 2021-02-18 フェニックス コンタクト イー−モビリティ ゲーエムベーハーＰＨＯＥＮＩＸ ＣＯＮＴＡＣＴ Ｅ−Ｍｏｂｉｌｉｔｙ ＧｍｂＨ 交換可能なコンタクト領域を備えた出力コンタクト
EP4151776A1 (fr) * 2021-09-17 2023-03-22 FUJIFILM Corporation Matrice d'électroformage, procédé de production de matrice d'électroformage et procédé de production d'un matériau d'électroformage
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Publication number Priority date Publication date Assignee Title
CN104152901A (zh) * 2014-08-05 2014-11-19 南昌大学 将光纤光栅嵌入金属基体制成耐高温智能金属结构的方法
CN104152901B (zh) * 2014-08-05 2016-06-15 南昌大学 将光纤光栅嵌入金属基体制成耐高温智能金属结构的方法
JP2021022579A (ja) * 2016-04-22 2021-02-18 フェニックス コンタクト イー−モビリティ ゲーエムベーハーＰＨＯＥＮＩＸ ＣＯＮＴＡＣＴ Ｅ−Ｍｏｂｉｌｉｔｙ ＧｍｂＨ 交換可能なコンタクト領域を備えた出力コンタクト
EP4151776A1 (fr) * 2021-09-17 2023-03-22 FUJIFILM Corporation Matrice d'électroformage, procédé de production de matrice d'électroformage et procédé de production d'un matériau d'électroformage
US20230101613A1 (en) * 2021-09-30 2023-03-30 Fujifilm Corporation Electroforming method and method for producing electroforming material
EP4159895A1 (fr) * 2021-09-30 2023-04-05 FUJIFILM Corporation Procédé d'électroformage et procédé de production d'un matériau d'électroformage
US12049705B2 (en) 2021-09-30 2024-07-30 Fujifilm Corporation Electroforming method and method for producing electroforming material

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