WO2013065462A1 - 半導体装置及びその製造方法 - Google Patents

半導体装置及びその製造方法 Download PDF

Info

Publication number
WO2013065462A1
WO2013065462A1 PCT/JP2012/076241 JP2012076241W WO2013065462A1 WO 2013065462 A1 WO2013065462 A1 WO 2013065462A1 JP 2012076241 W JP2012076241 W JP 2012076241W WO 2013065462 A1 WO2013065462 A1 WO 2013065462A1
Authority
WO
WIPO (PCT)
Prior art keywords
metal substrate
resin
circuit board
heat spreader
flexible circuit
Prior art date
Application number
PCT/JP2012/076241
Other languages
English (en)
French (fr)
Inventor
純司 鶴岡
誠二 安井
山戸 修
貴之 前田
Original Assignee
アイシン・エィ・ダブリュ株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by アイシン・エィ・ダブリュ株式会社 filed Critical アイシン・エィ・ダブリュ株式会社
Publication of WO2013065462A1 publication Critical patent/WO2013065462A1/ja

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L24/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L24/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/16Fillings or auxiliary members in containers or encapsulations, e.g. centering rings
    • H01L23/18Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device
    • H01L23/24Fillings characterised by the material, its physical or chemical properties, or its arrangement within the complete device solid or gel at the normal operating temperature of the device
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/34Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
    • H01L23/36Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/4005Shape
    • H01L2224/4009Loop shape
    • H01L2224/40095Kinked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/34Strap connectors, e.g. copper straps for grounding power devices; Manufacturing methods related thereto
    • H01L2224/39Structure, shape, material or disposition of the strap connectors after the connecting process
    • H01L2224/40Structure, shape, material or disposition of the strap connectors after the connecting process of an individual strap connector
    • H01L2224/401Disposition
    • H01L2224/40135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/40137Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484Connecting portions
    • H01L2224/4847Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H01L2224/48472Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4911Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
    • H01L2224/49111Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73221Strap and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73263Layer and strap connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/83801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • H01L2224/848Bonding techniques
    • H01L2224/84801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/28Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L24/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L24/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/84Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a strap connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12042LASER
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1306Field-effect transistor [FET]
    • H01L2924/13091Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/156Material
    • H01L2924/15786Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
    • H01L2924/15787Ceramics, e.g. crystalline carbides, nitrides or oxides
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation

Definitions

  • the present disclosure relates to a semiconductor device including a flexible circuit board and a manufacturing method thereof.
  • a ceramic substrate in contact with a radiator a metal member in contact with the ceramic substrate, an electronic component mounted on the metal member, and an electronic component and a bonding wire disposed outside the ceramic substrate.
  • a semiconductor device having an electrode (control terminal) that is electrically connected and communicates with the outside is known (see, for example, Patent Document 1).
  • an object of the present disclosure is to provide a semiconductor device and a method for manufacturing the same that can appropriately prevent the resin from propagating outside the substrate through the flexible circuit board.
  • a metal substrate A semiconductor element disposed on the metal substrate; A flexible circuit board having one end disposed on the metal substrate and electrically connected to the semiconductor element, wherein the flexible circuit board extends beyond an edge of the metal substrate and extends outside the metal substrate.
  • a semiconductor device is provided.
  • FIG. 1 is a main cross-sectional view of a semiconductor device 1;
  • FIG. 1 is a view additionally showing a resin wall 70 in FIG. 1.
  • FIG. 1 is a view additionally showing a resin wall portion 70 and a resin sealing portion 72 in FIG. It is a figure which shows the comparative example which is not provided with the resin wall part.
  • FIG. 1 is a perspective view showing a main part of a semiconductor device 1 according to an embodiment.
  • FIG. 2 is a main cross-sectional view of the semiconductor device 1.
  • illustration of the insulating layer 30, the heat sink 40, the resin wall portion 70, and the resin sealing portion 72 of the semiconductor device 1 shown in FIG. 2 is omitted for convenience.
  • the vertical direction of the semiconductor device 1 differs depending on the mounting state of the semiconductor device 1, but hereinafter, for convenience, the semiconductor chip 10 side is set upward with respect to the heat spreader 20 of the semiconductor device 1.
  • “outside” and “inside” are based on the center of the heat spreader 20 as viewed from a plane perpendicular to the upper surface of the heat spreader 20. That is, “outside” refers to the side away from the center of the heat spreader 20 when viewed from the surface, and “inside” refers to the side toward the center of the heat spreader 20 when viewed from the surface. It should be noted that the center of the heat spreader 20 may be approximately, and is not of a nature that should be strictly determined.
  • the semiconductor device 1 may constitute, for example, an inverter for driving a motor used in a hybrid vehicle or an electric vehicle.
  • the semiconductor device 1 includes a semiconductor chip 10, a heat spreader 20, an insulating layer 30, a heat sink 40, a flexible printed circuit (FPC) 90, a resin wall 70, and a resin seal.
  • FPC flexible printed circuit
  • the semiconductor chip 10 includes a power semiconductor element.
  • the semiconductor chip 10 is bonded onto the heat spreader 20 with solder 50.
  • two semiconductor chips 10 are provided for one heat spreader 20, which are IGBT (Insulated Gate Bipolar Transistor) and FWD (Free Wheeling Diode), respectively.
  • the IGBT includes an emitter electrode on the upper surface and a collector electrode on the lower surface.
  • the FWD includes an anode electrode on the upper surface and a cathode electrode on the lower surface.
  • the type and number of power semiconductor elements included in the semiconductor chip 10 are arbitrary.
  • the semiconductor chip 10 may include other switching elements such as MOSFETs (Metal / Oxide / Semiconductor / Field-Effect / Transistor) instead of the IGBT.
  • MOSFETs Metal / Oxide / Semiconductor / Field-Effect / Transistor
  • the first connection terminal 12 is fixed (bonded) to the upper surface of the semiconductor chip 10 with the solder 50.
  • the lower ends of the respective leg portions of the first connection terminal 12 are joined to the emitter electrode of the IGBT and the anode electrode of the FWD by the solder 50, respectively.
  • the upper part of the first connection terminal 12 may be joined to a bus bar (not shown) by, for example, laser welding.
  • the heat spreader 20 is a member that absorbs and diffuses heat generated in the semiconductor chip 10.
  • the heat spreader 20 is formed from a metal having excellent thermal diffusibility, such as copper or aluminum.
  • the heat spreader 20 is made of copper.
  • oxygen-free copper (C1020) having the highest conductivity among copper materials is suitable.
  • the second connection terminal 14 is joined to the upper surface of the heat spreader 20 by solder or the like. Since the IGBT collector electrode as the semiconductor chip 10 (and the cathode electrode of the FWD as the semiconductor chip 10) is connected to the heat spreader 20, the second connection terminal 14 constitutes an IGBT collector electrode extraction part. To do. Similarly to the first connection terminal 12, the second connection terminal 14 may be joined to a bus bar (not shown) by, for example, laser welding.
  • the insulating layer 30 may be composed of a resin adhesive or a resin sheet.
  • the insulating layer 30 may be formed of a resin using alumina as a filler, for example.
  • the insulating layer 30 is provided between the heat spreader 20 and the heat sink 40 and is bonded to the heat spreader 20 and the heat sink 40.
  • the insulating layer 30 ensures high thermal conductivity from the heat spreader 20 to the heat sink 40 while ensuring electrical insulation between the heat spreader 20 and the heat sink 40.
  • the heat sink 40 is made of a material having good thermal conductivity, and is made of a metal such as aluminum. As shown in FIG. 2, the heat sink 40 includes fins 42 on the lower surface side. The number and arrangement of the fins 42 are arbitrary. The fins 42 may be straight fins as illustrated, or may be realized by staggered arrangement of pin fins. In the mounted state of the semiconductor device 1, the fins 42 are in contact with a cooling medium such as cooling water or cooling air. In this way, the heat from the semiconductor chip 10 generated when the semiconductor device 1 is driven is transmitted to the cooling medium from the fins 42 of the heat sink 40 via the heat spreader 20 and the insulating layer 30, thereby cooling the semiconductor device 1. Is done.
  • the FPC 90 wiring (not shown) connected to the bonding wire 80 is formed (printed) on the upper surface (the surface opposite to the side bonded to the heat spreader 20). As shown in FIGS. 1 and 2, one end of the FPC 90 is attached on the heat spreader 20.
  • the FPC 90 may be bonded onto the heat spreader 20 by, for example, an adhesive.
  • the FPC 90 has a wide end 90 a on the heat spreader 20 side, and the end 90 a is joined onto the heat spreader 20.
  • the end portion 90 a of the FPC 90 is bonded to a region adjacent to the semiconductor chip 10 on the heat spreader 20.
  • the FPC 90 is arranged in such a manner that a portion extending from the end portion 90a to the other end side extends beyond the edge of the heat spreader 20 to the outside of the heat spreader 20. Is done.
  • the FPC 90 is connected to the semiconductor chip 10 by a bonding wire 80 on the heat spreader 20, as shown in FIGS.
  • the FPC 90 is electrically connected to an IGBT (an example of the semiconductor chip 10) by a bonding wire 80.
  • the FPC 90 may be connected to the semiconductor chip 10 by a plurality of bonding wires 80.
  • the plurality of bonding wires 80 may form, for example, IGBT switching control lines (gate signal lines, emitter signal lines), chip temperature detection lines, sense terminals, and the like.
  • FIG. 3 is a view showing the resin wall portion 70 in FIG.
  • FIG. 4 is a view illustrating the resin wall portion 70 and the resin sealing portion 72 in FIG. 1. Therefore, FIG. 2 corresponds to a main cross-sectional view of the semiconductor device 1 shown in FIG.
  • the resin wall part 70 is provided over the perimeter of the peripheral part of the heat spreader 20, as shown in FIG. Therefore, as shown in FIG. 2, the resin wall portion 70 is provided on the FPC 90 at the edge where the FPC 90 exceeds the heat spreader 20 (the edge where the FPC 90 in the heat spreader 20 passes above).
  • the resin wall portion 70 may be formed by arranging a resin material along the entire circumference of the peripheral edge portion of the heat spreader 20.
  • the resin wall portion 70 may be formed of any resin material having a high viscosity that functions as a so-called dam material.
  • the resin wall portion 70 does not hang down from the edge portion of the heat spreader 20 to the side surface of the heat spreader 20 during construction (or does not protrude into a region outside the edge portion of the heat spreader 20 in the FPC 90). It is formed of a highly viscous resin material that can retain its shape. Typically, the resin wall portion 70 is formed of a resin material having a viscosity higher than that of at least the resin material forming the resin sealing portion 72.
  • the resin material of the resin wall portion 70 may contain a liquid epoxy resin and a cationic polymerization initiator as a curing agent.
  • the resin sealing portion 72 is provided in a region surrounded by the resin wall portion 70 on the upper surface of the heat spreader 20.
  • the resin sealing portion 72 may be formed by molding a resin material in a region surrounded by the resin wall portion 70 on the upper surface of the heat spreader 20.
  • the resin material may be any material suitable for sealing, and may be, for example, a thermosetting resin (epoxy resin or the like) using an acid anhydride-based or phenol-based curing agent, silicon gel, or the like.
  • the resin material of the resin sealing portion 72 ′ having a relatively low viscosity is In some cases, the heat spreader 20 may travel over the FPC 90 beyond the edge of the heat spreader 20. In this case, as shown in FIG. 5, the element to be originally sealed by the resin sealing portion 72 ′ (particularly the element located in the vicinity of the FPC 90, for example, the bonding wire 80 in the illustrated example) is not sealed. Can also occur.
  • the resin wall portion 70 functions as a dam frame (bank), so that the FPC 90 extends beyond the edge of the heat spreader 20 to the outside.
  • the flow of the resin material that can travel on is blocked.
  • the protrusion of the resin sealing portion 72 can be prevented, and the element to be sealed can be reliably sealed by the resin sealing portion 72.
  • the height of the resin wall portion 70 is preferably set based on the highest element to be sealed by the resin sealing portion 72 among various elements arranged on the heat spreader 20.
  • the highest element to be sealed by the resin sealing portion 72 is a bonding wire 80.
  • the height of the resin wall 70 is set to be higher than that of the bonding wire 80 with reference to the upper surface of the heat spreader 20. Thereby, as shown in FIG. 2, the bonding wire 80 can be reliably sealed by the resin sealing portion 72.
  • the resin sealing portion 72 is formed so as to cover the semiconductor chip 10 and the bonding wire 80 on the heat spreader 20.
  • the semiconductor chip 10 can be protected, and the reliability of the bonding portion between the heat spreader 20 and the semiconductor chip 10 by the solder 50 and the bonding reliability between the bonding wire 80 and the FPC 90 and the semiconductor chip 10 can be improved.
  • the resin sealing portion 72 it is possible to prevent a breakdown voltage failure from occurring in the semiconductor chip 10 due to sputtering when the first connection terminal 12 and the second connection terminal 14 are laser welded. be able to.
  • the semiconductor chip 10 is bonded onto the heat spreader 20, and the first connection terminal 12 and the second connection terminal 14 are bonded to the semiconductor chip 10 and the heat spreader 20, respectively. Further, the FPC 90 is joined on the heat spreader 20. Next, the FPC 90 and the semiconductor chip 10 are electrically connected by the bonding wires 80 on the heat spreader 20.
  • a highly viscous resin material (dam material) is applied over the entire periphery of the peripheral portion of the heat spreader 20 to form the resin wall portion 70.
  • a highly viscous resin material is applied on the FPC 90 to form the resin wall portion 70.
  • the resin wall portion 70 is formed on the end portion 90 a of the FPC 90 disposed on a part of the peripheral portion of the heat spreader 20.
  • a resin material is injected into a region surrounded by the resin wall portion 70 on the upper surface of the heat spreader 20, thereby forming a resin sealing portion 72.
  • the heat spreader 20 corresponds to the “metal substrate” in the claims
  • the FPC 90 corresponds to the “flexible circuit board” in the claims.
  • the resin wall portion 70 is formed over the entire periphery of the peripheral portion of the heat spreader 20, but the portion where the FPC 90 that is a part of the peripheral portion of the heat spreader 20 is disposed.
  • the resin wall portion 70 may be formed only on a part of the peripheral portion of the heat spreader 20 including the portion where the FPC 90 is disposed. Also in this case, since the flow of the resin material that can travel on the FPC 90 beyond the edge of the heat spreader 20 is blocked, it is possible to prevent the resin sealing portion 72 from protruding.
  • a reinforcing material may be provided on a portion of the FPC 90 that is located on the edge of the heat spreader 20 (in the illustrated example, the end 90a of the FPC 90 disposed on the edge of the heat spreader 20).
  • the reinforcing material may be formed from the same material (for example, polyimide) as the FPC 90, for example.

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Chemical & Material Sciences (AREA)
  • Dispersion Chemistry (AREA)
  • Materials Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)

Abstract

 半導体装置1は、金属基板と、金属基板上に配置される半導体素子と、金属基板上に一端が配置され、半導体素子と電気的に接続される可撓性回路基板であって、金属基板の縁部を越えて金属基板の外側に延在する可撓性回路基板と、金属基板の外周縁部のうちの、少なくとも、可撓性回路基板が越えて延在する金属基板の縁部に配置され、該縁部では可撓性回路基板上に設けられる樹脂壁部と、樹脂壁部よりも内側で金属基板を覆うように設けられる樹脂封止部とを含む。

Description

半導体装置及びその製造方法
 本開示は、可撓性回路基板を備える半導体装置及びその製造方法に関する。
 従来から、放熱体に接しているセラミックス基板と、セラミックス基板に接している金属部材と、該金属部材の上に搭載された電子部品と、セラミックス基板より外側に配置され、電子部品とボンディングワイヤで電気的に接続され、外部に通じる電極(制御端子)と、を有する半導体装置が知られている(例えば、特許文献1参照)。
特開2009-088215号公報
 しかしながら、上記の特許文献1に記載の技術のように、制御端子を介して電子部品を外部と電気的に接続する構成では、基板より外側に制御端子が配置されるので、半導体装置のサイズが大きくなるという問題点がある。
 この点、基板上に可撓性回路基板を直接取り付けることで、基板上の半導体素子と外部との電気的接続を実現する構成では、半導体装置のサイズを小さくできる点で有利である。しかしながら、かかる構成では、基板上を樹脂で封止する際に、樹脂が可撓性回路基板を伝って基板よりも外側にはみ出す虞がある。
 そこで、本開示は、樹脂が可撓性回路基板を伝って基板よりも外側にはみ出すことを適切に防止することができる半導体装置及びその製造方法の提供を目的とする。
 一局面によれば、金属基板と、
 前記金属基板上に配置される半導体素子と、
 前記金属基板上に一端が配置され、前記半導体素子と電気的に接続される可撓性回路基板であって、前記金属基板の縁部を越えて前記金属基板の外側に延在する可撓性回路基板と、
 前記金属基板の外周縁部のうちの、少なくとも、前記可撓性回路基板が越えて延在する前記金属基板の縁部に配置され、該縁部では前記可撓性回路基板上に設けられる樹脂壁部と、
 前記樹脂壁部よりも内側で前記金属基板を覆うように設けられる樹脂封止部とを含むことを特徴とする、半導体装置が提供される。
 一局面によれば、樹脂が可撓性回路基板を伝って基板よりも外側にはみ出すことを適切に防止することができる半導体装置及びその製造方法が得られる。
一実施例による半導体装置1の要部を示す斜視図である。 半導体装置1の主要断面図である。 図1に樹脂壁部70が追加的に図示された図である。 図1に樹脂壁部70及び樹脂封止部72が追加的に図示された図である。 樹脂壁部70を備えていない比較例を示す図である。
 以下、図面を参照して、実施例の説明を行う。
 図1は、一実施例による半導体装置1の要部を示す斜視図である。図2は、半導体装置1の主要断面図である。尚、図1においては、都合上、図2に示されている半導体装置1の絶縁層30、ヒートシンク40、樹脂壁部70及び樹脂封止部72についての図示が省略されている。
 尚、半導体装置1の上下方向は、半導体装置1の搭載状態に応じて上下方向が異なるが、以下では、便宜上、半導体装置1のヒートスプレッダ20に対して半導体チップ10側を上方とする。また、用語の定義として、「外側」及び「内側」とは、ヒートスプレッダ20の上面に垂直な面直視でヒートスプレッダ20の中心を基準とする。即ち、「外側」とは、面直視でヒートスプレッダ20の中心から離れる側を指し、「内側」とは、面直視でヒートスプレッダ20の中心の向かう側を指す。尚、ヒートスプレッダ20の中心は凡そであればよく、厳密に決定されるべき性質のものでない。
 半導体装置1は、例えば、ハイブリッド車又は電気自動車で使用されるモータ駆動用のインバータを構成するものであってよい。
 半導体装置1は、図1及び図2に示すように、半導体チップ10と、ヒートスプレッダ20と、絶縁層30と、ヒートシンク40と、FPC(flexible printed circuit)90と、樹脂壁部70と、樹脂封止部72とを含む。
 半導体チップ10は、パワー半導体素子を含む。半導体チップ10は、ヒートスプレッダ20上に半田50により接合される。図示の例では、半導体チップ10は、1つのヒートスプレッダ20に対して2つ設けられ、それぞれ、IGBT(Insulated Gate Bipolar Transistor)と、FWD(Free Wheeling Diode)である。この場合、IGBTは、上面にエミッタ電極を備え、下面にコレクタ電極を備える。また、FWDは、上面にアノード電極を備え、下面にカソード電極を備える。尚、半導体チップ10が含むパワー半導体素子の種類や数は、任意である。また、半導体チップ10は、IGBTに代えて、MOSFET(Metal Oxide Semiconductor Field-Effect Transistor)のような他のスイッチング素子を含んでもよい。
 半導体チップ10の上面には、第1接続端子12が半田50により固着(接合)される。図示の例では、第1接続端子12のそれぞれの脚部の下端は、それぞれ、IGBTのエミッタ電極と、FWDのアノード電極に半田50により接合される。第1接続端子12の上部は、バスバー(図示せず)に例えばレーザ溶接により接合されてもよい。
 ヒートスプレッダ20は、半導体チップ10で発生する熱を吸収し拡散する部材である。ヒートスプレッダ20は、例えば銅、アルミなどの熱拡散性の優れた金属から形成される。本例では、一例として、ヒートスプレッダ20は、銅により形成される。銅としては、伝導率が銅材の中で最も高い無酸素銅(C1020)が好適である。
 ヒートスプレッダ20の上面には、第2接続端子14が半田等により接合される。尚、ヒートスプレッダ20には、半導体チップ10としてのIGBTのコレクタ電極(及び半導体チップ10としてのFWDのカソード電極)が接続されるので、第2接続端子14は、IGBTのコレクタ電極の取り出し部を構成する。第2接続端子14は、第1接続端子12と同様、バスバー(図示せず)に例えばレーザ溶接により接合されてもよい。
 絶縁層30は、樹脂接着剤や樹脂シートから構成されてよい。絶縁層30は、例えばアルミナをフィラーとした樹脂で形成されてもよい。絶縁層30は、ヒートスプレッダ20とヒートシンク40の間に設けられ、ヒートスプレッダ20とヒートシンク40に接合する。絶縁層30は、ヒートスプレッダ20とヒートシンク40との間の電気的な絶縁性を確保しつつ、ヒートスプレッダ20からヒートシンク40への高い熱伝導性を確保する。
 ヒートシンク40は、熱伝導性の良い材料から形成され、例えば、アルミなどの金属により形成される。ヒートシンク40は、図2に示すように、下面側にフィン42を備える。フィン42の数や配列態様は任意である。フィン42は、図示のようなストレートフィンであってもよいし、その他、ピンフィンの千鳥配置等で実現されてもよい。半導体装置1の実装状態では、フィン42は、冷却水や冷却空気のような冷却媒体と接触する。このようにして、半導体装置1の駆動時に生じる半導体チップ10からの熱は、ヒートスプレッダ20、絶縁層30を介して、ヒートシンク40のフィン42から冷却媒体へと伝達され、半導体装置1の冷却が実現される。
 FPC90は、上面(ヒートスプレッダ20に接合される側とは逆側の表面)に、ボンディングワイヤ80に接続される配線(図示せず)が形成(プリント)される。FPC90は、図1及び図2に示すように、ヒートスプレッダ20上に一端が取り付けられる。FPC90は、ヒートスプレッダ20上に例えば接着剤により接合されてもよい。図示の例では、FPC90は、ヒートスプレッダ20側に、幅広の端部90aを有し、この端部90aがヒートスプレッダ20上に接合される。図示の例では、FPC90の端部90aは、ヒートスプレッダ20上における半導体チップ10に隣接する領域に接合される。また、FPC90は、図1及び図2に示すように、端部90aから他端側へと延在する部位がヒートスプレッダ20の縁部を越えてヒートスプレッダ20の外側へと延出する態様で、配置される。
 FPC90は、図1及び図2に示すように、ヒートスプレッダ20上でボンディングワイヤ80により半導体チップ10に接続される。図示の例では、FPC90は、ボンディングワイヤ80によりIGBT(半導体チップ10の一例)に電気的に接続される。FPC90は、複数個のボンディングワイヤ80で半導体チップ10に接続されてもよい。複数個のボンディングワイヤ80は、例えば、IGBTのスイッチング用の制御線(ゲート信号線、エミッタ信号線)や、チップ温度検出用の線、センス端子等を形成するものであってよい。
 ここで、図2、図3及び図4を参照しつつ、樹脂壁部70及び樹脂封止部72について説明する。
 図3は、図1に樹脂壁部70が図示された図である。図4は、図1に樹脂壁部70及び樹脂封止部72が図示された図である。従って、図2は、図4に示す半導体装置1の主要断面図に相当する。
 樹脂壁部70は、図3に示すように、ヒートスプレッダ20の周縁部の全周に亘って設けられる。従って、樹脂壁部70は、図2に示すように、FPC90がヒートスプレッダ20を越える縁部(ヒートスプレッダ20におけるFPC90が上を通過する縁部)においては、FPC90上に設けられる。樹脂壁部70は、ヒートスプレッダ20の周縁部の全周に沿って、樹脂材料を配置することにより形成されてよい。樹脂壁部70は、いわゆるダム材として機能する粘度の高い任意の樹脂材料により形成されてもよい。具体的には、樹脂壁部70は、施工時にヒートスプレッダ20の縁部からヒートスプレッダ20の側面へと垂れること(又はFPC90におけるヒートスプレッダ20の縁部よりも外側の領域へとはみ出ること)がないように形状を保持できる粘性の高い樹脂材料により形成される。典型的には、樹脂壁部70は、少なくとも樹脂封止部72を形成する樹脂材料よりも粘性が高い樹脂材料により形成される。例えば、樹脂壁部70の樹脂材料は、液状エポキシ樹脂及び硬化剤としてカチオン系重合開始剤を含有するものであってもよい。
 樹脂封止部72は、ヒートスプレッダ20の上面における樹脂壁部70により囲繞された領域に設けられる。樹脂封止部72は、ヒートスプレッダ20の上面における樹脂壁部70により囲繞された領域に、樹脂材料をモールドすることにより形成されてよい。樹脂材料は、封止に適した任意の材料であってよく、例えば、酸無水物系又はフェノール系硬化剤を使用した熱硬化性樹脂(エポキシ樹脂等)やシリコンゲル等であってよい。
 ここで、樹脂壁部70を備えていない比較例では、図5に示すように、樹脂封止部72’を形成する際に、比較的粘性が低い樹脂封止部72’の樹脂材料は、ヒートスプレッダ20の縁部を越えて外側へとFPC90上を伝ってしまう場合がある。この場合、図5に示すように、樹脂封止部72’で本来封止すべき要素(特にFPC90の近傍に位置する要素であり、図示の例では、例えばボンディングワイヤ80)が封止されない場合も生じうる。
 これに対して、本実施例によれば、樹脂封止部72を形成する際に、樹脂壁部70がダム枠(堤防)として機能するので、ヒートスプレッダ20の縁部を越えて外側へとFPC90上を伝いうる樹脂材料の流れが堰止めされる。これにより、樹脂封止部72のはみ出しを防止し、樹脂封止部72により封止すべき要素を確実に封止することができる。
 樹脂壁部70の高さは、好ましくは、ヒートスプレッダ20上に配置される各種要素のうち、樹脂封止部72により封止すべき最も高い要素を基準として設定される。図示の例では、樹脂封止部72により封止すべき最も高い要素は、ボンディングワイヤ80である。この場合、ヒートスプレッダ20の上面を基準として、樹脂壁部70の高さは、ボンディングワイヤ80よりも高く設定される。これにより、図2に示すように、樹脂封止部72によりボンディングワイヤ80を確実に封止することができる。
 尚、図2及び図4に示す例では、樹脂封止部72は、ヒートスプレッダ20上の半導体チップ10及びボンディングワイヤ80を覆うように形成される。これにより、半導体チップ10を保護すると共に、半田50によるヒートスプレッダ20と半導体チップ10との間の接合部の信頼性や、ボンディングワイヤ80とFPC90及び半導体チップ10との接合信頼性を高めることができる。尚、樹脂封止部72による半導体チップ10を覆うことにより、第1接続端子12や第2接続端子14をレーザ溶接する際のスパッタに起因して半導体チップ10に耐圧不良が生じるのを防止することができる。
 次に、本実施例の半導体装置1の製造方法について説明する。
 先ず、図1に示すように、ヒートスプレッダ20上に、半導体チップ10が接合され、半導体チップ10及びヒートスプレッダ20にそれぞれ第1接続端子12及び第2接続端子14が接合される。また、ヒートスプレッダ20上に、FPC90が接合される。次いで、FPC90と半導体チップ10とがヒートスプレッダ20上でボンディングワイヤ80により電気的に接続される。
 次いで、図3に示すように、ヒートスプレッダ20の周縁部の全周に亘って粘性の高い樹脂材料(ダム材)が塗布され、樹脂壁部70が形成される。尚、この際、ヒートスプレッダ20の周縁部の一部には、FPC90が配置されているので、その部分については、FPC90上に、粘性の高い樹脂材料が塗布され、樹脂壁部70が形成される。尚、図3に示す例では、ヒートスプレッダ20の周縁部の一部上に配置されるFPC90の端部90a上に樹脂壁部70が形成されることになる。
 次いで、図4に示すように、ヒートスプレッダ20の上面における樹脂壁部70により囲繞された領域に樹脂材料が注入され、樹脂封止部72が形成される。
 尚、以上の実施例においては、ヒートスプレッダ20が特許請求の範囲の「金属基板」に対応し、FPC90が特許請求の範囲の「可撓性回路基板」に対応している。
 以上、本発明の好ましい実施例について詳説したが、本発明は、上述した実施例に制限されることはなく、本発明の範囲を逸脱することなく、上述した実施例に種々の変形及び置換を加えることができる。
 例えば、上述では、好ましい実施例として、ヒートスプレッダ20の周縁部の全周に亘って樹脂壁部70が形成されるが、ヒートスプレッダ20の周縁部の一部であるFPC90が配置されている部分に対してのみ、又は、FPC90が配置されている部分を含むヒートスプレッダ20の周縁部の一部のみに、樹脂壁部70が形成されてもよい。この場合も、ヒートスプレッダ20の縁部を越えて外側へとFPC90上を伝いうる樹脂材料の流れが堰止めされるので、樹脂封止部72のはみ出しを防止することができる。
 また、上述した実施例において、FPC90におけるヒートスプレッダ20の縁部上に位置する部位(図例では、ヒートスプレッダ20の縁部上に配置されるFPC90の端部90a)に補強材が設けられてもよい。補強材は、例えば、FPC90と同一の材料(例えばポリイミド)から形成されてよい。これにより、ヒートスプレッダ20の縁部から受ける力に起因したFPC90における応力集中が低減され、FPC90上の配線を適切に保護することができる。
 1  半導体装置
 10  半導体チップ
 12  第1接続端子
 14  第2接続端子
 20  ヒートスプレッダ
 30  絶縁層
 40  ヒートシンク
 42  フィン
 50  半田
 70  樹脂壁部
 72  樹脂封止部
 80  ボンディングワイヤ
 90  FPC
 90a  端部

Claims (5)

  1.  金属基板と、
     前記金属基板上に配置される半導体素子と、
     前記金属基板上に一端が配置され、前記半導体素子と電気的に接続される可撓性回路基板であって、前記金属基板の縁部を越えて前記金属基板の外側に延在する可撓性回路基板と、
     前記金属基板の外周縁部のうちの、少なくとも、前記可撓性回路基板が越えて延在する前記金属基板の縁部に配置され、該縁部では前記可撓性回路基板上に設けられる樹脂壁部と、
     前記樹脂壁部よりも内側で前記金属基板を覆うように設けられる樹脂封止部とを含むことを特徴とする、半導体装置。
  2.  前記樹脂壁部は、前記金属基板の外周縁部に全周に亘って設けられる、請求項1に記載の半導体装置。
  3.  前記樹脂封止部は、前記樹脂壁部により囲まれる前記金属基板の領域全体を覆うように設けられる、請求項2に記載の半導体装置。
  4.  前記可撓性回路基板は、前記金属基板上で前記半導体素子とボンディングワイヤにより接続され、
     前記樹脂壁部の高さは、前記金属基板上で前記ボンディングワイヤの高さよりも高く、
     前記樹脂封止部は、前記ボンディングワイヤを覆うように設けられる、請求項1~3のうちのいずれか1項に記載の半導体装置。
  5.  金属基板上に半導体素子を配置するステップと、
     可撓性回路基板の一端が前記金属基板の縁部を越えて前記金属基板の外側に延在する態様で前記金属基板上に前記可撓性回路基板の他端を取り付けると共に、前記可撓性回路基板を前記半導体素子に電気的に接続するステップと、
     前記可撓性回路基板が取り付けられた前記金属基板の外周縁部に全周に亘って樹脂壁部を形成するステップと、
     前記樹脂壁部により囲まれる前記金属基板の領域全体を覆うように樹脂封止部を形成するステップとを含むことを特徴とする、半導体装置の製造方法。
PCT/JP2012/076241 2011-11-04 2012-10-10 半導体装置及びその製造方法 WO2013065462A1 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2011-242206 2011-11-04
JP2011242206A JP2013098466A (ja) 2011-11-04 2011-11-04 半導体装置及びその製造方法

Publications (1)

Publication Number Publication Date
WO2013065462A1 true WO2013065462A1 (ja) 2013-05-10

Family

ID=48191820

Family Applications (1)

Application Number Title Priority Date Filing Date
PCT/JP2012/076241 WO2013065462A1 (ja) 2011-11-04 2012-10-10 半導体装置及びその製造方法

Country Status (3)

Country Link
US (1) US20130113120A1 (ja)
JP (1) JP2013098466A (ja)
WO (1) WO2013065462A1 (ja)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109967872A (zh) * 2019-04-23 2019-07-05 苏州福唐智能科技有限公司 一种半导体激光焊接方法及其焊接结构

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5931410B2 (ja) * 2011-11-15 2016-06-08 株式会社小糸製作所 発光モジュールとその製造方法及び車両用灯具
WO2016048676A1 (en) * 2014-09-24 2016-03-31 Hiq Solar, Inc. Transistor thermal and emi management solution for fast edge rate environment
DE102014118080B4 (de) * 2014-12-08 2020-10-15 Infineon Technologies Ag Elektronisches Modul mit einem Wärmespreizer und Verfahren zur Herstellung davon
CN107852833B (zh) * 2015-09-29 2020-10-20 日立汽车系统株式会社 电子控制装置和车载电子控制装置的制造方法

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11126952A (ja) * 1997-10-22 1999-05-11 Sanyo Electric Co Ltd 混成集積回路装置およびその製造方法
JP2005134637A (ja) * 2003-10-30 2005-05-26 Optrex Corp 液晶表示装置
JP2010186957A (ja) * 2009-02-13 2010-08-26 Seiko Instruments Inc フレキシブルプリント配線板およびモジュール並びにモジュールの製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6049094A (en) * 1998-05-21 2000-04-11 National Semiconductor Corporation Low stress package assembly for silicon-backed light valves

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11126952A (ja) * 1997-10-22 1999-05-11 Sanyo Electric Co Ltd 混成集積回路装置およびその製造方法
JP2005134637A (ja) * 2003-10-30 2005-05-26 Optrex Corp 液晶表示装置
JP2010186957A (ja) * 2009-02-13 2010-08-26 Seiko Instruments Inc フレキシブルプリント配線板およびモジュール並びにモジュールの製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN109967872A (zh) * 2019-04-23 2019-07-05 苏州福唐智能科技有限公司 一种半导体激光焊接方法及其焊接结构
CN109967872B (zh) * 2019-04-23 2021-05-07 苏州福唐智能科技有限公司 一种半导体激光焊接方法及其焊接结构

Also Published As

Publication number Publication date
JP2013098466A (ja) 2013-05-20
US20130113120A1 (en) 2013-05-09

Similar Documents

Publication Publication Date Title
JP5232367B2 (ja) 半導体装置
JP3168901B2 (ja) パワー半導体モジュール
US8637979B2 (en) Semiconductor device
JP5163055B2 (ja) 電力半導体モジュール
US8558361B2 (en) Power semiconductor module
US8373197B2 (en) Circuit device
WO2014097798A1 (ja) 半導体装置
US10861833B2 (en) Semiconductor device
EP3026701B1 (en) Power module and manufacturing method thereof
US9105601B2 (en) Power module package
WO2013065462A1 (ja) 半導体装置及びその製造方法
US11923266B2 (en) Semiconductor module circuit structure
JP2017011028A (ja) 半導体装置
JP6156131B2 (ja) 半導体装置
JP5840102B2 (ja) 電力用半導体装置
US11302612B2 (en) Lead frame wiring structure and semiconductor module
WO2013105456A1 (ja) 回路基板および電子デバイス
JP2008041851A (ja) パワー半導体装置
JP2007288044A (ja) 半導体装置
JP2012244040A (ja) 半導体装置及びその製造方法
CN114730748A (zh) 用于消耗装置的可控电功率供应的具有被封装的功率半导体的功率模块及用于生产该功率模块的方法
WO2013065647A1 (ja) 半導体装置
JP2017054855A (ja) 半導体装置、及び半導体パッケージ
US11380599B2 (en) Semiconductor module, vehicle, and method of manufacturing semiconductor module
KR102484544B1 (ko) 와이어 본딩을 구비한 스페이서 리스 양면냉각 전력 패키지

Legal Events

Date Code Title Description
121 Ep: the epo has been informed by wipo that ep was designated in this application

Ref document number: 12846511

Country of ref document: EP

Kind code of ref document: A1

NENP Non-entry into the national phase

Ref country code: DE

122 Ep: pct application non-entry in european phase

Ref document number: 12846511

Country of ref document: EP

Kind code of ref document: A1