WO2013046606A1 - 薄膜トランジスタ、および画像表示装置 - Google Patents
薄膜トランジスタ、および画像表示装置 Download PDFInfo
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- WO2013046606A1 WO2013046606A1 PCT/JP2012/005981 JP2012005981W WO2013046606A1 WO 2013046606 A1 WO2013046606 A1 WO 2013046606A1 JP 2012005981 W JP2012005981 W JP 2012005981W WO 2013046606 A1 WO2013046606 A1 WO 2013046606A1
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- thin film
- film transistor
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- gate
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Images
Classifications
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- G02F1/01—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour
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- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1255—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs integrated with passive devices, e.g. auxiliary capacitors
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- H—ELECTRICITY
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- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/78606—Thin film transistors, i.e. transistors with a channel being at least partly a thin film with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
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- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
- H01L33/40—Materials therefor
- H01L33/42—Transparent materials
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- G—PHYSICS
- G02—OPTICS
- G02F—OPTICAL DEVICES OR ARRANGEMENTS FOR THE CONTROL OF LIGHT BY MODIFICATION OF THE OPTICAL PROPERTIES OF THE MEDIA OF THE ELEMENTS INVOLVED THEREIN; NON-LINEAR OPTICS; FREQUENCY-CHANGING OF LIGHT; OPTICAL LOGIC ELEMENTS; OPTICAL ANALOGUE/DIGITAL CONVERTERS
- G02F1/00—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics
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- G02F1/13—Devices or arrangements for the control of the intensity, colour, phase, polarisation or direction of light arriving from an independent light source, e.g. switching, gating or modulating; Non-linear optics for the control of the intensity, phase, polarisation or colour based on liquid crystals, e.g. single liquid crystal display cells
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- G02F2202/00—Materials and properties
- G02F2202/10—Materials and properties semiconductor
- G02F2202/107—Zn×S or Zn×Se and alloys
Definitions
- the present invention relates to a thin film transistor that can be used as a drive element of an image display device and the like, and an image display device.
- thin film transistors using amorphous silicon, polycrystalline silicon, or the like have been used as transistors for driving electronic devices.
- amorphous silicon or polycrystalline silicon does not have light transmittance and has photosensitivity in the visible light region, a light shielding film is necessary. Therefore, when the thin film transistor is present on the front side of the display element as viewed from the display viewing side, the visibility of the display is affected. Therefore, the thin film transistor has been disposed on the back side of the display element.
- color filters are generally used.
- the structure of the display device using the color filter is a structure in which a liquid crystal encapsulating layer or an electrophoretic particle layer is formed between the color filter and the thin film transistor for the above reason.
- a color filter and a thin film transistor are formed at this position, for example, when a liquid crystal sealing layer is used, it is necessary to align the thin film transistor and the color filter after sealing the liquid crystal. Therefore, it is difficult to obtain high accuracy, which causes an increase in cost and a decrease in yield.
- ITO indium tin oxide
- SiH4 silicon nitride formed by a CVD (Chemical Vapor Deposition) method
- a silicon nitride film or the like is formed on a substrate by a CVD method, it is common to perform a surface treatment with H2 plasma as a substrate cleaning means, and then perform a film formation using a reactive gas such as SiH4. .
- an object of the present invention is to realize a thin film transistor having high light transmittance and an image display device using the thin film transistor in order to solve the above-described requirements.
- the thin film transistor of one embodiment of the present invention includes: A thin film transistor in which at least a gate electrode, a capacitor electrode, a gate insulating layer, a semiconductor layer, a source electrode and a drain electrode are formed of a light-transmitting material on an insulating substrate having optical transparency, the gate electrode and The capacitor electrode or the source electrode and the drain electrode are composed of a first layer in contact with the insulating substrate and a second layer in contact with the gate insulating layer, and the first layer is indium tin oxide, The second layer is a metal oxide containing at least one of indium, gallium, and zinc.
- the second layer may be made of the same material as the semiconductor layer. Furthermore, the average transmittance in the visible light region of the gate electrode and the capacitor electrode, or the source electrode and the drain electrode may be 70% or more.
- the semiconductor layer may be a metal oxide containing at least one of indium, gallium, and zinc.
- the gate insulating layer may be a compound containing any one of silicon oxide, silicon nitride, and silicon oxynitride formed by a CVD method.
- the thin film transistor may be a bottom gate TFT. Further, the thin film transistor may be a top gate type TFT.
- An image display device includes:
- the thin film transistor includes an array of thin film transistors, a pixel electrode connected to a source electrode or a drain electrode of the array of thin film transistors, and an image display medium disposed on the pixel electrode. Further, a color filter may be formed on an insulating substrate of the thin film transistor array.
- each of the gate electrode and the capacitor electrode has a two-layer structure, the first layer in contact with the substrate is ITO, and the second layer in contact with the gate insulating layer is a metal oxide layer that suppresses blackening of ITO.
- ITO ITO
- the second layer in contact with the gate insulating layer is a metal oxide layer that suppresses blackening of ITO.
- a light-transmitting thin film transistor having a gate electrode having sufficient conductivity can be obtained by forming indium tin oxide (ITO) as a first layer that is formed of two layers of metal oxide and is in contact with an insulating substrate. It becomes possible.
- ITO indium tin oxide
- the process cost can be reduced as compared with the case of using a different material.
- a thin film transistor having high light transmittance can be obtained.
- the semiconductor layer is formed using a metal oxide containing at least one of indium, gallium, and zinc, a thin film transistor having high light transmittance and high performance can be realized.
- a gate insulating layer that is inexpensive and has sufficient withstand voltage is obtained by including any one compound of silicon oxide, silicon nitride, and silicon oxynitride formed by CVD as the gate insulating layer. be able to.
- an array of thin film transistors having high light transmittance and high characteristics can be realized by manufacturing an array of thin film transistors using the above method.
- the above light-transmitting thin film transistor array on the insulating substrate on which the color filter is formed, the alignment process between the thin film transistor substrate and the color filter substrate is unnecessary, and high brightness and high contrast are achieved. Can be realized.
- FIG. 6 is a schematic cross-sectional view illustrating one pixel of an image display device using a thin film transistor according to Example 2.
- FIG. 6 is a schematic cross-sectional view illustrating a structure of a thin film transistor according to Comparative Example 1.
- FIG. 6 is a schematic cross-sectional view illustrating a structure of a thin film transistor according to Comparative Example 1.
- the thin film transistor according to the present invention is applied to a bottom gate type TFT (Thin Film Transistor).
- TFT Thin Film Transistor
- the thin film transistor according to the present invention is not limited to the bottom gate type TFT.
- it may be applied to a top gate type TFT.
- FIG. 1 is a schematic cross-sectional view showing the structure of the thin film transistor of this embodiment.
- the thin film transistor includes an insulating substrate 0, a gate electrode 1, a capacitor electrode 2, a gate insulating layer 3, a semiconductor layer 4, a source electrode 5, and a drain electrode 6.
- the insulating substrate 0 is made of a light transmissive material.
- the material of the insulating substrate 0 includes polymethyl methacrylate, polyacrylate, polycarbonate, polystyrene, polyethylene sulfide, polyethersulfone, polyolefin, polyethylene terephthalate, polyethylene naphthalate, cycloolefin polymer, polyethersulfene, triphenyl.
- Acetyl cellulose, polyvinyl fluoride film, ethylene-tetrafluoroethylene copolymer resin, weather resistant polyethylene terephthalate, weather resistant polypropylene, glass fiber reinforced acrylic resin film, glass fiber reinforced polycarbonate, transparent polyimide, fluorine resin, cyclic polyolefin resin Glass, quartz, etc. can be used. These may be used as a single base material, but can also be used as a composite base material in which two or more kinds are laminated.
- gas permeable gas barrier layer When an organic film is used as the material of the insulating substrate 0, it is preferable to form a gas permeable gas barrier layer in order to improve the durability of the element (thin film transistor).
- the gas barrier layer Al2O3, SiO2, SiN, SiON, SiC, diamond-like carbon, or the like can be used.
- the material of the gas barrier layer is not limited to these.
- two or more gas barrier layers can be laminated and used.
- the gas barrier layer may be formed only on one side of the organic film, or may be formed on both sides of the organic film.
- the gas barrier layer can be formed by vapor deposition, ion plating, sputtering, CVD, sol-gel, or the like. The method for forming the gas barrier layer is not limited to these.
- the gate electrode 1 and the capacitor electrode 2 are formed on the insulating substrate 0.
- the gate electrode 1 and the capacitor electrode 2 are formed of a material having optical transparency.
- the gate electrode 1 and the capacitor electrode 2 are composed of first layers 1 a and 2 a that are in contact with the insulating substrate 0 and second layers 1 b and 2 b that are in contact with the gate insulating layer 3.
- the first layer 1a of the gate electrode 1 and the first layer 2a of the capacitor electrode 2, the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 may be the same material or different materials. May be.
- the first layer 1a of the gate electrode 1 and the first layer 2a of the capacitor electrode 2, the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 are used. Are more preferably the same material.
- indium tin oxide As the material of the first layer 1a of the gate electrode 1 and the first layer 2a of the capacitor electrode 2, indium tin oxide (ITO) can be used. Thereby, as the first layer 1a of the gate electrode 1 and the first layer 2a of the capacitor electrode 2, a film having high light transmittance and low resistivity (sufficient conductivity) can be formed.
- ITO indium tin oxide
- the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 are formed of a material having optical transparency.
- a material for the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 an oxide containing at least one of indium, gallium, and zinc can be used. More specifically, known materials such as zinc oxide, indium oxide, indium zinc oxide, and zinc gallium indium oxide (IGZO) can be used.
- the materials of the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 are not limited to these. These materials can be formed by sputtering, vacuum deposition, or the like.
- the formation method of the material of the 2nd layer 1b of the gate electrode 1 and the 2nd layer 2b of the capacitor electrode 2 is not limited to these.
- the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 are formed. It is preferable to carry out simultaneously with patterning. Specifically, zinc oxide, indium oxide, indium zinc oxide, and zinc gallium indium that become the second layers 1b and 2b on the ITO layer that becomes the first layers 1a and 2a of the gate electrode 1 and the capacitor electrode 2 A layer made of a known material such as (IGZO) is formed. Then, the first layer 1a, 2a and the second layer 1b, 2b of the gate electrode 1 and the capacitor electrode 2 are simultaneously patterned by patterning the formed layer by photolithography.
- IGZO a known material
- each of the gate electrode 1 and the capacitor electrode 2 has a two-layer structure, the first layers 1a and 2a in contact with the insulating substrate 0 are made of ITO, and the second layer in contact with the gate insulating layer 3 1b and 2b were metal oxide layers that suppress the blackening of ITO. Therefore, the gate electrode 1 and the capacitor electrode 2 having high light transmittance and high conductivity can be formed. Therefore, in the thin film transistor of this embodiment, by using such a gate electrode 1 and the capacitor electrode 2, it is possible to realize a thin film transistor having high light transmittance and an image display device with excellent display performance.
- the gate electrode 1 and the capacitor electrode 2 are made light transmissive. That is, the average transmittance in the visible light region of the gate electrode 1 and the capacitor electrode 2 was set to 70% or more. Therefore, in the thin film transistor of this embodiment, a thin film transistor having high light transmittance can be obtained. The higher the average transmittance of the gate electrode 1 and the capacitor electrode 2 in the visible light region, the better.
- the material of the second layer 1 b of the gate electrode 1 and the second layer 2 b of the capacitor electrode 2 is preferably the same material as the semiconductor layer 4. In this way, the process cost can be reduced.
- the second layer 1b of the gate electrode 1 and the second layer 2b of the capacitor electrode 2 can be formed by a sputtering method, a vacuum evaporation method, or the like.
- the formation method of the 2nd layer 1b of the gate electrode 1 and the 2nd layer 2b of the capacitor electrode 2 is not limited to these.
- the gate insulating layer 3 is formed on the insulating substrate 0 so as to cover the gate electrode 1 and the capacitor electrode 2.
- the gate insulating layer 3 is made of a light transmissive material.
- a material of the gate insulating layer 3 a compound containing any one of silicon oxide, silicon nitride, and silicon oxynitride formed by a CVD method can be used.
- an inexpensive and sufficiently insulating film can be formed as the gate insulating layer 3.
- the semiconductor layer 4 is formed on the gate insulating layer 3.
- the semiconductor layer 4 is made of a light transmissive material.
- a material of the semiconductor layer 4 an oxide containing at least one of indium, gallium, and zinc can be used. More specifically, known materials such as zinc oxide, indium oxide, indium zinc oxide, and zinc gallium indium oxide (IGZO) can be used. As a result, a thin film transistor having high light transmittance and high performance can be realized.
- the material of the semiconductor layer 4 is not limited to these.
- the semiconductor layer 4 can be formed by a vacuum deposition method, a sputtering method, or the like. In addition, the formation method of the semiconductor layer 4 is not limited to these.
- the source electrode 5 and the drain electrode 6 are formed on the gate insulating layer 3 so as to sandwich the semiconductor layer 4 therebetween.
- the source electrode 5 and the drain electrode 6 are made of a material having optical transparency. Examples of the material for the source electrode 5 and the drain electrode 6 include oxide materials such as indium oxide, tin oxide, indium tin oxide, zinc oxide, cadmium oxide, indium cadmium oxide, cadmium tin oxide, zinc tin oxide, and indium zinc oxide. Is preferred.
- the source electrode 5 and the drain electrode 6 may be made of the same material or different materials. However, in order to reduce the number of steps in the manufacturing process of the thin film transistor, the source electrode 5 and the drain electrode 6 are more preferably made of the same material.
- the source electrode 5 and the drain electrode 6 can be formed by a vacuum evaporation method, a sputtering method, or the like. In addition, the formation method of the source electrode 5 and the drain electrode 6 is not limited to these.
- a wiring layer that is, a layer formed of ITO as a material under the gate insulating layer 3 and requiring transparency, may have a two-layer structure like the gate electrode 1 and the capacitor electrode 2.
- Examples of such a two-layer wiring layer include a gate wiring layer and a capacitor wiring layer.
- the wiring layer having a two-layer structure can be formed by the same process as the gate electrode 1 and the capacitor electrode 2.
- the configuration in which the thin film transistor according to the present invention is applied to the bottom gate type TFT is shown as an example, but other configurations may be employed.
- the thin film transistor according to the present invention may be applied to a top gate TFT.
- the semiconductor layer 4, the source electrode 5 and the drain electrode 6 are formed on the insulating substrate 0, and the gate is formed on the formed semiconductor layer 4, the source electrode 5 and the drain electrode 6. Formed on the insulating layer 3.
- the source electrode 5 and the drain electrode 6 are formed of a light transmissive material.
- indium tin oxide can be used as the material of the first layer of the source electrode 5 and the drain electrode 6, that is, the first layer in contact with the insulating substrate 0.
- a metal oxide containing at least one of indium, gallium, and zinc it can.
- the gate electrode 1 and the capacitor electrode 2 are formed on the gate insulating layer 3, and silicon nitride is formed on the formed gate electrode 1 and the capacitor electrode 2 as an interlayer insulating layer.
- the gate electrode 1 and the capacitor electrode 2 may also have a two-layer structure.
- FIG. 1 is a schematic diagram of a thin film transistor manufactured in Example 1.
- a thin film transistor as shown in FIG. 1 was produced. Specifically, the non-alkali glass 1737 made by Corning is used as the insulating substrate 0, and the first layer 1a, 2a of the gate electrode 1 and the capacitor electrode 2 is formed on the insulating substrate 0 using a DC magnetron sputtering apparatus. ITO (thickness 100 nm) and IGZO (thickness 10 nm) to be the second layers 1b and 2b were formed at room temperature.
- the gate electrode 1 and the capacitor electrode 2 were formed from ITO and IGZO formed at room temperature by simultaneous etching using a photolithography method.
- the input power during the ITO film formation is 200 W
- the film formation pressure is 1.0 Pa
- the input power during the IGZO film formation is 200 W
- O2 2 SCCM
- the film forming pressure was 1.0 Pa.
- H2 plasma treatment is performed on the insulating substrate 0 on which the gate electrode 1 and the capacitor electrode 2 are formed using a plasma CVD apparatus, and then SiNx (thickness: 300 nm) is formed to form the gate insulating layer 3. Formed.
- IGZO thinness 40 nm is formed at room temperature on the insulating substrate 0 on which the gate insulating layer 3 is formed using a DC magnetron sputtering apparatus, and is oxidized by etching using photolithography from the IGZO formed at room temperature.
- the semiconductor layer 4 was formed of a material.
- an ITO (thickness 50 nm) film is formed at room temperature on the insulating substrate 0 on which the semiconductor layer 4 is formed by using a DC magnetron sputtering apparatus, and the source electrode is etched from the ITO film formed at room temperature by photolithography. 5 and the drain electrode 6 were formed. Thus, a thin film transistor was produced.
- the input power during the ITO film formation was 200 W
- O 2 1 SCCM
- the film formation pressure was 1.0 Pa.
- the length (gate length) between the source electrode 5 and the drain electrode 6 was 20 ⁇ m.
- the width between the source electrode 5 and the drain electrode 6 (gate width) was 5 ⁇ m.
- the transistor characteristics of the thin film transistor were measured using a semiconductor parameter analyzer (SCS4200 manufactured by Keithlay) with a gate voltage of ⁇ 10 V to +20 V and a drain voltage of 5 V. As a result, the transistor characteristics are as follows: the mobility is 10 cm 2 / Vs, the ON / OFF ratio when the voltage of 10 V is applied between the source electrode 5 and the drain electrode 6 is 8 digits, and the gate leakage current when the gate voltage is 20 V. Of 4.2 ⁇ 10 ⁇ 11 A, showing good transistor characteristics.
- FIG. 2 is a schematic cross-sectional view illustrating the structure of the thin film transistor according to the second embodiment.
- FIG. 3 is a schematic cross-sectional view illustrating the structure of the image display apparatus according to the second embodiment.
- a thin film transistor as shown in FIG. 2 and an image display device as shown in FIG. 3 were produced. Specifically, a non-alkali glass 1737 manufactured by Corning Inc. is used as the insulating substrate 0, and an R (red) photosensitive resin is applied on the insulating substrate 0 using a spin coating method, and then a photolithography method is used. Pattern formation was performed.
- ITO thinness 100 nm
- IGZO thinness 10 nm
- the gate electrode 1 and the capacitor electrode 2 were formed from ITO and IGZO formed at room temperature by simultaneous etching using a photolithography method.
- the input power during the ITO film formation is 200 W
- the film formation pressure is 1.0 Pa
- the input power during the IGZO film formation is 200 W
- O2 2 SCCM
- the film forming pressure was 1.0 Pa.
- H2 plasma treatment is performed on the insulating substrate 0 on which the gate electrode 1 and the capacitor electrode 2 are formed using a plasma CVD apparatus, and then SiNx (thickness: 300 nm) is formed to form the gate insulating layer 3. Formed.
- IGZO thinness 40 nm
- the semiconductor layer 4 was formed of a material.
- ITO thinness 50 nm
- the source electrode is etched from the ITO formed at room temperature by photolithography. 5 and the drain electrode 6 were formed. This produced an array of thin film transistors on the color filter substrate.
- the input power during the ITO film formation was 200 W
- O 2 1 SCCM
- the film formation pressure was 1.0 Pa.
- the length (gate length) between the source electrode 5 and the drain electrode 6 was 20 ⁇ m.
- the width between the source electrode 5 and the drain electrode 6 (gate width) was 5 ⁇ m.
- SiON thin film transistor array using an RF magnetron sputtering apparatus.
- the protective layer 7 was formed from the deposited SiON by etching using a photolithography method.
- the input power during the SiON film formation was 500 W
- O 2 10 SCCM
- the film formation pressure was 0.5 Pa.
- a photosensitive resin is applied on the fabricated thin film transistor array (on the protective layer 7) using a spin coating method, and a photo-resist is applied to a portion of the applied photosensitive resin (thickness 3 ⁇ m) on the drain electrode 6.
- a through-hole was opened by a lithography method to form an interlayer insulating layer (not shown).
- ITO thinness: 50 nm
- the pixel electrode 9 connected to the source electrode 5 or the drain electrode 6 was formed from ITO deposited at room temperature by etching using a photolithography method.
- the manufactured thin film transistor array was an array in which thin film transistors having 480 ⁇ 640 pixels were arranged.
- the channel length of the thin film transistor array was 20 ⁇ m.
- the channel width of the thin film transistor array was 5 ⁇ m.
- an alignment film 22 was formed on the thin film transistor array thus fabricated (on the pixel electrode 9).
- an alkali thin glass 1737 (thickness 0.7 mm) manufactured by Corning Inc. was used as the image display substrate 23, and an ITO thin film (thickness 70 nm) serving as the common electrode 24 was formed on the image display substrate 23. .
- an alignment film 25 was formed on the formed ITO thin film. This produced the base material in which the thin-film transistor was formed.
- the produced base material was disposed on the counter electrode (on the pixel electrode 9) of the thin film transistor array through a spacer.
- liquid crystal 26 as an image display medium was sealed between the spacers, that is, between the base material and the thin film transistor array (on the pixel electrode 9).
- the phase difference plate 27 and the polarizing plate 28 are arranged on the surface where the color filter layer 20 is not formed among the two surfaces of the thin film transistor array.
- an image display device was manufactured using an array of thin film transistors.
- the image display device of this embodiment uses the thin film transistor of this embodiment to produce an array of thin film transistors. Therefore, the image display apparatus according to the present embodiment can realize an array of thin film transistors having high light transmittance and high characteristics.
- an array of thin film transistors is formed on the insulating substrate 0 on which the color filter layer 20 is formed. Therefore, the image display device of this embodiment can eliminate the alignment process between the thin film transistor and the color filter layer 20. In addition, an image display device having high brightness and high contrast can be realized.
- FIG. 4 is a schematic view of the thin film transistor fabricated in Comparative Example 1.
- a thin film transistor as shown in FIG. 4 was produced. Specifically, ITO (thickness: 100 nm) that becomes the first layer 1a of the gate electrode 1 is formed on the insulating substrate 0 using a non-alkali glass 1737 made by Corning, as the insulating substrate 0, and using a DC magnetron sputtering apparatus. Was deposited at room temperature.
- the gate electrode 1 and the capacitor electrode 2 were formed from ITO and IGZO formed at room temperature by simultaneous etching using a photolithography method.
- H2 plasma treatment is performed on the insulating substrate 0 on which the gate electrode 1 and the capacitor electrode 2 are formed using a plasma CVD apparatus, and then SiNx (thickness: 300 nm) is formed to form the gate insulating layer 3. Formed.
- IGZO thinness: 40 nm
- the semiconductor layer 4 was formed of oxide from the IGZO formed at room temperature by etching using a photolithography method.
- the input power during IGZO film formation was 100 W
- O 2 2 SCCM
- the film formation pressure was 1.0 Pa.
- ITO thinness 50 nm
- a thin film transistor was produced.
- the input power during the ITO film formation was 200 W
- O 2 1 SCCM
- the film formation pressure was 1.0 Pa.
- the length (gate length) between the source electrode 5 and the drain electrode 6 was 20 ⁇ m.
- the width between the source electrode 5 and the drain electrode 6 (gate width) was 5 ⁇ m.
- the transistor characteristics of the thin film transistor were measured using a semiconductor parameter analyzer (SCS4200 manufactured by Keithlay) at a gate voltage of ⁇ 10 V to +20 V and a drain voltage of 5 V. As a result, the transistor characteristics are as follows: the mobility is 9 cm 2 / Vs, the ON / OFF ratio when the voltage of 10 V is applied between the source electrode 5 and the drain electrode 6 is 8 digits, and the gate leakage current when the gate voltage is 20 V. Was 3.5 ⁇ 10 ⁇ 11 A, showing good transistor characteristics.
- each of the gate electrode and the capacitor electrode has a two-layer structure, the first layer in contact with the substrate is ITO, and the second layer in contact with the gate insulating layer is a metal oxide layer that suppresses blackening of ITO.
- ITO ITO
- the second layer in contact with the gate insulating layer is a metal oxide layer that suppresses blackening of ITO.
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Abstract
Description
ここで、光透過性を有する薄膜トランジスタの半導体層には、例えば、酸化インジウムガリウム亜鉛等がよく用いられている(非特許文献2参照)。
また、薄膜トランジスタのゲート絶縁層としては、例えば、CVD(Chemical Vapor Deposition)法で成膜された窒化シリコン等がよく用いられている。基板上に、CVD法で窒化シリコン等を成膜する場合、基板清浄手段として、H2プラズマによる表面処理を行い、その後、SiH4等の反応性ガスを用いて成膜を行うのが一般的である。
光透過性を有する薄膜トランジスタを構成するゲート電極およびキャパシタ電極の光透過率の低下は、最終的に、カラーフィルタ上に光透過性を有する薄膜トランジスタを形成する構造を持つ画像表示装置の表示画面の明度やコントラストの低下を招く。
そこで、本発明では、上記のような要求を解決するため、高い光透過性を有する薄膜トランジスタ、および当該薄膜トランジスタを用いた画像表示装置を実現することを目的とする。
光透過性を有する絶縁基板上に、少なくともゲート電極、キャパシタ電極、ゲート絶縁層、半導体層、ソース電極およびドレイン電極が光透過性を有する材料で形成されている薄膜トランジスタであって、前記ゲート電極および前記キャパシタ電極、または前記ソース電極および前記ドレイン電極が、前記絶縁基板に接する第一層と、前記ゲート絶縁層に接する第二層とから構成され、前記第一層が、酸化インジウム錫であり、前記第二層が、インジウム、ガリウム、および亜鉛の少なくとも一種を含む金属酸化物であることを特徴とする。
さらに、前記ゲート電極および前記キャパシタ電極、または前記ソース電極および前記ドレイン電極の可視光領域における平均透過率が70%以上であってもよい。
また、前記半導体層が、インジウム、ガリウム、および亜鉛の少なくとも一種を含む金属酸化物であってもよい。
また、前記薄膜トランジスタがボトムゲート型TFTであってもよい。
さらに、前記薄膜トランジスタがトップゲート型TFTであってもよい。
前記薄膜トランジスタのアレイと、前記薄膜トランジスタのアレイのソース電極又はドレイン電極に接続された画素電極と、前記画素電極上に配置された画像表示媒体とを備えることを特徴とする。
また、前記薄膜トランジスタのアレイの絶縁基板上にカラーフィルタが形成されているものであってもよい。
また、ゲート電極の第二層およびキャパシタ電極の第二層を半導体層と同材料で形成することで、異種材料を用いる場合と比較し、プロセスコストを低減させることができる。
また、半導体層をインジウム、ガリウム、および亜鉛の少なくとも一種を含む金属酸化物で形成することで、高い光透過性を有しかつ高性能な薄膜トランジスタを実現することができる。
さらに、ゲート絶縁層として、CVD法で成膜した酸化シリコン、窒化シリコン、およびシリコンオキシナイトライドのいずれか一種の化合物を含むことで、安価でかつ十分な耐電圧性を持つゲート絶縁層を得ることができる。
また、カラーフィルタが形成されている絶縁基板上に、上記の光透過性を有する薄膜トランジスタのアレイを形成することで、薄膜トランジスタ基板とカラーフィルタ基板の位置合わせの工程が不要で、高輝度、高コントラストを有する画像表示装置を実現できる。
本実施形態では、本発明に係る薄膜トランジスタをボトムゲート型TFT(Thin Film Transistor)に適用したものである。なお、本発明に係る薄膜トランジスタは、ボトムゲート型TFTに限られるものではない。例えばトップゲート型TFTに適用してもよい。
図1に示すように、薄膜トランジスタは、絶縁基板0、ゲート電極1、キャパシタ電極2、ゲート絶縁層3、半導体層4、ソース電極5、およびドレイン電極6を備える。
絶縁基板0は、光透過性を有する材料で形成されている。本実施形態では、「光透過性を有する」とは、可視光領域(λ=400~700nm)における平均透過率が70%以上であることをいう。具体的には、絶縁基板0の材料としては、ポリメチルメタクリレート、ポリアクリレート、ポリカーボネート、ポリスチレン、ポリエチレンサルファイド、ポリエーテルスルホン、ポリオレフィン、ポリエチレンテレフタレート、ポリエチレンナフタレート、シクロオレフィンポリマー、ポリエーテルサルフェン、トリアセチルセルロース、ポリビニルフルオライドフィルム、エチレン-テトラフルオロエチレン共重合樹脂、耐候性ポリエチレンテレフタレート、耐候性ポリプロピレン、ガラス繊維強化アクリル樹脂フィルム、ガラス繊維強化ポリカーボネート、透明性ポリイミド、フッ素系樹脂、環状ポリオレフィン系樹脂、ガラス、石英等を使用することができる。これらは、単独の基材として使用してもよいが、二種以上を積層した複合基材として使用することもできる。
(実施例1)
次に、本実施形態の薄膜トランジスタの実施例1を図面に基づき説明する。
図1は、実施例1で作製した薄膜トランジスタの模式図である。
実施例1では、図1に示すような薄膜トランジスタを作製した。具体的には、コーニング社製の無アルカリガラス1737を絶縁基板0として用い、絶縁基板0上に、DCマグネトロンスパッタ装置を用いて、ゲート電極1およびキャパシタ電極2の第一層1a、2aとなるITO(厚さ100nm)および第二層1b、2bとなるIGZO(厚さ10nm)を室温成膜した。次に、フォトリソグラフィー法を用いた同時エッチングにより、室温成膜したITO、IGZOからゲート電極1およびキャパシタ電極2を形成した。ITO成膜時の投入電力は200W、ガス流量はAr=100SCCM、O2=1SCCM、成膜圧力は1.0Pa、IGZO成膜時の投入電力は200W、ガス流量はAr=100SCCM、O2=2SCCM、成膜圧力は1.0Paとした。次に、ゲート電極1およびキャパシタ電極2を形成した絶縁基板0上に、プラズマCVD装置を用いてH2プラズマ処理を行った後、SiNx(厚さ300nm)を成膜して、ゲート絶縁層3を形成した。SiNx成膜時には、原料ガスとしてSiH4=50SCCM、NH3=50SCCMを流し、投入電力300W、成膜圧力3.0Pa、基板温度は200℃とした。次に、ゲート絶縁層3を形成した絶縁基板0上に、DCマグネトロンスパッタ装置を用いてIGZO(厚さ40nm)を室温成膜し、室温成膜したIGZOからフォトリソグラフィー法を用いたエッチングにより酸化物で半導体層4を形成した。IGZO成膜時の投入電力は100W、ガス流量はAr=100SCCM、O2=2SCCM、成膜圧力は1.0Paとした。最後に、半導体層4を形成した絶縁基板0上に、DCマグネトロンスパッタ装置を用いてITO(厚さ50nm)を室温成膜し、室温成膜したITOからフォトリソグラフィー法を用いたエッチングによりソース電極5とドレイン電極6とを形成した。これにより、薄膜トランジスタを作製した。ITO成膜時の投入電力は200W、ガス流量はAr=100SCCM、O2=1SCCM、成膜圧力は1.0Paとした。ソース電極5とドレイン電極6との間の長さ(ゲート長)は20μmとした。また、ソース電極5とドレイン電極6との間の幅(ゲート幅)は5μmとした。
次に、本実施形態の薄膜トランジスタの実施例2を図面に基づき説明する。
図2は、実施例2の薄膜トランジスタの構造を表す概略断面図である。図3は、実施例2の画像表示装置の構造を表す概略断面図である。
実施例2では、図2に示すような薄膜トランジスタおよび図3に示すような画像表示装置を作製した。具体的には、コーニング社製の無アルカリガラス1737を絶縁基板0として用い、絶縁基板0上に、R(赤)の感光性樹脂をスピンコート法を用いて塗布した後、フォトリソグラフィー法を用いてパターン形成を行った。同様に、G(緑)およびB(青)の感光性樹脂をスピンコート法を用いて塗布した後、フォトリソグラフィー法を用いてパターン形成を行って、カラーフィルタ層(カラーフィルタ)20を形成した。次に、カラーフィルタ層20上に、光透過性を有する樹脂をスピンコート法を用いて塗布して、オーバーコート層21を形成した。これにより、カラーフィルタ基板を作製した。
このように、本実施形態の画像表示装置は、本実施形態の薄膜トランジスタを用いて、薄膜トランジスタのアレイを作製した。それゆえ、本実施形態の画像表示装置は、高い光透過性を有しかつ高特性を有する薄膜トランジスタのアレイを実現できる。
また、本実施形態の画像表示装置は、カラーフィルタ層20が形成されている絶縁基板0上に、薄膜トランジスタのアレイを形成するようにした。それゆえ、本実施形態の画像表示装置は、薄膜トランジスタとカラーフィルタ層20の位置合わせの工程を不要とすることができる。また、高輝度、高コントラストを有する画像表示装置を実現できる。
次に、本実施形態の薄膜トランジスタの比較例1を図面に基づき説明する。
図4は、比較例1で作製した薄膜トランジスタの模式図である。
比較例1では、図4に示すような薄膜トランジスタを作製した。具体的には、コーニング社製の無アルカリガラス1737を絶縁基板0として用い、絶縁基板0上に、DCマグネトロンスパッタ装置を用いて、ゲート電極1の第一層1aとなるITO(厚さ100nm)を室温成膜した。次に、フォトリソグラフィー法を用いた同時エッチングにより、室温成膜したITO、IGZOからゲート電極1およびキャパシタ電極2を形成した。ITO成膜時の投入電力は200W、ガス流量はAr=100SCCM、O2=1SCCM、成膜圧力は1.0Paとした。次に、ゲート電極1およびキャパシタ電極2を形成した絶縁基板0上に、プラズマCVD装置を用いてH2プラズマ処理を行った後、SiNx(厚さ300nm)を成膜して、ゲート絶縁層3を形成した。SiNx成膜時には、原料ガスとしてSiH4=50SCCM、NH3=50SCCMを流し、投入電力300W、成膜圧力3.0Pa、基板温度は150℃とした。次に、DCマグネトロンスパッタ装置を用いてIGZO(厚さ40nm)を室温成膜し、室温成膜したIGZOからフォトリソグラフィー法を用いたエッチングにより酸化物で半導体層4を形成した。IGZO成膜時の投入電力は100W、ガス流量はAr=100SCCM、O2=2SCCM、成膜圧力は1.0Paとした。最後に、DCマグネトロンスパッタ装置を用いてITO(厚さ50nm)を室温成膜し、室温成膜したITOからフォトリソグラフィー法を用いたエッチングによりソース電極5とドレイン電極6とを形成した。これにより、薄膜トランジスタを作製した。ITO成膜時の投入電力は200W、ガス流量はAr=100SCCM、O2=1SCCM、成膜圧力は1.0Paとした。ソース電極5とドレイン電極6との間の長さ(ゲート長)は20μmとした。また、ソース電極5とドレイン電極6との間の幅(ゲート幅)は5μmとした。
1 ゲート電極
1a ゲート電極の第一層
1b ゲート電極の第二層
2 キャパシタ電極
2a キャパシタ電極の第一層
2b キャパシタ電極の第二層
3 ゲート絶縁層
4 半導体層
5 ソース電極
6 ドレイン電極
7 保護層
9 画素電極
20 カラーフィルタ層
21 オーバーコート層
22 配向膜
23 画像表示用基板
24 共通電極
25 配向膜
26 液晶
27 位相差板
28 偏光板
Claims (9)
- 光透過性を有する絶縁基板上に、少なくともゲート電極、キャパシタ電極、ゲート絶縁層、半導体層、ソース電極およびドレイン電極が光透過性を有する材料で形成されている薄膜トランジスタであって、
前記ゲート電極および前記キャパシタ電極、または前記ソース電極および前記ドレイン電極が、前記絶縁基板に接する第一層と、前記ゲート絶縁層に接する第二層とから構成され、
前記第一層が、酸化インジウム錫であり、
前記第二層が、インジウム、ガリウム、および亜鉛の少なくとも一種を含む金属酸化物であることを特徴とする薄膜トランジスタ。 - 前記第二層が、前記半導体層と同材料であることを特徴とする請求項1に記載の薄膜トランジスタ。
- 前記ゲート電極および前記キャパシタ電極、または前記ソース電極および前記ドレイン電極の可視光領域における平均透過率が70%以上であることを特徴とする請求項1又は2に記載の薄膜トランジスタ。
- 前記半導体層が、インジウム、ガリウム、および亜鉛の少なくとも一種を含む金属酸化物であることを特徴とする請求項1乃至請求項3のいずれか1項に記載の薄膜トランジスタ。
- 前記ゲート絶縁層が、CVD法で形成された酸化シリコン、窒化シリコン、およびシリコンオキシナイトライドのいずれか一種を含む化合物であることを特徴とする請求項1乃至請求項4のいずれか1項に記載の薄膜トランジスタ。
- 前記薄膜トランジスタがボトムゲート型TFTであることを特徴とする請求項1乃至5のいずれか1項に記載の薄膜トランジスタ。
- 前記薄膜トランジスタがトップゲート型TFTであることを特徴とする請求項1乃至5のいずれか1項に記載の薄膜トランジスタ。
- 請求項1乃至7のいずれか1項に記載の薄膜トランジスタのアレイと、
前記薄膜トランジスタのアレイのソース電極又はドレイン電極に接続された画素電極と、
前記画素電極上に配置された画像表示媒体とを備えることを特徴とする画像表示装置。 - 前記薄膜トランジスタのアレイの絶縁基板上にカラーフィルタが形成されていることを特徴とする請求項8に記載の画像表示装置。
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CN201280052807.9A CN103975441B (zh) | 2011-09-27 | 2012-09-20 | 薄膜晶体管和图像显示装置 |
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EP3282488A4 (en) * | 2015-04-22 | 2018-05-02 | Toppan Printing Co., Ltd. | Thin-film transistor array formation substrate, image display device substrate, and thin-film transistor array formation substrate manufacturing method |
KR102106366B1 (ko) * | 2015-11-25 | 2020-05-04 | 가부시키가이샤 아루박 | 박막 트랜지스터, 산화물 반도체막 및 스퍼터링 타겟 |
CN107623040A (zh) * | 2017-09-05 | 2018-01-23 | 华南理工大学 | 一种铟镓锌氧化物薄膜晶体管及其制造方法 |
CN108363253B (zh) * | 2018-02-09 | 2020-12-22 | 京东方科技集团股份有限公司 | 阵列基板及其驱动方法和制造方法 |
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