WO2012124421A1 - Flexible multilayer substrate - Google Patents

Flexible multilayer substrate Download PDF

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Publication number
WO2012124421A1
WO2012124421A1 PCT/JP2012/053352 JP2012053352W WO2012124421A1 WO 2012124421 A1 WO2012124421 A1 WO 2012124421A1 JP 2012053352 W JP2012053352 W JP 2012053352W WO 2012124421 A1 WO2012124421 A1 WO 2012124421A1
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Prior art keywords
resin film
conductor
multilayer substrate
resin
flexible multilayer
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PCT/JP2012/053352
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French (fr)
Japanese (ja)
Inventor
酒井 範夫
喜人 大坪
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株式会社村田製作所
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Priority to JP2013504616A priority Critical patent/JP5715237B2/en
Publication of WO2012124421A1 publication Critical patent/WO2012124421A1/en

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    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4632Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating thermoplastic or uncured resin sheets comprising printed circuits without added adhesive materials between the sheets
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0393Flexible materials

Definitions

  • the present invention relates to a flexible multilayer substrate in which resin sheets made of a thermoplastic resin are laminated.
  • FIG. 4 is a cross-sectional view showing a multilayer substrate.
  • the multilayer substrate 101 has a conductive pattern 106 arranged in multiple layers on an insulating resin substrate 102 formed by laminating resin films 103.
  • the conductor pattern 106 includes a surface conductor pattern 105 as a land or bottom electrode exposed on the surface of the resin substrate 102 and an internal conductor pattern 104 disposed inside the resin substrate 102.
  • the surface conductor pattern 105 is thicker than the inner conductor pattern 104. Further, the surface roughness of the surface of the surface conductor pattern 105 in contact with the resin substrate 102 is set larger than the surface roughness of the internal conductor pattern 104.
  • the conductor pattern 106 is appropriately electrically connected by a via hole 107.
  • the surface conductor pattern 105 and the resin substrate 102 are weakly bonded. Peeling may occur between 105 and the resin substrate 102.
  • As a means for increasing the adhesion strength between the surface conductor pattern 105 exposed on the surface and the resin substrate 102 there is a method of increasing the surface roughness of the surface of the surface conductor pattern 105 in contact with the resin substrate 102.
  • the present invention increases the surface roughness of the surface contacting the resin substrate of the surface conductor pattern formed on the top and bottom surfaces of the resin substrate, and the thickness of the resin film on the outermost layer of the resin substrate is set to the inner layer. Make it thicker than the resin film.
  • the flexible multilayer substrate according to the present invention includes an insulating base material in which a plurality of resin films made of a thermoplastic resin are laminated, and an internal conductor formed along a part of the resin film in the insulating base material.
  • a flexible multilayer substrate comprising a surface conductor formed on at least one of the outermost resin films among the plurality of resin films, wherein the thickness of the resin film on which the surface conductor is formed is not the outermost layer
  • the surface roughness of the surface conductor that is thicker than the inner layer resin film and in contact with the resin film of the surface conductor is larger than the surface roughness of any surface of the inner conductor.
  • the thickness of the resin film on which the surface conductor is formed is thicker than the thickness of the inner resin film, the required distance between the surface conductor and the adjacent internal conductor is maintained even if the surface roughness of the surface conductor is increased. It is. As a result, the occurrence of short-circuit defects can be suppressed.
  • the flexible multilayer board according to the present invention is preferably characterized in that the inner conductor and the surface conductor have substantially the same thickness.
  • the adhesion strength between the surface conductor and the outermost resin film is increased.
  • the connection reliability between the flexible multilayer substrate and the mother substrate and between the flexible multilayer substrate and another component is improved.
  • the thickness of the resin film on which the surface conductor is formed is thicker than the thickness of the inner resin film, even if the surface roughness of the surface conductor is increased, the necessary distance between the surface conductor and the adjacent internal conductor is small. Kept. As a result, the occurrence of short-circuit defects can be suppressed.
  • FIG. 3 is a cross-sectional view showing a manufacturing step that follows FIG. 2. It is sectional drawing which shows the cross-sectional state of the conventional multilayer substrate.
  • the flexible multilayer substrate 1 includes an insulating base material 10, an inner conductor 4, a surface conductor 5, and a via conductor 6.
  • the insulating substrate 10 is formed by laminating a resin film 2 and a resin film 3 made of a thermoplastic resin.
  • the resin film 2 is disposed on the inner layer portion of the insulating base material 10, and the resin film 3 is disposed on the outermost layer of the insulating base material 10.
  • the thickness of the resin film 3 is larger than the thickness of the resin film 2, and the thickness of the resin film 3 exemplified in this embodiment is a film of 50 ⁇ m.
  • the thickness of the resin film 2 is 25 ⁇ m. That is, the insulating base material 10 is configured to sandwich the resin film 2 arranged in the inner layer with the resin film 3 having a thickness larger than that of the resin film 2.
  • the inner conductor 4 is a conductor formed along the resin film 2 inside the insulating base material 10.
  • the surface conductor 5 is formed on the surface and the bottom surface of the insulating substrate 10, and the surface conductor 5 formed on the surface is formed on the bottom surface as a land or the like for mounting other components such as a chip capacitor and an IC chip.
  • the surface conductor 5 is a conductor that serves as a bottom electrode or the like for surface mounting on the mother board.
  • both the land and the bottom electrode will be described as the surface conductor 5.
  • the inner conductor 4 and the surface conductor 5 have the same thickness. Here, an example having a thickness of 12 ⁇ m is illustrated.
  • the surface roughness of the surface conductor 5 in contact with the resin film 3 is larger than the surface roughness of the internal conductor 4.
  • the surface roughness was measured using a contact type surface roughness meter.
  • the surface roughness Ra and Rz are defined in JIS B 0601-2001 “Definition and display of surface roughness”, Ra is “arithmetic mean roughness”, and Rz is “maximum height”.
  • the inner conductor 4 and the surface conductor 5 are formed by processing a copper foil bonded to one side of the resin film 2 and the resin film 3.
  • the size of the surface roughness of the inner conductor 4 and the surface conductor 5 can be made different by changing the roughening plating process conditions applied to the copper foil.
  • the difference in surface roughness can be obtained by selecting a plating solution to be used when copper plating is performed after foil formation or by changing the time for immersing the copper foil in the plating solution.
  • the surface conductor 5 when the surface conductor 5 is used as a land or bottom electrode by making the surface roughness of the surface conductor 5 in contact with the resin film 3 larger than the surface roughness of the internal conductor 4, the surface conductor 5 and the resin film are used.
  • the adhesion force of 3 is increased, and the fixing strength is improved.
  • peeling between the surface conductor 5 and the resin film 3 is suppressed, and the connection reliability with the electronic component mounted on the surface conductor 5 and the mother board is improved.
  • a conductor having a large surface roughness has poor electrical characteristics.
  • the surface conductor 5 since the surface conductor 5 is used as a land or a bottom electrode, there is little need to consider the influence on the electrical characteristics.
  • the surface roughness is preferably small. Further, since the inner conductor 4 is disposed in the insulating base material 10 and the possibility of peeling from the resin film is low, it is not considered to improve the adhesive strength with the resin film by increasing the surface roughness. May be.
  • the thicknesses of the inner conductor 4 and the surface conductor 5 are substantially the same. By making the thicknesses of the inner conductor 4 and the surface conductor 5 the same, it is not necessary to prepare a plurality of materials having different thicknesses.
  • the surface conductor 5 is made thicker than the inner conductor 4 as in the prior art, a thick conductor and a thin conductor are mixed in the flexible multilayer substrate 1, and the inner conductor 4 thinner than the surface conductor 5 when the flexible multilayer substrate 1 is bent. Bending stress concentrates on As a result, disconnection or peeling may occur in the inner conductor 4 where bending stress is concentrated.
  • the thicknesses of the surface conductor 5 and the inner conductor 4 are the same in the present invention, bending stress does not concentrate on the inner conductor 4 when the flexible multilayer substrate 1 is bent, and disconnection and peeling can be suppressed.
  • the inner conductor 4 and the surface conductor 5 a process of applying a photoresist on the copper foil, exposing, developing, and etching is required.
  • the thickness of the photoresist, the exposure and development conditions, the etching conditions, and the like are different. Therefore, the thickness of the internal conductor 4 and the surface conductor 5 may be the same from the viewpoint of ease of setting process conditions. It is advantageous.
  • a resin film 2 made of LCP (liquid crystal polymer) which is a thermoplastic resin is prepared.
  • LCP liquid crystal polymer
  • PEEK polyetheretherketone
  • PEI polyetherimide
  • PPS poniphenylenesulfide
  • PI polyimide
  • the resin film 2 having a thickness of 25 ⁇ m is used.
  • copper foil is illustrated here, it can replace with other metal foil which consists of Ag, Al, SUS, Ni, Au, its alloy, etc. (FIG. 2 (a)).
  • a via hole 6a is formed by irradiating a carbon dioxide laser on the resin film side of the predetermined film of the resin film 2 (the back side of the surface having the copper foil). Thereafter, the smear (resin residue) in the via hole 6a is removed. (FIG. 2 (b)).
  • a resist 9 corresponding to a desired internal conductor pattern is formed on the copper foil 4a of the resin film 2 by general-purpose photolithography. (FIG. 2 (c)).
  • the via hole 6a is filled with a conductive paste by screen printing or the like to form the via conductor 6.
  • the conductive paste to be filled contains Cu as a main component.
  • this conductive paste is, for example, a conductive paste containing Sn—Ag alloy powder, or at least one selected from the group consisting of Bi, Cu, Ag, Zn, Sn, In, Sb and Ni. You may use the electrically conductive paste containing the alloy powder containing a metal. (FIG. 3 (f)).
  • other methods such as a means for connecting the interlayer of the resin film 2 and the interlayer of the resin films 2 and 3, other methods such as applying a conductor to the via hole 6 by plating may be used.
  • the process of forming the surface conductor 5 on the resin film 3 is the same as the process of forming the inner conductor 4 on the resin film 2 (the process diagram for forming the surface conductor 5 on the resin film is omitted).
  • the resin film 3 having a thickness of 50 ⁇ m is used.
  • a copper foil having a thickness of 12 ⁇ m is used.
  • a via conductor is also formed in the resin film 3 as necessary.
  • a predetermined number of the resin film 2 on which the internal conductor 4 is formed and the resin film 3 on which the surface conductor 5 is formed are prepared and laminated.
  • the resin film 3 is arranged so that the surface conductor 5 is arranged on the bottom surface of the insulating base material 10.
  • the resin film 2 is disposed on the resin film 3 so that the inner conductor 4 is on the bottom.
  • two resin films 2 are arranged so that the internal conductor 4 is arranged on the top.
  • the resin film 3 is disposed so that the surface conductor 5 is disposed on the upper surface of the insulating base material 10.
  • the resin film 2 and the resin film 3 are thermocompression bonded at 250 to 300 ° C. for 20 to 30 minutes.
  • the thickness of the resin film 2 and the resin film 3 after the thermocompression bonding is in a state of being contracted at substantially the same rate as that before the thermocompression bonding. (FIG. 2 (g)).
  • the resin film 3 may be the outermost layer without arranging the resin film 3 on the upper surface side of the insulating base 10. The same applies to the case where the flexible multilayer substrate 1 is not surface-mounted on the mother substrate. In this case, the resin film 3 may not be disposed on the bottom surface side of the insulating base material 10.

Abstract

Provided is a flexible multilayer substrate that suppresses peeling of surface conductors and resin film, has superior bond strength for the surface conductors and resin film, and suppresses occurrences of shorting defects. In this flexible multilayer substrate (1), peeling between the surface conductors (5) and the resin film (3) is suppressed and shorting defects are also suppressed by making the thickness of a resin film (3) of the outermost layer greater than the thickness of resin films (2) for inside layers and making the surface roughness of the surface of surface conductors (5) formed on the resin film (3) of the outermost layer and in contact with the resin film (3) be greater than the surface roughness of inside conductors (4).

Description

フレキシブル多層基板Flexible multilayer board
 本発明は、熱可塑性樹脂からなる樹脂シートが積層され構成されているフレキシブル多層基板に関する。 The present invention relates to a flexible multilayer substrate in which resin sheets made of a thermoplastic resin are laminated.
 従来のフレキシブル多層基板として、例えば特許文献1に記載の多層基板が知られている。以下に図4を参照しながら、特許文献1に記載の多層基板について説明する。図4は多層基板を示す断面図である。 As a conventional flexible multilayer substrate, for example, a multilayer substrate described in Patent Document 1 is known. The multilayer substrate described in Patent Document 1 will be described below with reference to FIG. FIG. 4 is a cross-sectional view showing a multilayer substrate.
 多層基板101は、樹脂フィルム103が積層され構成されている絶縁性の樹脂基板102に、導体パターン106が多層に配置されている。導体パターン106は、樹脂基板102の表面に露出するランドもしくは底面電極としての表面導体パターン105と、樹脂基板102の内部に配置される内部導体パターン104によって構成されている。表面導体パターン105の厚さは、内部導体パターン104の厚さより厚くなっている。また、表面導体パターン105の樹脂基板102に接する面の表面粗さは、内部導体パターン104の表面粗さより大きく設定されている。なお、導体パターン106は、ビアホール107によって適宜電気的に接続されている。 The multilayer substrate 101 has a conductive pattern 106 arranged in multiple layers on an insulating resin substrate 102 formed by laminating resin films 103. The conductor pattern 106 includes a surface conductor pattern 105 as a land or bottom electrode exposed on the surface of the resin substrate 102 and an internal conductor pattern 104 disposed inside the resin substrate 102. The surface conductor pattern 105 is thicker than the inner conductor pattern 104. Further, the surface roughness of the surface of the surface conductor pattern 105 in contact with the resin substrate 102 is set larger than the surface roughness of the internal conductor pattern 104. The conductor pattern 106 is appropriately electrically connected by a via hole 107.
特開2006-344828号公報JP 2006-344828 A
 多層基板101をマザー基板に実装する際、また多層基板101の上面の表面導体パターン105に別の部品を実装する際、表面導体パターン105と樹脂基板102間の固着強度が弱いため、表面導体パターン105と樹脂基板102の間に剥がれの生じる可能性がある。表面に露出している表面導体パターン105と樹脂基板102の固着強度を上げる手段として、表面導体パターン105の樹脂基板102に接する面の表面粗さを大きくする方法がある。 When the multilayer substrate 101 is mounted on the mother substrate or when another component is mounted on the surface conductor pattern 105 on the upper surface of the multilayer substrate 101, the surface conductor pattern 105 and the resin substrate 102 are weakly bonded. Peeling may occur between 105 and the resin substrate 102. As a means for increasing the adhesion strength between the surface conductor pattern 105 exposed on the surface and the resin substrate 102, there is a method of increasing the surface roughness of the surface of the surface conductor pattern 105 in contact with the resin substrate 102.
 一方で、携帯電話等の電気機器の小型化、薄型化に伴い、多層基板101の低背化を進めようとすると、樹脂基板102を薄くする必要がある。樹脂基板102を薄くするには、樹脂基板102を構成する樹脂フィルム103を薄くする必要がある。しかし、薄い樹脂フィルム103に形成された表面導体パターン105の表面粗さを大きくすると、表面導体パターン105と隣接する内部導体パターン104との距離が短くなるため、ショート不良を引き起こす可能性がある。 On the other hand, if it is attempted to reduce the height of the multilayer substrate 101 in accordance with the downsizing and thinning of electric devices such as mobile phones, it is necessary to make the resin substrate 102 thinner. In order to make the resin substrate 102 thinner, it is necessary to make the resin film 103 constituting the resin substrate 102 thinner. However, when the surface roughness of the surface conductor pattern 105 formed on the thin resin film 103 is increased, the distance between the surface conductor pattern 105 and the adjacent inner conductor pattern 104 is shortened, which may cause a short circuit failure.
 本発明はこれらの状況を鑑み、樹脂基板の上面及び底面に形成された表面導体パターンの樹脂基板に接する面の表面粗さを大きくするとともに、樹脂基板最外層の樹脂フィルムの厚さを内層の樹脂フィルムの厚さに比べて厚くする。その結果、表面導体パターンと樹脂基板の固着強度に優れるとともに、ショート不良の発生が抑制されたフレキシブル多層基板を提供しようとするものである。 In view of these circumstances, the present invention increases the surface roughness of the surface contacting the resin substrate of the surface conductor pattern formed on the top and bottom surfaces of the resin substrate, and the thickness of the resin film on the outermost layer of the resin substrate is set to the inner layer. Make it thicker than the resin film. As a result, it is an object of the present invention to provide a flexible multilayer substrate that is excellent in the adhesion strength between the surface conductor pattern and the resin substrate and in which the occurrence of short-circuit defects is suppressed.
 本発明に係るフレキシブル多層基板は、熱可塑性樹脂からなる複数枚の樹脂フィルムが積層されてなる絶縁基材と、前記絶縁基材中に前記樹脂フィルムの一部に沿って形成された内部導体と、前記複数の樹脂フィルムのうち、最外層の樹脂フィルムの少なくとも一方に形成された表面導体とを備えるフレキシブル多層基板であって、前記表面導体が形成された樹脂フィルムの厚みが、最外層ではない内層の樹脂フィルムの厚みより厚く、前記表面導体の樹脂フィルムと接する面の表面粗さは、前記内部導体のいずれの面の表面粗さより大きいことを特徴としている。 The flexible multilayer substrate according to the present invention includes an insulating base material in which a plurality of resin films made of a thermoplastic resin are laminated, and an internal conductor formed along a part of the resin film in the insulating base material. A flexible multilayer substrate comprising a surface conductor formed on at least one of the outermost resin films among the plurality of resin films, wherein the thickness of the resin film on which the surface conductor is formed is not the outermost layer The surface roughness of the surface conductor that is thicker than the inner layer resin film and in contact with the resin film of the surface conductor is larger than the surface roughness of any surface of the inner conductor.
 表面導体の樹脂フィルムと接する面の表面粗さが大きくなるため、表面導体と最外層の樹脂フィルム間の固着強度が上がる。その結果、フレキシブル多層基板とマザー基板間、またフレキシブル多層基板と別の部品間の接続信頼性が向上する。 Since the surface roughness of the surface of the surface conductor in contact with the resin film increases, the adhesion strength between the surface conductor and the outermost resin film increases. As a result, the connection reliability between the flexible multilayer substrate and the mother substrate and between the flexible multilayer substrate and another component is improved.
 また、表面導体が形成された樹脂フィルムの厚みが内層の樹脂フィルムの厚みより厚いため、表面導体の表面粗さを大きくしても、表面導体と隣接する内部導体間で必要な距離が保たれる。その結果、ショート不良の発生を抑制できる。 In addition, since the thickness of the resin film on which the surface conductor is formed is thicker than the thickness of the inner resin film, the required distance between the surface conductor and the adjacent internal conductor is maintained even if the surface roughness of the surface conductor is increased. It is. As a result, the occurrence of short-circuit defects can be suppressed.
 また、本発明にかかるフレキシブル多層基板は、好ましくは、前記内部導体と前記表面導体の厚みは実質的に同じであることを特徴としている。 The flexible multilayer board according to the present invention is preferably characterized in that the inner conductor and the surface conductor have substantially the same thickness.
 この場合、内部導体と表面導体の材料として、厚みの異なるものを複数種用意する必要がない。 In this case, it is not necessary to prepare multiple types of materials having different thicknesses as the material for the inner conductor and the surface conductor.
 本発明によれば、表面導体の樹脂フィルムと接する面の表面粗さが大きくなるため、表面導体と最外層の樹脂フィルム間の固着強度が上がる。その結果、フレキシブル多層基板とマザー基板間、またフレキシブル多層基板と別の部品間の接続信頼性が向上する。また、表面導体が形成された樹脂フィルムの厚みが内層の樹脂フィルムの厚みより厚いため、表面導体の表面粗さを大きくしても、表面導体と隣接する内部導体との間で必要な距離が保たれる。その結果、ショート不良の発生を抑制できる。 According to the present invention, since the surface roughness of the surface conductor in contact with the resin film is increased, the adhesion strength between the surface conductor and the outermost resin film is increased. As a result, the connection reliability between the flexible multilayer substrate and the mother substrate and between the flexible multilayer substrate and another component is improved. In addition, since the thickness of the resin film on which the surface conductor is formed is thicker than the thickness of the inner resin film, even if the surface roughness of the surface conductor is increased, the necessary distance between the surface conductor and the adjacent internal conductor is small. Kept. As a result, the occurrence of short-circuit defects can be suppressed.
本発明の実施形態に係るフレキシブル多層基板の断面図である。It is sectional drawing of the flexible multilayer substrate which concerns on embodiment of this invention. 本発明の実施形態に係るフレキシブル多層基板の製造工程を示す断面図である。It is sectional drawing which shows the manufacturing process of the flexible multilayer substrate which concerns on embodiment of this invention. 図2に続く製造工程を示す断面図である。FIG. 3 is a cross-sectional view showing a manufacturing step that follows FIG. 2. 従来の多層基板の断面状態を示す断面図である。It is sectional drawing which shows the cross-sectional state of the conventional multilayer substrate.
 以下に、本発明の実施形態に係るフレキシブル多層基板について、図1を参照して説明する。 Hereinafter, a flexible multilayer substrate according to an embodiment of the present invention will be described with reference to FIG.
 フレキシブル多層基板1は、絶縁基材10と内部導体4、表面導体5及びビア導体6を備えて構成されている。 The flexible multilayer substrate 1 includes an insulating base material 10, an inner conductor 4, a surface conductor 5, and a via conductor 6.
 絶縁基材10は、熱可塑性樹脂からなる樹脂フィルム2と樹脂フィルム3が積層され構成されている。樹脂フィルム2は、絶縁基材10の内層部分に配置され、樹脂フィルム3は、絶縁基材10の最外層に配置されている。樹脂フィルム3の厚みは、樹脂フィルム2の厚みより大きく、この実施例で例示する樹脂フィルム3の厚みは50μmのフィルムである。一方、樹脂フィルム2の厚みは25μmである。つまり、絶縁基材10は、内層に配置されている樹脂フィルム2を、樹脂フィルム2より厚みの大きい樹脂フィルム3で挟み込むように構成されている。 The insulating substrate 10 is formed by laminating a resin film 2 and a resin film 3 made of a thermoplastic resin. The resin film 2 is disposed on the inner layer portion of the insulating base material 10, and the resin film 3 is disposed on the outermost layer of the insulating base material 10. The thickness of the resin film 3 is larger than the thickness of the resin film 2, and the thickness of the resin film 3 exemplified in this embodiment is a film of 50 μm. On the other hand, the thickness of the resin film 2 is 25 μm. That is, the insulating base material 10 is configured to sandwich the resin film 2 arranged in the inner layer with the resin film 3 having a thickness larger than that of the resin film 2.
 内部導体4は、絶縁基材10の内部に樹脂フィルム2に沿って形成されている導体である。表面導体5は、絶縁基材10の表面及び底面に形成されており、表面に形成された表面導体5はチップコンデンサやICチップ等の他の部品を実装するためのランド等として、底面に形成された表面導体5はマザー基板に面実装するための底面電極等としての役割を果たす導体である。ここではランドと底面電極共に表面導体5として説明する。なお、内部導体4と表面導体5の厚みは同じである。ここでは、厚み12μmのものを例示する。 The inner conductor 4 is a conductor formed along the resin film 2 inside the insulating base material 10. The surface conductor 5 is formed on the surface and the bottom surface of the insulating substrate 10, and the surface conductor 5 formed on the surface is formed on the bottom surface as a land or the like for mounting other components such as a chip capacitor and an IC chip. The surface conductor 5 is a conductor that serves as a bottom electrode or the like for surface mounting on the mother board. Here, both the land and the bottom electrode will be described as the surface conductor 5. The inner conductor 4 and the surface conductor 5 have the same thickness. Here, an example having a thickness of 12 μm is illustrated.
 表面導体5の樹脂フィルム3と接する面の表面粗さは、内部導体4の表面粗さよりも大きくなっている。ここでは、表面導体5の表面粗さをRa=3μm、Rz=15μm、内部導体4の表面粗さをRa=1μm、Rz=5μmのものを例示する。なお、表面粗さは接触式表面粗さ計を用いて測定した。表面粗さRa、Rzとは、JIS B 0601-2001『表面粗さの定義と表示』に規定されたものであり、Raは「算術平均粗さ」、Rzは「最大高さ」である。 The surface roughness of the surface conductor 5 in contact with the resin film 3 is larger than the surface roughness of the internal conductor 4. Here, the surface conductor 5 has a surface roughness Ra = 3 μm and Rz = 15 μm, and the inner conductor 4 has a surface roughness Ra = 1 μm and Rz = 5 μm. The surface roughness was measured using a contact type surface roughness meter. The surface roughness Ra and Rz are defined in JIS B 0601-2001 “Definition and display of surface roughness”, Ra is “arithmetic mean roughness”, and Rz is “maximum height”.
 内部導体4と表面導体5は、樹脂フィルム2および樹脂フィルム3の片面に貼り合わされた銅箔を加工して形成される。内部導体4と表面導体5の表面粗さの大きさは、この銅箔に施す粗化めっきの工程条件を変えることで違いを出すことができる。例えば、製箔後に銅めっきを施す際に使用するめっき液の選定や、銅箔をめっき液に浸漬する時間を変えることで表面粗さの違いを出すことができる。 The inner conductor 4 and the surface conductor 5 are formed by processing a copper foil bonded to one side of the resin film 2 and the resin film 3. The size of the surface roughness of the inner conductor 4 and the surface conductor 5 can be made different by changing the roughening plating process conditions applied to the copper foil. For example, the difference in surface roughness can be obtained by selecting a plating solution to be used when copper plating is performed after foil formation or by changing the time for immersing the copper foil in the plating solution.
 前述の通り、表面導体5の樹脂フィルム3と接する面の表面粗さを内部導体4の表面粗さより大きくすることで、表面導体5をランドや底面電極として使用する際、表面導体5と樹脂フィルム3の密着力が上がり、固着強度が向上する。その結果、表面導体5と樹脂フィルム3の間の剥がれが抑制され、表面導体5に実装された電子部品や、マザー基板との接続信頼性が向上する。表面粗さの大きい導体は電気特性が悪くなるが、表面導体5はランドや底面電極として使用するため、電気特性への影響をあまり考慮しなくてもよい。一方、内部導体4は良好な電気特性を求められることから、表面粗さは小さい方がよい。また、内部導体4は絶縁基材10の中に配置されており、樹脂フィルムとの剥離の可能性が低いことから、表面粗さを大きくすることによる樹脂フィルムとの接着強度向上を考慮しなくてもよい。 As described above, when the surface conductor 5 is used as a land or bottom electrode by making the surface roughness of the surface conductor 5 in contact with the resin film 3 larger than the surface roughness of the internal conductor 4, the surface conductor 5 and the resin film are used. The adhesion force of 3 is increased, and the fixing strength is improved. As a result, peeling between the surface conductor 5 and the resin film 3 is suppressed, and the connection reliability with the electronic component mounted on the surface conductor 5 and the mother board is improved. A conductor having a large surface roughness has poor electrical characteristics. However, since the surface conductor 5 is used as a land or a bottom electrode, there is little need to consider the influence on the electrical characteristics. On the other hand, since the internal conductor 4 is required to have good electrical characteristics, the surface roughness is preferably small. Further, since the inner conductor 4 is disposed in the insulating base material 10 and the possibility of peeling from the resin film is low, it is not considered to improve the adhesive strength with the resin film by increasing the surface roughness. May be.
 しかし、表面導体5の表面粗さを大きくすると、樹脂フィルム3が薄い場合、表面導体5と隣接する内部導体4との距離が短くなり、ショート不良を引き起こす可能性がある。
そこで、樹脂フィルム3の厚みを樹脂フィルム2の厚みより大きくすることで、樹脂フィルム3に形成された表面導体5と隣接する内部導体4との間に必要な距離が保たれる。その結果、ショート不良の発生を抑制することができる。
However, when the surface roughness of the surface conductor 5 is increased, when the resin film 3 is thin, the distance between the surface conductor 5 and the adjacent internal conductor 4 is shortened, which may cause a short circuit failure.
Therefore, by making the thickness of the resin film 3 larger than the thickness of the resin film 2, a necessary distance is maintained between the surface conductor 5 formed on the resin film 3 and the adjacent inner conductor 4. As a result, occurrence of a short circuit can be suppressed.
 前述の通り、内部導体4と表面導体5の厚みは実質的に同じである。内部導体4と表面導体5の厚みを同じにすることで、厚みの異なる材料を複数種用意する必要がなくなる。 As described above, the thicknesses of the inner conductor 4 and the surface conductor 5 are substantially the same. By making the thicknesses of the inner conductor 4 and the surface conductor 5 the same, it is not necessary to prepare a plurality of materials having different thicknesses.
 また、従来のように表面導体5を内部導体4より厚くすると、フレキシブル多層基板1に厚い導体と薄い導体が混在することになり、フレキシブル多層基板1を折り曲げる際、表面導体5より薄い内部導体4に曲げ応力が集中する。その結果、曲げ応力の集中した内部導体4に断線や剥がれの生じる可能性がある。しかし、本発明では表面導体5と内部導体4の厚みを同じにしているため、フレキシブル多層基板1を折り曲げる際、内部導体4に曲げ応力が集中せず、断線や剥がれを抑制することができる。 Further, when the surface conductor 5 is made thicker than the inner conductor 4 as in the prior art, a thick conductor and a thin conductor are mixed in the flexible multilayer substrate 1, and the inner conductor 4 thinner than the surface conductor 5 when the flexible multilayer substrate 1 is bent. Bending stress concentrates on As a result, disconnection or peeling may occur in the inner conductor 4 where bending stress is concentrated. However, since the thicknesses of the surface conductor 5 and the inner conductor 4 are the same in the present invention, bending stress does not concentrate on the inner conductor 4 when the flexible multilayer substrate 1 is bent, and disconnection and peeling can be suppressed.
 また、内部導体4、表面導体5を形成するには、銅箔上にフォトレジスト塗布し、露光、現像、エッチングという工程が必要になる。銅箔厚みが異なると、フォトレジストの厚み、露光や現像の条件、エッチングの条件等が異なるため、工程条件設定の容易性からも、内部導体4、表面導体5の厚みは同じであることが有利である。 Further, in order to form the inner conductor 4 and the surface conductor 5, a process of applying a photoresist on the copper foil, exposing, developing, and etching is required. When the copper foil thickness is different, the thickness of the photoresist, the exposure and development conditions, the etching conditions, and the like are different. Therefore, the thickness of the internal conductor 4 and the surface conductor 5 may be the same from the viewpoint of ease of setting process conditions. It is advantageous.
 次に、本発明の実施形態に係るフレキシブル多層基板の製造方法について、図2及び図3を参照して説明する。 Next, a method for manufacturing a flexible multilayer substrate according to an embodiment of the present invention will be described with reference to FIGS.
 まず、熱可塑性樹脂であるLCP(液晶ポリマー)からなる樹脂フィルム2を用意する。樹脂フィルム2の構成材料としては、LCPの他にPEEK(ポリエーテルエーテルケトン)、PEI(ポリエーテルイミド)、PPS(ポニフェニレンスルファイド)、PI(ポリイミド)等が用いられる。この実施形態では、樹脂フィルム2は厚み25μmのものを用いる。この樹脂フィルム2は、片面に厚さ12μmの銅箔を有している。この銅箔の表面粗さは、Ra=1μm、Rz=5μmである。なお、ここでは銅箔を例示しているが、Ag、Al、SUS、Ni、Auやその合金等からなる他の金属箔に置き換えることが可能である。(図2(a))。 First, a resin film 2 made of LCP (liquid crystal polymer) which is a thermoplastic resin is prepared. As a constituent material of the resin film 2, PEEK (polyetheretherketone), PEI (polyetherimide), PPS (poniphenylenesulfide), PI (polyimide) and the like are used in addition to LCP. In this embodiment, the resin film 2 having a thickness of 25 μm is used. This resin film 2 has a copper foil with a thickness of 12 μm on one side. The surface roughness of this copper foil is Ra = 1 μm and Rz = 5 μm. In addition, although copper foil is illustrated here, it can replace with other metal foil which consists of Ag, Al, SUS, Ni, Au, its alloy, etc. (FIG. 2 (a)).
 次に、樹脂フィルム2のうち所定のフィルムの樹脂フィルム側(銅箔を有する面の裏面側)に炭酸ガスレーザーを照射してビア用の孔6aを形成する。その後、ビア用の孔6aのスミア(樹脂残渣)を除去する。(図2(b))。 Next, a via hole 6a is formed by irradiating a carbon dioxide laser on the resin film side of the predetermined film of the resin film 2 (the back side of the surface having the copper foil). Thereafter, the smear (resin residue) in the via hole 6a is removed. (FIG. 2 (b)).
 次に、樹脂フィルム2の銅箔4aの上に汎用のフォトリソグラフィーで所望の内部導体パターンに対応するレジスト9を形成する。(図2(c))。 Next, a resist 9 corresponding to a desired internal conductor pattern is formed on the copper foil 4a of the resin film 2 by general-purpose photolithography. (FIG. 2 (c)).
 次に、銅箔4aのうちレジスト9で被膜されていない部分をエッチングする。その後、レジスト9を除去して内部導体4を形成する。(図2(d))、(図2(e))。 Next, the portion of the copper foil 4a that is not coated with the resist 9 is etched. Thereafter, the resist 9 is removed to form the inner conductor 4. (FIG. 2D), (FIG. 2E).
 次に、ビア用の孔6aに、スクリーン印刷等により導電性ペーストを充填し、ビア導体6を形成する。充填する導電性ペーストはCuを主成分とする。この導電性ペーストは、Cu以外には例えばSn-Ag合金粉末を含む導電性ペーストや、Biを主成分としCu、Ag、Zn、Sn、In、Sb及びNiからなる群より選ばれる少なくとも一種の金属を含む合金粉末を含む導電性ペーストを使用しても構わない。(図3(f))。また、樹脂フィルム2の層間および樹脂フィルム2,3の層間を接続する手段は、めっきによりビア用の孔6に導体を付与するなどの他の方法を用いても構わない。 Next, the via hole 6a is filled with a conductive paste by screen printing or the like to form the via conductor 6. The conductive paste to be filled contains Cu as a main component. In addition to Cu, this conductive paste is, for example, a conductive paste containing Sn—Ag alloy powder, or at least one selected from the group consisting of Bi, Cu, Ag, Zn, Sn, In, Sb and Ni. You may use the electrically conductive paste containing the alloy powder containing a metal. (FIG. 3 (f)). Further, as a means for connecting the interlayer of the resin film 2 and the interlayer of the resin films 2 and 3, other methods such as applying a conductor to the via hole 6 by plating may be used.
 樹脂フィルム3に表面導体5を形成する工程は、樹脂フィルム2に内部導体4を形成する工程と同じである(樹脂フィルムに表面導体5を形成する際の工程図は省略する。)。なお、この実施形態では、樹脂フィルム3は50μmの厚みのものを用いる。また、銅箔は12μmの厚みのものを用いる。銅箔の表面粗さはRa=3μm、Rz=15μmである。また、樹脂フィルム3にも必要に応じてビア導体を形成する。 The process of forming the surface conductor 5 on the resin film 3 is the same as the process of forming the inner conductor 4 on the resin film 2 (the process diagram for forming the surface conductor 5 on the resin film is omitted). In this embodiment, the resin film 3 having a thickness of 50 μm is used. Further, a copper foil having a thickness of 12 μm is used. The surface roughness of the copper foil is Ra = 3 μm and Rz = 15 μm. Further, a via conductor is also formed in the resin film 3 as necessary.
 次に、内部導体4が形成された樹脂フィルム2と、表面導体5が形成された樹脂フィルム3を所定枚数用意し、積層する。本実施形態では、まず、絶縁基材10の底面に表面導体5が配置されるよう、樹脂フィルム3を配置する。次に、樹脂フィルム3の上に、内部導体4が下になるよう樹脂フィルム2を配置する。その上に、内部導体4が上に配置されるよう、樹脂フィルム2を2枚配置する。次に、表面導体5が絶縁基材10の上面に配置されるよう、樹脂フィルム3を配置する。その後、樹脂フィルム2及び樹脂フィルム3を、250~300℃で20~30分熱圧着する。熱圧着後の樹脂フィルム2及び樹脂フィルム3の厚みは、熱圧着前とほぼ同じ割合で縮んだ状態である。(図2(g))。 Next, a predetermined number of the resin film 2 on which the internal conductor 4 is formed and the resin film 3 on which the surface conductor 5 is formed are prepared and laminated. In the present embodiment, first, the resin film 3 is arranged so that the surface conductor 5 is arranged on the bottom surface of the insulating base material 10. Next, the resin film 2 is disposed on the resin film 3 so that the inner conductor 4 is on the bottom. On top of that, two resin films 2 are arranged so that the internal conductor 4 is arranged on the top. Next, the resin film 3 is disposed so that the surface conductor 5 is disposed on the upper surface of the insulating base material 10. Thereafter, the resin film 2 and the resin film 3 are thermocompression bonded at 250 to 300 ° C. for 20 to 30 minutes. The thickness of the resin film 2 and the resin film 3 after the thermocompression bonding is in a state of being contracted at substantially the same rate as that before the thermocompression bonding. (FIG. 2 (g)).
 次に、チップコンデンサ7をチップコンデンサ7の外部電極が表面導体5に少なくとも一部が重なるように配置したのち、はんだ8にて実装する。(図2(h))。 Next, after the chip capacitor 7 is disposed so that the external electrode of the chip capacitor 7 at least partially overlaps the surface conductor 5, the chip capacitor 7 is mounted with the solder 8. (FIG. 2 (h)).
 なお、この実施形態では、樹脂フィルム2を3枚積層するものであったが、樹脂フィルム2の枚数を適宜変更することが可能である。また、フレキシブル多層基板1の上に他の部品を実装する必要がなければ、絶縁基材10の上面側に樹脂フィルム3を配置せず、樹脂フィルム2が最外層となっても構わない。フレキシブル多層基板1をマザー基板に面実装しない場合も同様で、この場合は絶縁基材10の底面側に樹脂フィルム3を配置しなくてもよい。 In this embodiment, three resin films 2 are laminated. However, the number of resin films 2 can be changed as appropriate. Moreover, if it is not necessary to mount other components on the flexible multilayer substrate 1, the resin film 3 may be the outermost layer without arranging the resin film 3 on the upper surface side of the insulating base 10. The same applies to the case where the flexible multilayer substrate 1 is not surface-mounted on the mother substrate. In this case, the resin film 3 may not be disposed on the bottom surface side of the insulating base material 10.
 1:フレキシブル多層基板
 2:樹脂フィルム
 3:樹脂フィルム
 4:内部導体
 4a:銅箔
 5:表面導体
 6:ビア導体
 6a:ビア用の孔
 7:チップコンデンサ
 8:はんだ
 9:レジスト
 10:絶縁基材
 101:多層基板
 102:樹脂基板
 103:樹脂フィルム
 104:内部導体パターン
 105:表面導体パターン
 106:導体パターン
 107:ビアホール(ビア導体)
1: Flexible multilayer substrate 2: Resin film 3: Resin film 4: Internal conductor 4a: Copper foil 5: Surface conductor 6: Via conductor 6a: Hole for via 7: Chip capacitor 8: Solder 9: Resist 10: Insulating substrate 101: Multilayer substrate 102: Resin substrate 103: Resin film 104: Internal conductor pattern 105: Surface conductor pattern 106: Conductor pattern 107: Via hole (via conductor)

Claims (3)

  1.  熱可塑性樹脂からなる複数枚の樹脂フィルムが積層されてなる絶縁基材と、
     前記絶縁基材中に前記樹脂フィルムの一部に沿って形成された内部導体と、
     前記複数の樹脂フィルムのうち、最外層の樹脂フィルムの少なくとも一方に形成された表面導体と、
     を備えるフレキシブル多層基板であって、
     前記表面導体が形成された樹脂フィルムの厚みが、最外層ではない内層の樹脂フィルムの厚みより厚く、
     前記表面導体の樹脂フィルムと接する面の表面粗さは、前記内部導体のいずれの面の表面粗さより大きい、フレキシブル多層基板。
    An insulating base material in which a plurality of resin films made of thermoplastic resin are laminated;
    An inner conductor formed along a part of the resin film in the insulating substrate;
    Among the plurality of resin films, a surface conductor formed on at least one of the outermost resin films,
    A flexible multilayer substrate comprising:
    The thickness of the resin film on which the surface conductor is formed is thicker than the thickness of the inner layer resin film that is not the outermost layer,
    The flexible multilayer substrate, wherein the surface roughness of the surface conductor in contact with the resin film is larger than the surface roughness of any surface of the inner conductor.
  2.  前記内部導体と前記表面導体の厚みは実質的に同じである、請求項1に記載のフレキシブル多層基板。 The flexible multilayer substrate according to claim 1, wherein the inner conductor and the surface conductor have substantially the same thickness.
  3.  前記内部導体および前記表面導体は金属箔からなる、
     請求項1または請求項2に記載のフレキシブル多層基板。
    The inner conductor and the surface conductor are made of metal foil,
    The flexible multilayer substrate according to claim 1 or 2.
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Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015046498A (en) * 2013-08-28 2015-03-12 株式会社デンソー Multilayer printed board and method of manufacturing the same
US9936575B2 (en) 2014-02-07 2018-04-03 Murata Manufacturing Co., Ltd. Resin multilayer substrate and component module
US11212913B2 (en) 2015-09-10 2021-12-28 Murata Manufacturing Co., Ltd. Manufacturing method of printed board
JPWO2021261416A1 (en) * 2020-06-24 2021-12-30
US11523521B2 (en) 2016-08-18 2022-12-06 Murata Manufacturing Co., Ltd. Multilayer board and method of manufacturing the same

Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001284806A (en) * 2000-03-30 2001-10-12 Nitto Denko Corp Multilayer wiring board
JP2003332751A (en) * 2002-05-13 2003-11-21 Asahi Kasei Corp Multilayer circuit board and board therefor
JP2004311627A (en) * 2003-04-04 2004-11-04 Denso Corp Multilayer circuit board and its manufacturing method
JP2005136145A (en) * 2003-10-30 2005-05-26 Kyocera Corp Wiring board
JP2006093286A (en) * 2004-09-22 2006-04-06 Sanyo Electric Co Ltd Process for manufacturing multilayer ceramic electronic component
JP2007012654A (en) * 2005-06-28 2007-01-18 Sanyo Electric Co Ltd Method of manufacturing laminated ceramic electronic component
JP2008305944A (en) * 2007-06-07 2008-12-18 Denso Corp Ceramic laminating wiring substrate
JP2009055059A (en) * 2008-10-27 2009-03-12 Ibiden Co Ltd Multi-layer printed wiring board having filled via structure
JP2009111358A (en) * 2007-10-12 2009-05-21 Shinko Electric Ind Co Ltd Wiring board

Patent Citations (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001284806A (en) * 2000-03-30 2001-10-12 Nitto Denko Corp Multilayer wiring board
JP2003332751A (en) * 2002-05-13 2003-11-21 Asahi Kasei Corp Multilayer circuit board and board therefor
JP2004311627A (en) * 2003-04-04 2004-11-04 Denso Corp Multilayer circuit board and its manufacturing method
JP2005136145A (en) * 2003-10-30 2005-05-26 Kyocera Corp Wiring board
JP2006093286A (en) * 2004-09-22 2006-04-06 Sanyo Electric Co Ltd Process for manufacturing multilayer ceramic electronic component
JP2007012654A (en) * 2005-06-28 2007-01-18 Sanyo Electric Co Ltd Method of manufacturing laminated ceramic electronic component
JP2008305944A (en) * 2007-06-07 2008-12-18 Denso Corp Ceramic laminating wiring substrate
JP2009111358A (en) * 2007-10-12 2009-05-21 Shinko Electric Ind Co Ltd Wiring board
JP2009055059A (en) * 2008-10-27 2009-03-12 Ibiden Co Ltd Multi-layer printed wiring board having filled via structure

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015046498A (en) * 2013-08-28 2015-03-12 株式会社デンソー Multilayer printed board and method of manufacturing the same
US9936575B2 (en) 2014-02-07 2018-04-03 Murata Manufacturing Co., Ltd. Resin multilayer substrate and component module
US11212913B2 (en) 2015-09-10 2021-12-28 Murata Manufacturing Co., Ltd. Manufacturing method of printed board
US11523521B2 (en) 2016-08-18 2022-12-06 Murata Manufacturing Co., Ltd. Multilayer board and method of manufacturing the same
JPWO2021261416A1 (en) * 2020-06-24 2021-12-30
WO2021261416A1 (en) * 2020-06-24 2021-12-30 株式会社村田製作所 Multilayer resin substrate and method for producing same
JP7315102B2 (en) 2020-06-24 2023-07-26 株式会社村田製作所 Resin multilayer substrate

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