JP2012174710A - Multilayer wiring board and manufacturing method thereof - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a multilayer wiring board capable of preventing the occurrence of distortion.SOLUTION: The multilayer wiring board includes: first wirings 1 and 1a provided on one principal surface of a first isolation layer 2; a second wiring 10 provided on one principal surface of a second isolation layer 12; a via insulator 16 provided so as to penetrate through an adhesion layer 14 provided between the one principal surface of the first isolation layer 1 and another principal surface of the second isolation layer 12 and the second isolation layer 12, and provided between the first and second wirings 1a and 10; and a via conductor 18 provided so as to penetrate through the adhesion layer 14 and second isolation layer 12 and electrically connecting the first and second wirings 1 and 10. The via insulator 16 and the via conductor 18 have greater young's modulus than that of the adhesion layer 14.

Description

  The present invention relates to a multilayer wiring board having improved electrical connection reliability between a mounted component and a multilayer wiring board, and a method for manufacturing the multilayer wiring board.

  2. Description of the Related Art In portable electronic devices and flat display (FPD) that is required to be thin, semiconductor chips and parts are being downsized and terminals have a narrow pitch. At the same time, information-related equipment is required to reduce the distance between wirings that connect components in response to the widening of signal frequencies. For this reason, the multilayered printed wiring board (PCB) for achieving high density and high performance is indispensable.

  There has been proposed a method of manufacturing a multilayer wiring board by batch pressing using an adhesive having fluidity (see Patent Document 1). In the manufacturing method described in Patent Document 1, the surface may be distorted by the presence or absence of a relatively hard portion such as an electrode portion. When a component such as a semiconductor element is mounted on the mounting surface of the multilayer wiring board having such distortion by flip chip bonding, the shape of the solder bump becomes defective. As a result, it becomes difficult to mount the component on the multilayer wiring board with high connection reliability.

  As a method for solving the problems caused by the distortion of the multilayer wiring board surface, a method of polishing and flattening both sides of the multilayer wiring board (see Patent Document 2), or after applying a solder resist to the place where the distortion has occurred, There has been proposed a method of filling a conductive paste in an opening formed so that a connection portion of wiring is exposed by a laser or the like (see Patent Document 3).

JP-A-6-268345 Japanese Patent Laid-Open No. 6-13755 JP 2008-4870 A

  However, in the method of polishing and flattening the multilayer wiring board, the conductor pattern of the wiring including the connection portion formed on the surface of the multilayer wiring board is also polished. For this reason, there exists a possibility of causing the malfunction that a conductor pattern thins and circuit resistance increases. Further, there arises a problem that a strain larger than the thickness of the conductor pattern cannot be eliminated.

  In the method of eliminating the distortion using the solder resist, there is a problem that the distortion larger than the thickness of the solder resist cannot be eliminated.

  In view of the above problems, an object of the present invention is to provide a multilayer wiring board capable of preventing the occurrence of distortion and a method for manufacturing the multilayer wiring board.

    According to the first aspect of the present invention, the first wiring arranged on one main surface of the first insulating layer, the second wiring arranged on one main surface of the second insulating layer, and the first insulating layer An adhesive layer disposed between one main surface and the other main surface of the second insulating layer, and a via insulator disposed through the second insulating layer and disposed between the first and second wirings; A via conductor provided through the adhesive layer and the second insulating layer and electrically connecting the first and second wirings, wherein the via insulator and the via conductor have a Young's modulus greater than that of the adhesive layer. A multilayer wiring board is provided.

  According to the second aspect of the present invention, the step of forming the first wiring on the one main surface of the first insulating layer, the step of forming the second wiring on the one main surface of the second insulating layer, and the second insulation In the position corresponding to the first wiring that is electrically insulated from the second wiring in the first wiring, a part of the second wiring is laminated on the other main surface of the layer. Forming a dummy via hole penetrating the mask film, the adhesive layer and the second insulating layer so as to be exposed; filling the dummy via hole with an insulating paste containing an insulating filler having a Young's modulus greater than that of the adhesive layer; In the first wiring, the mask film, the adhesive layer, and the second insulating layer are penetrated so that a part of the second wiring is exposed at a position corresponding to the first wiring electrically connected to the second wiring. Process for forming via hole and gold in via hole Filling the conductive paste containing, removing the mask film, bringing the insulating paste and the conductive paste into contact with the corresponding first wiring, and pressing the adhesive layer against the first insulating layer By heating while heating, the adhesive layer and the first insulating layer are bonded, the conductive paste is cured to form a via conductor that electrically connects the first and second wirings, and the insulating paste is cured. And a step of forming a via insulator between the first and second wirings.

  ADVANTAGE OF THE INVENTION According to this invention, it becomes possible to provide the manufacturing method of the multilayer wiring board which can prevent generation | occurrence | production of distortion, and a multilayer wiring board.

It is sectional drawing which shows an example of the multilayer wiring board which concerns on embodiment of this invention. It is process sectional drawing (the 1) which shows an example of the manufacturing method of the multilayer wiring board which concerns on embodiment of this invention. It is process sectional drawing (the 2) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 3) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 4) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 5) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 6) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 7) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 8) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is process sectional drawing (the 9) which shows an example of the manufacturing method of the multilayer wiring board which concerns on Embodiment 1 of this invention. It is sectional drawing which shows the other example of the multilayer wiring board which concerns on embodiment of this invention. It is sectional drawing which shows the other example of the multilayer wiring board which concerns on embodiment of this invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the following description of the drawings, the same or similar parts are denoted by the same or similar reference numerals. However, it should be noted that the drawings are schematic, and the relationship between the thickness and the planar dimensions, the ratio of the thickness of each layer, and the like are different from the actual ones. Therefore, specific thicknesses and dimensions should be determined in consideration of the following description. Moreover, it is a matter of course that portions having different dimensional relationships and ratios are included between the drawings.

  The following embodiments of the present invention exemplify apparatuses and methods for embodying the technical idea of the present invention. The technical idea of the present invention is based on the material and shape of component parts. The structure, arrangement, etc. are not specified below. The technical idea of the present invention can be variously modified within the technical scope described in the claims.

  As shown in FIG. 1, the multilayer wiring board according to the embodiment of the present invention includes a first wiring 1, 1a, a first insulating layer 2, a second wiring 10, a second insulating layer 12, an adhesive layer 14, and via insulation. The body 16 and the via conductor 18 are provided. The first wirings 1 and 1 a are disposed on one main surface of the first insulating layer 2. The second wiring 10 is disposed on one main surface of the second insulating layer 12. The adhesive layer 14 is disposed between one main surface of the first insulating layer 2 and the other main surface of the second insulating layer 12. The via insulator 16 and the via conductor 18 are provided through the adhesive layer 14 and the second insulating layer 12.

  The via insulator 16 is disposed between the second wiring 10 and the first wiring 1 a that is electrically insulated from the second wiring 10. The via conductor 18 is disposed between the second wiring 10 and the first wiring 1 that is electrically connected to the second wiring 10.

  The pitch between the first wirings 1 is 0.35 mm to 0.45 mm. The portion where the via conductor 18 of the second wiring 10 is disposed is an electrode portion such as a land having a diameter of about 250 μm provided in the wiring.

  As the first and second wirings 1 and 10, a low resistance metal film such as copper is used. As the first and second insulating layers 2 and 12, resin films having a thickness of 30 μm or less such as polyimide and liquid crystal polymer are used. As the adhesive layer 14, an epoxy-based thermosetting resin film, a thermoplastic adhesive such as thermoplastic polyimide, or a fluid resin such as varnish is used.

  As the via insulator 16, an insulating member obtained by thermally curing an insulating paste or the like containing an insulating filler having an elastic coefficient larger than that of the adhesive layer 14 is used. As the insulating paste, a paste in which a granular insulating filler such as alumina or aluminum borate and an epoxy resin are mixed is used. The insulating filler may include a granular acrylic resin or the like.

  As the via conductor 18, a conductive member obtained by thermosetting a conductive paste or the like is used. As the conductive paste, a conductive paste containing a low-resistance metal filler such as silver, gold, copper, tin, or nickel is used.

  In the conventional multilayer wiring board, no via is arranged between the first wiring 1a and the second wiring 10 which are not electrically connected as shown in FIG. A via conductor 18 is disposed between the first wiring 1 and the second wiring 10 that are electrically connected. Since the via conductor 18 contains a metal filler, the elastic modulus is larger than that of the adhesive layer 14 made of resin having fluidity. For example, the Young's modulus of the via conductor 18 is about 10 GPa to about 100 GPa, whereas the Young's modulus of the adhesive layer 14 is smaller than 1 GPa. In such a case, when the via conductor 18 is formed by thermosetting the conductive paste, the flatness of the surface is maintained by the via conductor 18 in the vicinity of the first wiring 1. On the other hand, since the adhesive layer 14 flows above the first wiring 1a, a dent due to distortion occurs in the vicinity of the second wiring 10 located above the first wiring 1a. For this reason, when the circuit component is flip-chip mounted, the solder bump connected to the second wiring 10 above the first wiring 1a has a defective shape, and mounting with high connection reliability becomes difficult.

  On the other hand, in the multilayer wiring board according to the embodiment, as shown in FIG. 1, the via insulator 16 is disposed between the first wiring 1 a and the second wiring 10 that are not electrically connected. The via insulator 16 includes an insulating filler such as alumina or aluminum borate. Therefore, the elastic modulus of the via insulator 16 is larger than that of the adhesive layer 14. As a result, it is possible to suppress distortion that occurs when the conductive paste is thermally cured.

  In order to suppress the distortion on the surface of the multilayer wiring board, the elastic modulus of the via insulator 16 is desirably as large as that of the via conductor 18. That is, if the elastic modulus of the via insulator 16 is smaller than that of the via conductor 18, a dent is generated on the surface in the vicinity of the via insulator 16. The Young's modulus of the via insulator 16 is desirably in the range of 0.1 to 10 times the Young's modulus of the via conductor 18. By setting the Young's modulus of the via insulator 16 within a range of 0.1 to 10 times the Young's modulus of the via conductor 18, the flatness of the surface in the vicinity of the via insulator 16 is an allowable range of 0.2%. Held in. For example, by using an insulating paste of 90 wt% alumina and 10 wt% resin, the via insulator 16 in the above range can be obtained.

  As described above, according to the embodiment, by disposing the via insulator 16 at a location where the via conductor 18 is not disposed, it is possible to prevent distortion generated on the surface of the multilayer wiring board. As a result, the flatness of the multilayer wiring board surface can be maintained, and the connection reliability of the circuit components to be mounted can be improved.

  The manufacturing method of the multilayer wiring board which concerns on embodiment is demonstrated with reference to FIGS. As a starting material, a copper clad laminate (CCL) in which a copper foil is bonded to the surfaces of the first and second insulating layers 2 and 12 made of a polyimide film having a thickness of about 20 μm to 30 μm is used.

  As shown in FIG. 2, first wirings 1, 1 a are formed on one main surface of the first insulating layer 2. For example, a resist pattern is formed on the surface of a copper foil bonded to the first insulating layer 2. Using the resist pattern as a mask, the copper foil is selectively removed by wet etching or the like. The resist pattern is removed to form the first wirings 1 and 1a.

  As shown in FIG. 3, the second wiring 10 is formed on one main surface of the second insulating layer 12. For example, a resist pattern is formed on the surface of the copper foil bonded to the second insulating layer 12. Using the resist pattern as a mask, the copper foil is selectively removed by wet etching or the like. The resist pattern is removed, and the second wiring 10 is formed.

  As shown in FIG. 4, the adhesive layer 14 and the mask film 15 are laminated on the other main surface of the second insulating layer 12 by thermal lamination at about 100 ° C. for about 30 seconds. The adhesive layer 14 is, for example, a thermosetting resin film having a fluidity with a thickness of about 25 μm. The mask film 15 is for conductive paste printing, and is, for example, a polyimide film having a thickness of about 25 μm.

  As shown in FIG. 5, dummy via holes 56 penetrating the mask film 15, the adhesive layer 14, and the second insulating layer 12 are exposed at a predetermined position by a YAG laser or the like so that a part of the second wiring 10 is exposed. Form. The dummy via hole 56 is formed at a position corresponding to the first wiring 1 a that is electrically insulated from the second wiring 10.

  As shown in FIG. 6, an insulating paste 66 is printed and filled in the dummy via hole 56 by screen printing or the like. For example, the insulating paste 66 is a paste in which an insulating filler such as alumina and an epoxy resin are mixed at 90 wt% / 10 wt%.

  As shown in FIG. 7, a via hole 58 penetrating the mask film 15, the adhesive layer 14, and the second insulating layer 12 is formed by a YAG laser or the like at a predetermined position so that a part of the second wiring 10 is exposed. To do. The via hole 58 is formed at a position corresponding to the first wiring 1 that is electrically connected to the second wiring 10.

  As shown in FIG. 8, a conductive paste 68 is printed and filled in the via hole 58 by screen printing or the like. For example, the conductive paste 68 is a conductive paste containing a conductive filler whose main component is a solder material such as silver.

  As shown in FIG. 9, the mask film 15 is removed. Then, the insulating paste 66 is brought into contact with the first wiring 1a. At the same time, the conductive paste 68 is brought into contact with the first wiring 1.

    As shown in FIG. 10, the adhesive layer 14 and the first insulating layer 2 are bonded by heating while pressing the adhesive layer 14 against the first insulating layer 2. At the same time, the conductive paste 68 is cured to form the via conductor 18 that electrically connects the first wiring 1 and the second wiring 10. Further, the insulating paste 66 is cured to form the via insulator 16 between the first wiring 1 a and the second wiring 10. In this way, the multilayer wiring board shown in FIG. 1 is manufactured.

  As described above, the formation of the via insulator 16 can be performed according to the process of forming the via conductor 18. Therefore, a new process or apparatus is unnecessary, and an increase in manufacturing cost due to the process of forming the via insulator 16 can be suppressed. Moreover, the part which protruded from the contact bonding layer 14 of the electrically conductive paste 68 shown in FIG. 9 and the insulating paste 66 is pressed, and spreads on the 1st wiring 1 and 1a, respectively.

  The cured via insulator 16 and the via conductor 18 have Young's moduli of 1 GPa to 100 GPa, respectively, and have a larger Young's modulus than the adhesive layer 14. Therefore, the distortion of the multilayer wiring board can be reduced and the flatness of the surface can be maintained, and the connection reliability can be improved.

  Further, since distortion of the multilayer wiring board can be reduced, it is not necessary to select a material with low fluidity for the adhesive layer 14. Therefore, it is possible to use an existing material that is generally used, and it is possible to avoid a decrease in reliability and an increase in material cost.

  In the above description, the via hole 58 is formed after the dummy via hole 56 is filled with the insulating paste 66. However, the via hole 58 may be formed before the dummy via hole 56 is formed. In this case, the dummy via hole 56 is formed after the formed via hole 58 is filled with the conductive paste 68.

  Moreover, you may use thermoplastic base materials, such as a liquid crystal polymer, as the 1st and 2nd insulating layers 2 and 12. FIG. The thermoplastic base material can generate fluidity depending on pressing conditions. Therefore, for example, it is possible to use a configuration in which the first and second insulating layers 2 and 12 are directly bonded without using the adhesive layer 14 shown in FIG.

  In the embodiment, the description has been given by using the two-layer wiring board, but the number of wiring boards stacked is not limited, and may be a multilayer wiring board having three or more layers. For example, as shown in FIG. 11, a third insulating layer 22 having a third wiring 20 may be further laminated on the second insulating layer 12 having the second wiring 10 via an adhesive layer 24. The third wiring 20 is electrically connected to the second wiring 10 by the via conductor 28. Further, as shown in FIG. 12, when there is a second wiring 10a that is not electrically connected to the third wiring 20, a via insulator 26 may be disposed between the third wiring 20 and the second wiring 10a. .

(Other embodiments)
Although the embodiments of the present invention have been described as described above, it should not be understood that the descriptions and drawings constituting a part of this disclosure limit the present invention. From this disclosure, various alternative embodiments, examples and operational techniques will be apparent to those skilled in the art. Accordingly, the technical scope of the present invention is defined only by the invention specifying matters according to the scope of claims reasonable from the above description.

  The present invention can be applied to a multilayer wiring board and a manufacturing method thereof.

DESCRIPTION OF SYMBOLS 1, 1a ... 1st wiring 2 ... 1st insulating layer 10, 10a ... 2nd wiring 12 ... 2nd insulating layer 14 ... Adhesive layer 15 ... Mask film 16 ... Via insulator 18 ... Via conductor 56 ... Dummy via hole 58 ... Via hole 66 ... Insulating paste 68 ... Conductive paste

Claims (3)

A first wiring disposed on one main surface of the first insulating layer;
A second wiring disposed on one main surface of the second insulating layer;
An adhesive layer disposed between one main surface of the first insulating layer and the other main surface of the second insulating layer, and the second insulating layer; the first and second wirings; Via insulators disposed between;
A via conductor provided through the adhesive layer and the second insulating layer and electrically connecting the first and second wirings;
The multilayer wiring board, wherein the via insulator and the via conductor have a Young's modulus greater than that of the adhesive layer.   2. The multilayer wiring board according to claim 1, wherein a Young's modulus of the via insulator is in a range of 0.1 to 10 times that of the via conductor. Forming a first wiring on one main surface of the first insulating layer;
Forming a second wiring on one main surface of the second insulating layer;
Laminating an adhesive layer and a mask film on the other main surface of the second insulating layer;
In the first wiring, the mask film, the adhesive layer, and the second so that a part of the second wiring is exposed at a position corresponding to the first wiring that is electrically insulated from the second wiring. Forming a dummy via hole penetrating the insulating layer;
Filling the dummy via hole with an insulating paste containing an insulating filler having a Young's modulus larger than that of the adhesive layer;
In the first wiring, the mask film, the adhesive layer, and the second so that a part of the second wiring is exposed at a position corresponding to the first wiring that is electrically connected to the second wiring. Forming a via hole penetrating the insulating layer;
Filling the via hole with a conductive paste containing metal;
Removing the mask film and bringing the insulating paste and the conductive paste into contact with the corresponding first wiring;
By heating the adhesive layer while pressing the adhesive layer against the first insulating layer, the adhesive layer and the first insulating layer are bonded, and the conductive paste is cured to electrically connect the first and second wirings. Forming a via conductor to be connected to the substrate and curing the insulating paste to form a via insulator between the first and second wirings.

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