WO2012117773A1 - Mémoire à semi-conducteurs - Google Patents

Mémoire à semi-conducteurs Download PDF

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Publication number
WO2012117773A1
WO2012117773A1 PCT/JP2012/051570 JP2012051570W WO2012117773A1 WO 2012117773 A1 WO2012117773 A1 WO 2012117773A1 JP 2012051570 W JP2012051570 W JP 2012051570W WO 2012117773 A1 WO2012117773 A1 WO 2012117773A1
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solid
state memory
thin film
recording layer
layer
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PCT/JP2012/051570
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English (en)
Japanese (ja)
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富永 淳二
アレキサンダー コロボフ
ポール フォンズ
俊通 新谷
貴浩 小高
貴博 森川
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独立行政法人産業技術総合研究所
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Publication of WO2012117773A1 publication Critical patent/WO2012117773A1/fr

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/20Multistable switching devices, e.g. memristors
    • H10N70/231Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect
    • H10N70/235Multistable switching devices, e.g. memristors based on solid-state phase change, e.g. between amorphous and crystalline phases, Ovshinsky effect between different crystalline phases, e.g. cubic and hexagonal
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/011Manufacture or treatment of multistable switching devices
    • H10N70/021Formation of switching materials, e.g. deposition of layers
    • H10N70/026Formation of switching materials, e.g. deposition of layers by physical vapor deposition, e.g. sputtering
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/821Device geometry
    • H10N70/826Device geometry adapted for essentially vertical current flow, e.g. sandwich or pillar type devices
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/841Electrodes
    • H10N70/8413Electrodes adapted for resistive heating
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10NELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10N70/00Solid-state devices having no potential barriers, and specially adapted for rectifying, amplifying, oscillating or switching
    • H10N70/801Constructional details of multistable switching devices
    • H10N70/881Switching materials
    • H10N70/882Compounds of sulfur, selenium or tellurium, e.g. chalcogenides
    • H10N70/8828Tellurides, e.g. GeSbTe

Definitions

  • the present invention relates to a solid state memory in which a chalcogen compound containing tellurium (Te) as a main component is used for a recording layer, and the difference in physical properties associated with the phase change in the recording layer is used for recording, erasing, and reproducing data. .
  • Te tellurium
  • phase change random access memory which is one type of solid-state memory, uses a chalcogen compound containing Te as a material constituting the recording layer.
  • the solid-state memory uses a phase change of a crystal structure called a primary phase transformation (herein simply referred to as a phase change) of a crystalline state and an amorphous state of a substance constituting a recording layer.
  • a phase change a phase change of a crystal structure called a primary phase transformation (herein simply referred to as a phase change) of a crystalline state and an amorphous state of a substance constituting a recording layer.
  • a chalcogen compound used for the recording layer a Ge 2 Sb 2 Te 5 alloy is generally used.
  • the two states of data recording and erasing in the solid-state memory are realized, for example, by assigning the crystalline state to the recording state and the amorphous state to the erasing state, and the solid-state memory is designed based on this basic principle (for example, Patent Document 1).
  • the material constituting the recording layer of the solid-state memory is formed between the upper and lower electrodes using a vacuum film formation method such as a sputtering method.
  • a vacuum film formation method such as a sputtering method.
  • sputtering is performed using a target composed of a compound composition used as a recording layer, and a single-layer alloy thin film is formed and used as a recording layer.
  • the recording layer of the solid-state memory is composed of a chalcogen compound polycrystal.
  • the axial orientation of each microcrystal grain is random, and there is an interface resistance at the interface between each microcrystal grain.
  • the interfacial resistance is random depending on the interface state of each microcrystal grain, and as a result, the resistance value of the crystal state in the recording layer of the solid memory has a constant distribution from the average value (non- Patent Document 1).
  • each microcrystal grain has a different direction and a different size due to a volume change of about 10% that occurs during the phase change between crystal and amorphous. Stress is applied. As data is recorded and erased, the crystal-amorphous phase change is repeated, and the stress is repeatedly applied to the recording layer. As a result, it is considered that the solid memory is destroyed by repeated material flow and deformation of the entire film, and the number of repeated record erasures is limited (Non-Patent Document 2).
  • the present inventors have not formed a recording layer on a Ge 2 Te 2 thin film composed of germanium (Ge) atoms and Te atoms, but a Ge 2 Sb 2 Te 5 alloy single layer film. It has been proposed that a superlattice structure is formed by dividing and laminating Sb 2 Te 3 thin films composed of Sb atoms and Te atoms (Patent Document 2).
  • the recording layer made of the superlattice has been called an amorphous state in the conventional Ge 2 Sb 2 Te 5 alloy by returning Ge atoms diffused at the interface into the original Ge 2 Te 2 layer. It returns to the “structure similar to amorphous” having the same electrical resistance value as the structure.
  • This “structure similar to amorphous” state is assigned to, for example, an erased state (generally called a Reset state).
  • Patent Document 2 A memory is provided (Patent Document 2).
  • Non-Patent Document 3 a Ge—Cu—Te alloy is attracting attention in place of the Ge—Sb—Te alloy (for example, Non-Patent Document 3).
  • the composition is a eutectic composition of Ge 2 Te 2 and CuTe 2 , the crystal phase transition temperature is as high as 200 ° C. or more, and the high temperature storage stability is excellent. For this reason, GeCu 2 Te 3 alloy is particularly expected.
  • Japanese Patent Publication Japanese Patent Laid-Open No. 2002-203392 (published on July 19, 2002)” Japanese Patent Publication “JP 2009-59902 A (published on March 19, 2009)”
  • the GeCu 2 Te 3 alloy has a drawback that the resistance value in the amorphous state is an order of magnitude smaller than that of the conventional Ge 2 Sb 2 Te 5 alloy, and the difference from the resistance value in the crystalline state is as small as about two orders of magnitude.
  • the ratio of the resistance values When the ratio of the resistance values is small, the difference between the voltage signals obtained at the time of reproducing the solid-state memory becomes small, and in order to obtain a practical signal / noise ratio, it is necessary to increase the driving current at the time of reproduction.
  • the above drive current increases in various ways in solid-state memory, such as increased power consumption, temperature rise with increased Joule heat, melting or melting of the material constituting the recording layer, and segregation of compounds with different composition ratios associated therewith. Adversely affected.
  • the superlattice made of Ge 2 Sb 2 Te 5 alloy or Ge 2 Te 2 and Sb 2 Te 3 can be used for repeated recording and erasing.
  • the current situation is that it does not reach a solid-state memory using a recording layer.
  • the present invention provides an Sb-free solid memory in which the resistance value changes sufficiently with the phase change, and the number of repeated recording / erasing operations is similar to that of a Ge—Sb—Te solid memory.
  • the purpose is to do.
  • a solid-state memory is a solid-state memory including a recording layer whose electrical characteristics change due to a phase change of a substance, and the recording layer includes germanium and tellurium. It is characterized by being constituted by a superlattice formed by laminating a thin film formed and a thin film formed of copper and tellurium.
  • germanium (Ge) is used as a recording layer of the solid-state memory in order to provide an Sb-free solid-state memory having performance comparable to that of a Ge—Sb—Te solid-state memory.
  • a superlattice structure of a thin film made of copper and tellurium (Te) hereinafter referred to as Ge—Te thin film
  • a thin film formed of copper (Cu) and Te hereinafter referred to as Cu—Te thin film.
  • the volume change accompanying the phase change of the superlattice structure composed of a Ge—Te-based thin film and a Cu—Te-based thin film is extremely small as shown in the examples described later.
  • the volume change accompanying the phase change gives mechanical stress to a structure such as an electrode disposed above and below the recording layer when data recording and erasing are repeated.
  • the stress is repeatedly applied to the solid-state memory, the solid-state memory is destroyed due to shearing or peeling at each layer interface. Therefore, the extremely small volume change accompanying the phase change contributes to extending the repeated life of data recording and erasing.
  • a solid-state memory while being Sb-free, ensuring the change is large enough electrical resistance value of the solid-state memory with a phase change, a solid-state memory also the number of repeated recording erasing data reaching 10 11 times can do. These have performance comparable to that of a solid-state memory using a Ge—Sb—Te alloy as a recording layer.
  • (A) shows the crystal structure of crystal phase A
  • (b) shows the crystal structure of crystal phase B.
  • (A) is sectional drawing which shows the outline of the solid-state memory using the recording layer which consists of a superlattice based on one Embodiment of this invention.
  • (B) is a cross-sectional view schematically showing a superlattice composed of a Ge 2 Te 2 thin film and a CuTe 2 thin film constituting a recording layer.
  • Ge is a sectional view showing a 2 Cu 1 Te 4 schematically solid memory using the recording layer made of an alloy.
  • the recording layer of the solid memory according to the present invention includes a superstructure composed of a Ge—Te alloy film and a Cu—Te alloy film.
  • a lattice structure is used.
  • FIG. 1 is a diagram showing a superlattice structure when a Ge 2 Te 2 layer 4 is used as an example of a Ge—Te based alloy film and a CuTe 2 layer 5 is used as an example of a Cu—Te based alloy film.
  • the superlattice structure shown in FIG. 1 is a structure determined using first-principles calculations.
  • the film thicknesses of Ge 2 Te 2 layer 4 and CuTe 2 layer 5 are 0.77 nm and 0.54 nm, respectively. is there.
  • a superlattice is a crystal lattice having a long-period structure artificially formed by regularly laminating a plurality of types of crystal thin films.
  • the superlattice structure means such a crystal lattice structure.
  • the ratio of the number of Ge atoms to Te is more preferably smaller, and the ratio of the number of Ge atoms to the total number of atoms in the Ge—Te-based alloy film is greater than 0 and less than 0.00. More preferably, it is 5 or less.
  • the ratio of the number of Cu atoms to the total number of atoms in the Cu—Te-based alloy film is more preferably greater than 0 and less than or equal to 0.5, and more preferably between 0.2 and 0.4. The following is more preferable, and it is particularly preferable to use a CuTe 2 film as the Cu—Te-based alloy film.
  • a superlattice composed of a stacked structure of a Ge 2 Te 2 layer 4 composed of Ge atoms 1 and Te atoms 2 and a CuTe 2 layer 5 composed of Te atoms 2 and Cu atoms 3 has two stable structures. It has bistability with a certain structure A (FIG. 1A) and structure B (FIG. 1B).
  • the solid-state memory functions as a solid-state memory by utilizing the phase change between the structure A and the structure B in the recording layer.
  • the positions of the Ge layer and the Te layer in the Ge 2 Te 2 layer 4 are interchanged. Further, the intervals between the GeTe layers are slightly different, and the interval of the structure B is wider than that of the structure A.
  • the phase change from the structure A to the structure B or from the structure B to the structure A can be caused by electric energy means.
  • the movement of the GeTe layer accompanying the phase change is unidirectional (perpendicular to the substrate surface) and can be said to have coherency. Therefore, it is possible to efficiently use the input energy for the phase change, and as a result, there is an advantage that less energy is required to cause the phase change.
  • the volume change accompanying the phase change can be made extremely small, and the change in the resistance value accompanying the phase change of the recording layer can be 3 digits. It can be large enough.
  • the bond valence of Ge is tetravalent in the structure A ((a) in FIG. 1).
  • the structure B is hexavalent ((b) in FIG. 1).
  • the bond valence of Ge changes from tetravalent to hexavalent because the Ge layer and the Te layer are interchanged with each other in accordance with the phase change, and the distance between the CuTe 2 layer 5 becomes closer and a bond is formed between Ge and Te. Because. FIG.
  • FIG. 1 is a diagram showing the structure of a basic cell of a superlattice composed of a Ge 2 Te 2 thin film 4 and a CuTe 2 thin film 5.
  • Ge atom 1 becomes hexavalent, electrical characteristics in the direction perpendicular to the substrate surface become metallic, and the resistance value is significantly reduced. Thereby, the change of the resistance value at the time of phase change can be increased more preferably as a solid-state memory.
  • the structure A and the structure B are greatly different not only in electrical characteristics but also in optical characteristics, it is possible to use an optical technique as a means for reproducing recorded data.
  • a pulsed current can be used as an electric energy means for inducing a phase change.
  • the phase change between the structure A and the structure B can be arbitrarily repeated by adjusting the current value of the pulse current flowing at this time and the time (hereinafter referred to as pulse time) for flowing the current.
  • pulse time the time for flowing the current.
  • FIG. 2A is a cross-sectional view schematically showing a solid-state memory 10 using a superlattice thin film composed of a Ge 2 Te 2 thin film 4 and a CuTe 2 thin film 5 as a recording layer 11.
  • a schematic enlarged view of the recording layer 11 is shown in FIG.
  • the recording layer 11 is sandwiched between the upper electrode 14 and the Joule heat generating heater 15. Further, the upper electrode 14 is in electrical contact with the read line 13 and the Joule heat generating heater 15 is in electrical contact with the write line 16, respectively. That is, the Joule heat generating heater 15 serves as a lower electrode as well as a heater.
  • the current is used as the electric energy means.
  • Joule heat is generated in the Joule heat generation heater 15, the recording layer 11 is heated, and the temperature rises.
  • the temperature of the recording layer 11 is controlled, and the phase change between the structure A and the structure B can be repeated.
  • FIG. 2 is a cross-sectional view schematically showing a solid-state memory using a superlattice thin film composed of a Ge 2 Te 2 thin film 4 and a CuTe 2 thin film 5 as a recording layer 11.
  • the solid-state memory according to an embodiment of the present invention can be formed as, for example, a phase change RAM having a general self-resistance heating type configuration (for example, Patent Document 1).
  • a phase change RAM having a general self-resistance heating type configuration
  • the write line 16 and the Joule heat generation heater 15 are formed on the substrate.
  • the recording layer 11, the upper electrode 14, and the readout line 13 may be sequentially formed.
  • a film forming method at this time for example, a general film forming method such as a sputtering method can be used. An example of a method for manufacturing a solid-state memory is described below.
  • a silicon (Si) wafer is used as a substrate, and a writing line 16 and a Joule heat generating heater 15 are formed by sputtering.
  • tungsten can be used for the Joule heat generation heater.
  • a superlattice of a Ge—Te alloy film and a Cu—Te alloy film used for the recording layer is formed by sputtering.
  • a target capable of forming a desired compound for example, Ge 2 Te 2 and CuTe 2 .
  • an upper electrode 14 and a readout line 13 made of tungsten are formed to complete the phase change RAM.
  • the film thickness of the Ge—Te thin film and the Cu—Te thin film constituting the superlattice structure is desirably 0.5 nm or more and 8 nm or less. By setting the film thickness within this range, a superlattice structure can be suitably realized without disturbing the crystal structure of each thin film.
  • a general photolithography process can be used for patterning of the electrode and the recording layer.
  • the present invention can also be expressed as follows.
  • a solid-state memory mainly composed of Cu, Ge, and Te, whose electrical characteristics change due to a phase transformation of a substance, and a material for recording and reproducing data exhibits the phase transformation.
  • a solid-state memory comprising a laminated structure of an artificial superlattice structure of a thin film composed of a parent phase.
  • the stacked structure is formed of a multilayer film in which a Te alloy thin film containing Ge atoms and a Te alloy thin film containing Cu atoms are stacked on each other. memory.
  • Example 1 The crystal structure and various characteristics of the superlattice used for the recording layer have a significant effect on the performance of solid-state memory (change in resistance value due to phase change, required drive current value, and the number of times recording can be repeatedly erased, etc.) So very important.
  • the superlattices of the structure A and the structure B described above were fabricated and confirmed to have the following characteristics.
  • the superlattice composed of the Ge 2 Te 2 layer 4 and the CuTe 2 layer 5 causes a phase change between the structure A and the structure B by applying electrical energy (see FIG. 1). That is, the superlattice selects one of the structure A or the structure B that is bistable in accordance with the applied energy.
  • the energy to be applied is not limited to electrical energy, and it is also possible to select a superlattice structure using thermal energy.
  • the superlattice thin film of the structure A and the structure B was formed using the difference in applied thermal energy.
  • a superlattice thin film having a film thickness of about 40 nm composed of Ge 2 Te 2 layer 4 and CuTe 2 layer 5 is formed on Si wafers having different substrate temperatures by sputtering, and the crystal structure, electrical characteristics, and optical properties are measured. The characteristics were compared.
  • the substrate temperatures during film formation are 150 ° C. and 250 ° C., respectively, and are hereinafter referred to as sample a and sample b.
  • the sample a was about 5 M ⁇ and the sample b was 30 k ⁇ . From this, it was confirmed that when the phase change between the structure A and the structure B is used for the phase change RAM, the signal at the time of reading shows a change of about 170 times.
  • the superlattice composed of the Ge 2 Te 2 layer 4 and the CuTe 2 layer 5 is suitable as a recording layer of a solid-state memory because the change in the resistance value accompanying the phase change is three digits.
  • the superlattice composed of the Ge 2 Te 2 layer 4 and the CuTe 2 layer 5 has a very small volume change due to the phase change, and therefore can be expected to improve the number of repetitions of recording and erasing.
  • Example 2 A solid-state memory according to the present invention was fabricated using the above-described general self-resistance heating type basic configuration (FIG. 2).
  • a Si wafer was used for the substrate, and tungsten was used for the Joule heat generation heater 15 and the upper electrode 14.
  • the film thickness of the recording layer 11 was 26 nm.
  • the cell size of the recording layer was 100 ⁇ 100 nm 2 .
  • the current value required for recording and erasing information and the pulse time for flowing the current were examined by passing a current having a waveform determined by a program in advance through the current path 20 of the solid-state memory.
  • the current value required for the phase change from the structure A to the structure B was 0.1 mA, and the pulse time was 100 ns.
  • the current value required for the phase change from the structure B to the structure A was 0.5 mA, and the pulse time was 50 ns.
  • the current of the above waveform was continuously passed through the solid-state memory to repeatedly measure the number of recording / erasing. As a result, in the solid-state memory used in this example, it was possible to repeat recording and erasing of 10 11 times.
  • the current value required for recording and erasing information was examined by flowing a current having a waveform determined in advance by a program through the current path 20 of the solid-state memory.
  • the pulse time for supplying current was the same as the pulse time described in Example 2.
  • the current value required for the phase change from the crystal phase A to the crystal phase B was 0.3 mA.
  • the current value from the crystal phase B to the crystal phase A was 1.9 mA.
  • a continuous waveform was programmed using the current value obtained here and the pulse time used in Example 2, and a current was passed through the phase change RAM based on the waveform, and the number of times of recording and erasing was measured repeatedly.
  • repeated recording number of times of erasing solid memory using a single layer film of Ge 2 Cu 1 Te 4 alloy as a recording layer 12 was 10 4 times.
  • a solid-state memory is a solid-state memory including a recording layer whose electrical characteristics change due to a phase change of a substance, and the recording layer includes germanium and tellurium. It is characterized by being constituted by a superlattice formed by laminating a thin film formed and a thin film formed of copper and tellurium.
  • germanium (Ge) is used as a recording layer of the solid-state memory in order to provide an Sb-free solid-state memory having performance comparable to that of a Ge—Sb—Te solid-state memory.
  • a superlattice structure of a thin film made of copper and tellurium (Te) hereinafter referred to as Ge—Te thin film
  • a thin film formed of copper (Cu) and Te hereinafter referred to as Cu—Te thin film.
  • the volume change accompanying the phase change of the superlattice structure composed of a Ge—Te-based thin film and a Cu—Te-based thin film is extremely small as shown in the above-described embodiments.
  • the volume change accompanying the phase change gives mechanical stress to a structure such as an electrode disposed above and below the recording layer when data recording and erasing are repeated.
  • the stress is repeatedly applied to the solid-state memory, the solid-state memory is destroyed due to shearing or peeling at each layer interface. Therefore, the extremely small volume change accompanying the phase change contributes to extending the repeated life of data recording and erasing.
  • the thin film formed of germanium and tellurium is a Ge 2 Te 2 thin film
  • the thin film formed of copper and tellurium is a CuTe 2 thin film. It is preferable.
  • each film thickness of the thin film is 0.5 nm or more and 8 nm or less.
  • the thin film formed of germanium and tellurium may change its electric resistance value when the germanium has a tetravalent or hexavalent bond valence. It is preferable that the data recording state or the erasing state is expressed by the electric resistance value.
  • the superlattice structure composed of the Ge—Te-based thin film and the Cu—Te-based thin film has bistability and can take two types of crystal structures.
  • the difference between the two types of crystal structures is mainly the difference in the distance between GeTe layers in the Ge—Te thin film layer, and this also affects the interlayer distance between the GeTe layer and the Cu—Te layer.
  • the bond valence of Ge atoms is tetravalent.
  • the Ge—Te-based thin film layer has a crystal structure in which the GeTe layers are separated from each other (see FIG. 1B), the bond valence of Ge atoms is hexavalent.
  • the phase change in the two types of crystal structures affects the bonding state of Ge atoms in the direction perpendicular to the substrate surface.
  • the Ge atoms of the Ge—Te-based thin film layer undergo a phase change from tetravalent to hexavalent, coupling in the direction perpendicular to the substrate of the superlattice becomes strong, and the electrical resistance value of the recording layer is greatly reduced.
  • the data recording state or erasing state can be expressed by the electric resistance value.
  • the solid-state memory according to the present invention can be successfully functioned as a memory. .
  • the tetravalent and hexavalent bond mutations cause a change in film thickness of about 0.2% in the vertical direction, but 10% of a commonly used phase change material alloy composed of Ge—Sb—Te. Much smaller than the degree of change.
  • data may be reproduced by detecting the electrical resistance value.
  • a sufficiently large value is realized as a change in resistance value accompanying the phase change.
  • the fact that the change in the resistance value accompanying the phase change is large means that the change in the output voltage value is large even if the current value flowing through the solid state memory is set small during reproduction. That is, the solid state memory can be driven with a smaller current value.
  • Joule heat generated by the drive current gives a thermal history to the recording layer and the structure surrounding the recording layer, and this thermal history also causes the solid memory to be destroyed as in the case of the volume change. Therefore, the small driving current of the solid-state memory contributes to extending the repeated life of data recording and erasing.
  • the ratio of the number of germanium atoms to the total number of atoms in the thin film formed of germanium and tellurium is preferably 0.5 or less.
  • the ratio of the number of copper atoms to the total number of atoms is preferably 0.5 or less.
  • a superlattice structure having bistability can be suitably formed.
  • the solid-state memory records or erases information by changing the crystal structure of the recording layer using electric energy means.
  • the solid-state memory can reproduce information by utilizing the change in the electrical characteristics of the recording layer as a result of the phase change.
  • the present invention can be used in the field of manufacturing electronic components.

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  • Manufacturing & Machinery (AREA)
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  • Semiconductor Memories (AREA)
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Abstract

La présente invention concerne une mémoire à semi-conducteurs pourvue d'une couche d'enregistrement dont les propriétés électriques changent avec la transition de phase de la matière. La couche d'enregistrement est produite à partir d'un super-réseau obtenu par stratification d'une couche mince composée de germanium et de tellurium et d'une couche mince composée de cuivre et de tellurium.
PCT/JP2012/051570 2011-02-28 2012-01-25 Mémoire à semi-conducteurs WO2012117773A1 (fr)

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US9601689B2 (en) 2014-09-11 2017-03-21 Kabushiki Kaisha Toshiba Memory device

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JP6086097B2 (ja) * 2014-06-17 2017-03-01 国立大学法人東北大学 多段相変化材料および多値記録相変化メモリ素子
CN108598256B (zh) * 2015-04-27 2021-06-18 江苏理工学院 一种用于相变存储器的Ge/Sb类超晶格相变薄膜材料的制备方法

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WO2011030916A1 (fr) * 2009-09-11 2011-03-17 国立大学法人東北大学 Matière à changement de phase et élément de mémoire à changement de phase

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